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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
a25c8b2f | 2 | /* |
15c6784c | 3 | * Thunderbolt driver - switch/port utility functions |
a25c8b2f AN |
4 | * |
5 | * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> | |
15c6784c | 6 | * Copyright (C) 2018, Intel Corporation |
a25c8b2f AN |
7 | */ |
8 | ||
9 | #include <linux/delay.h> | |
e6b245cc MW |
10 | #include <linux/idr.h> |
11 | #include <linux/nvmem-provider.h> | |
2d8ff0b5 | 12 | #include <linux/pm_runtime.h> |
09f11b6c | 13 | #include <linux/sched/signal.h> |
e6b245cc | 14 | #include <linux/sizes.h> |
10fefe56 | 15 | #include <linux/slab.h> |
e6b245cc | 16 | #include <linux/vmalloc.h> |
a25c8b2f AN |
17 | |
18 | #include "tb.h" | |
19 | ||
e6b245cc MW |
20 | /* Switch NVM support */ |
21 | ||
22 | #define NVM_DEVID 0x05 | |
23 | #define NVM_VERSION 0x08 | |
24 | #define NVM_CSS 0x10 | |
25 | #define NVM_FLASH_SIZE 0x45 | |
26 | ||
27 | #define NVM_MIN_SIZE SZ_32K | |
28 | #define NVM_MAX_SIZE SZ_512K | |
29 | ||
30 | static DEFINE_IDA(nvm_ida); | |
31 | ||
32 | struct nvm_auth_status { | |
33 | struct list_head list; | |
7c39ffe7 | 34 | uuid_t uuid; |
e6b245cc MW |
35 | u32 status; |
36 | }; | |
37 | ||
38 | /* | |
39 | * Hold NVM authentication failure status per switch This information | |
40 | * needs to stay around even when the switch gets power cycled so we | |
41 | * keep it separately. | |
42 | */ | |
43 | static LIST_HEAD(nvm_auth_status_cache); | |
44 | static DEFINE_MUTEX(nvm_auth_status_lock); | |
45 | ||
46 | static struct nvm_auth_status *__nvm_get_auth_status(const struct tb_switch *sw) | |
47 | { | |
48 | struct nvm_auth_status *st; | |
49 | ||
50 | list_for_each_entry(st, &nvm_auth_status_cache, list) { | |
7c39ffe7 | 51 | if (uuid_equal(&st->uuid, sw->uuid)) |
e6b245cc MW |
52 | return st; |
53 | } | |
54 | ||
55 | return NULL; | |
56 | } | |
57 | ||
58 | static void nvm_get_auth_status(const struct tb_switch *sw, u32 *status) | |
59 | { | |
60 | struct nvm_auth_status *st; | |
61 | ||
62 | mutex_lock(&nvm_auth_status_lock); | |
63 | st = __nvm_get_auth_status(sw); | |
64 | mutex_unlock(&nvm_auth_status_lock); | |
65 | ||
66 | *status = st ? st->status : 0; | |
67 | } | |
68 | ||
69 | static void nvm_set_auth_status(const struct tb_switch *sw, u32 status) | |
70 | { | |
71 | struct nvm_auth_status *st; | |
72 | ||
73 | if (WARN_ON(!sw->uuid)) | |
74 | return; | |
75 | ||
76 | mutex_lock(&nvm_auth_status_lock); | |
77 | st = __nvm_get_auth_status(sw); | |
78 | ||
79 | if (!st) { | |
80 | st = kzalloc(sizeof(*st), GFP_KERNEL); | |
81 | if (!st) | |
82 | goto unlock; | |
83 | ||
84 | memcpy(&st->uuid, sw->uuid, sizeof(st->uuid)); | |
85 | INIT_LIST_HEAD(&st->list); | |
86 | list_add_tail(&st->list, &nvm_auth_status_cache); | |
87 | } | |
88 | ||
89 | st->status = status; | |
90 | unlock: | |
91 | mutex_unlock(&nvm_auth_status_lock); | |
92 | } | |
93 | ||
94 | static void nvm_clear_auth_status(const struct tb_switch *sw) | |
95 | { | |
96 | struct nvm_auth_status *st; | |
97 | ||
98 | mutex_lock(&nvm_auth_status_lock); | |
99 | st = __nvm_get_auth_status(sw); | |
100 | if (st) { | |
101 | list_del(&st->list); | |
102 | kfree(st); | |
103 | } | |
104 | mutex_unlock(&nvm_auth_status_lock); | |
105 | } | |
106 | ||
107 | static int nvm_validate_and_write(struct tb_switch *sw) | |
108 | { | |
109 | unsigned int image_size, hdr_size; | |
110 | const u8 *buf = sw->nvm->buf; | |
111 | u16 ds_size; | |
112 | int ret; | |
113 | ||
114 | if (!buf) | |
115 | return -EINVAL; | |
116 | ||
117 | image_size = sw->nvm->buf_data_size; | |
118 | if (image_size < NVM_MIN_SIZE || image_size > NVM_MAX_SIZE) | |
119 | return -EINVAL; | |
120 | ||
121 | /* | |
122 | * FARB pointer must point inside the image and must at least | |
123 | * contain parts of the digital section we will be reading here. | |
124 | */ | |
125 | hdr_size = (*(u32 *)buf) & 0xffffff; | |
126 | if (hdr_size + NVM_DEVID + 2 >= image_size) | |
127 | return -EINVAL; | |
128 | ||
129 | /* Digital section start should be aligned to 4k page */ | |
130 | if (!IS_ALIGNED(hdr_size, SZ_4K)) | |
131 | return -EINVAL; | |
132 | ||
133 | /* | |
134 | * Read digital section size and check that it also fits inside | |
135 | * the image. | |
136 | */ | |
137 | ds_size = *(u16 *)(buf + hdr_size); | |
138 | if (ds_size >= image_size) | |
139 | return -EINVAL; | |
140 | ||
141 | if (!sw->safe_mode) { | |
142 | u16 device_id; | |
143 | ||
144 | /* | |
145 | * Make sure the device ID in the image matches the one | |
146 | * we read from the switch config space. | |
147 | */ | |
148 | device_id = *(u16 *)(buf + hdr_size + NVM_DEVID); | |
149 | if (device_id != sw->config.device_id) | |
150 | return -EINVAL; | |
151 | ||
152 | if (sw->generation < 3) { | |
153 | /* Write CSS headers first */ | |
154 | ret = dma_port_flash_write(sw->dma_port, | |
155 | DMA_PORT_CSS_ADDRESS, buf + NVM_CSS, | |
156 | DMA_PORT_CSS_MAX_SIZE); | |
157 | if (ret) | |
158 | return ret; | |
159 | } | |
160 | ||
161 | /* Skip headers in the image */ | |
162 | buf += hdr_size; | |
163 | image_size -= hdr_size; | |
164 | } | |
165 | ||
166 | return dma_port_flash_write(sw->dma_port, 0, buf, image_size); | |
167 | } | |
168 | ||
169 | static int nvm_authenticate_host(struct tb_switch *sw) | |
170 | { | |
171 | int ret; | |
172 | ||
173 | /* | |
174 | * Root switch NVM upgrade requires that we disconnect the | |
d1ff7024 | 175 | * existing paths first (in case it is not in safe mode |
e6b245cc MW |
176 | * already). |
177 | */ | |
178 | if (!sw->safe_mode) { | |
d1ff7024 | 179 | ret = tb_domain_disconnect_all_paths(sw->tb); |
e6b245cc MW |
180 | if (ret) |
181 | return ret; | |
182 | /* | |
183 | * The host controller goes away pretty soon after this if | |
184 | * everything goes well so getting timeout is expected. | |
185 | */ | |
186 | ret = dma_port_flash_update_auth(sw->dma_port); | |
187 | return ret == -ETIMEDOUT ? 0 : ret; | |
188 | } | |
189 | ||
190 | /* | |
191 | * From safe mode we can get out by just power cycling the | |
192 | * switch. | |
193 | */ | |
194 | dma_port_power_cycle(sw->dma_port); | |
195 | return 0; | |
196 | } | |
197 | ||
198 | static int nvm_authenticate_device(struct tb_switch *sw) | |
199 | { | |
200 | int ret, retries = 10; | |
201 | ||
202 | ret = dma_port_flash_update_auth(sw->dma_port); | |
203 | if (ret && ret != -ETIMEDOUT) | |
204 | return ret; | |
205 | ||
206 | /* | |
207 | * Poll here for the authentication status. It takes some time | |
208 | * for the device to respond (we get timeout for a while). Once | |
209 | * we get response the device needs to be power cycled in order | |
210 | * to the new NVM to be taken into use. | |
211 | */ | |
212 | do { | |
213 | u32 status; | |
214 | ||
215 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); | |
216 | if (ret < 0 && ret != -ETIMEDOUT) | |
217 | return ret; | |
218 | if (ret > 0) { | |
219 | if (status) { | |
220 | tb_sw_warn(sw, "failed to authenticate NVM\n"); | |
221 | nvm_set_auth_status(sw, status); | |
222 | } | |
223 | ||
224 | tb_sw_info(sw, "power cycling the switch now\n"); | |
225 | dma_port_power_cycle(sw->dma_port); | |
226 | return 0; | |
227 | } | |
228 | ||
229 | msleep(500); | |
230 | } while (--retries); | |
231 | ||
232 | return -ETIMEDOUT; | |
233 | } | |
234 | ||
235 | static int tb_switch_nvm_read(void *priv, unsigned int offset, void *val, | |
236 | size_t bytes) | |
237 | { | |
238 | struct tb_switch *sw = priv; | |
2d8ff0b5 MW |
239 | int ret; |
240 | ||
241 | pm_runtime_get_sync(&sw->dev); | |
242 | ret = dma_port_flash_read(sw->dma_port, offset, val, bytes); | |
243 | pm_runtime_mark_last_busy(&sw->dev); | |
244 | pm_runtime_put_autosuspend(&sw->dev); | |
e6b245cc | 245 | |
2d8ff0b5 | 246 | return ret; |
e6b245cc MW |
247 | } |
248 | ||
249 | static int tb_switch_nvm_write(void *priv, unsigned int offset, void *val, | |
250 | size_t bytes) | |
251 | { | |
252 | struct tb_switch *sw = priv; | |
253 | int ret = 0; | |
254 | ||
09f11b6c MW |
255 | if (!mutex_trylock(&sw->tb->lock)) |
256 | return restart_syscall(); | |
e6b245cc MW |
257 | |
258 | /* | |
259 | * Since writing the NVM image might require some special steps, | |
260 | * for example when CSS headers are written, we cache the image | |
261 | * locally here and handle the special cases when the user asks | |
262 | * us to authenticate the image. | |
263 | */ | |
264 | if (!sw->nvm->buf) { | |
265 | sw->nvm->buf = vmalloc(NVM_MAX_SIZE); | |
266 | if (!sw->nvm->buf) { | |
267 | ret = -ENOMEM; | |
268 | goto unlock; | |
269 | } | |
270 | } | |
271 | ||
272 | sw->nvm->buf_data_size = offset + bytes; | |
273 | memcpy(sw->nvm->buf + offset, val, bytes); | |
274 | ||
275 | unlock: | |
09f11b6c | 276 | mutex_unlock(&sw->tb->lock); |
e6b245cc MW |
277 | |
278 | return ret; | |
279 | } | |
280 | ||
281 | static struct nvmem_device *register_nvmem(struct tb_switch *sw, int id, | |
282 | size_t size, bool active) | |
283 | { | |
284 | struct nvmem_config config; | |
285 | ||
286 | memset(&config, 0, sizeof(config)); | |
287 | ||
288 | if (active) { | |
289 | config.name = "nvm_active"; | |
290 | config.reg_read = tb_switch_nvm_read; | |
800161bd | 291 | config.read_only = true; |
e6b245cc MW |
292 | } else { |
293 | config.name = "nvm_non_active"; | |
294 | config.reg_write = tb_switch_nvm_write; | |
800161bd | 295 | config.root_only = true; |
e6b245cc MW |
296 | } |
297 | ||
298 | config.id = id; | |
299 | config.stride = 4; | |
300 | config.word_size = 4; | |
301 | config.size = size; | |
302 | config.dev = &sw->dev; | |
303 | config.owner = THIS_MODULE; | |
e6b245cc MW |
304 | config.priv = sw; |
305 | ||
306 | return nvmem_register(&config); | |
307 | } | |
308 | ||
309 | static int tb_switch_nvm_add(struct tb_switch *sw) | |
310 | { | |
311 | struct nvmem_device *nvm_dev; | |
312 | struct tb_switch_nvm *nvm; | |
313 | u32 val; | |
314 | int ret; | |
315 | ||
316 | if (!sw->dma_port) | |
317 | return 0; | |
318 | ||
319 | nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); | |
320 | if (!nvm) | |
321 | return -ENOMEM; | |
322 | ||
323 | nvm->id = ida_simple_get(&nvm_ida, 0, 0, GFP_KERNEL); | |
324 | ||
325 | /* | |
326 | * If the switch is in safe-mode the only accessible portion of | |
327 | * the NVM is the non-active one where userspace is expected to | |
328 | * write new functional NVM. | |
329 | */ | |
330 | if (!sw->safe_mode) { | |
331 | u32 nvm_size, hdr_size; | |
332 | ||
333 | ret = dma_port_flash_read(sw->dma_port, NVM_FLASH_SIZE, &val, | |
334 | sizeof(val)); | |
335 | if (ret) | |
336 | goto err_ida; | |
337 | ||
338 | hdr_size = sw->generation < 3 ? SZ_8K : SZ_16K; | |
339 | nvm_size = (SZ_1M << (val & 7)) / 8; | |
340 | nvm_size = (nvm_size - hdr_size) / 2; | |
341 | ||
342 | ret = dma_port_flash_read(sw->dma_port, NVM_VERSION, &val, | |
343 | sizeof(val)); | |
344 | if (ret) | |
345 | goto err_ida; | |
346 | ||
347 | nvm->major = val >> 16; | |
348 | nvm->minor = val >> 8; | |
349 | ||
350 | nvm_dev = register_nvmem(sw, nvm->id, nvm_size, true); | |
351 | if (IS_ERR(nvm_dev)) { | |
352 | ret = PTR_ERR(nvm_dev); | |
353 | goto err_ida; | |
354 | } | |
355 | nvm->active = nvm_dev; | |
356 | } | |
357 | ||
358 | nvm_dev = register_nvmem(sw, nvm->id, NVM_MAX_SIZE, false); | |
359 | if (IS_ERR(nvm_dev)) { | |
360 | ret = PTR_ERR(nvm_dev); | |
361 | goto err_nvm_active; | |
362 | } | |
363 | nvm->non_active = nvm_dev; | |
364 | ||
e6b245cc | 365 | sw->nvm = nvm; |
e6b245cc MW |
366 | return 0; |
367 | ||
368 | err_nvm_active: | |
369 | if (nvm->active) | |
370 | nvmem_unregister(nvm->active); | |
371 | err_ida: | |
372 | ida_simple_remove(&nvm_ida, nvm->id); | |
373 | kfree(nvm); | |
374 | ||
375 | return ret; | |
376 | } | |
377 | ||
378 | static void tb_switch_nvm_remove(struct tb_switch *sw) | |
379 | { | |
380 | struct tb_switch_nvm *nvm; | |
381 | ||
e6b245cc MW |
382 | nvm = sw->nvm; |
383 | sw->nvm = NULL; | |
e6b245cc MW |
384 | |
385 | if (!nvm) | |
386 | return; | |
387 | ||
388 | /* Remove authentication status in case the switch is unplugged */ | |
389 | if (!nvm->authenticating) | |
390 | nvm_clear_auth_status(sw); | |
391 | ||
392 | nvmem_unregister(nvm->non_active); | |
393 | if (nvm->active) | |
394 | nvmem_unregister(nvm->active); | |
395 | ida_simple_remove(&nvm_ida, nvm->id); | |
396 | vfree(nvm->buf); | |
397 | kfree(nvm); | |
398 | } | |
399 | ||
a25c8b2f AN |
400 | /* port utility functions */ |
401 | ||
402 | static const char *tb_port_type(struct tb_regs_port_header *port) | |
403 | { | |
404 | switch (port->type >> 16) { | |
405 | case 0: | |
406 | switch ((u8) port->type) { | |
407 | case 0: | |
408 | return "Inactive"; | |
409 | case 1: | |
410 | return "Port"; | |
411 | case 2: | |
412 | return "NHI"; | |
413 | default: | |
414 | return "unknown"; | |
415 | } | |
416 | case 0x2: | |
417 | return "Ethernet"; | |
418 | case 0x8: | |
419 | return "SATA"; | |
420 | case 0xe: | |
421 | return "DP/HDMI"; | |
422 | case 0x10: | |
423 | return "PCIe"; | |
424 | case 0x20: | |
425 | return "USB"; | |
426 | default: | |
427 | return "unknown"; | |
428 | } | |
429 | } | |
430 | ||
431 | static void tb_dump_port(struct tb *tb, struct tb_regs_port_header *port) | |
432 | { | |
daa5140f MW |
433 | tb_dbg(tb, |
434 | " Port %d: %x:%x (Revision: %d, TB Version: %d, Type: %s (%#x))\n", | |
435 | port->port_number, port->vendor_id, port->device_id, | |
436 | port->revision, port->thunderbolt_version, tb_port_type(port), | |
437 | port->type); | |
438 | tb_dbg(tb, " Max hop id (in/out): %d/%d\n", | |
439 | port->max_in_hop_id, port->max_out_hop_id); | |
440 | tb_dbg(tb, " Max counters: %d\n", port->max_counters); | |
441 | tb_dbg(tb, " NFC Credits: %#x\n", port->nfc_credits); | |
a25c8b2f AN |
442 | } |
443 | ||
9da672a4 AN |
444 | /** |
445 | * tb_port_state() - get connectedness state of a port | |
446 | * | |
447 | * The port must have a TB_CAP_PHY (i.e. it should be a real port). | |
448 | * | |
449 | * Return: Returns an enum tb_port_state on success or an error code on failure. | |
450 | */ | |
451 | static int tb_port_state(struct tb_port *port) | |
452 | { | |
453 | struct tb_cap_phy phy; | |
454 | int res; | |
455 | if (port->cap_phy == 0) { | |
456 | tb_port_WARN(port, "does not have a PHY\n"); | |
457 | return -EINVAL; | |
458 | } | |
459 | res = tb_port_read(port, &phy, TB_CFG_PORT, port->cap_phy, 2); | |
460 | if (res) | |
461 | return res; | |
462 | return phy.state; | |
463 | } | |
464 | ||
465 | /** | |
466 | * tb_wait_for_port() - wait for a port to become ready | |
467 | * | |
468 | * Wait up to 1 second for a port to reach state TB_PORT_UP. If | |
469 | * wait_if_unplugged is set then we also wait if the port is in state | |
470 | * TB_PORT_UNPLUGGED (it takes a while for the device to be registered after | |
471 | * switch resume). Otherwise we only wait if a device is registered but the link | |
472 | * has not yet been established. | |
473 | * | |
474 | * Return: Returns an error code on failure. Returns 0 if the port is not | |
475 | * connected or failed to reach state TB_PORT_UP within one second. Returns 1 | |
476 | * if the port is connected and in state TB_PORT_UP. | |
477 | */ | |
478 | int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged) | |
479 | { | |
480 | int retries = 10; | |
481 | int state; | |
482 | if (!port->cap_phy) { | |
483 | tb_port_WARN(port, "does not have PHY\n"); | |
484 | return -EINVAL; | |
485 | } | |
486 | if (tb_is_upstream_port(port)) { | |
487 | tb_port_WARN(port, "is the upstream port\n"); | |
488 | return -EINVAL; | |
489 | } | |
490 | ||
491 | while (retries--) { | |
492 | state = tb_port_state(port); | |
493 | if (state < 0) | |
494 | return state; | |
495 | if (state == TB_PORT_DISABLED) { | |
496 | tb_port_info(port, "is disabled (state: 0)\n"); | |
497 | return 0; | |
498 | } | |
499 | if (state == TB_PORT_UNPLUGGED) { | |
500 | if (wait_if_unplugged) { | |
501 | /* used during resume */ | |
502 | tb_port_info(port, | |
503 | "is unplugged (state: 7), retrying...\n"); | |
504 | msleep(100); | |
505 | continue; | |
506 | } | |
507 | tb_port_info(port, "is unplugged (state: 7)\n"); | |
508 | return 0; | |
509 | } | |
510 | if (state == TB_PORT_UP) { | |
511 | tb_port_info(port, | |
512 | "is connected, link is up (state: 2)\n"); | |
513 | return 1; | |
514 | } | |
515 | ||
516 | /* | |
517 | * After plug-in the state is TB_PORT_CONNECTING. Give it some | |
518 | * time. | |
519 | */ | |
520 | tb_port_info(port, | |
521 | "is connected, link is not up (state: %d), retrying...\n", | |
522 | state); | |
523 | msleep(100); | |
524 | } | |
525 | tb_port_warn(port, | |
526 | "failed to reach state TB_PORT_UP. Ignoring port...\n"); | |
527 | return 0; | |
528 | } | |
529 | ||
520b6702 AN |
530 | /** |
531 | * tb_port_add_nfc_credits() - add/remove non flow controlled credits to port | |
532 | * | |
533 | * Change the number of NFC credits allocated to @port by @credits. To remove | |
534 | * NFC credits pass a negative amount of credits. | |
535 | * | |
536 | * Return: Returns 0 on success or an error code on failure. | |
537 | */ | |
538 | int tb_port_add_nfc_credits(struct tb_port *port, int credits) | |
539 | { | |
c5ee6feb MW |
540 | u32 nfc_credits; |
541 | ||
542 | if (credits == 0 || port->sw->is_unplugged) | |
520b6702 | 543 | return 0; |
c5ee6feb MW |
544 | |
545 | nfc_credits = port->config.nfc_credits & TB_PORT_NFC_CREDITS_MASK; | |
546 | nfc_credits += credits; | |
547 | ||
548 | tb_port_dbg(port, "adding %d NFC credits to %lu", | |
549 | credits, port->config.nfc_credits & TB_PORT_NFC_CREDITS_MASK); | |
550 | ||
551 | port->config.nfc_credits &= ~TB_PORT_NFC_CREDITS_MASK; | |
552 | port->config.nfc_credits |= nfc_credits; | |
553 | ||
520b6702 AN |
554 | return tb_port_write(port, &port->config.nfc_credits, |
555 | TB_CFG_PORT, 4, 1); | |
556 | } | |
557 | ||
44242d6c MW |
558 | /** |
559 | * tb_port_set_initial_credits() - Set initial port link credits allocated | |
560 | * @port: Port to set the initial credits | |
561 | * @credits: Number of credits to to allocate | |
562 | * | |
563 | * Set initial credits value to be used for ingress shared buffering. | |
564 | */ | |
565 | int tb_port_set_initial_credits(struct tb_port *port, u32 credits) | |
566 | { | |
567 | u32 data; | |
568 | int ret; | |
569 | ||
570 | ret = tb_port_read(port, &data, TB_CFG_PORT, 5, 1); | |
571 | if (ret) | |
572 | return ret; | |
573 | ||
574 | data &= ~TB_PORT_LCA_MASK; | |
575 | data |= (credits << TB_PORT_LCA_SHIFT) & TB_PORT_LCA_MASK; | |
576 | ||
577 | return tb_port_write(port, &data, TB_CFG_PORT, 5, 1); | |
578 | } | |
579 | ||
520b6702 AN |
580 | /** |
581 | * tb_port_clear_counter() - clear a counter in TB_CFG_COUNTER | |
582 | * | |
583 | * Return: Returns 0 on success or an error code on failure. | |
584 | */ | |
585 | int tb_port_clear_counter(struct tb_port *port, int counter) | |
586 | { | |
587 | u32 zero[3] = { 0, 0, 0 }; | |
588 | tb_port_info(port, "clearing counter %d\n", counter); | |
589 | return tb_port_write(port, zero, TB_CFG_COUNTERS, 3 * counter, 3); | |
590 | } | |
591 | ||
a25c8b2f AN |
592 | /** |
593 | * tb_init_port() - initialize a port | |
594 | * | |
595 | * This is a helper method for tb_switch_alloc. Does not check or initialize | |
596 | * any downstream switches. | |
597 | * | |
598 | * Return: Returns 0 on success or an error code on failure. | |
599 | */ | |
343fcb8c | 600 | static int tb_init_port(struct tb_port *port) |
a25c8b2f AN |
601 | { |
602 | int res; | |
9da672a4 | 603 | int cap; |
343fcb8c | 604 | |
a25c8b2f AN |
605 | res = tb_port_read(port, &port->config, TB_CFG_PORT, 0, 8); |
606 | if (res) | |
607 | return res; | |
608 | ||
9da672a4 | 609 | /* Port 0 is the switch itself and has no PHY. */ |
343fcb8c | 610 | if (port->config.type == TB_TYPE_PORT && port->port != 0) { |
da2da04b | 611 | cap = tb_port_find_cap(port, TB_PORT_CAP_PHY); |
9da672a4 AN |
612 | |
613 | if (cap > 0) | |
614 | port->cap_phy = cap; | |
615 | else | |
616 | tb_port_WARN(port, "non switch port without a PHY\n"); | |
56183c88 MW |
617 | } else if (port->port != 0) { |
618 | cap = tb_port_find_cap(port, TB_PORT_CAP_ADAP); | |
619 | if (cap > 0) | |
620 | port->cap_adap = cap; | |
9da672a4 AN |
621 | } |
622 | ||
343fcb8c | 623 | tb_dump_port(port->sw->tb, &port->config); |
a25c8b2f | 624 | |
0b2863ac MW |
625 | /* Control port does not need HopID allocation */ |
626 | if (port->port) { | |
627 | ida_init(&port->in_hopids); | |
628 | ida_init(&port->out_hopids); | |
629 | } | |
630 | ||
a25c8b2f AN |
631 | return 0; |
632 | ||
633 | } | |
634 | ||
0b2863ac MW |
635 | static int tb_port_alloc_hopid(struct tb_port *port, bool in, int min_hopid, |
636 | int max_hopid) | |
637 | { | |
638 | int port_max_hopid; | |
639 | struct ida *ida; | |
640 | ||
641 | if (in) { | |
642 | port_max_hopid = port->config.max_in_hop_id; | |
643 | ida = &port->in_hopids; | |
644 | } else { | |
645 | port_max_hopid = port->config.max_out_hop_id; | |
646 | ida = &port->out_hopids; | |
647 | } | |
648 | ||
649 | /* HopIDs 0-7 are reserved */ | |
650 | if (min_hopid < TB_PATH_MIN_HOPID) | |
651 | min_hopid = TB_PATH_MIN_HOPID; | |
652 | ||
653 | if (max_hopid < 0 || max_hopid > port_max_hopid) | |
654 | max_hopid = port_max_hopid; | |
655 | ||
656 | return ida_simple_get(ida, min_hopid, max_hopid + 1, GFP_KERNEL); | |
657 | } | |
658 | ||
659 | /** | |
660 | * tb_port_alloc_in_hopid() - Allocate input HopID from port | |
661 | * @port: Port to allocate HopID for | |
662 | * @min_hopid: Minimum acceptable input HopID | |
663 | * @max_hopid: Maximum acceptable input HopID | |
664 | * | |
665 | * Return: HopID between @min_hopid and @max_hopid or negative errno in | |
666 | * case of error. | |
667 | */ | |
668 | int tb_port_alloc_in_hopid(struct tb_port *port, int min_hopid, int max_hopid) | |
669 | { | |
670 | return tb_port_alloc_hopid(port, true, min_hopid, max_hopid); | |
671 | } | |
672 | ||
673 | /** | |
674 | * tb_port_alloc_out_hopid() - Allocate output HopID from port | |
675 | * @port: Port to allocate HopID for | |
676 | * @min_hopid: Minimum acceptable output HopID | |
677 | * @max_hopid: Maximum acceptable output HopID | |
678 | * | |
679 | * Return: HopID between @min_hopid and @max_hopid or negative errno in | |
680 | * case of error. | |
681 | */ | |
682 | int tb_port_alloc_out_hopid(struct tb_port *port, int min_hopid, int max_hopid) | |
683 | { | |
684 | return tb_port_alloc_hopid(port, false, min_hopid, max_hopid); | |
685 | } | |
686 | ||
687 | /** | |
688 | * tb_port_release_in_hopid() - Release allocated input HopID from port | |
689 | * @port: Port whose HopID to release | |
690 | * @hopid: HopID to release | |
691 | */ | |
692 | void tb_port_release_in_hopid(struct tb_port *port, int hopid) | |
693 | { | |
694 | ida_simple_remove(&port->in_hopids, hopid); | |
695 | } | |
696 | ||
697 | /** | |
698 | * tb_port_release_out_hopid() - Release allocated output HopID from port | |
699 | * @port: Port whose HopID to release | |
700 | * @hopid: HopID to release | |
701 | */ | |
702 | void tb_port_release_out_hopid(struct tb_port *port, int hopid) | |
703 | { | |
704 | ida_simple_remove(&port->out_hopids, hopid); | |
705 | } | |
706 | ||
fb19fac1 MW |
707 | /** |
708 | * tb_next_port_on_path() - Return next port for given port on a path | |
709 | * @start: Start port of the walk | |
710 | * @end: End port of the walk | |
711 | * @prev: Previous port (%NULL if this is the first) | |
712 | * | |
713 | * This function can be used to walk from one port to another if they | |
714 | * are connected through zero or more switches. If the @prev is dual | |
715 | * link port, the function follows that link and returns another end on | |
716 | * that same link. | |
717 | * | |
718 | * If the @end port has been reached, return %NULL. | |
719 | * | |
720 | * Domain tb->lock must be held when this function is called. | |
721 | */ | |
722 | struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end, | |
723 | struct tb_port *prev) | |
724 | { | |
725 | struct tb_port *next; | |
726 | ||
727 | if (!prev) | |
728 | return start; | |
729 | ||
730 | if (prev->sw == end->sw) { | |
731 | if (prev == end) | |
732 | return NULL; | |
733 | return end; | |
734 | } | |
735 | ||
736 | if (start->sw->config.depth < end->sw->config.depth) { | |
737 | if (prev->remote && | |
738 | prev->remote->sw->config.depth > prev->sw->config.depth) | |
739 | next = prev->remote; | |
740 | else | |
741 | next = tb_port_at(tb_route(end->sw), prev->sw); | |
742 | } else { | |
743 | if (tb_is_upstream_port(prev)) { | |
744 | next = prev->remote; | |
745 | } else { | |
746 | next = tb_upstream_port(prev->sw); | |
747 | /* | |
748 | * Keep the same link if prev and next are both | |
749 | * dual link ports. | |
750 | */ | |
751 | if (next->dual_link_port && | |
752 | next->link_nr != prev->link_nr) { | |
753 | next = next->dual_link_port; | |
754 | } | |
755 | } | |
756 | } | |
757 | ||
758 | return next; | |
759 | } | |
760 | ||
e78db6f0 MW |
761 | /** |
762 | * tb_port_is_enabled() - Is the adapter port enabled | |
763 | * @port: Port to check | |
764 | */ | |
765 | bool tb_port_is_enabled(struct tb_port *port) | |
766 | { | |
767 | switch (port->config.type) { | |
768 | case TB_TYPE_PCIE_UP: | |
769 | case TB_TYPE_PCIE_DOWN: | |
770 | return tb_pci_port_is_enabled(port); | |
771 | ||
4f807e47 MW |
772 | case TB_TYPE_DP_HDMI_IN: |
773 | case TB_TYPE_DP_HDMI_OUT: | |
774 | return tb_dp_port_is_enabled(port); | |
775 | ||
e78db6f0 MW |
776 | default: |
777 | return false; | |
778 | } | |
779 | } | |
780 | ||
0414bec5 MW |
781 | /** |
782 | * tb_pci_port_is_enabled() - Is the PCIe adapter port enabled | |
783 | * @port: PCIe port to check | |
784 | */ | |
785 | bool tb_pci_port_is_enabled(struct tb_port *port) | |
786 | { | |
787 | u32 data; | |
788 | ||
789 | if (tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap, 1)) | |
790 | return false; | |
791 | ||
792 | return !!(data & TB_PCI_EN); | |
793 | } | |
794 | ||
93f36ade MW |
795 | /** |
796 | * tb_pci_port_enable() - Enable PCIe adapter port | |
797 | * @port: PCIe port to enable | |
798 | * @enable: Enable/disable the PCIe adapter | |
799 | */ | |
800 | int tb_pci_port_enable(struct tb_port *port, bool enable) | |
801 | { | |
802 | u32 word = enable ? TB_PCI_EN : 0x0; | |
803 | if (!port->cap_adap) | |
804 | return -ENXIO; | |
805 | return tb_port_write(port, &word, TB_CFG_PORT, port->cap_adap, 1); | |
806 | } | |
807 | ||
4f807e47 MW |
808 | /** |
809 | * tb_dp_port_hpd_is_active() - Is HPD already active | |
810 | * @port: DP out port to check | |
811 | * | |
812 | * Checks if the DP OUT adapter port has HDP bit already set. | |
813 | */ | |
814 | int tb_dp_port_hpd_is_active(struct tb_port *port) | |
815 | { | |
816 | u32 data; | |
817 | int ret; | |
818 | ||
819 | ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap + 2, 1); | |
820 | if (ret) | |
821 | return ret; | |
822 | ||
823 | return !!(data & TB_DP_HDP); | |
824 | } | |
825 | ||
826 | /** | |
827 | * tb_dp_port_hpd_clear() - Clear HPD from DP IN port | |
828 | * @port: Port to clear HPD | |
829 | * | |
830 | * If the DP IN port has HDP set, this function can be used to clear it. | |
831 | */ | |
832 | int tb_dp_port_hpd_clear(struct tb_port *port) | |
833 | { | |
834 | u32 data; | |
835 | int ret; | |
836 | ||
837 | ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap + 3, 1); | |
838 | if (ret) | |
839 | return ret; | |
840 | ||
841 | data |= TB_DP_HPDC; | |
842 | return tb_port_write(port, &data, TB_CFG_PORT, port->cap_adap + 3, 1); | |
843 | } | |
844 | ||
845 | /** | |
846 | * tb_dp_port_set_hops() - Set video/aux Hop IDs for DP port | |
847 | * @port: DP IN/OUT port to set hops | |
848 | * @video: Video Hop ID | |
849 | * @aux_tx: AUX TX Hop ID | |
850 | * @aux_rx: AUX RX Hop ID | |
851 | * | |
852 | * Programs specified Hop IDs for DP IN/OUT port. | |
853 | */ | |
854 | int tb_dp_port_set_hops(struct tb_port *port, unsigned int video, | |
855 | unsigned int aux_tx, unsigned int aux_rx) | |
856 | { | |
857 | u32 data[2]; | |
858 | int ret; | |
859 | ||
860 | ret = tb_port_read(port, data, TB_CFG_PORT, port->cap_adap, | |
861 | ARRAY_SIZE(data)); | |
862 | if (ret) | |
863 | return ret; | |
864 | ||
865 | data[0] &= ~TB_DP_VIDEO_HOPID_MASK; | |
866 | data[1] &= ~(TB_DP_AUX_RX_HOPID_MASK | TB_DP_AUX_TX_HOPID_MASK); | |
867 | ||
868 | data[0] |= (video << TB_DP_VIDEO_HOPID_SHIFT) & TB_DP_VIDEO_HOPID_MASK; | |
869 | data[1] |= aux_tx & TB_DP_AUX_TX_HOPID_MASK; | |
870 | data[1] |= (aux_rx << TB_DP_AUX_RX_HOPID_SHIFT) & TB_DP_AUX_RX_HOPID_MASK; | |
871 | ||
872 | return tb_port_write(port, data, TB_CFG_PORT, port->cap_adap, | |
873 | ARRAY_SIZE(data)); | |
874 | } | |
875 | ||
876 | /** | |
877 | * tb_dp_port_is_enabled() - Is DP adapter port enabled | |
878 | * @port: DP adapter port to check | |
879 | */ | |
880 | bool tb_dp_port_is_enabled(struct tb_port *port) | |
881 | { | |
882 | u32 data; | |
883 | ||
884 | if (tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap, 1)) | |
885 | return false; | |
886 | ||
887 | return !!(data & (TB_DP_VIDEO_EN | TB_DP_AUX_EN)); | |
888 | } | |
889 | ||
890 | /** | |
891 | * tb_dp_port_enable() - Enables/disables DP paths of a port | |
892 | * @port: DP IN/OUT port | |
893 | * @enable: Enable/disable DP path | |
894 | * | |
895 | * Once Hop IDs are programmed DP paths can be enabled or disabled by | |
896 | * calling this function. | |
897 | */ | |
898 | int tb_dp_port_enable(struct tb_port *port, bool enable) | |
899 | { | |
900 | u32 data; | |
901 | int ret; | |
902 | ||
903 | ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap, 1); | |
904 | if (ret) | |
905 | return ret; | |
906 | ||
907 | if (enable) | |
908 | data |= TB_DP_VIDEO_EN | TB_DP_AUX_EN; | |
909 | else | |
910 | data &= ~(TB_DP_VIDEO_EN | TB_DP_AUX_EN); | |
911 | ||
912 | return tb_port_write(port, &data, TB_CFG_PORT, port->cap_adap, 1); | |
913 | } | |
914 | ||
a25c8b2f AN |
915 | /* switch utility functions */ |
916 | ||
917 | static void tb_dump_switch(struct tb *tb, struct tb_regs_switch_header *sw) | |
918 | { | |
daa5140f MW |
919 | tb_dbg(tb, " Switch: %x:%x (Revision: %d, TB Version: %d)\n", |
920 | sw->vendor_id, sw->device_id, sw->revision, | |
921 | sw->thunderbolt_version); | |
922 | tb_dbg(tb, " Max Port Number: %d\n", sw->max_port_number); | |
923 | tb_dbg(tb, " Config:\n"); | |
924 | tb_dbg(tb, | |
a25c8b2f | 925 | " Upstream Port Number: %d Depth: %d Route String: %#llx Enabled: %d, PlugEventsDelay: %dms\n", |
daa5140f MW |
926 | sw->upstream_port_number, sw->depth, |
927 | (((u64) sw->route_hi) << 32) | sw->route_lo, | |
928 | sw->enabled, sw->plug_events_delay); | |
929 | tb_dbg(tb, " unknown1: %#x unknown4: %#x\n", | |
930 | sw->__unknown1, sw->__unknown4); | |
a25c8b2f AN |
931 | } |
932 | ||
23dd5bb4 AN |
933 | /** |
934 | * reset_switch() - reconfigure route, enable and send TB_CFG_PKG_RESET | |
935 | * | |
936 | * Return: Returns 0 on success or an error code on failure. | |
937 | */ | |
938 | int tb_switch_reset(struct tb *tb, u64 route) | |
939 | { | |
940 | struct tb_cfg_result res; | |
941 | struct tb_regs_switch_header header = { | |
942 | header.route_hi = route >> 32, | |
943 | header.route_lo = route, | |
944 | header.enabled = true, | |
945 | }; | |
daa5140f | 946 | tb_dbg(tb, "resetting switch at %llx\n", route); |
23dd5bb4 AN |
947 | res.err = tb_cfg_write(tb->ctl, ((u32 *) &header) + 2, route, |
948 | 0, 2, 2, 2); | |
949 | if (res.err) | |
950 | return res.err; | |
951 | res = tb_cfg_reset(tb->ctl, route, TB_CFG_DEFAULT_TIMEOUT); | |
952 | if (res.err > 0) | |
953 | return -EIO; | |
954 | return res.err; | |
955 | } | |
956 | ||
ca389f71 AN |
957 | /** |
958 | * tb_plug_events_active() - enable/disable plug events on a switch | |
959 | * | |
960 | * Also configures a sane plug_events_delay of 255ms. | |
961 | * | |
962 | * Return: Returns 0 on success or an error code on failure. | |
963 | */ | |
964 | static int tb_plug_events_active(struct tb_switch *sw, bool active) | |
965 | { | |
966 | u32 data; | |
967 | int res; | |
968 | ||
bfe778ac MW |
969 | if (!sw->config.enabled) |
970 | return 0; | |
971 | ||
ca389f71 AN |
972 | sw->config.plug_events_delay = 0xff; |
973 | res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1); | |
974 | if (res) | |
975 | return res; | |
976 | ||
977 | res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1); | |
978 | if (res) | |
979 | return res; | |
980 | ||
981 | if (active) { | |
982 | data = data & 0xFFFFFF83; | |
983 | switch (sw->config.device_id) { | |
1d111406 LW |
984 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: |
985 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: | |
986 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: | |
ca389f71 AN |
987 | break; |
988 | default: | |
989 | data |= 4; | |
990 | } | |
991 | } else { | |
992 | data = data | 0x7c; | |
993 | } | |
994 | return tb_sw_write(sw, &data, TB_CFG_SWITCH, | |
995 | sw->cap_plug_events + 1, 1); | |
996 | } | |
997 | ||
f67cf491 MW |
998 | static ssize_t authorized_show(struct device *dev, |
999 | struct device_attribute *attr, | |
1000 | char *buf) | |
1001 | { | |
1002 | struct tb_switch *sw = tb_to_switch(dev); | |
1003 | ||
1004 | return sprintf(buf, "%u\n", sw->authorized); | |
1005 | } | |
1006 | ||
1007 | static int tb_switch_set_authorized(struct tb_switch *sw, unsigned int val) | |
1008 | { | |
1009 | int ret = -EINVAL; | |
1010 | ||
09f11b6c MW |
1011 | if (!mutex_trylock(&sw->tb->lock)) |
1012 | return restart_syscall(); | |
f67cf491 MW |
1013 | |
1014 | if (sw->authorized) | |
1015 | goto unlock; | |
1016 | ||
a03e8289 MW |
1017 | /* |
1018 | * Make sure there is no PCIe rescan ongoing when a new PCIe | |
1019 | * tunnel is created. Otherwise the PCIe rescan code might find | |
1020 | * the new tunnel too early. | |
1021 | */ | |
1022 | pci_lock_rescan_remove(); | |
2d8ff0b5 | 1023 | pm_runtime_get_sync(&sw->dev); |
a03e8289 | 1024 | |
f67cf491 MW |
1025 | switch (val) { |
1026 | /* Approve switch */ | |
1027 | case 1: | |
1028 | if (sw->key) | |
1029 | ret = tb_domain_approve_switch_key(sw->tb, sw); | |
1030 | else | |
1031 | ret = tb_domain_approve_switch(sw->tb, sw); | |
1032 | break; | |
1033 | ||
1034 | /* Challenge switch */ | |
1035 | case 2: | |
1036 | if (sw->key) | |
1037 | ret = tb_domain_challenge_switch_key(sw->tb, sw); | |
1038 | break; | |
1039 | ||
1040 | default: | |
1041 | break; | |
1042 | } | |
1043 | ||
2d8ff0b5 MW |
1044 | pm_runtime_mark_last_busy(&sw->dev); |
1045 | pm_runtime_put_autosuspend(&sw->dev); | |
a03e8289 MW |
1046 | pci_unlock_rescan_remove(); |
1047 | ||
f67cf491 MW |
1048 | if (!ret) { |
1049 | sw->authorized = val; | |
1050 | /* Notify status change to the userspace */ | |
1051 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); | |
1052 | } | |
1053 | ||
1054 | unlock: | |
09f11b6c | 1055 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1056 | return ret; |
1057 | } | |
1058 | ||
1059 | static ssize_t authorized_store(struct device *dev, | |
1060 | struct device_attribute *attr, | |
1061 | const char *buf, size_t count) | |
1062 | { | |
1063 | struct tb_switch *sw = tb_to_switch(dev); | |
1064 | unsigned int val; | |
1065 | ssize_t ret; | |
1066 | ||
1067 | ret = kstrtouint(buf, 0, &val); | |
1068 | if (ret) | |
1069 | return ret; | |
1070 | if (val > 2) | |
1071 | return -EINVAL; | |
1072 | ||
1073 | ret = tb_switch_set_authorized(sw, val); | |
1074 | ||
1075 | return ret ? ret : count; | |
1076 | } | |
1077 | static DEVICE_ATTR_RW(authorized); | |
1078 | ||
14862ee3 YB |
1079 | static ssize_t boot_show(struct device *dev, struct device_attribute *attr, |
1080 | char *buf) | |
1081 | { | |
1082 | struct tb_switch *sw = tb_to_switch(dev); | |
1083 | ||
1084 | return sprintf(buf, "%u\n", sw->boot); | |
1085 | } | |
1086 | static DEVICE_ATTR_RO(boot); | |
1087 | ||
bfe778ac MW |
1088 | static ssize_t device_show(struct device *dev, struct device_attribute *attr, |
1089 | char *buf) | |
1090 | { | |
1091 | struct tb_switch *sw = tb_to_switch(dev); | |
ca389f71 | 1092 | |
bfe778ac MW |
1093 | return sprintf(buf, "%#x\n", sw->device); |
1094 | } | |
1095 | static DEVICE_ATTR_RO(device); | |
1096 | ||
72ee3390 MW |
1097 | static ssize_t |
1098 | device_name_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1099 | { | |
1100 | struct tb_switch *sw = tb_to_switch(dev); | |
1101 | ||
1102 | return sprintf(buf, "%s\n", sw->device_name ? sw->device_name : ""); | |
1103 | } | |
1104 | static DEVICE_ATTR_RO(device_name); | |
1105 | ||
f67cf491 MW |
1106 | static ssize_t key_show(struct device *dev, struct device_attribute *attr, |
1107 | char *buf) | |
1108 | { | |
1109 | struct tb_switch *sw = tb_to_switch(dev); | |
1110 | ssize_t ret; | |
1111 | ||
09f11b6c MW |
1112 | if (!mutex_trylock(&sw->tb->lock)) |
1113 | return restart_syscall(); | |
f67cf491 MW |
1114 | |
1115 | if (sw->key) | |
1116 | ret = sprintf(buf, "%*phN\n", TB_SWITCH_KEY_SIZE, sw->key); | |
1117 | else | |
1118 | ret = sprintf(buf, "\n"); | |
1119 | ||
09f11b6c | 1120 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1121 | return ret; |
1122 | } | |
1123 | ||
1124 | static ssize_t key_store(struct device *dev, struct device_attribute *attr, | |
1125 | const char *buf, size_t count) | |
1126 | { | |
1127 | struct tb_switch *sw = tb_to_switch(dev); | |
1128 | u8 key[TB_SWITCH_KEY_SIZE]; | |
1129 | ssize_t ret = count; | |
e545f0d8 | 1130 | bool clear = false; |
f67cf491 | 1131 | |
e545f0d8 BY |
1132 | if (!strcmp(buf, "\n")) |
1133 | clear = true; | |
1134 | else if (hex2bin(key, buf, sizeof(key))) | |
f67cf491 MW |
1135 | return -EINVAL; |
1136 | ||
09f11b6c MW |
1137 | if (!mutex_trylock(&sw->tb->lock)) |
1138 | return restart_syscall(); | |
f67cf491 MW |
1139 | |
1140 | if (sw->authorized) { | |
1141 | ret = -EBUSY; | |
1142 | } else { | |
1143 | kfree(sw->key); | |
e545f0d8 BY |
1144 | if (clear) { |
1145 | sw->key = NULL; | |
1146 | } else { | |
1147 | sw->key = kmemdup(key, sizeof(key), GFP_KERNEL); | |
1148 | if (!sw->key) | |
1149 | ret = -ENOMEM; | |
1150 | } | |
f67cf491 MW |
1151 | } |
1152 | ||
09f11b6c | 1153 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1154 | return ret; |
1155 | } | |
0956e411 | 1156 | static DEVICE_ATTR(key, 0600, key_show, key_store); |
f67cf491 | 1157 | |
1830b6ee MW |
1158 | static void nvm_authenticate_start(struct tb_switch *sw) |
1159 | { | |
1160 | struct pci_dev *root_port; | |
1161 | ||
1162 | /* | |
1163 | * During host router NVM upgrade we should not allow root port to | |
1164 | * go into D3cold because some root ports cannot trigger PME | |
1165 | * itself. To be on the safe side keep the root port in D0 during | |
1166 | * the whole upgrade process. | |
1167 | */ | |
1168 | root_port = pci_find_pcie_root_port(sw->tb->nhi->pdev); | |
1169 | if (root_port) | |
1170 | pm_runtime_get_noresume(&root_port->dev); | |
1171 | } | |
1172 | ||
1173 | static void nvm_authenticate_complete(struct tb_switch *sw) | |
1174 | { | |
1175 | struct pci_dev *root_port; | |
1176 | ||
1177 | root_port = pci_find_pcie_root_port(sw->tb->nhi->pdev); | |
1178 | if (root_port) | |
1179 | pm_runtime_put(&root_port->dev); | |
1180 | } | |
1181 | ||
e6b245cc MW |
1182 | static ssize_t nvm_authenticate_show(struct device *dev, |
1183 | struct device_attribute *attr, char *buf) | |
1184 | { | |
1185 | struct tb_switch *sw = tb_to_switch(dev); | |
1186 | u32 status; | |
1187 | ||
1188 | nvm_get_auth_status(sw, &status); | |
1189 | return sprintf(buf, "%#x\n", status); | |
1190 | } | |
1191 | ||
1192 | static ssize_t nvm_authenticate_store(struct device *dev, | |
1193 | struct device_attribute *attr, const char *buf, size_t count) | |
1194 | { | |
1195 | struct tb_switch *sw = tb_to_switch(dev); | |
1196 | bool val; | |
1197 | int ret; | |
1198 | ||
09f11b6c MW |
1199 | if (!mutex_trylock(&sw->tb->lock)) |
1200 | return restart_syscall(); | |
e6b245cc MW |
1201 | |
1202 | /* If NVMem devices are not yet added */ | |
1203 | if (!sw->nvm) { | |
1204 | ret = -EAGAIN; | |
1205 | goto exit_unlock; | |
1206 | } | |
1207 | ||
1208 | ret = kstrtobool(buf, &val); | |
1209 | if (ret) | |
1210 | goto exit_unlock; | |
1211 | ||
1212 | /* Always clear the authentication status */ | |
1213 | nvm_clear_auth_status(sw); | |
1214 | ||
1215 | if (val) { | |
2d8ff0b5 MW |
1216 | if (!sw->nvm->buf) { |
1217 | ret = -EINVAL; | |
1218 | goto exit_unlock; | |
1219 | } | |
1220 | ||
1221 | pm_runtime_get_sync(&sw->dev); | |
e6b245cc | 1222 | ret = nvm_validate_and_write(sw); |
2d8ff0b5 MW |
1223 | if (ret) { |
1224 | pm_runtime_mark_last_busy(&sw->dev); | |
1225 | pm_runtime_put_autosuspend(&sw->dev); | |
e6b245cc | 1226 | goto exit_unlock; |
2d8ff0b5 | 1227 | } |
e6b245cc MW |
1228 | |
1229 | sw->nvm->authenticating = true; | |
1230 | ||
1830b6ee MW |
1231 | if (!tb_route(sw)) { |
1232 | /* | |
1233 | * Keep root port from suspending as long as the | |
1234 | * NVM upgrade process is running. | |
1235 | */ | |
1236 | nvm_authenticate_start(sw); | |
e6b245cc | 1237 | ret = nvm_authenticate_host(sw); |
1830b6ee MW |
1238 | if (ret) |
1239 | nvm_authenticate_complete(sw); | |
1240 | } else { | |
e6b245cc | 1241 | ret = nvm_authenticate_device(sw); |
1830b6ee | 1242 | } |
2d8ff0b5 MW |
1243 | pm_runtime_mark_last_busy(&sw->dev); |
1244 | pm_runtime_put_autosuspend(&sw->dev); | |
e6b245cc MW |
1245 | } |
1246 | ||
1247 | exit_unlock: | |
09f11b6c | 1248 | mutex_unlock(&sw->tb->lock); |
e6b245cc MW |
1249 | |
1250 | if (ret) | |
1251 | return ret; | |
1252 | return count; | |
1253 | } | |
1254 | static DEVICE_ATTR_RW(nvm_authenticate); | |
1255 | ||
1256 | static ssize_t nvm_version_show(struct device *dev, | |
1257 | struct device_attribute *attr, char *buf) | |
1258 | { | |
1259 | struct tb_switch *sw = tb_to_switch(dev); | |
1260 | int ret; | |
1261 | ||
09f11b6c MW |
1262 | if (!mutex_trylock(&sw->tb->lock)) |
1263 | return restart_syscall(); | |
e6b245cc MW |
1264 | |
1265 | if (sw->safe_mode) | |
1266 | ret = -ENODATA; | |
1267 | else if (!sw->nvm) | |
1268 | ret = -EAGAIN; | |
1269 | else | |
1270 | ret = sprintf(buf, "%x.%x\n", sw->nvm->major, sw->nvm->minor); | |
1271 | ||
09f11b6c | 1272 | mutex_unlock(&sw->tb->lock); |
e6b245cc MW |
1273 | |
1274 | return ret; | |
1275 | } | |
1276 | static DEVICE_ATTR_RO(nvm_version); | |
1277 | ||
bfe778ac MW |
1278 | static ssize_t vendor_show(struct device *dev, struct device_attribute *attr, |
1279 | char *buf) | |
a25c8b2f | 1280 | { |
bfe778ac | 1281 | struct tb_switch *sw = tb_to_switch(dev); |
a25c8b2f | 1282 | |
bfe778ac MW |
1283 | return sprintf(buf, "%#x\n", sw->vendor); |
1284 | } | |
1285 | static DEVICE_ATTR_RO(vendor); | |
1286 | ||
72ee3390 MW |
1287 | static ssize_t |
1288 | vendor_name_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1289 | { | |
1290 | struct tb_switch *sw = tb_to_switch(dev); | |
1291 | ||
1292 | return sprintf(buf, "%s\n", sw->vendor_name ? sw->vendor_name : ""); | |
1293 | } | |
1294 | static DEVICE_ATTR_RO(vendor_name); | |
1295 | ||
bfe778ac MW |
1296 | static ssize_t unique_id_show(struct device *dev, struct device_attribute *attr, |
1297 | char *buf) | |
1298 | { | |
1299 | struct tb_switch *sw = tb_to_switch(dev); | |
1300 | ||
1301 | return sprintf(buf, "%pUb\n", sw->uuid); | |
1302 | } | |
1303 | static DEVICE_ATTR_RO(unique_id); | |
1304 | ||
1305 | static struct attribute *switch_attrs[] = { | |
f67cf491 | 1306 | &dev_attr_authorized.attr, |
14862ee3 | 1307 | &dev_attr_boot.attr, |
bfe778ac | 1308 | &dev_attr_device.attr, |
72ee3390 | 1309 | &dev_attr_device_name.attr, |
f67cf491 | 1310 | &dev_attr_key.attr, |
e6b245cc MW |
1311 | &dev_attr_nvm_authenticate.attr, |
1312 | &dev_attr_nvm_version.attr, | |
bfe778ac | 1313 | &dev_attr_vendor.attr, |
72ee3390 | 1314 | &dev_attr_vendor_name.attr, |
bfe778ac MW |
1315 | &dev_attr_unique_id.attr, |
1316 | NULL, | |
1317 | }; | |
1318 | ||
f67cf491 MW |
1319 | static umode_t switch_attr_is_visible(struct kobject *kobj, |
1320 | struct attribute *attr, int n) | |
1321 | { | |
1322 | struct device *dev = container_of(kobj, struct device, kobj); | |
1323 | struct tb_switch *sw = tb_to_switch(dev); | |
1324 | ||
1325 | if (attr == &dev_attr_key.attr) { | |
1326 | if (tb_route(sw) && | |
1327 | sw->tb->security_level == TB_SECURITY_SECURE && | |
1328 | sw->security_level == TB_SECURITY_SECURE) | |
1329 | return attr->mode; | |
1330 | return 0; | |
e6b245cc MW |
1331 | } else if (attr == &dev_attr_nvm_authenticate.attr || |
1332 | attr == &dev_attr_nvm_version.attr) { | |
1333 | if (sw->dma_port) | |
1334 | return attr->mode; | |
1335 | return 0; | |
14862ee3 YB |
1336 | } else if (attr == &dev_attr_boot.attr) { |
1337 | if (tb_route(sw)) | |
1338 | return attr->mode; | |
1339 | return 0; | |
f67cf491 MW |
1340 | } |
1341 | ||
e6b245cc | 1342 | return sw->safe_mode ? 0 : attr->mode; |
f67cf491 MW |
1343 | } |
1344 | ||
bfe778ac | 1345 | static struct attribute_group switch_group = { |
f67cf491 | 1346 | .is_visible = switch_attr_is_visible, |
bfe778ac MW |
1347 | .attrs = switch_attrs, |
1348 | }; | |
ca389f71 | 1349 | |
bfe778ac MW |
1350 | static const struct attribute_group *switch_groups[] = { |
1351 | &switch_group, | |
1352 | NULL, | |
1353 | }; | |
1354 | ||
1355 | static void tb_switch_release(struct device *dev) | |
1356 | { | |
1357 | struct tb_switch *sw = tb_to_switch(dev); | |
0b2863ac | 1358 | int i; |
bfe778ac | 1359 | |
3e136768 MW |
1360 | dma_port_free(sw->dma_port); |
1361 | ||
0b2863ac MW |
1362 | for (i = 1; i <= sw->config.max_port_number; i++) { |
1363 | if (!sw->ports[i].disabled) { | |
1364 | ida_destroy(&sw->ports[i].in_hopids); | |
1365 | ida_destroy(&sw->ports[i].out_hopids); | |
1366 | } | |
1367 | } | |
1368 | ||
bfe778ac | 1369 | kfree(sw->uuid); |
72ee3390 MW |
1370 | kfree(sw->device_name); |
1371 | kfree(sw->vendor_name); | |
a25c8b2f | 1372 | kfree(sw->ports); |
343fcb8c | 1373 | kfree(sw->drom); |
f67cf491 | 1374 | kfree(sw->key); |
a25c8b2f AN |
1375 | kfree(sw); |
1376 | } | |
1377 | ||
2d8ff0b5 MW |
1378 | /* |
1379 | * Currently only need to provide the callbacks. Everything else is handled | |
1380 | * in the connection manager. | |
1381 | */ | |
1382 | static int __maybe_unused tb_switch_runtime_suspend(struct device *dev) | |
1383 | { | |
1384 | return 0; | |
1385 | } | |
1386 | ||
1387 | static int __maybe_unused tb_switch_runtime_resume(struct device *dev) | |
1388 | { | |
1389 | return 0; | |
1390 | } | |
1391 | ||
1392 | static const struct dev_pm_ops tb_switch_pm_ops = { | |
1393 | SET_RUNTIME_PM_OPS(tb_switch_runtime_suspend, tb_switch_runtime_resume, | |
1394 | NULL) | |
1395 | }; | |
1396 | ||
bfe778ac MW |
1397 | struct device_type tb_switch_type = { |
1398 | .name = "thunderbolt_device", | |
1399 | .release = tb_switch_release, | |
2d8ff0b5 | 1400 | .pm = &tb_switch_pm_ops, |
bfe778ac MW |
1401 | }; |
1402 | ||
2c3c4197 MW |
1403 | static int tb_switch_get_generation(struct tb_switch *sw) |
1404 | { | |
1405 | switch (sw->config.device_id) { | |
1406 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: | |
1407 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: | |
1408 | case PCI_DEVICE_ID_INTEL_LIGHT_PEAK: | |
1409 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: | |
1410 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: | |
1411 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: | |
1412 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE: | |
1413 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE: | |
1414 | return 1; | |
1415 | ||
1416 | case PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE: | |
1417 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: | |
1418 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: | |
1419 | return 2; | |
1420 | ||
1421 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: | |
1422 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: | |
1423 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE: | |
1424 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: | |
1425 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: | |
4bac471d RM |
1426 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: |
1427 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: | |
1428 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: | |
2c3c4197 MW |
1429 | return 3; |
1430 | ||
1431 | default: | |
1432 | /* | |
1433 | * For unknown switches assume generation to be 1 to be | |
1434 | * on the safe side. | |
1435 | */ | |
1436 | tb_sw_warn(sw, "unsupported switch device id %#x\n", | |
1437 | sw->config.device_id); | |
1438 | return 1; | |
1439 | } | |
1440 | } | |
1441 | ||
a25c8b2f | 1442 | /** |
bfe778ac MW |
1443 | * tb_switch_alloc() - allocate a switch |
1444 | * @tb: Pointer to the owning domain | |
1445 | * @parent: Parent device for this switch | |
1446 | * @route: Route string for this switch | |
a25c8b2f | 1447 | * |
bfe778ac MW |
1448 | * Allocates and initializes a switch. Will not upload configuration to |
1449 | * the switch. For that you need to call tb_switch_configure() | |
1450 | * separately. The returned switch should be released by calling | |
1451 | * tb_switch_put(). | |
1452 | * | |
1453 | * Return: Pointer to the allocated switch or %NULL in case of failure | |
a25c8b2f | 1454 | */ |
bfe778ac MW |
1455 | struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent, |
1456 | u64 route) | |
a25c8b2f | 1457 | { |
a25c8b2f | 1458 | struct tb_switch *sw; |
f0342e75 MW |
1459 | int upstream_port; |
1460 | int i, cap, depth; | |
1461 | ||
1462 | /* Make sure we do not exceed maximum topology limit */ | |
1463 | depth = tb_route_length(route); | |
1464 | if (depth > TB_SWITCH_MAX_DEPTH) | |
1465 | return NULL; | |
1466 | ||
1467 | upstream_port = tb_cfg_get_upstream_port(tb->ctl, route); | |
a25c8b2f AN |
1468 | if (upstream_port < 0) |
1469 | return NULL; | |
1470 | ||
1471 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); | |
1472 | if (!sw) | |
1473 | return NULL; | |
1474 | ||
1475 | sw->tb = tb; | |
aae20bb6 | 1476 | if (tb_cfg_read(tb->ctl, &sw->config, route, 0, TB_CFG_SWITCH, 0, 5)) |
bfe778ac MW |
1477 | goto err_free_sw_ports; |
1478 | ||
daa5140f | 1479 | tb_dbg(tb, "current switch config:\n"); |
a25c8b2f AN |
1480 | tb_dump_switch(tb, &sw->config); |
1481 | ||
1482 | /* configure switch */ | |
1483 | sw->config.upstream_port_number = upstream_port; | |
f0342e75 MW |
1484 | sw->config.depth = depth; |
1485 | sw->config.route_hi = upper_32_bits(route); | |
1486 | sw->config.route_lo = lower_32_bits(route); | |
bfe778ac | 1487 | sw->config.enabled = 0; |
a25c8b2f AN |
1488 | |
1489 | /* initialize ports */ | |
1490 | sw->ports = kcalloc(sw->config.max_port_number + 1, sizeof(*sw->ports), | |
343fcb8c | 1491 | GFP_KERNEL); |
a25c8b2f | 1492 | if (!sw->ports) |
bfe778ac | 1493 | goto err_free_sw_ports; |
a25c8b2f AN |
1494 | |
1495 | for (i = 0; i <= sw->config.max_port_number; i++) { | |
343fcb8c AN |
1496 | /* minimum setup for tb_find_cap and tb_drom_read to work */ |
1497 | sw->ports[i].sw = sw; | |
1498 | sw->ports[i].port = i; | |
a25c8b2f AN |
1499 | } |
1500 | ||
2c3c4197 MW |
1501 | sw->generation = tb_switch_get_generation(sw); |
1502 | ||
da2da04b | 1503 | cap = tb_switch_find_vse_cap(sw, TB_VSE_CAP_PLUG_EVENTS); |
ca389f71 | 1504 | if (cap < 0) { |
da2da04b | 1505 | tb_sw_warn(sw, "cannot find TB_VSE_CAP_PLUG_EVENTS aborting\n"); |
bfe778ac | 1506 | goto err_free_sw_ports; |
ca389f71 AN |
1507 | } |
1508 | sw->cap_plug_events = cap; | |
1509 | ||
a9be5582 MW |
1510 | cap = tb_switch_find_vse_cap(sw, TB_VSE_CAP_LINK_CONTROLLER); |
1511 | if (cap > 0) | |
1512 | sw->cap_lc = cap; | |
1513 | ||
f67cf491 MW |
1514 | /* Root switch is always authorized */ |
1515 | if (!route) | |
1516 | sw->authorized = true; | |
1517 | ||
bfe778ac MW |
1518 | device_initialize(&sw->dev); |
1519 | sw->dev.parent = parent; | |
1520 | sw->dev.bus = &tb_bus_type; | |
1521 | sw->dev.type = &tb_switch_type; | |
1522 | sw->dev.groups = switch_groups; | |
1523 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); | |
1524 | ||
1525 | return sw; | |
1526 | ||
1527 | err_free_sw_ports: | |
1528 | kfree(sw->ports); | |
1529 | kfree(sw); | |
1530 | ||
1531 | return NULL; | |
1532 | } | |
1533 | ||
e6b245cc MW |
1534 | /** |
1535 | * tb_switch_alloc_safe_mode() - allocate a switch that is in safe mode | |
1536 | * @tb: Pointer to the owning domain | |
1537 | * @parent: Parent device for this switch | |
1538 | * @route: Route string for this switch | |
1539 | * | |
1540 | * This creates a switch in safe mode. This means the switch pretty much | |
1541 | * lacks all capabilities except DMA configuration port before it is | |
1542 | * flashed with a valid NVM firmware. | |
1543 | * | |
1544 | * The returned switch must be released by calling tb_switch_put(). | |
1545 | * | |
1546 | * Return: Pointer to the allocated switch or %NULL in case of failure | |
1547 | */ | |
1548 | struct tb_switch * | |
1549 | tb_switch_alloc_safe_mode(struct tb *tb, struct device *parent, u64 route) | |
1550 | { | |
1551 | struct tb_switch *sw; | |
1552 | ||
1553 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); | |
1554 | if (!sw) | |
1555 | return NULL; | |
1556 | ||
1557 | sw->tb = tb; | |
1558 | sw->config.depth = tb_route_length(route); | |
1559 | sw->config.route_hi = upper_32_bits(route); | |
1560 | sw->config.route_lo = lower_32_bits(route); | |
1561 | sw->safe_mode = true; | |
1562 | ||
1563 | device_initialize(&sw->dev); | |
1564 | sw->dev.parent = parent; | |
1565 | sw->dev.bus = &tb_bus_type; | |
1566 | sw->dev.type = &tb_switch_type; | |
1567 | sw->dev.groups = switch_groups; | |
1568 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); | |
1569 | ||
1570 | return sw; | |
1571 | } | |
1572 | ||
bfe778ac MW |
1573 | /** |
1574 | * tb_switch_configure() - Uploads configuration to the switch | |
1575 | * @sw: Switch to configure | |
1576 | * | |
1577 | * Call this function before the switch is added to the system. It will | |
1578 | * upload configuration to the switch and makes it available for the | |
1579 | * connection manager to use. | |
1580 | * | |
1581 | * Return: %0 in case of success and negative errno in case of failure | |
1582 | */ | |
1583 | int tb_switch_configure(struct tb_switch *sw) | |
1584 | { | |
1585 | struct tb *tb = sw->tb; | |
1586 | u64 route; | |
1587 | int ret; | |
1588 | ||
1589 | route = tb_route(sw); | |
daa5140f MW |
1590 | tb_dbg(tb, "initializing Switch at %#llx (depth: %d, up port: %d)\n", |
1591 | route, tb_route_length(route), sw->config.upstream_port_number); | |
bfe778ac MW |
1592 | |
1593 | if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL) | |
1594 | tb_sw_warn(sw, "unknown switch vendor id %#x\n", | |
1595 | sw->config.vendor_id); | |
1596 | ||
bfe778ac MW |
1597 | sw->config.enabled = 1; |
1598 | ||
1599 | /* upload configuration */ | |
1600 | ret = tb_sw_write(sw, 1 + (u32 *)&sw->config, TB_CFG_SWITCH, 1, 3); | |
1601 | if (ret) | |
1602 | return ret; | |
1603 | ||
e879a709 MW |
1604 | ret = tb_lc_configure_link(sw); |
1605 | if (ret) | |
1606 | return ret; | |
1607 | ||
bfe778ac MW |
1608 | return tb_plug_events_active(sw, true); |
1609 | } | |
1610 | ||
2cc12751 | 1611 | static int tb_switch_set_uuid(struct tb_switch *sw) |
bfe778ac MW |
1612 | { |
1613 | u32 uuid[4]; | |
a9be5582 | 1614 | int ret; |
bfe778ac MW |
1615 | |
1616 | if (sw->uuid) | |
a9be5582 | 1617 | return 0; |
bfe778ac MW |
1618 | |
1619 | /* | |
1620 | * The newer controllers include fused UUID as part of link | |
1621 | * controller specific registers | |
1622 | */ | |
a9be5582 MW |
1623 | ret = tb_lc_read_uuid(sw, uuid); |
1624 | if (ret) { | |
bfe778ac MW |
1625 | /* |
1626 | * ICM generates UUID based on UID and fills the upper | |
1627 | * two words with ones. This is not strictly following | |
1628 | * UUID format but we want to be compatible with it so | |
1629 | * we do the same here. | |
1630 | */ | |
1631 | uuid[0] = sw->uid & 0xffffffff; | |
1632 | uuid[1] = (sw->uid >> 32) & 0xffffffff; | |
1633 | uuid[2] = 0xffffffff; | |
1634 | uuid[3] = 0xffffffff; | |
1635 | } | |
1636 | ||
1637 | sw->uuid = kmemdup(uuid, sizeof(uuid), GFP_KERNEL); | |
2cc12751 | 1638 | if (!sw->uuid) |
a9be5582 MW |
1639 | return -ENOMEM; |
1640 | return 0; | |
bfe778ac MW |
1641 | } |
1642 | ||
e6b245cc | 1643 | static int tb_switch_add_dma_port(struct tb_switch *sw) |
3e136768 | 1644 | { |
e6b245cc MW |
1645 | u32 status; |
1646 | int ret; | |
1647 | ||
3e136768 MW |
1648 | switch (sw->generation) { |
1649 | case 3: | |
1650 | break; | |
1651 | ||
1652 | case 2: | |
1653 | /* Only root switch can be upgraded */ | |
1654 | if (tb_route(sw)) | |
e6b245cc | 1655 | return 0; |
3e136768 MW |
1656 | break; |
1657 | ||
1658 | default: | |
e6b245cc MW |
1659 | /* |
1660 | * DMA port is the only thing available when the switch | |
1661 | * is in safe mode. | |
1662 | */ | |
1663 | if (!sw->safe_mode) | |
1664 | return 0; | |
1665 | break; | |
3e136768 MW |
1666 | } |
1667 | ||
e6b245cc MW |
1668 | if (sw->no_nvm_upgrade) |
1669 | return 0; | |
1670 | ||
3e136768 | 1671 | sw->dma_port = dma_port_alloc(sw); |
e6b245cc MW |
1672 | if (!sw->dma_port) |
1673 | return 0; | |
1674 | ||
1675 | /* | |
1676 | * Check status of the previous flash authentication. If there | |
1677 | * is one we need to power cycle the switch in any case to make | |
1678 | * it functional again. | |
1679 | */ | |
1680 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); | |
1681 | if (ret <= 0) | |
1682 | return ret; | |
1683 | ||
1830b6ee MW |
1684 | /* Now we can allow root port to suspend again */ |
1685 | if (!tb_route(sw)) | |
1686 | nvm_authenticate_complete(sw); | |
1687 | ||
e6b245cc MW |
1688 | if (status) { |
1689 | tb_sw_info(sw, "switch flash authentication failed\n"); | |
2cc12751 AP |
1690 | ret = tb_switch_set_uuid(sw); |
1691 | if (ret) | |
1692 | return ret; | |
e6b245cc MW |
1693 | nvm_set_auth_status(sw, status); |
1694 | } | |
1695 | ||
1696 | tb_sw_info(sw, "power cycling the switch now\n"); | |
1697 | dma_port_power_cycle(sw->dma_port); | |
1698 | ||
1699 | /* | |
1700 | * We return error here which causes the switch adding failure. | |
1701 | * It should appear back after power cycle is complete. | |
1702 | */ | |
1703 | return -ESHUTDOWN; | |
3e136768 MW |
1704 | } |
1705 | ||
bfe778ac MW |
1706 | /** |
1707 | * tb_switch_add() - Add a switch to the domain | |
1708 | * @sw: Switch to add | |
1709 | * | |
1710 | * This is the last step in adding switch to the domain. It will read | |
1711 | * identification information from DROM and initializes ports so that | |
1712 | * they can be used to connect other switches. The switch will be | |
1713 | * exposed to the userspace when this function successfully returns. To | |
1714 | * remove and release the switch, call tb_switch_remove(). | |
1715 | * | |
1716 | * Return: %0 in case of success and negative errno in case of failure | |
1717 | */ | |
1718 | int tb_switch_add(struct tb_switch *sw) | |
1719 | { | |
1720 | int i, ret; | |
1721 | ||
3e136768 MW |
1722 | /* |
1723 | * Initialize DMA control port now before we read DROM. Recent | |
1724 | * host controllers have more complete DROM on NVM that includes | |
1725 | * vendor and model identification strings which we then expose | |
1726 | * to the userspace. NVM can be accessed through DMA | |
1727 | * configuration based mailbox. | |
1728 | */ | |
e6b245cc MW |
1729 | ret = tb_switch_add_dma_port(sw); |
1730 | if (ret) | |
f53e7676 | 1731 | return ret; |
343fcb8c | 1732 | |
e6b245cc MW |
1733 | if (!sw->safe_mode) { |
1734 | /* read drom */ | |
1735 | ret = tb_drom_read(sw); | |
1736 | if (ret) { | |
1737 | tb_sw_warn(sw, "tb_eeprom_read_rom failed\n"); | |
1738 | return ret; | |
1739 | } | |
daa5140f | 1740 | tb_sw_dbg(sw, "uid: %#llx\n", sw->uid); |
bfe778ac | 1741 | |
2cc12751 AP |
1742 | ret = tb_switch_set_uuid(sw); |
1743 | if (ret) | |
1744 | return ret; | |
e6b245cc MW |
1745 | |
1746 | for (i = 0; i <= sw->config.max_port_number; i++) { | |
1747 | if (sw->ports[i].disabled) { | |
daa5140f | 1748 | tb_port_dbg(&sw->ports[i], "disabled by eeprom\n"); |
e6b245cc MW |
1749 | continue; |
1750 | } | |
1751 | ret = tb_init_port(&sw->ports[i]); | |
1752 | if (ret) | |
1753 | return ret; | |
343fcb8c | 1754 | } |
343fcb8c AN |
1755 | } |
1756 | ||
e6b245cc MW |
1757 | ret = device_add(&sw->dev); |
1758 | if (ret) | |
1759 | return ret; | |
1760 | ||
a83bc4a5 MW |
1761 | if (tb_route(sw)) { |
1762 | dev_info(&sw->dev, "new device found, vendor=%#x device=%#x\n", | |
1763 | sw->vendor, sw->device); | |
1764 | if (sw->vendor_name && sw->device_name) | |
1765 | dev_info(&sw->dev, "%s %s\n", sw->vendor_name, | |
1766 | sw->device_name); | |
1767 | } | |
1768 | ||
e6b245cc | 1769 | ret = tb_switch_nvm_add(sw); |
2d8ff0b5 | 1770 | if (ret) { |
e6b245cc | 1771 | device_del(&sw->dev); |
2d8ff0b5 MW |
1772 | return ret; |
1773 | } | |
e6b245cc | 1774 | |
2d8ff0b5 MW |
1775 | pm_runtime_set_active(&sw->dev); |
1776 | if (sw->rpm) { | |
1777 | pm_runtime_set_autosuspend_delay(&sw->dev, TB_AUTOSUSPEND_DELAY); | |
1778 | pm_runtime_use_autosuspend(&sw->dev); | |
1779 | pm_runtime_mark_last_busy(&sw->dev); | |
1780 | pm_runtime_enable(&sw->dev); | |
1781 | pm_request_autosuspend(&sw->dev); | |
1782 | } | |
1783 | ||
1784 | return 0; | |
bfe778ac | 1785 | } |
c90553b3 | 1786 | |
bfe778ac MW |
1787 | /** |
1788 | * tb_switch_remove() - Remove and release a switch | |
1789 | * @sw: Switch to remove | |
1790 | * | |
1791 | * This will remove the switch from the domain and release it after last | |
1792 | * reference count drops to zero. If there are switches connected below | |
1793 | * this switch, they will be removed as well. | |
1794 | */ | |
1795 | void tb_switch_remove(struct tb_switch *sw) | |
1796 | { | |
1797 | int i; | |
ca389f71 | 1798 | |
2d8ff0b5 MW |
1799 | if (sw->rpm) { |
1800 | pm_runtime_get_sync(&sw->dev); | |
1801 | pm_runtime_disable(&sw->dev); | |
1802 | } | |
1803 | ||
bfe778ac MW |
1804 | /* port 0 is the switch itself and never has a remote */ |
1805 | for (i = 1; i <= sw->config.max_port_number; i++) { | |
dfe40ca4 | 1806 | if (tb_port_has_remote(&sw->ports[i])) { |
bfe778ac | 1807 | tb_switch_remove(sw->ports[i].remote->sw); |
dfe40ca4 MW |
1808 | sw->ports[i].remote = NULL; |
1809 | } else if (sw->ports[i].xdomain) { | |
d1ff7024 | 1810 | tb_xdomain_remove(sw->ports[i].xdomain); |
dfe40ca4 MW |
1811 | sw->ports[i].xdomain = NULL; |
1812 | } | |
bfe778ac MW |
1813 | } |
1814 | ||
1815 | if (!sw->is_unplugged) | |
1816 | tb_plug_events_active(sw, false); | |
e879a709 | 1817 | tb_lc_unconfigure_link(sw); |
bfe778ac | 1818 | |
e6b245cc | 1819 | tb_switch_nvm_remove(sw); |
a83bc4a5 MW |
1820 | |
1821 | if (tb_route(sw)) | |
1822 | dev_info(&sw->dev, "device disconnected\n"); | |
bfe778ac | 1823 | device_unregister(&sw->dev); |
a25c8b2f AN |
1824 | } |
1825 | ||
053596d9 | 1826 | /** |
aae20bb6 | 1827 | * tb_sw_set_unplugged() - set is_unplugged on switch and downstream switches |
053596d9 | 1828 | */ |
aae20bb6 | 1829 | void tb_sw_set_unplugged(struct tb_switch *sw) |
053596d9 AN |
1830 | { |
1831 | int i; | |
1832 | if (sw == sw->tb->root_switch) { | |
1833 | tb_sw_WARN(sw, "cannot unplug root switch\n"); | |
1834 | return; | |
1835 | } | |
1836 | if (sw->is_unplugged) { | |
1837 | tb_sw_WARN(sw, "is_unplugged already set\n"); | |
1838 | return; | |
1839 | } | |
1840 | sw->is_unplugged = true; | |
1841 | for (i = 0; i <= sw->config.max_port_number; i++) { | |
dfe40ca4 | 1842 | if (tb_port_has_remote(&sw->ports[i])) |
aae20bb6 | 1843 | tb_sw_set_unplugged(sw->ports[i].remote->sw); |
053596d9 AN |
1844 | } |
1845 | } | |
1846 | ||
23dd5bb4 AN |
1847 | int tb_switch_resume(struct tb_switch *sw) |
1848 | { | |
1849 | int i, err; | |
daa5140f | 1850 | tb_sw_dbg(sw, "resuming switch\n"); |
23dd5bb4 | 1851 | |
08a5e4ce MW |
1852 | /* |
1853 | * Check for UID of the connected switches except for root | |
1854 | * switch which we assume cannot be removed. | |
1855 | */ | |
1856 | if (tb_route(sw)) { | |
1857 | u64 uid; | |
1858 | ||
1859 | err = tb_drom_read_uid_only(sw, &uid); | |
1860 | if (err) { | |
1861 | tb_sw_warn(sw, "uid read failed\n"); | |
1862 | return err; | |
1863 | } | |
1864 | if (sw->uid != uid) { | |
1865 | tb_sw_info(sw, | |
1866 | "changed while suspended (uid %#llx -> %#llx)\n", | |
1867 | sw->uid, uid); | |
1868 | return -ENODEV; | |
1869 | } | |
23dd5bb4 AN |
1870 | } |
1871 | ||
1872 | /* upload configuration */ | |
1873 | err = tb_sw_write(sw, 1 + (u32 *) &sw->config, TB_CFG_SWITCH, 1, 3); | |
1874 | if (err) | |
1875 | return err; | |
1876 | ||
e879a709 MW |
1877 | err = tb_lc_configure_link(sw); |
1878 | if (err) | |
1879 | return err; | |
1880 | ||
23dd5bb4 AN |
1881 | err = tb_plug_events_active(sw, true); |
1882 | if (err) | |
1883 | return err; | |
1884 | ||
1885 | /* check for surviving downstream switches */ | |
1886 | for (i = 1; i <= sw->config.max_port_number; i++) { | |
1887 | struct tb_port *port = &sw->ports[i]; | |
dfe40ca4 MW |
1888 | |
1889 | if (!tb_port_has_remote(port)) | |
23dd5bb4 | 1890 | continue; |
dfe40ca4 | 1891 | |
23dd5bb4 AN |
1892 | if (tb_wait_for_port(port, true) <= 0 |
1893 | || tb_switch_resume(port->remote->sw)) { | |
1894 | tb_port_warn(port, | |
1895 | "lost during suspend, disconnecting\n"); | |
aae20bb6 | 1896 | tb_sw_set_unplugged(port->remote->sw); |
23dd5bb4 AN |
1897 | } |
1898 | } | |
1899 | return 0; | |
1900 | } | |
1901 | ||
1902 | void tb_switch_suspend(struct tb_switch *sw) | |
1903 | { | |
1904 | int i, err; | |
1905 | err = tb_plug_events_active(sw, false); | |
1906 | if (err) | |
1907 | return; | |
1908 | ||
1909 | for (i = 1; i <= sw->config.max_port_number; i++) { | |
dfe40ca4 | 1910 | if (tb_port_has_remote(&sw->ports[i])) |
23dd5bb4 AN |
1911 | tb_switch_suspend(sw->ports[i].remote->sw); |
1912 | } | |
5480dfc2 MW |
1913 | |
1914 | tb_lc_set_sleep(sw); | |
23dd5bb4 | 1915 | } |
f67cf491 MW |
1916 | |
1917 | struct tb_sw_lookup { | |
1918 | struct tb *tb; | |
1919 | u8 link; | |
1920 | u8 depth; | |
7c39ffe7 | 1921 | const uuid_t *uuid; |
8e9267bb | 1922 | u64 route; |
f67cf491 MW |
1923 | }; |
1924 | ||
1925 | static int tb_switch_match(struct device *dev, void *data) | |
1926 | { | |
1927 | struct tb_switch *sw = tb_to_switch(dev); | |
1928 | struct tb_sw_lookup *lookup = data; | |
1929 | ||
1930 | if (!sw) | |
1931 | return 0; | |
1932 | if (sw->tb != lookup->tb) | |
1933 | return 0; | |
1934 | ||
1935 | if (lookup->uuid) | |
1936 | return !memcmp(sw->uuid, lookup->uuid, sizeof(*lookup->uuid)); | |
1937 | ||
8e9267bb RM |
1938 | if (lookup->route) { |
1939 | return sw->config.route_lo == lower_32_bits(lookup->route) && | |
1940 | sw->config.route_hi == upper_32_bits(lookup->route); | |
1941 | } | |
1942 | ||
f67cf491 MW |
1943 | /* Root switch is matched only by depth */ |
1944 | if (!lookup->depth) | |
1945 | return !sw->depth; | |
1946 | ||
1947 | return sw->link == lookup->link && sw->depth == lookup->depth; | |
1948 | } | |
1949 | ||
1950 | /** | |
1951 | * tb_switch_find_by_link_depth() - Find switch by link and depth | |
1952 | * @tb: Domain the switch belongs | |
1953 | * @link: Link number the switch is connected | |
1954 | * @depth: Depth of the switch in link | |
1955 | * | |
1956 | * Returned switch has reference count increased so the caller needs to | |
1957 | * call tb_switch_put() when done with the switch. | |
1958 | */ | |
1959 | struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link, u8 depth) | |
1960 | { | |
1961 | struct tb_sw_lookup lookup; | |
1962 | struct device *dev; | |
1963 | ||
1964 | memset(&lookup, 0, sizeof(lookup)); | |
1965 | lookup.tb = tb; | |
1966 | lookup.link = link; | |
1967 | lookup.depth = depth; | |
1968 | ||
1969 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
1970 | if (dev) | |
1971 | return tb_to_switch(dev); | |
1972 | ||
1973 | return NULL; | |
1974 | } | |
1975 | ||
1976 | /** | |
432019d6 | 1977 | * tb_switch_find_by_uuid() - Find switch by UUID |
f67cf491 MW |
1978 | * @tb: Domain the switch belongs |
1979 | * @uuid: UUID to look for | |
1980 | * | |
1981 | * Returned switch has reference count increased so the caller needs to | |
1982 | * call tb_switch_put() when done with the switch. | |
1983 | */ | |
7c39ffe7 | 1984 | struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid) |
f67cf491 MW |
1985 | { |
1986 | struct tb_sw_lookup lookup; | |
1987 | struct device *dev; | |
1988 | ||
1989 | memset(&lookup, 0, sizeof(lookup)); | |
1990 | lookup.tb = tb; | |
1991 | lookup.uuid = uuid; | |
1992 | ||
1993 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
1994 | if (dev) | |
1995 | return tb_to_switch(dev); | |
1996 | ||
1997 | return NULL; | |
1998 | } | |
e6b245cc | 1999 | |
8e9267bb RM |
2000 | /** |
2001 | * tb_switch_find_by_route() - Find switch by route string | |
2002 | * @tb: Domain the switch belongs | |
2003 | * @route: Route string to look for | |
2004 | * | |
2005 | * Returned switch has reference count increased so the caller needs to | |
2006 | * call tb_switch_put() when done with the switch. | |
2007 | */ | |
2008 | struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route) | |
2009 | { | |
2010 | struct tb_sw_lookup lookup; | |
2011 | struct device *dev; | |
2012 | ||
2013 | if (!route) | |
2014 | return tb_switch_get(tb->root_switch); | |
2015 | ||
2016 | memset(&lookup, 0, sizeof(lookup)); | |
2017 | lookup.tb = tb; | |
2018 | lookup.route = route; | |
2019 | ||
2020 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
2021 | if (dev) | |
2022 | return tb_to_switch(dev); | |
2023 | ||
2024 | return NULL; | |
2025 | } | |
2026 | ||
e6b245cc MW |
2027 | void tb_switch_exit(void) |
2028 | { | |
2029 | ida_destroy(&nvm_ida); | |
2030 | } |