[mirror_ubuntu-jammy-kernel.git] / drivers / thunderbolt / tb_msgs.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Thunderbolt control channel messages
 *
 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
 * Copyright (C) 2017, Intel Corporation
 */

#ifndef _TB_MSGS
#define _TB_MSGS

#include <linux/types.h>
#include <linux/uuid.h>

enum tb_cfg_space {
	TB_CFG_HOPS = 0,
	TB_CFG_PORT = 1,
	TB_CFG_SWITCH = 2,
	TB_CFG_COUNTERS = 3,
};

enum tb_cfg_error {
	TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
	TB_CFG_ERROR_LINK_ERROR = 1,
	TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
	TB_CFG_ERROR_NO_SUCH_PORT = 4,
	TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
	TB_CFG_ERROR_LOOP = 8,
	TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
	TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
	TB_CFG_ERROR_LOCK = 15,
};

/* common header */
struct tb_cfg_header {
	u32 route_hi:22;
	u32 unknown:10; /* highest order bit is set on replies */
	u32 route_lo;
} __packed;

/* additional header for read/write packets */
struct tb_cfg_address {
	u32 offset:13; /* in dwords */
	u32 length:6; /* in dwords */
	u32 port:6;
	enum tb_cfg_space space:2;
	u32 seq:2; /* sequence number  */
	u32 zero:3;
} __packed;

/* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
struct cfg_read_pkg {
	struct tb_cfg_header header;
	struct tb_cfg_address addr;
} __packed;

/* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
struct cfg_write_pkg {
	struct tb_cfg_header header;
	struct tb_cfg_address addr;
	u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
} __packed;

/* TB_CFG_PKG_ERROR */
struct cfg_error_pkg {
	struct tb_cfg_header header;
	enum tb_cfg_error error:4;
	u32 zero1:4;
	u32 port:6;
	u32 zero2:2; /* Both should be zero, still they are different fields. */
	u32 zero3:14;
	u32 pg:2;
} __packed;

#define TB_CFG_ERROR_PG_HOT_PLUG	0x2
#define TB_CFG_ERROR_PG_HOT_UNPLUG	0x3

/* TB_CFG_PKG_EVENT */
struct cfg_event_pkg {
	struct tb_cfg_header header;
	u32 port:6;
	u32 zero:25;
	bool unplug:1;
} __packed;

/* TB_CFG_PKG_RESET */
struct cfg_reset_pkg {
	struct tb_cfg_header header;
} __packed;

/* TB_CFG_PKG_PREPARE_TO_SLEEP */
struct cfg_pts_pkg {
	struct tb_cfg_header header;
	u32 data;
} __packed;

/* ICM messages */

enum icm_pkg_code {
	ICM_GET_TOPOLOGY = 0x1,
	ICM_DRIVER_READY = 0x3,
	ICM_APPROVE_DEVICE = 0x4,
	ICM_CHALLENGE_DEVICE = 0x5,
	ICM_ADD_DEVICE_KEY = 0x6,
	ICM_GET_ROUTE = 0xa,
	ICM_APPROVE_XDOMAIN = 0x10,
	ICM_DISCONNECT_XDOMAIN = 0x11,
	ICM_PREBOOT_ACL = 0x18,
	ICM_USB4_SWITCH_OP = 0x20,
};

enum icm_event_code {
	ICM_EVENT_DEVICE_CONNECTED = 0x3,
	ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
	ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
	ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
	ICM_EVENT_RTD3_VETO = 0xa,
};

struct icm_pkg_header {
	u8 code;
	u8 flags;
	u8 packet_id;
	u8 total_packets;
};

#define ICM_FLAGS_ERROR			BIT(0)
#define ICM_FLAGS_NO_KEY		BIT(1)
#define ICM_FLAGS_SLEVEL_SHIFT		3
#define ICM_FLAGS_SLEVEL_MASK		GENMASK(4, 3)
#define ICM_FLAGS_DUAL_LANE		BIT(5)
#define ICM_FLAGS_SPEED_GEN3		BIT(7)
#define ICM_FLAGS_WRITE			BIT(7)

struct icm_pkg_driver_ready {
	struct icm_pkg_header hdr;
};

/* Falcon Ridge only messages */

struct icm_fr_pkg_driver_ready_response {
	struct icm_pkg_header hdr;
	u8 romver;
	u8 ramver;
	u16 security_level;
};

#define ICM_FR_SLEVEL_MASK		0xf

/* Falcon Ridge & Alpine Ridge common messages */

struct icm_fr_pkg_get_topology {
	struct icm_pkg_header hdr;
};

#define ICM_GET_TOPOLOGY_PACKETS	14

struct icm_fr_pkg_get_topology_response {
	struct icm_pkg_header hdr;
	u32 route_lo;
	u32 route_hi;
	u8 first_data;
	u8 second_data;
	u8 drom_i2c_address_index;
	u8 switch_index;
	u32 reserved[2];
	u32 ports[16];
	u32 port_hop_info[16];
};

#define ICM_SWITCH_USED			BIT(0)
#define ICM_SWITCH_UPSTREAM_PORT_MASK	GENMASK(7, 1)
#define ICM_SWITCH_UPSTREAM_PORT_SHIFT	1

#define ICM_PORT_TYPE_MASK		GENMASK(23, 0)
#define ICM_PORT_INDEX_SHIFT		24
#define ICM_PORT_INDEX_MASK		GENMASK(31, 24)

struct icm_fr_event_device_connected {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u8 connection_key;
	u8 connection_id;
	u16 link_info;
	u32 ep_name[55];
};

#define ICM_LINK_INFO_LINK_MASK		0x7
#define ICM_LINK_INFO_DEPTH_SHIFT	4
#define ICM_LINK_INFO_DEPTH_MASK	GENMASK(7, 4)
#define ICM_LINK_INFO_APPROVED		BIT(8)
#define ICM_LINK_INFO_REJECTED		BIT(9)
#define ICM_LINK_INFO_BOOT		BIT(10)

struct icm_fr_pkg_approve_device {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u8 connection_key;
	u8 connection_id;
	u16 reserved;
};

struct icm_fr_event_device_disconnected {
	struct icm_pkg_header hdr;
	u16 reserved;
	u16 link_info;
};

struct icm_fr_event_xdomain_connected {
	struct icm_pkg_header hdr;
	u16 reserved;
	u16 link_info;
	uuid_t remote_uuid;
	uuid_t local_uuid;
	u32 local_route_hi;
	u32 local_route_lo;
	u32 remote_route_hi;
	u32 remote_route_lo;
};

struct icm_fr_event_xdomain_disconnected {
	struct icm_pkg_header hdr;
	u16 reserved;
	u16 link_info;
	uuid_t remote_uuid;
};

struct icm_fr_pkg_add_device_key {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u8 connection_key;
	u8 connection_id;
	u16 reserved;
	u32 key[8];
};

struct icm_fr_pkg_add_device_key_response {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u8 connection_key;
	u8 connection_id;
	u16 reserved;
};

struct icm_fr_pkg_challenge_device {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u8 connection_key;
	u8 connection_id;
	u16 reserved;
	u32 challenge[8];
};

struct icm_fr_pkg_challenge_device_response {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u8 connection_key;
	u8 connection_id;
	u16 reserved;
	u32 challenge[8];
	u32 response[8];
};

struct icm_fr_pkg_approve_xdomain {
	struct icm_pkg_header hdr;
	u16 reserved;
	u16 link_info;
	uuid_t remote_uuid;
	u16 transmit_path;
	u16 transmit_ring;
	u16 receive_path;
	u16 receive_ring;
};

struct icm_fr_pkg_approve_xdomain_response {
	struct icm_pkg_header hdr;
	u16 reserved;
	u16 link_info;
	uuid_t remote_uuid;
	u16 transmit_path;
	u16 transmit_ring;
	u16 receive_path;
	u16 receive_ring;
};

/* Alpine Ridge only messages */

struct icm_ar_pkg_driver_ready_response {
	struct icm_pkg_header hdr;
	u8 romver;
	u8 ramver;
	u16 info;
};

#define ICM_AR_FLAGS_RTD3		BIT(6)

#define ICM_AR_INFO_SLEVEL_MASK		GENMASK(3, 0)
#define ICM_AR_INFO_BOOT_ACL_SHIFT	7
#define ICM_AR_INFO_BOOT_ACL_MASK	GENMASK(11, 7)
#define ICM_AR_INFO_BOOT_ACL_SUPPORTED	BIT(13)

struct icm_ar_pkg_get_route {
	struct icm_pkg_header hdr;
	u16 reserved;
	u16 link_info;
};

struct icm_ar_pkg_get_route_response {
	struct icm_pkg_header hdr;
	u16 reserved;
	u16 link_info;
	u32 route_hi;
	u32 route_lo;
};

struct icm_ar_boot_acl_entry {
	u32 uuid_lo;
	u32 uuid_hi;
};

#define ICM_AR_PREBOOT_ACL_ENTRIES	16

struct icm_ar_pkg_preboot_acl {
	struct icm_pkg_header hdr;
	struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
};

struct icm_ar_pkg_preboot_acl_response {
	struct icm_pkg_header hdr;
	struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
};

/* Titan Ridge messages */

struct icm_tr_pkg_driver_ready_response {
	struct icm_pkg_header hdr;
	u16 reserved1;
	u16 info;
	u32 nvm_version;
	u16 device_id;
	u16 reserved2;
};

#define ICM_TR_FLAGS_RTD3		BIT(6)

#define ICM_TR_INFO_SLEVEL_MASK		GENMASK(2, 0)
#define ICM_TR_INFO_PROTO_VERSION_MASK	GENMASK(6, 4)
#define ICM_TR_INFO_PROTO_VERSION_SHIFT	4
#define ICM_TR_INFO_BOOT_ACL_SHIFT	7
#define ICM_TR_INFO_BOOT_ACL_MASK	GENMASK(12, 7)

struct icm_tr_event_device_connected {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u32 route_hi;
	u32 route_lo;
	u8 connection_id;
	u8 reserved;
	u16 link_info;
	u32 ep_name[55];
};

struct icm_tr_event_device_disconnected {
	struct icm_pkg_header hdr;
	u32 route_hi;
	u32 route_lo;
};

struct icm_tr_event_xdomain_connected {
	struct icm_pkg_header hdr;
	u16 reserved;
	u16 link_info;
	uuid_t remote_uuid;
	uuid_t local_uuid;
	u32 local_route_hi;
	u32 local_route_lo;
	u32 remote_route_hi;
	u32 remote_route_lo;
};

struct icm_tr_event_xdomain_disconnected {
	struct icm_pkg_header hdr;
	u32 route_hi;
	u32 route_lo;
	uuid_t remote_uuid;
};

struct icm_tr_pkg_approve_device {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u32 route_hi;
	u32 route_lo;
	u8 connection_id;
	u8 reserved1[3];
};

struct icm_tr_pkg_add_device_key {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u32 route_hi;
	u32 route_lo;
	u8 connection_id;
	u8 reserved[3];
	u32 key[8];
};

struct icm_tr_pkg_challenge_device {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u32 route_hi;
	u32 route_lo;
	u8 connection_id;
	u8 reserved[3];
	u32 challenge[8];
};

struct icm_tr_pkg_approve_xdomain {
	struct icm_pkg_header hdr;
	u32 route_hi;
	u32 route_lo;
	uuid_t remote_uuid;
	u16 transmit_path;
	u16 transmit_ring;
	u16 receive_path;
	u16 receive_ring;
};

struct icm_tr_pkg_disconnect_xdomain {
	struct icm_pkg_header hdr;
	u8 stage;
	u8 reserved[3];
	u32 route_hi;
	u32 route_lo;
	uuid_t remote_uuid;
};

struct icm_tr_pkg_challenge_device_response {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u32 route_hi;
	u32 route_lo;
	u8 connection_id;
	u8 reserved[3];
	u32 challenge[8];
	u32 response[8];
};

struct icm_tr_pkg_add_device_key_response {
	struct icm_pkg_header hdr;
	uuid_t ep_uuid;
	u32 route_hi;
	u32 route_lo;
	u8 connection_id;
	u8 reserved[3];
};

struct icm_tr_pkg_approve_xdomain_response {
	struct icm_pkg_header hdr;
	u32 route_hi;
	u32 route_lo;
	uuid_t remote_uuid;
	u16 transmit_path;
	u16 transmit_ring;
	u16 receive_path;
	u16 receive_ring;
};

struct icm_tr_pkg_disconnect_xdomain_response {
	struct icm_pkg_header hdr;
	u8 stage;
	u8 reserved[3];
	u32 route_hi;
	u32 route_lo;
	uuid_t remote_uuid;
};

/* Ice Lake messages */

struct icm_icl_event_rtd3_veto {
	struct icm_pkg_header hdr;
	u32 veto_reason;
};

/* USB4 ICM messages */

struct icm_usb4_switch_op {
	struct icm_pkg_header hdr;
	u32 route_hi;
	u32 route_lo;
	u32 metadata;
	u16 opcode;
	u16 data_len_valid;
	u32 data[16];
};

#define ICM_USB4_SWITCH_DATA_LEN_MASK	GENMASK(3, 0)
#define ICM_USB4_SWITCH_DATA_VALID	BIT(4)

struct icm_usb4_switch_op_response {
	struct icm_pkg_header hdr;
	u32 route_hi;
	u32 route_lo;
	u32 metadata;
	u16 opcode;
	u16 status;
	u32 data[16];
};

/* XDomain messages */

struct tb_xdomain_header {
	u32 route_hi;
	u32 route_lo;
	u32 length_sn;
};

#define TB_XDOMAIN_LENGTH_MASK	GENMASK(5, 0)
#define TB_XDOMAIN_SN_MASK	GENMASK(28, 27)
#define TB_XDOMAIN_SN_SHIFT	27

enum tb_xdp_type {
	UUID_REQUEST_OLD = 1,
	UUID_RESPONSE = 2,
	PROPERTIES_REQUEST,
	PROPERTIES_RESPONSE,
	PROPERTIES_CHANGED_REQUEST,
	PROPERTIES_CHANGED_RESPONSE,
	ERROR_RESPONSE,
	UUID_REQUEST = 12,
};

struct tb_xdp_header {
	struct tb_xdomain_header xd_hdr;
	uuid_t uuid;
	u32 type;
};

struct tb_xdp_uuid {
	struct tb_xdp_header hdr;
};

struct tb_xdp_uuid_response {
	struct tb_xdp_header hdr;
	uuid_t src_uuid;
	u32 src_route_hi;
	u32 src_route_lo;
};

struct tb_xdp_properties {
	struct tb_xdp_header hdr;
	uuid_t src_uuid;
	uuid_t dst_uuid;
	u16 offset;
	u16 reserved;
};

struct tb_xdp_properties_response {
	struct tb_xdp_header hdr;
	uuid_t src_uuid;
	uuid_t dst_uuid;
	u16 offset;
	u16 data_length;
	u32 generation;
	u32 data[0];
};

/*
 * Max length of data array single XDomain property response is allowed
 * to carry.
 */
#define TB_XDP_PROPERTIES_MAX_DATA_LENGTH	\
	(((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)

/* Maximum size of the total property block in dwords we allow */
#define TB_XDP_PROPERTIES_MAX_LENGTH		500

struct tb_xdp_properties_changed {
	struct tb_xdp_header hdr;
	uuid_t src_uuid;
};

struct tb_xdp_properties_changed_response {
	struct tb_xdp_header hdr;
};

enum tb_xdp_error {
	ERROR_SUCCESS,
	ERROR_UNKNOWN_PACKET,
	ERROR_UNKNOWN_DOMAIN,
	ERROR_NOT_SUPPORTED,
	ERROR_NOT_READY,
};

struct tb_xdp_error_response {
	struct tb_xdp_header hdr;
	u32 error;
};

#endif
Commit	Line	Data
fd3b339c	1	/* SPDX-License-Identifier: GPL-2.0 */
32af9434 MW	2	/*
	3	* Thunderbolt control channel messages
	4	*
	5	* Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
	6	* Copyright (C) 2017, Intel Corporation
32af9434 MW	7	*/
	8
	9	#ifndef _TB_MSGS
	10	#define _TB_MSGS
	11
	12	#include <linux/types.h>
f67cf491	13	#include <linux/uuid.h>
32af9434	14
32af9434 MW	15	enum tb_cfg_space {
	16	TB_CFG_HOPS = 0,
	17	TB_CFG_PORT = 1,
	18	TB_CFG_SWITCH = 2,
	19	TB_CFG_COUNTERS = 3,
	20	};
	21
	22	enum tb_cfg_error {
	23	TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
	24	TB_CFG_ERROR_LINK_ERROR = 1,
	25	TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
	26	TB_CFG_ERROR_NO_SUCH_PORT = 4,
	27	TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
	28	TB_CFG_ERROR_LOOP = 8,
	29	TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
	30	TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
80e7c5dd	31	TB_CFG_ERROR_LOCK = 15,
32af9434 MW	32	};
	33
	34	/* common header */
	35	struct tb_cfg_header {
	36	u32 route_hi:22;
	37	u32 unknown:10; /* highest order bit is set on replies */
	38	u32 route_lo;
	39	} __packed;
	40
	41	/* additional header for read/write packets */
	42	struct tb_cfg_address {
	43	u32 offset:13; /* in dwords */
	44	u32 length:6; /* in dwords */
	45	u32 port:6;
	46	enum tb_cfg_space space:2;
	47	u32 seq:2; /* sequence number */
	48	u32 zero:3;
	49	} __packed;
	50
	51	/* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
	52	struct cfg_read_pkg {
	53	struct tb_cfg_header header;
	54	struct tb_cfg_address addr;
	55	} __packed;
	56
	57	/* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
	58	struct cfg_write_pkg {
	59	struct tb_cfg_header header;
	60	struct tb_cfg_address addr;
	61	u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
	62	} __packed;
	63
	64	/* TB_CFG_PKG_ERROR */
	65	struct cfg_error_pkg {
	66	struct tb_cfg_header header;
	67	enum tb_cfg_error error:4;
	68	u32 zero1:4;
	69	u32 port:6;
	70	u32 zero2:2; /* Both should be zero, still they are different fields. */
210e9f56 MW	71	u32 zero3:14;
210e9f56 MW	72	u32 pg:2;
32af9434 MW	73	} __packed;
32af9434 MW	74
210e9f56 MW	75	#define TB_CFG_ERROR_PG_HOT_PLUG 0x2
	76	#define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3
	77
32af9434 MW	78	/* TB_CFG_PKG_EVENT */
	79	struct cfg_event_pkg {
	80	struct tb_cfg_header header;
	81	u32 port:6;
	82	u32 zero:25;
	83	bool unplug:1;
	84	} __packed;
	85
	86	/* TB_CFG_PKG_RESET */
	87	struct cfg_reset_pkg {
	88	struct tb_cfg_header header;
	89	} __packed;
	90
	91	/* TB_CFG_PKG_PREPARE_TO_SLEEP */
	92	struct cfg_pts_pkg {
	93	struct tb_cfg_header header;
	94	u32 data;
	95	} __packed;
	96
f67cf491 MW	97	/* ICM messages */
	98
	99	enum icm_pkg_code {
	100	ICM_GET_TOPOLOGY = 0x1,
	101	ICM_DRIVER_READY = 0x3,
	102	ICM_APPROVE_DEVICE = 0x4,
	103	ICM_CHALLENGE_DEVICE = 0x5,
	104	ICM_ADD_DEVICE_KEY = 0x6,
	105	ICM_GET_ROUTE = 0xa,
d1ff7024	106	ICM_APPROVE_XDOMAIN = 0x10,
4bac471d	107	ICM_DISCONNECT_XDOMAIN = 0x11,
9aaa3b8b	108	ICM_PREBOOT_ACL = 0x18,
9039387e	109	ICM_USB4_SWITCH_OP = 0x20,
f67cf491 MW	110	};
	111
	112	enum icm_event_code {
3cdb9446 MW	113	ICM_EVENT_DEVICE_CONNECTED = 0x3,
	114	ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
	115	ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
	116	ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
	117	ICM_EVENT_RTD3_VETO = 0xa,
f67cf491 MW	118	};
	119
	120	struct icm_pkg_header {
	121	u8 code;
	122	u8 flags;
	123	u8 packet_id;
	124	u8 total_packets;
80671708	125	};
f67cf491 MW	126
	127	#define ICM_FLAGS_ERROR BIT(0)
	128	#define ICM_FLAGS_NO_KEY BIT(1)
	129	#define ICM_FLAGS_SLEVEL_SHIFT 3
	130	#define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
91c0c120 MW	131	#define ICM_FLAGS_DUAL_LANE BIT(5)
91c0c120 MW	132	#define ICM_FLAGS_SPEED_GEN3 BIT(7)
9aaa3b8b	133	#define ICM_FLAGS_WRITE BIT(7)
f67cf491 MW	134
	135	struct icm_pkg_driver_ready {
	136	struct icm_pkg_header hdr;
80671708	137	};
f67cf491	138
9aaa3b8b	139	/* Falcon Ridge only messages */
3080e197 MW	140
3080e197 MW	141	struct icm_fr_pkg_driver_ready_response {
f67cf491 MW	142	struct icm_pkg_header hdr;
	143	u8 romver;
	144	u8 ramver;
	145	u16 security_level;
80671708	146	};
f67cf491	147
3080e197	148	#define ICM_FR_SLEVEL_MASK 0xf
f67cf491	149
9aaa3b8b MW	150	/* Falcon Ridge & Alpine Ridge common messages */
9aaa3b8b MW	151
f67cf491 MW	152	struct icm_fr_pkg_get_topology {
f67cf491 MW	153	struct icm_pkg_header hdr;
80671708	154	};
f67cf491 MW	155
	156	#define ICM_GET_TOPOLOGY_PACKETS 14
	157
	158	struct icm_fr_pkg_get_topology_response {
	159	struct icm_pkg_header hdr;
	160	u32 route_lo;
	161	u32 route_hi;
	162	u8 first_data;
	163	u8 second_data;
	164	u8 drom_i2c_address_index;
	165	u8 switch_index;
	166	u32 reserved[2];
	167	u32 ports[16];
	168	u32 port_hop_info[16];
80671708	169	};
f67cf491 MW	170
	171	#define ICM_SWITCH_USED BIT(0)
	172	#define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
	173	#define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
	174
	175	#define ICM_PORT_TYPE_MASK GENMASK(23, 0)
	176	#define ICM_PORT_INDEX_SHIFT 24
	177	#define ICM_PORT_INDEX_MASK GENMASK(31, 24)
	178
	179	struct icm_fr_event_device_connected {
	180	struct icm_pkg_header hdr;
7c39ffe7	181	uuid_t ep_uuid;
f67cf491 MW	182	u8 connection_key;
	183	u8 connection_id;
	184	u16 link_info;
	185	u32 ep_name[55];
80671708	186	};
f67cf491 MW	187
	188	#define ICM_LINK_INFO_LINK_MASK 0x7
	189	#define ICM_LINK_INFO_DEPTH_SHIFT 4
	190	#define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
	191	#define ICM_LINK_INFO_APPROVED BIT(8)
cb653eec	192	#define ICM_LINK_INFO_REJECTED BIT(9)
14862ee3	193	#define ICM_LINK_INFO_BOOT BIT(10)
f67cf491 MW	194
	195	struct icm_fr_pkg_approve_device {
	196	struct icm_pkg_header hdr;
7c39ffe7	197	uuid_t ep_uuid;
f67cf491 MW	198	u8 connection_key;
	199	u8 connection_id;
	200	u16 reserved;
80671708	201	};
f67cf491 MW	202
	203	struct icm_fr_event_device_disconnected {
	204	struct icm_pkg_header hdr;
	205	u16 reserved;
	206	u16 link_info;
80671708	207	};
f67cf491	208
d1ff7024 MW	209	struct icm_fr_event_xdomain_connected {
	210	struct icm_pkg_header hdr;
	211	u16 reserved;
	212	u16 link_info;
	213	uuid_t remote_uuid;
	214	uuid_t local_uuid;
	215	u32 local_route_hi;
	216	u32 local_route_lo;
	217	u32 remote_route_hi;
	218	u32 remote_route_lo;
	219	};
	220
	221	struct icm_fr_event_xdomain_disconnected {
	222	struct icm_pkg_header hdr;
	223	u16 reserved;
	224	u16 link_info;
	225	uuid_t remote_uuid;
	226	};
	227
f67cf491 MW	228	struct icm_fr_pkg_add_device_key {
f67cf491 MW	229	struct icm_pkg_header hdr;
7c39ffe7	230	uuid_t ep_uuid;
f67cf491 MW	231	u8 connection_key;
	232	u8 connection_id;
	233	u16 reserved;
	234	u32 key[8];
80671708	235	};
f67cf491 MW	236
	237	struct icm_fr_pkg_add_device_key_response {
	238	struct icm_pkg_header hdr;
7c39ffe7	239	uuid_t ep_uuid;
f67cf491 MW	240	u8 connection_key;
	241	u8 connection_id;
	242	u16 reserved;
80671708	243	};
f67cf491 MW	244
	245	struct icm_fr_pkg_challenge_device {
	246	struct icm_pkg_header hdr;
7c39ffe7	247	uuid_t ep_uuid;
f67cf491 MW	248	u8 connection_key;
	249	u8 connection_id;
	250	u16 reserved;
	251	u32 challenge[8];
80671708	252	};
f67cf491 MW	253
	254	struct icm_fr_pkg_challenge_device_response {
	255	struct icm_pkg_header hdr;
7c39ffe7	256	uuid_t ep_uuid;
f67cf491 MW	257	u8 connection_key;
	258	u8 connection_id;
	259	u16 reserved;
	260	u32 challenge[8];
	261	u32 response[8];
80671708	262	};
f67cf491	263
d1ff7024 MW	264	struct icm_fr_pkg_approve_xdomain {
	265	struct icm_pkg_header hdr;
	266	u16 reserved;
	267	u16 link_info;
	268	uuid_t remote_uuid;
	269	u16 transmit_path;
	270	u16 transmit_ring;
	271	u16 receive_path;
	272	u16 receive_ring;
	273	};
	274
	275	struct icm_fr_pkg_approve_xdomain_response {
	276	struct icm_pkg_header hdr;
	277	u16 reserved;
	278	u16 link_info;
	279	uuid_t remote_uuid;
	280	u16 transmit_path;
	281	u16 transmit_ring;
	282	u16 receive_path;
	283	u16 receive_ring;
	284	};
	285
f67cf491 MW	286	/* Alpine Ridge only messages */
f67cf491 MW	287
9aaa3b8b MW	288	struct icm_ar_pkg_driver_ready_response {
	289	struct icm_pkg_header hdr;
	290	u8 romver;
	291	u8 ramver;
	292	u16 info;
	293	};
	294
2d8ff0b5 MW	295	#define ICM_AR_FLAGS_RTD3 BIT(6)
2d8ff0b5 MW	296
9aaa3b8b MW	297	#define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
	298	#define ICM_AR_INFO_BOOT_ACL_SHIFT 7
	299	#define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
	300	#define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
	301
f67cf491 MW	302	struct icm_ar_pkg_get_route {
	303	struct icm_pkg_header hdr;
	304	u16 reserved;
	305	u16 link_info;
80671708	306	};
f67cf491 MW	307
	308	struct icm_ar_pkg_get_route_response {
	309	struct icm_pkg_header hdr;
	310	u16 reserved;
	311	u16 link_info;
	312	u32 route_hi;
	313	u32 route_lo;
80671708	314	};
f67cf491	315
9aaa3b8b MW	316	struct icm_ar_boot_acl_entry {
	317	u32 uuid_lo;
	318	u32 uuid_hi;
	319	};
	320
	321	#define ICM_AR_PREBOOT_ACL_ENTRIES 16
	322
	323	struct icm_ar_pkg_preboot_acl {
	324	struct icm_pkg_header hdr;
	325	struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
	326	};
	327
	328	struct icm_ar_pkg_preboot_acl_response {
	329	struct icm_pkg_header hdr;
	330	struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
	331	};
	332
4bac471d RM	333	/* Titan Ridge messages */
	334
	335	struct icm_tr_pkg_driver_ready_response {
	336	struct icm_pkg_header hdr;
	337	u16 reserved1;
	338	u16 info;
	339	u32 nvm_version;
	340	u16 device_id;
	341	u16 reserved2;
	342	};
	343
2d8ff0b5 MW	344	#define ICM_TR_FLAGS_RTD3 BIT(6)
2d8ff0b5 MW	345
4bac471d	346	#define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
9039387e MW	347	#define ICM_TR_INFO_PROTO_VERSION_MASK GENMASK(6, 4)
9039387e MW	348	#define ICM_TR_INFO_PROTO_VERSION_SHIFT 4
4bac471d RM	349	#define ICM_TR_INFO_BOOT_ACL_SHIFT 7
	350	#define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
	351
	352	struct icm_tr_event_device_connected {
	353	struct icm_pkg_header hdr;
	354	uuid_t ep_uuid;
	355	u32 route_hi;
	356	u32 route_lo;
	357	u8 connection_id;
	358	u8 reserved;
	359	u16 link_info;
	360	u32 ep_name[55];
	361	};
	362
	363	struct icm_tr_event_device_disconnected {
	364	struct icm_pkg_header hdr;
	365	u32 route_hi;
	366	u32 route_lo;
	367	};
	368
	369	struct icm_tr_event_xdomain_connected {
	370	struct icm_pkg_header hdr;
	371	u16 reserved;
	372	u16 link_info;
	373	uuid_t remote_uuid;
	374	uuid_t local_uuid;
	375	u32 local_route_hi;
	376	u32 local_route_lo;
	377	u32 remote_route_hi;
	378	u32 remote_route_lo;
	379	};
	380
	381	struct icm_tr_event_xdomain_disconnected {
	382	struct icm_pkg_header hdr;
	383	u32 route_hi;
	384	u32 route_lo;
	385	uuid_t remote_uuid;
	386	};
	387
	388	struct icm_tr_pkg_approve_device {
	389	struct icm_pkg_header hdr;
	390	uuid_t ep_uuid;
	391	u32 route_hi;
	392	u32 route_lo;
	393	u8 connection_id;
	394	u8 reserved1[3];
	395	};
	396
	397	struct icm_tr_pkg_add_device_key {
	398	struct icm_pkg_header hdr;
	399	uuid_t ep_uuid;
	400	u32 route_hi;
	401	u32 route_lo;
	402	u8 connection_id;
	403	u8 reserved[3];
	404	u32 key[8];
	405	};
	406
	407	struct icm_tr_pkg_challenge_device {
	408	struct icm_pkg_header hdr;
	409	uuid_t ep_uuid;
	410	u32 route_hi;
	411	u32 route_lo;
	412	u8 connection_id;
413	u8 reserved[3];
414	u32 challenge[8];
415	};
416
417	struct icm_tr_pkg_approve_xdomain {
418	struct icm_pkg_header hdr;
419	u32 route_hi;
420	u32 route_lo;
421	uuid_t remote_uuid;
422	u16 transmit_path;
423	u16 transmit_ring;
424	u16 receive_path;
425	u16 receive_ring;
426	};
427
428	struct icm_tr_pkg_disconnect_xdomain {
429	struct icm_pkg_header hdr;
430	u8 stage;
431	u8 reserved[3];
432	u32 route_hi;
433	u32 route_lo;
434	uuid_t remote_uuid;
435	};
436
437	struct icm_tr_pkg_challenge_device_response {
438	struct icm_pkg_header hdr;
439	uuid_t ep_uuid;
440	u32 route_hi;
441	u32 route_lo;
442	u8 connection_id;
443	u8 reserved[3];
444	u32 challenge[8];
445	u32 response[8];
446	};
447
448	struct icm_tr_pkg_add_device_key_response {
449	struct icm_pkg_header hdr;
450	uuid_t ep_uuid;
451	u32 route_hi;
452	u32 route_lo;
453	u8 connection_id;
454	u8 reserved[3];
455	};
456
457	struct icm_tr_pkg_approve_xdomain_response {
458	struct icm_pkg_header hdr;
459	u32 route_hi;
460	u32 route_lo;
461	uuid_t remote_uuid;
462	u16 transmit_path;
463	u16 transmit_ring;
464	u16 receive_path;
465	u16 receive_ring;
466	};
467
468	struct icm_tr_pkg_disconnect_xdomain_response {
469	struct icm_pkg_header hdr;
470	u8 stage;
471	u8 reserved[3];
472	u32 route_hi;
473	u32 route_lo;
474	uuid_t remote_uuid;
475	};
476
3cdb9446 MW	477	/* Ice Lake messages */
	478
	479	struct icm_icl_event_rtd3_veto {
	480	struct icm_pkg_header hdr;
	481	u32 veto_reason;
	482	};
	483
9039387e MW	484	/* USB4 ICM messages */
	485
	486	struct icm_usb4_switch_op {
	487	struct icm_pkg_header hdr;
	488	u32 route_hi;
	489	u32 route_lo;
	490	u32 metadata;
	491	u16 opcode;
	492	u16 data_len_valid;
	493	u32 data[16];
	494	};
	495
	496	#define ICM_USB4_SWITCH_DATA_LEN_MASK GENMASK(3, 0)
	497	#define ICM_USB4_SWITCH_DATA_VALID BIT(4)
	498
	499	struct icm_usb4_switch_op_response {
	500	struct icm_pkg_header hdr;
	501	u32 route_hi;
	502	u32 route_lo;
	503	u32 metadata;
	504	u16 opcode;
	505	u16 status;
	506	u32 data[16];
	507	};
	508
d1ff7024 MW	509	/* XDomain messages */
	510
	511	struct tb_xdomain_header {
	512	u32 route_hi;
	513	u32 route_lo;
	514	u32 length_sn;
	515	};
	516
	517	#define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
	518	#define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
	519	#define TB_XDOMAIN_SN_SHIFT 27
	520
	521	enum tb_xdp_type {
	522	UUID_REQUEST_OLD = 1,
	523	UUID_RESPONSE = 2,
	524	PROPERTIES_REQUEST,
	525	PROPERTIES_RESPONSE,
	526	PROPERTIES_CHANGED_REQUEST,
	527	PROPERTIES_CHANGED_RESPONSE,
	528	ERROR_RESPONSE,
	529	UUID_REQUEST = 12,
	530	};
	531
	532	struct tb_xdp_header {
	533	struct tb_xdomain_header xd_hdr;
	534	uuid_t uuid;
	535	u32 type;
	536	};
	537
3b4b3235 MW	538	struct tb_xdp_uuid {
	539	struct tb_xdp_header hdr;
	540	};
	541
	542	struct tb_xdp_uuid_response {
	543	struct tb_xdp_header hdr;
	544	uuid_t src_uuid;
	545	u32 src_route_hi;
	546	u32 src_route_lo;
	547	};
	548
d1ff7024 MW	549	struct tb_xdp_properties {
	550	struct tb_xdp_header hdr;
	551	uuid_t src_uuid;
	552	uuid_t dst_uuid;
	553	u16 offset;
	554	u16 reserved;
	555	};
	556
	557	struct tb_xdp_properties_response {
	558	struct tb_xdp_header hdr;
	559	uuid_t src_uuid;
	560	uuid_t dst_uuid;
	561	u16 offset;
	562	u16 data_length;
	563	u32 generation;
	564	u32 data[0];
	565	};
	566
	567	/*
	568	* Max length of data array single XDomain property response is allowed
	569	* to carry.
	570	*/
	571	#define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
	572	(((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
	573
	574	/* Maximum size of the total property block in dwords we allow */
	575	#define TB_XDP_PROPERTIES_MAX_LENGTH 500
	576
	577	struct tb_xdp_properties_changed {
	578	struct tb_xdp_header hdr;
	579	uuid_t src_uuid;
	580	};
	581
	582	struct tb_xdp_properties_changed_response {
	583	struct tb_xdp_header hdr;
	584	};
	585
	586	enum tb_xdp_error {
	587	ERROR_SUCCESS,
	588	ERROR_UNKNOWN_PACKET,
	589	ERROR_UNKNOWN_DOMAIN,
	590	ERROR_NOT_SUPPORTED,
	591	ERROR_NOT_READY,
	592	};
	593
	594	struct tb_xdp_error_response {
	595	struct tb_xdp_header hdr;
	596	u32 error;
	597	};
	598
32af9434	599	#endif