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Merge tag 'trace-v5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt...
[mirror_ubuntu-jammy-kernel.git] / drivers / tty / moxa.c
CommitLineData
e3b3d0f5 1// SPDX-License-Identifier: GPL-2.0+
1da177e4
LT		 2/*****************************************************************************/
3/*
4 * moxa.c -- MOXA Intellio family multiport serial driver.
5 *
b9705b60
JS		 6 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
7 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
1da177e4
LT		 8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
1da177e4
LT		 11 */
12
13/*
14 * MOXA Intellio Series Driver
15 * for : LINUX
16 * date : 1999/1/7
17 * version : 5.1
18 */
19
1da177e4
LT		 20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/mm.h>
23#include <linux/ioport.h>
24#include <linux/errno.h>
03718234 25#include <linux/firmware.h>
1da177e4
LT		 26#include <linux/signal.h>
27#include <linux/sched.h>
28#include <linux/timer.h>
29#include <linux/interrupt.h>
30#include <linux/tty.h>
31#include <linux/tty_flip.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/serial.h>
37#include <linux/tty_driver.h>
38#include <linux/delay.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/bitops.h>
5a0e3ad6 42#include <linux/slab.h>
5a3c6b25 43#include <linux/ratelimit.h>
1da177e4 44
1da177e4 45#include <asm/io.h>
7c0f6ba6 46#include <linux/uaccess.h>
1da177e4 47
03718234
JS		 48#include "moxa.h"
49
b9705b60 50#define MOXA_VERSION "6.0k"
1da177e4 51
03718234
JS		 52#define MOXA_FW_HDRLEN 32
53
11324edd 54#define MOXAMAJOR 172
1da177e4 55
11324edd 56#define MAX_BOARDS 4 /* Don't change this value */
1da177e4 57#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
11324edd 58#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
1da177e4 59
08d01c79
JS		 60#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
61 (brd)->boardType == MOXA_BOARD_C320_PCI)
62
1da177e4
LT		 63/*
64 * Define the Moxa PCI vendor and device IDs.
65 */
11324edd
JS		 66#define MOXA_BUS_TYPE_ISA 0
67#define MOXA_BUS_TYPE_PCI 1
1da177e4 68
1da177e4
LT		 69enum {
70 MOXA_BOARD_C218_PCI = 1,
71 MOXA_BOARD_C218_ISA,
72 MOXA_BOARD_C320_PCI,
73 MOXA_BOARD_C320_ISA,
74 MOXA_BOARD_CP204J,
75};
76
77static char *moxa_brdname[] =
78{
79 "C218 Turbo PCI series",
80 "C218 Turbo ISA series",
81 "C320 Turbo PCI series",
82 "C320 Turbo ISA series",
83 "CP-204J series",
84};
85
86#ifdef CONFIG_PCI
50bd842b 87static const struct pci_device_id moxa_pcibrds[] = {
5ebb4078
JS		 88 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
89 .driver_data = MOXA_BOARD_C218_PCI },
90 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
91 .driver_data = MOXA_BOARD_C320_PCI },
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
93 .driver_data = MOXA_BOARD_CP204J },
1da177e4
LT		 94 { 0 }
95};
96MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
97#endif /* CONFIG_PCI */
98
03718234
JS		 99struct moxa_port;
100
8f8ecbad 101static struct moxa_board_conf {
1da177e4
LT		 102 int boardType;
103 int numPorts;
1da177e4 104 int busType;
8f8ecbad 105
810ab09b 106 unsigned int ready;
8f8ecbad 107
03718234
JS		 108 struct moxa_port *ports;
109
8f8ecbad
JS		 110 void __iomem *basemem;
111 void __iomem *intNdx;
112 void __iomem *intPend;
113 void __iomem *intTable;
114} moxa_boards[MAX_BOARDS];
115
116struct mxser_mstatus {
117 tcflag_t cflag;
118 int cts;
119 int dsr;
120 int ri;
121 int dcd;
9dff89cd 122};
1da177e4 123
8f8ecbad
JS		 124struct moxaq_str {
125 int inq;
126 int outq;
127};
1da177e4 128
8f8ecbad 129struct moxa_port {
9de6a51f 130 struct tty_port port;
b4173f45 131 struct moxa_board_conf *board;
7bcf97d1
JS		 132 void __iomem *tableAddr;
133
1da177e4 134 int type;
1da177e4 135 int cflag;
7bcf97d1 136 unsigned long statusflags;
1da177e4 137
8482bcd5 138 u8 DCDState; /* Protected by the port lock */
7bcf97d1
JS		 139 u8 lineCtrl;
140 u8 lowChkFlag;
8f8ecbad 141};
1da177e4 142
74d7d97b
JS		 143struct mon_str {
144 int tick;
145 int rxcnt[MAX_PORTS];
146 int txcnt[MAX_PORTS];
147};
148
1da177e4 149/* statusflags */
a808ac0c
AC		 150#define TXSTOPPED 1
151#define LOWWAIT 2
152#define EMPTYWAIT 3
1da177e4 153
1da177e4 154
1da177e4
LT		 155#define WAKEUP_CHARS 256
156
1da177e4 157static int ttymajor = MOXAMAJOR;
74d7d97b
JS		 158static struct mon_str moxaLog;
159static unsigned int moxaFuncTout = HZ / 2;
7bcf97d1 160static unsigned int moxaLowWaterChk;
a8f5cda0 161static DEFINE_MUTEX(moxa_openlock);
e8c62103 162static DEFINE_SPINLOCK(moxa_lock);
c6fc826e 163
d353eca4
JS		 164static unsigned long baseaddr[MAX_BOARDS];
165static unsigned int type[MAX_BOARDS];
166static unsigned int numports[MAX_BOARDS];
793be898 167static struct tty_port moxa_service_port;
1da177e4
LT		 168
169MODULE_AUTHOR("William Chen");
170MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
171MODULE_LICENSE("GPL");
e6c4ef98
BH		 172MODULE_FIRMWARE("c218tunx.cod");
173MODULE_FIRMWARE("cp204unx.cod");
174MODULE_FIRMWARE("c320tunx.cod");
c6fc826e 175
d353eca4
JS		 176module_param_array(type, uint, NULL, 0);
177MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
3b60daf8 178module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
d353eca4
JS		 179MODULE_PARM_DESC(baseaddr, "base address");
180module_param_array(numports, uint, NULL, 0);
181MODULE_PARM_DESC(numports, "numports (ignored for C218)");
c6fc826e 182
1da177e4 183module_param(ttymajor, int, 0);
1da177e4 184
1da177e4
LT		 185/*
186 * static functions:
187 */
1da177e4
LT		 188static int moxa_open(struct tty_struct *, struct file *);
189static void moxa_close(struct tty_struct *, struct file *);
190static int moxa_write(struct tty_struct *, const unsigned char *, int);
191static int moxa_write_room(struct tty_struct *);
192static void moxa_flush_buffer(struct tty_struct *);
193static int moxa_chars_in_buffer(struct tty_struct *);
606d099c 194static void moxa_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 195static void moxa_stop(struct tty_struct *);
196static void moxa_start(struct tty_struct *);
197static void moxa_hangup(struct tty_struct *);
60b33c13 198static int moxa_tiocmget(struct tty_struct *tty);
20b9d177 199static int moxa_tiocmset(struct tty_struct *tty,
1da177e4 200 unsigned int set, unsigned int clear);
24ed960a 201static void moxa_poll(struct timer_list *);
db1acaa6 202static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
f176178b 203static void moxa_shutdown(struct tty_port *);
31f35939 204static int moxa_carrier_raised(struct tty_port *);
f176178b 205static void moxa_dtr_rts(struct tty_port *, int);
1da177e4
LT		 206/*
207 * moxa board interface functions:
208 */
b4173f45
JS		 209static void MoxaPortEnable(struct moxa_port *);
210static void MoxaPortDisable(struct moxa_port *);
211static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
212static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
213static void MoxaPortLineCtrl(struct moxa_port *, int, int);
214static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
215static int MoxaPortLineStatus(struct moxa_port *);
b4173f45 216static void MoxaPortFlushData(struct moxa_port *, int);
d450b5a0 217static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
7bcf97d1 218static int MoxaPortReadData(struct moxa_port *);
b4173f45
JS		 219static int MoxaPortTxQueue(struct moxa_port *);
220static int MoxaPortRxQueue(struct moxa_port *);
221static int MoxaPortTxFree(struct moxa_port *);
222static void MoxaPortTxDisable(struct moxa_port *);
223static void MoxaPortTxEnable(struct moxa_port *);
1c729ab1
AV		 224static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
225static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
b4173f45 226static void MoxaSetFifo(struct moxa_port *port, int enable);
1da177e4 227
74d7d97b
JS		 228/*
229 * I/O functions
230 */
231
a808ac0c
AC		 232static DEFINE_SPINLOCK(moxafunc_lock);
233
74d7d97b
JS		 234static void moxa_wait_finish(void __iomem *ofsAddr)
235{
236 unsigned long end = jiffies + moxaFuncTout;
237
238 while (readw(ofsAddr + FuncCode) != 0)
239 if (time_after(jiffies, end))
240 return;
5a3c6b25
MZ		 241 if (readw(ofsAddr + FuncCode) != 0)
242 printk_ratelimited(KERN_WARNING "moxa function expired\n");
74d7d97b
JS		 243}
244
eaa95a8d 245static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
74d7d97b 246{
f5c5a36d
AC		 247 unsigned long flags;
248 spin_lock_irqsave(&moxafunc_lock, flags);
74d7d97b
JS		 249 writew(arg, ofsAddr + FuncArg);
250 writew(cmd, ofsAddr + FuncCode);
251 moxa_wait_finish(ofsAddr);
f5c5a36d
AC		 252 spin_unlock_irqrestore(&moxafunc_lock, flags);
253}
254
255static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
256{
257 unsigned long flags;
258 u16 ret;
259 spin_lock_irqsave(&moxafunc_lock, flags);
260 writew(arg, ofsAddr + FuncArg);
261 writew(cmd, ofsAddr + FuncCode);
262 moxa_wait_finish(ofsAddr);
263 ret = readw(ofsAddr + FuncArg);
264 spin_unlock_irqrestore(&moxafunc_lock, flags);
265 return ret;
74d7d97b
JS		 266}
267
7bcf97d1
JS		 268static void moxa_low_water_check(void __iomem *ofsAddr)
269{
270 u16 rptr, wptr, mask, len;
271
272 if (readb(ofsAddr + FlagStat) & Xoff_state) {
273 rptr = readw(ofsAddr + RXrptr);
274 wptr = readw(ofsAddr + RXwptr);
275 mask = readw(ofsAddr + RX_mask);
276 len = (wptr - rptr) & mask;
277 if (len <= Low_water)
278 moxafunc(ofsAddr, FC_SendXon, 0);
279 }
280}
281
74d7d97b
JS		 282/*
283 * TTY operations
284 */
285
6caa76b7 286static int moxa_ioctl(struct tty_struct *tty,
74d7d97b
JS		 287 unsigned int cmd, unsigned long arg)
288{
289 struct moxa_port *ch = tty->driver_data;
290 void __user *argp = (void __user *)arg;
a8f5cda0 291 int status, ret = 0;
74d7d97b
JS		 292
293 if (tty->index == MAX_PORTS) {
294 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
295 cmd != MOXA_GETMSTATUS)
296 return -EINVAL;
297 } else if (!ch)
298 return -ENODEV;
299
300 switch (cmd) {
301 case MOXA_GETDATACOUNT:
302 moxaLog.tick = jiffies;
a8f5cda0
JS		 303 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
304 ret = -EFAULT;
305 break;
74d7d97b
JS		 306 case MOXA_FLUSH_QUEUE:
307 MoxaPortFlushData(ch, arg);
a8f5cda0 308 break;
74d7d97b
JS		 309 case MOXA_GET_IOQUEUE: {
310 struct moxaq_str __user *argm = argp;
311 struct moxaq_str tmp;
312 struct moxa_port *p;
313 unsigned int i, j;
314
315 for (i = 0; i < MAX_BOARDS; i++) {
316 p = moxa_boards[i].ports;
317 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
318 memset(&tmp, 0, sizeof(tmp));
e8c62103 319 spin_lock_bh(&moxa_lock);
74d7d97b
JS		 320 if (moxa_boards[i].ready) {
321 tmp.inq = MoxaPortRxQueue(p);
322 tmp.outq = MoxaPortTxQueue(p);
323 }
e8c62103
AC		 324 spin_unlock_bh(&moxa_lock);
325 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS		 326 return -EFAULT;
327 }
328 }
a8f5cda0 329 break;
74d7d97b
JS		 330 } case MOXA_GET_OQUEUE:
331 status = MoxaPortTxQueue(ch);
a8f5cda0
JS		 332 ret = put_user(status, (unsigned long __user *)argp);
333 break;
74d7d97b
JS		 334 case MOXA_GET_IQUEUE:
335 status = MoxaPortRxQueue(ch);
a8f5cda0
JS		 336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
74d7d97b
JS		 338 case MOXA_GETMSTATUS: {
339 struct mxser_mstatus __user *argm = argp;
340 struct mxser_mstatus tmp;
341 struct moxa_port *p;
342 unsigned int i, j;
343
344 for (i = 0; i < MAX_BOARDS; i++) {
345 p = moxa_boards[i].ports;
346 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
d450b5a0 347 struct tty_struct *ttyp;
74d7d97b 348 memset(&tmp, 0, sizeof(tmp));
e8c62103
AC		 349 spin_lock_bh(&moxa_lock);
350 if (!moxa_boards[i].ready) {
351 spin_unlock_bh(&moxa_lock);
74d7d97b 352 goto copy;
e8c62103 353 }
74d7d97b
JS		 354
355 status = MoxaPortLineStatus(p);
e8c62103
AC		 356 spin_unlock_bh(&moxa_lock);
357
74d7d97b
JS		 358 if (status & 1)
359 tmp.cts = 1;
360 if (status & 2)
361 tmp.dsr = 1;
362 if (status & 4)
363 tmp.dcd = 1;
364
d450b5a0 365 ttyp = tty_port_tty_get(&p->port);
adc8d746 366 if (!ttyp)
74d7d97b
JS		 367 tmp.cflag = p->cflag;
368 else
adc8d746 369 tmp.cflag = ttyp->termios.c_cflag;
df43daaa 370 tty_kref_put(ttyp);
74d7d97b 371copy:
e8c62103 372 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS		 373 return -EFAULT;
374 }
375 }
a8f5cda0 376 break;
74d7d97b 377 }
a8f5cda0
JS		 378 default:
379 ret = -ENOIOCTLCMD;
74d7d97b 380 }
a8f5cda0 381 return ret;
74d7d97b
JS		 382}
383
9e98966c 384static int moxa_break_ctl(struct tty_struct *tty, int state)
74d7d97b
JS		 385{
386 struct moxa_port *port = tty->driver_data;
387
388 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
389 Magic_code);
9e98966c 390 return 0;
74d7d97b
JS		 391}
392
b68e31d0 393static const struct tty_operations moxa_ops = {
1da177e4
LT		 394 .open = moxa_open,
395 .close = moxa_close,
396 .write = moxa_write,
397 .write_room = moxa_write_room,
398 .flush_buffer = moxa_flush_buffer,
399 .chars_in_buffer = moxa_chars_in_buffer,
1da177e4 400 .ioctl = moxa_ioctl,
1da177e4
LT		 401 .set_termios = moxa_set_termios,
402 .stop = moxa_stop,
403 .start = moxa_start,
404 .hangup = moxa_hangup,
74d7d97b 405 .break_ctl = moxa_break_ctl,
1da177e4
LT		 406 .tiocmget = moxa_tiocmget,
407 .tiocmset = moxa_tiocmset,
1c729ab1
AV		 408 .set_serial = moxa_set_serial_info,
409 .get_serial = moxa_get_serial_info,
1da177e4
LT		 410};
411
31f35939
AC		 412static const struct tty_port_operations moxa_port_ops = {
413 .carrier_raised = moxa_carrier_raised,
f176178b
AC		 414 .dtr_rts = moxa_dtr_rts,
415 .shutdown = moxa_shutdown,
31f35939
AC		 416};
417
aa7e5221 418static struct tty_driver *moxaDriver;
1d27e3e2 419static DEFINE_TIMER(moxaTimer, moxa_poll);
33f0f88f 420
74d7d97b
JS		 421/*
422 * HW init
423 */
424
03718234
JS		 425static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
426{
427 switch (brd->boardType) {
428 case MOXA_BOARD_C218_ISA:
429 case MOXA_BOARD_C218_PCI:
430 if (model != 1)
431 goto err;
432 break;
433 case MOXA_BOARD_CP204J:
434 if (model != 3)
435 goto err;
436 break;
437 default:
438 if (model != 2)
439 goto err;
440 break;
441 }
442 return 0;
443err:
444 return -EINVAL;
445}
446
447static int moxa_check_fw(const void *ptr)
448{
449 const __le16 *lptr = ptr;
450
451 if (*lptr != cpu_to_le16(0x7980))
452 return -EINVAL;
453
454 return 0;
455}
456
457static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
458 size_t len)
459{
460 void __iomem *baseAddr = brd->basemem;
461 u16 tmp;
462
463 writeb(HW_reset, baseAddr + Control_reg); /* reset */
464 msleep(10);
465 memset_io(baseAddr, 0, 4096);
466 memcpy_toio(baseAddr, buf, len); /* download BIOS */
467 writeb(0, baseAddr + Control_reg); /* restart */
468
469 msleep(2000);
470
471 switch (brd->boardType) {
472 case MOXA_BOARD_C218_ISA:
473 case MOXA_BOARD_C218_PCI:
474 tmp = readw(baseAddr + C218_key);
475 if (tmp != C218_KeyCode)
476 goto err;
477 break;
478 case MOXA_BOARD_CP204J:
479 tmp = readw(baseAddr + C218_key);
480 if (tmp != CP204J_KeyCode)
481 goto err;
482 break;
483 default:
484 tmp = readw(baseAddr + C320_key);
485 if (tmp != C320_KeyCode)
486 goto err;
487 tmp = readw(baseAddr + C320_status);
488 if (tmp != STS_init) {
eaa95a8d 489 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
03718234
JS		 490 "module not found\n");
491 return -EIO;
492 }
493 break;
494 }
495
496 return 0;
497err:
eaa95a8d 498 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
03718234
JS		 499 return -EIO;
500}
501
502static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
503 size_t len)
504{
505 void __iomem *baseAddr = brd->basemem;
506
507 if (len < 7168) {
eaa95a8d 508 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
03718234
JS		 509 return -EINVAL;
510 }
511
512 writew(len - 7168 - 2, baseAddr + C320bapi_len);
513 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
514 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
515 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
516 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
517
518 return 0;
519}
520
5292bcd3 521static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
03718234
JS		 522 size_t len)
523{
524 void __iomem *baseAddr = brd->basemem;
b46f69cd 525 const __le16 *uptr = ptr;
03718234 526 size_t wlen, len2, j;
5292bcd3 527 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
08d01c79 528 unsigned int i, retry;
03718234
JS		 529 u16 usum, keycode;
530
5292bcd3
JS		 531 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
532 C218_KeyCode;
03718234 533
5292bcd3
JS		 534 switch (brd->boardType) {
535 case MOXA_BOARD_CP204J:
536 case MOXA_BOARD_C218_ISA:
537 case MOXA_BOARD_C218_PCI:
538 key = C218_key;
539 loadbuf = C218_LoadBuf;
540 loadlen = C218DLoad_len;
541 checksum = C218check_sum;
542 checksum_ok = C218chksum_ok;
543 break;
544 default:
545 key = C320_key;
546 keycode = C320_KeyCode;
547 loadbuf = C320_LoadBuf;
548 loadlen = C320DLoad_len;
549 checksum = C320check_sum;
550 checksum_ok = C320chksum_ok;
551 break;
03718234 552 }
03718234
JS		 553
554 usum = 0;
555 wlen = len >> 1;
556 for (i = 0; i < wlen; i++)
557 usum += le16_to_cpu(uptr[i]);
558 retry = 0;
559 do {
560 wlen = len >> 1;
561 j = 0;
562 while (wlen) {
563 len2 = (wlen > 2048) ? 2048 : wlen;
564 wlen -= len2;
5292bcd3 565 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
03718234 566 j += len2 << 1;
5292bcd3
JS		 567
568 writew(len2, baseAddr + loadlen);
569 writew(0, baseAddr + key);
570 for (i = 0; i < 100; i++) {
571 if (readw(baseAddr + key) == keycode)
03718234
JS		 572 break;
573 msleep(10);
574 }
5292bcd3 575 if (readw(baseAddr + key) != keycode)
03718234
JS		 576 return -EIO;
577 }
5292bcd3
JS		 578 writew(0, baseAddr + loadlen);
579 writew(usum, baseAddr + checksum);
580 writew(0, baseAddr + key);
581 for (i = 0; i < 100; i++) {
582 if (readw(baseAddr + key) == keycode)
03718234
JS		 583 break;
584 msleep(10);
585 }
586 retry++;
5292bcd3
JS		 587 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
588 if (readb(baseAddr + checksum_ok) != 1)
03718234
JS		 589 return -EIO;
590
5292bcd3 591 writew(0, baseAddr + key);
03718234
JS		 592 for (i = 0; i < 600; i++) {
593 if (readw(baseAddr + Magic_no) == Magic_code)
594 break;
595 msleep(10);
596 }
597 if (readw(baseAddr + Magic_no) != Magic_code)
598 return -EIO;
599
08d01c79 600 if (MOXA_IS_320(brd)) {
5292bcd3
JS		 601 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
602 writew(0x3800, baseAddr + TMS320_PORT1);
603 writew(0x3900, baseAddr + TMS320_PORT2);
604 writew(28499, baseAddr + TMS320_CLOCK);
605 } else {
606 writew(0x3200, baseAddr + TMS320_PORT1);
607 writew(0x3400, baseAddr + TMS320_PORT2);
608 writew(19999, baseAddr + TMS320_CLOCK);
609 }
03718234
JS		 610 }
611 writew(1, baseAddr + Disable_IRQ);
612 writew(0, baseAddr + Magic_no);
613 for (i = 0; i < 500; i++) {
614 if (readw(baseAddr + Magic_no) == Magic_code)
615 break;
616 msleep(10);
617 }
618 if (readw(baseAddr + Magic_no) != Magic_code)
619 return -EIO;
620
08d01c79 621 if (MOXA_IS_320(brd)) {
5292bcd3
JS		 622 j = readw(baseAddr + Module_cnt);
623 if (j <= 0)
624 return -EIO;
625 brd->numPorts = j * 8;
626 writew(j, baseAddr + Module_no);
627 writew(0, baseAddr + Magic_no);
628 for (i = 0; i < 600; i++) {
629 if (readw(baseAddr + Magic_no) == Magic_code)
630 break;
631 msleep(10);
632 }
633 if (readw(baseAddr + Magic_no) != Magic_code)
634 return -EIO;
03718234 635 }
03718234
JS		 636 brd->intNdx = baseAddr + IRQindex;
637 brd->intPend = baseAddr + IRQpending;
638 brd->intTable = baseAddr + IRQtable;
639
640 return 0;
641}
642
643static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
644 size_t len)
645{
646 void __iomem *ofsAddr, *baseAddr = brd->basemem;
647 struct moxa_port *port;
648 int retval, i;
649
650 if (len % 2) {
eaa95a8d 651 printk(KERN_ERR "MOXA: bios length is not even\n");
03718234
JS		 652 return -EINVAL;
653 }
654
5292bcd3
JS		 655 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
656 if (retval)
657 return retval;
658
03718234
JS		 659 switch (brd->boardType) {
660 case MOXA_BOARD_C218_ISA:
661 case MOXA_BOARD_C218_PCI:
662 case MOXA_BOARD_CP204J:
03718234
JS		 663 port = brd->ports;
664 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 665 port->board = brd;
03718234
JS		 666 port->DCDState = 0;
667 port->tableAddr = baseAddr + Extern_table +
668 Extern_size * i;
669 ofsAddr = port->tableAddr;
670 writew(C218rx_mask, ofsAddr + RX_mask);
671 writew(C218tx_mask, ofsAddr + TX_mask);
672 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
673 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
674
675 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
676 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
677
678 }
679 break;
680 default:
03718234
JS		 681 port = brd->ports;
682 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 683 port->board = brd;
03718234
JS		 684 port->DCDState = 0;
685 port->tableAddr = baseAddr + Extern_table +
686 Extern_size * i;
687 ofsAddr = port->tableAddr;
688 switch (brd->numPorts) {
689 case 8:
690 writew(C320p8rx_mask, ofsAddr + RX_mask);
691 writew(C320p8tx_mask, ofsAddr + TX_mask);
692 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
693 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
694 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
695 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
696
697 break;
698 case 16:
699 writew(C320p16rx_mask, ofsAddr + RX_mask);
700 writew(C320p16tx_mask, ofsAddr + TX_mask);
701 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
702 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
703 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
704 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
705 break;
706
707 case 24:
708 writew(C320p24rx_mask, ofsAddr + RX_mask);
709 writew(C320p24tx_mask, ofsAddr + TX_mask);
710 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
711 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
712 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
713 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
714 break;
715 case 32:
716 writew(C320p32rx_mask, ofsAddr + RX_mask);
717 writew(C320p32tx_mask, ofsAddr + TX_mask);
718 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
719 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
720 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
721 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
722 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
723 break;
724 }
725 }
726 break;
727 }
03718234
JS		 728 return 0;
729}
730
731static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
732{
2bca76e8 733 const void *ptr = fw->data;
03718234
JS		 734 char rsn[64];
735 u16 lens[5];
736 size_t len;
737 unsigned int a, lenp, lencnt;
738 int ret = -EINVAL;
739 struct {
740 __le32 magic; /* 0x34303430 */
741 u8 reserved1[2];
742 u8 type; /* UNIX = 3 */
743 u8 model; /* C218T=1, C320T=2, CP204=3 */
744 u8 reserved2[8];
745 __le16 len[5];
2bca76e8 746 } const *hdr = ptr;
03718234
JS		 747
748 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
749
750 if (fw->size < MOXA_FW_HDRLEN) {
751 strcpy(rsn, "too short (even header won't fit)");
752 goto err;
753 }
754 if (hdr->magic != cpu_to_le32(0x30343034)) {
755 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
756 goto err;
757 }
758 if (hdr->type != 3) {
759 sprintf(rsn, "not for linux, type is %u", hdr->type);
760 goto err;
761 }
762 if (moxa_check_fw_model(brd, hdr->model)) {
763 sprintf(rsn, "not for this card, model is %u", hdr->model);
764 goto err;
765 }
766
767 len = MOXA_FW_HDRLEN;
768 lencnt = hdr->model == 2 ? 5 : 3;
769 for (a = 0; a < ARRAY_SIZE(lens); a++) {
770 lens[a] = le16_to_cpu(hdr->len[a]);
771 if (lens[a] && len + lens[a] <= fw->size &&
772 moxa_check_fw(&fw->data[len]))
eaa95a8d 773 printk(KERN_WARNING "MOXA firmware: unexpected input "
03718234
JS		 774 "at offset %u, but going on\n", (u32)len);
775 if (!lens[a] && a < lencnt) {
776 sprintf(rsn, "too few entries in fw file");
777 goto err;
778 }
779 len += lens[a];
780 }
781
782 if (len != fw->size) {
783 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
784 (u32)len);
785 goto err;
786 }
787
788 ptr += MOXA_FW_HDRLEN;
789 lenp = 0; /* bios */
790
791 strcpy(rsn, "read above");
792
793 ret = moxa_load_bios(brd, ptr, lens[lenp]);
794 if (ret)
795 goto err;
796
797 /* we skip the tty section (lens[1]), since we don't need it */
798 ptr += lens[lenp] + lens[lenp + 1];
799 lenp += 2; /* comm */
800
801 if (hdr->model == 2) {
802 ret = moxa_load_320b(brd, ptr, lens[lenp]);
803 if (ret)
804 goto err;
805 /* skip another tty */
806 ptr += lens[lenp] + lens[lenp + 1];
807 lenp += 2;
808 }
809
810 ret = moxa_load_code(brd, ptr, lens[lenp]);
811 if (ret)
812 goto err;
813
814 return 0;
815err:
816 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
817 return ret;
818}
819
820static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
821{
822 const struct firmware *fw;
823 const char *file;
810ab09b 824 struct moxa_port *p;
793be898 825 unsigned int i, first_idx;
03718234
JS		 826 int ret;
827
810ab09b
JS		 828 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
829 GFP_KERNEL);
830 if (brd->ports == NULL) {
831 printk(KERN_ERR "cannot allocate memory for ports\n");
832 ret = -ENOMEM;
833 goto err;
834 }
835
836 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
44b7d1b3 837 tty_port_init(&p->port);
31f35939 838 p->port.ops = &moxa_port_ops;
810ab09b 839 p->type = PORT_16550A;
810ab09b 840 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
810ab09b
JS		 841 }
842
03718234
JS		 843 switch (brd->boardType) {
844 case MOXA_BOARD_C218_ISA:
845 case MOXA_BOARD_C218_PCI:
846 file = "c218tunx.cod";
847 break;
848 case MOXA_BOARD_CP204J:
849 file = "cp204unx.cod";
850 break;
851 default:
852 file = "c320tunx.cod";
853 break;
854 }
855
856 ret = request_firmware(&fw, file, dev);
857 if (ret) {
ec09cd56
JS		 858 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
859 "you've placed '%s' file into your firmware "
860 "loader directory (e.g. /lib/firmware)\n",
861 file);
810ab09b 862 goto err_free;
03718234
JS		 863 }
864
865 ret = moxa_load_fw(brd, fw);
866
867 release_firmware(fw);
810ab09b
JS		 868
869 if (ret)
870 goto err_free;
871
2a541341 872 spin_lock_bh(&moxa_lock);
810ab09b 873 brd->ready = 1;
0bcc4caa
JS		 874 if (!timer_pending(&moxaTimer))
875 mod_timer(&moxaTimer, jiffies + HZ / 50);
2a541341 876 spin_unlock_bh(&moxa_lock);
0bcc4caa 877
793be898
JS		 878 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
879 for (i = 0; i < brd->numPorts; i++)
880 tty_port_register_device(&brd->ports[i].port, moxaDriver,
881 first_idx + i, dev);
882
810ab09b
JS		 883 return 0;
884err_free:
191c5f10
JS		 885 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
886 tty_port_destroy(&brd->ports[i].port);
810ab09b
JS		 887 kfree(brd->ports);
888err:
03718234
JS		 889 return ret;
890}
891
810ab09b
JS		 892static void moxa_board_deinit(struct moxa_board_conf *brd)
893{
793be898 894 unsigned int a, opened, first_idx;
a8f5cda0
JS		 895
896 mutex_lock(&moxa_openlock);
7bcf97d1 897 spin_lock_bh(&moxa_lock);
810ab09b 898 brd->ready = 0;
7bcf97d1 899 spin_unlock_bh(&moxa_lock);
a8f5cda0
JS		 900
901 /* pci hot-un-plug support */
902 for (a = 0; a < brd->numPorts; a++)
d41861ca 903 if (tty_port_initialized(&brd->ports[a].port))
aa27a094
JS		 904 tty_port_tty_hangup(&brd->ports[a].port, false);
905
191c5f10
JS		 906 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
907 tty_port_destroy(&brd->ports[a].port);
aa27a094 908
a8f5cda0
JS		 909 while (1) {
910 opened = 0;
911 for (a = 0; a < brd->numPorts; a++)
d41861ca 912 if (tty_port_initialized(&brd->ports[a].port))
a8f5cda0
JS		 913 opened++;
914 mutex_unlock(&moxa_openlock);
915 if (!opened)
916 break;
917 msleep(50);
918 mutex_lock(&moxa_openlock);
919 }
920
793be898
JS		 921 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
922 for (a = 0; a < brd->numPorts; a++)
923 tty_unregister_device(moxaDriver, first_idx + a);
924
810ab09b
JS		 925 iounmap(brd->basemem);
926 brd->basemem = NULL;
927 kfree(brd->ports);
928}
929
1da177e4 930#ifdef CONFIG_PCI
9671f099 931static int moxa_pci_probe(struct pci_dev *pdev,
9cde5bf0 932 const struct pci_device_id *ent)
1da177e4 933{
9cde5bf0
JS		 934 struct moxa_board_conf *board;
935 unsigned int i;
936 int board_type = ent->driver_data;
937 int retval;
938
939 retval = pci_enable_device(pdev);
7aeb95da
JS		 940 if (retval) {
941 dev_err(&pdev->dev, "can't enable pci device\n");
9cde5bf0 942 goto err;
7aeb95da 943 }
9cde5bf0
JS		 944
945 for (i = 0; i < MAX_BOARDS; i++)
946 if (moxa_boards[i].basemem == NULL)
947 break;
948
949 retval = -ENODEV;
950 if (i >= MAX_BOARDS) {
7aeb95da 951 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
9cde5bf0
JS		 952 "found. Board is ignored.\n", MAX_BOARDS);
953 goto err;
954 }
955
956 board = &moxa_boards[i];
e46a5e3f
JS		 957
958 retval = pci_request_region(pdev, 2, "moxa-base");
959 if (retval) {
960 dev_err(&pdev->dev, "can't request pci region 2\n");
961 goto err;
962 }
963
4bdc0d67 964 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000);
7aeb95da
JS		 965 if (board->basemem == NULL) {
966 dev_err(&pdev->dev, "can't remap io space 2\n");
386d95b3 967 retval = -ENOMEM;
e46a5e3f 968 goto err_reg;
7aeb95da 969 }
9cde5bf0 970
1da177e4
LT		 971 board->boardType = board_type;
972 switch (board_type) {
973 case MOXA_BOARD_C218_ISA:
974 case MOXA_BOARD_C218_PCI:
975 board->numPorts = 8;
976 break;
977
978 case MOXA_BOARD_CP204J:
979 board->numPorts = 4;
980 break;
981 default:
982 board->numPorts = 0;
983 break;
984 }
985 board->busType = MOXA_BUS_TYPE_PCI;
a784bf7c 986
03718234
JS		 987 retval = moxa_init_board(board, &pdev->dev);
988 if (retval)
989 goto err_base;
990
9cde5bf0 991 pci_set_drvdata(pdev, board);
1da177e4 992
bb9f910a
JS		 993 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
994 moxa_brdname[board_type - 1], board->numPorts);
995
eaa95a8d 996 return 0;
03718234
JS		 997err_base:
998 iounmap(board->basemem);
999 board->basemem = NULL;
e46a5e3f
JS		 1000err_reg:
1001 pci_release_region(pdev, 2);
9cde5bf0
JS		 1002err:
1003 return retval;
1004}
1005
ae8d8a14 1006static void moxa_pci_remove(struct pci_dev *pdev)
9cde5bf0
JS		 1007{
1008 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1009
810ab09b
JS		 1010 moxa_board_deinit(brd);
1011
e46a5e3f 1012 pci_release_region(pdev, 2);
1da177e4 1013}
a784bf7c
JS		 1014
1015static struct pci_driver moxa_pci_driver = {
1016 .name = "moxa",
1017 .id_table = moxa_pcibrds,
1018 .probe = moxa_pci_probe,
91116cba 1019 .remove = moxa_pci_remove
a784bf7c 1020};
1da177e4
LT		 1021#endif /* CONFIG_PCI */
1022
1023static int __init moxa_init(void)
1024{
810ab09b 1025 unsigned int isabrds = 0;
d353eca4 1026 int retval = 0;
c6fc826e
RM		 1027 struct moxa_board_conf *brd = moxa_boards;
1028 unsigned int i;
1da177e4 1029
7aeb95da
JS		 1030 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1031 MOXA_VERSION);
793be898
JS		 1032
1033 tty_port_init(&moxa_service_port);
1034
1035 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1036 TTY_DRIVER_REAL_RAW |
1037 TTY_DRIVER_DYNAMIC_DEV);
c3a6344a
DC		 1038 if (IS_ERR(moxaDriver))
1039 return PTR_ERR(moxaDriver);
1da177e4 1040
9b4e3b13 1041 moxaDriver->name = "ttyMX";
1da177e4
LT		 1042 moxaDriver->major = ttymajor;
1043 moxaDriver->minor_start = 0;
1044 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1045 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1046 moxaDriver->init_termios = tty_std_termios;
1da177e4 1047 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
606d099c
AC		 1048 moxaDriver->init_termios.c_ispeed = 9600;
1049 moxaDriver->init_termios.c_ospeed = 9600;
1da177e4 1050 tty_set_operations(moxaDriver, &moxa_ops);
793be898
JS		 1051 /* Having one more port only for ioctls is ugly */
1052 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1da177e4 1053
1da177e4 1054 if (tty_register_driver(moxaDriver)) {
eaa95a8d 1055 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1da177e4
LT		 1056 put_tty_driver(moxaDriver);
1057 return -1;
1058 }
1da177e4 1059
d353eca4 1060 /* Find the boards defined from module args. */
c6fc826e 1061
1da177e4 1062 for (i = 0; i < MAX_BOARDS; i++) {
d353eca4
JS		 1063 if (!baseaddr[i])
1064 break;
1065 if (type[i] == MOXA_BOARD_C218_ISA ||
1066 type[i] == MOXA_BOARD_C320_ISA) {
7aeb95da 1067 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
d353eca4
JS		 1068 isabrds + 1, moxa_brdname[type[i] - 1],
1069 baseaddr[i]);
1070 brd->boardType = type[i];
1071 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1072 numports[i];
1073 brd->busType = MOXA_BUS_TYPE_ISA;
4bdc0d67 1074 brd->basemem = ioremap(baseaddr[i], 0x4000);
d353eca4 1075 if (!brd->basemem) {
eaa95a8d 1076 printk(KERN_ERR "MOXA: can't remap %lx\n",
d353eca4 1077 baseaddr[i]);
1da177e4
LT		 1078 continue;
1079 }
03718234
JS		 1080 if (moxa_init_board(brd, NULL)) {
1081 iounmap(brd->basemem);
1082 brd->basemem = NULL;
1083 continue;
1084 }
d353eca4 1085
e0525393 1086 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
bb9f910a
JS		 1087 "ready (%u ports, firmware loaded)\n",
1088 baseaddr[i], brd->numPorts);
1089
d353eca4
JS		 1090 brd++;
1091 isabrds++;
1da177e4
LT		 1092 }
1093 }
a784bf7c 1094
1da177e4 1095#ifdef CONFIG_PCI
a784bf7c
JS		 1096 retval = pci_register_driver(&moxa_pci_driver);
1097 if (retval) {
eaa95a8d 1098 printk(KERN_ERR "Can't register MOXA pci driver!\n");
d353eca4 1099 if (isabrds)
a784bf7c 1100 retval = 0;
1da177e4
LT		 1101 }
1102#endif
a784bf7c 1103
a784bf7c 1104 return retval;
1da177e4
LT		 1105}
1106
1107static void __exit moxa_exit(void)
1108{
eaa95a8d 1109 unsigned int i;
1da177e4 1110
9cde5bf0 1111#ifdef CONFIG_PCI
a784bf7c 1112 pci_unregister_driver(&moxa_pci_driver);
9cde5bf0 1113#endif
a784bf7c 1114
810ab09b
JS		 1115 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1116 if (moxa_boards[i].ready)
1117 moxa_board_deinit(&moxa_boards[i]);
2a541341
JS		 1118
1119 del_timer_sync(&moxaTimer);
1120
6c2e6317 1121 tty_unregister_driver(moxaDriver);
2a541341 1122 put_tty_driver(moxaDriver);
1da177e4
LT		 1123}
1124
1125module_init(moxa_init);
1126module_exit(moxa_exit);
1127
f176178b 1128static void moxa_shutdown(struct tty_port *port)
a8f5cda0 1129{
f176178b
AC		 1130 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1131 MoxaPortDisable(ch);
a8f5cda0 1132 MoxaPortFlushData(ch, 2);
a8f5cda0
JS		 1133}
1134
31f35939
AC		 1135static int moxa_carrier_raised(struct tty_port *port)
1136{
1137 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1138 int dcd;
1139
8482bcd5 1140 spin_lock_irq(&port->lock);
31f35939 1141 dcd = ch->DCDState;
8482bcd5 1142 spin_unlock_irq(&port->lock);
31f35939
AC		 1143 return dcd;
1144}
1145
f176178b 1146static void moxa_dtr_rts(struct tty_port *port, int onoff)
a8f5cda0 1147{
f176178b
AC		 1148 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1149 MoxaPortLineCtrl(ch, onoff, onoff);
a8f5cda0
JS		 1150}
1151
f176178b 1152
1da177e4
LT		 1153static int moxa_open(struct tty_struct *tty, struct file *filp)
1154{
810ab09b 1155 struct moxa_board_conf *brd;
8f8ecbad 1156 struct moxa_port *ch;
1da177e4 1157 int port;
1da177e4 1158
11324edd 1159 port = tty->index;
1da177e4 1160 if (port == MAX_PORTS) {
74d7d97b 1161 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1da177e4 1162 }
a8f5cda0
JS		 1163 if (mutex_lock_interruptible(&moxa_openlock))
1164 return -ERESTARTSYS;
810ab09b 1165 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
a8f5cda0
JS		 1166 if (!brd->ready) {
1167 mutex_unlock(&moxa_openlock);
810ab09b 1168 return -ENODEV;
a8f5cda0 1169 }
1da177e4 1170
f0e85277
DE		 1171 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1172 mutex_unlock(&moxa_openlock);
1173 return -ENODEV;
1174 }
1175
810ab09b 1176 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
9de6a51f 1177 ch->port.count++;
1da177e4 1178 tty->driver_data = ch;
d450b5a0 1179 tty_port_tty_set(&ch->port, tty);
f176178b 1180 mutex_lock(&ch->port.mutex);
d41861ca 1181 if (!tty_port_initialized(&ch->port)) {
1da177e4 1182 ch->statusflags = 0;
adc8d746 1183 moxa_set_tty_param(tty, &tty->termios);
b4173f45
JS		 1184 MoxaPortLineCtrl(ch, 1, 1);
1185 MoxaPortEnable(ch);
a8f5cda0 1186 MoxaSetFifo(ch, ch->type == PORT_16550A);
d41861ca 1187 tty_port_set_initialized(&ch->port, 1);
1da177e4 1188 }
f176178b 1189 mutex_unlock(&ch->port.mutex);
a8f5cda0 1190 mutex_unlock(&moxa_openlock);
1da177e4 1191
7c31bdb6 1192 return tty_port_block_til_ready(&ch->port, tty, filp);
1da177e4
LT		 1193}
1194
1195static void moxa_close(struct tty_struct *tty, struct file *filp)
1196{
f176178b 1197 struct moxa_port *ch = tty->driver_data;
adc8d746 1198 ch->cflag = tty->termios.c_cflag;
f176178b 1199 tty_port_close(&ch->port, tty, filp);
1da177e4
LT		 1200}
1201
1202static int moxa_write(struct tty_struct *tty,
1203 const unsigned char *buf, int count)
1204{
b4173f45 1205 struct moxa_port *ch = tty->driver_data;
0ad7c9af 1206 unsigned long flags;
b4173f45 1207 int len;
1da177e4 1208
1da177e4 1209 if (ch == NULL)
b4173f45 1210 return 0;
33f0f88f 1211
0ad7c9af 1212 spin_lock_irqsave(&moxa_lock, flags);
d450b5a0 1213 len = MoxaPortWriteData(tty, buf, count);
0ad7c9af 1214 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4 1215
a808ac0c 1216 set_bit(LOWWAIT, &ch->statusflags);
eaa95a8d 1217 return len;
1da177e4
LT		 1218}
1219
1220static int moxa_write_room(struct tty_struct *tty)
1221{
8f8ecbad 1222 struct moxa_port *ch;
1da177e4
LT		 1223
1224 if (tty->stopped)
eaa95a8d 1225 return 0;
b4173f45 1226 ch = tty->driver_data;
1da177e4 1227 if (ch == NULL)
eaa95a8d 1228 return 0;
b4173f45 1229 return MoxaPortTxFree(ch);
1da177e4
LT		 1230}
1231
1232static void moxa_flush_buffer(struct tty_struct *tty)
1233{
b4173f45 1234 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1235
1236 if (ch == NULL)
1237 return;
b4173f45 1238 MoxaPortFlushData(ch, 1);
1da177e4
LT		 1239 tty_wakeup(tty);
1240}
1241
1242static int moxa_chars_in_buffer(struct tty_struct *tty)
1243{
b4173f45 1244 struct moxa_port *ch = tty->driver_data;
1da177e4 1245 int chars;
1da177e4 1246
b4173f45 1247 chars = MoxaPortTxQueue(ch);
f710ebd7 1248 if (chars)
1da177e4
LT		 1249 /*
1250 * Make it possible to wakeup anything waiting for output
1251 * in tty_ioctl.c, etc.
1252 */
f710ebd7 1253 set_bit(EMPTYWAIT, &ch->statusflags);
eaa95a8d 1254 return chars;
1da177e4
LT		 1255}
1256
60b33c13 1257static int moxa_tiocmget(struct tty_struct *tty)
1da177e4 1258{
8482bcd5 1259 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1260 int flag = 0, dtr, rts;
1261
b4173f45 1262 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT		 1263 if (dtr)
1264 flag |= TIOCM_DTR;
1265 if (rts)
1266 flag |= TIOCM_RTS;
b4173f45 1267 dtr = MoxaPortLineStatus(ch);
1da177e4
LT		 1268 if (dtr & 1)
1269 flag |= TIOCM_CTS;
1270 if (dtr & 2)
1271 flag |= TIOCM_DSR;
1272 if (dtr & 4)
1273 flag |= TIOCM_CD;
1274 return flag;
1275}
1276
20b9d177 1277static int moxa_tiocmset(struct tty_struct *tty,
1da177e4
LT		 1278 unsigned int set, unsigned int clear)
1279{
a8f5cda0 1280 struct moxa_port *ch;
1da177e4
LT		 1281 int dtr, rts;
1282
a8f5cda0
JS		 1283 mutex_lock(&moxa_openlock);
1284 ch = tty->driver_data;
1285 if (!ch) {
1286 mutex_unlock(&moxa_openlock);
74d7d97b 1287 return -EINVAL;
a8f5cda0 1288 }
1da177e4 1289
b4173f45 1290 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT		 1291 if (set & TIOCM_RTS)
1292 rts = 1;
1293 if (set & TIOCM_DTR)
1294 dtr = 1;
1295 if (clear & TIOCM_RTS)
1296 rts = 0;
1297 if (clear & TIOCM_DTR)
1298 dtr = 0;
b4173f45 1299 MoxaPortLineCtrl(ch, dtr, rts);
a8f5cda0 1300 mutex_unlock(&moxa_openlock);
1da177e4
LT		 1301 return 0;
1302}
1303
1da177e4 1304static void moxa_set_termios(struct tty_struct *tty,
eaa95a8d 1305 struct ktermios *old_termios)
1da177e4 1306{
eaa95a8d 1307 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1308
1309 if (ch == NULL)
1310 return;
db1acaa6 1311 moxa_set_tty_param(tty, old_termios);
eaa95a8d 1312 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
9de6a51f 1313 wake_up_interruptible(&ch->port.open_wait);
1da177e4
LT		 1314}
1315
1316static void moxa_stop(struct tty_struct *tty)
1317{
eaa95a8d 1318 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1319
1320 if (ch == NULL)
1321 return;
b4173f45 1322 MoxaPortTxDisable(ch);
a808ac0c 1323 set_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT		 1324}
1325
1326
1327static void moxa_start(struct tty_struct *tty)
1328{
eaa95a8d 1329 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1330
1331 if (ch == NULL)
1332 return;
1333
58112dfb 1334 if (!test_bit(TXSTOPPED, &ch->statusflags))
1da177e4
LT		 1335 return;
1336
b4173f45 1337 MoxaPortTxEnable(ch);
a808ac0c 1338 clear_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT		 1339}
1340
1341static void moxa_hangup(struct tty_struct *tty)
1342{
a808ac0c 1343 struct moxa_port *ch = tty->driver_data;
f176178b 1344 tty_port_hangup(&ch->port);
1da177e4
LT		 1345}
1346
7bcf97d1 1347static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1da177e4 1348{
8482bcd5 1349 unsigned long flags;
7bcf97d1 1350 dcd = !!dcd;
1da177e4 1351
8482bcd5 1352 spin_lock_irqsave(&p->port.lock, flags);
d450b5a0 1353 if (dcd != p->DCDState) {
8482bcd5
AC		 1354 p->DCDState = dcd;
1355 spin_unlock_irqrestore(&p->port.lock, flags);
aa27a094
JS		 1356 if (!dcd)
1357 tty_port_tty_hangup(&p->port, true);
7bcf97d1 1358 }
8482bcd5
AC		 1359 else
1360 spin_unlock_irqrestore(&p->port.lock, flags);
7bcf97d1 1361}
1da177e4 1362
7bcf97d1
JS		 1363static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1364 u16 __iomem *ip)
1365{
d450b5a0 1366 struct tty_struct *tty = tty_port_tty_get(&p->port);
7bcf97d1 1367 void __iomem *ofsAddr;
d41861ca 1368 unsigned int inited = tty_port_initialized(&p->port);
7bcf97d1
JS		 1369 u16 intr;
1370
1371 if (tty) {
a808ac0c 1372 if (test_bit(EMPTYWAIT, &p->statusflags) &&
7bcf97d1 1373 MoxaPortTxQueue(p) == 0) {
a808ac0c 1374 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1
JS		 1375 tty_wakeup(tty);
1376 }
a808ac0c 1377 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
7bcf97d1 1378 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
a808ac0c 1379 clear_bit(LOWWAIT, &p->statusflags);
7bcf97d1
JS		 1380 tty_wakeup(tty);
1381 }
1382
97ef38b8 1383 if (inited && !tty_throttled(tty) &&
7bcf97d1
JS		 1384 MoxaPortRxQueue(p) > 0) { /* RX */
1385 MoxaPortReadData(p);
6732c8bb 1386 tty_schedule_flip(&p->port);
7bcf97d1
JS		 1387 }
1388 } else {
a808ac0c 1389 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1 1390 MoxaPortFlushData(p, 0); /* flush RX */
1da177e4 1391 }
0bcc4caa 1392
7bcf97d1 1393 if (!handle) /* nothing else to do */
0e0fd7d7 1394 goto put;
7bcf97d1
JS		 1395
1396 intr = readw(ip); /* port irq status */
1397 if (intr == 0)
0e0fd7d7 1398 goto put;
7bcf97d1
JS		 1399
1400 writew(0, ip); /* ACK port */
1401 ofsAddr = p->tableAddr;
1402 if (intr & IntrTx) /* disable tx intr */
1403 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1404 ofsAddr + HostStat);
1405
1406 if (!inited)
0e0fd7d7 1407 goto put;
7bcf97d1
JS		 1408
1409 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
92a19f9c 1410 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
6732c8bb 1411 tty_schedule_flip(&p->port);
7bcf97d1
JS		 1412 }
1413
1414 if (intr & IntrLine)
1415 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
0e0fd7d7
JS		 1416put:
1417 tty_kref_put(tty);
7bcf97d1
JS		 1418
1419 return 0;
1420}
1421
24ed960a 1422static void moxa_poll(struct timer_list *unused)
7bcf97d1
JS		 1423{
1424 struct moxa_board_conf *brd;
1425 u16 __iomem *ip;
2a541341 1426 unsigned int card, port, served = 0;
7bcf97d1
JS		 1427
1428 spin_lock(&moxa_lock);
1da177e4 1429 for (card = 0; card < MAX_BOARDS; card++) {
7bcf97d1
JS		 1430 brd = &moxa_boards[card];
1431 if (!brd->ready)
1da177e4 1432 continue;
7bcf97d1 1433
2a541341
JS		 1434 served++;
1435
7bcf97d1
JS		 1436 ip = NULL;
1437 if (readb(brd->intPend) == 0xff)
1438 ip = brd->intTable + readb(brd->intNdx);
1439
1440 for (port = 0; port < brd->numPorts; port++)
1441 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1442
1443 if (ip)
1444 writeb(0, brd->intPend); /* ACK */
1445
1446 if (moxaLowWaterChk) {
1447 struct moxa_port *p = brd->ports;
1448 for (port = 0; port < brd->numPorts; port++, p++)
1449 if (p->lowChkFlag) {
1450 p->lowChkFlag = 0;
1451 moxa_low_water_check(p->tableAddr);
1da177e4 1452 }
1da177e4
LT		 1453 }
1454 }
7bcf97d1 1455 moxaLowWaterChk = 0;
1da177e4 1456
2a541341
JS		 1457 if (served)
1458 mod_timer(&moxaTimer, jiffies + HZ / 50);
1459 spin_unlock(&moxa_lock);
1da177e4
LT		 1460}
1461
1462/******************************************************************************/
1463
db1acaa6 1464static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1465{
adc8d746 1466 register struct ktermios *ts = &tty->termios;
eaa95a8d 1467 struct moxa_port *ch = tty->driver_data;
db1acaa6 1468 int rts, cts, txflow, rxflow, xany, baud;
1da177e4 1469
1da177e4
LT		 1470 rts = cts = txflow = rxflow = xany = 0;
1471 if (ts->c_cflag & CRTSCTS)
1472 rts = cts = 1;
1473 if (ts->c_iflag & IXON)
1474 txflow = 1;
1475 if (ts->c_iflag & IXOFF)
1476 rxflow = 1;
1477 if (ts->c_iflag & IXANY)
1478 xany = 1;
db1acaa6 1479
b4173f45
JS		 1480 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1481 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
db1acaa6
AC		 1482 if (baud == -1)
1483 baud = tty_termios_baud_rate(old_termios);
1484 /* Not put the baud rate into the termios data */
1485 tty_encode_baud_rate(tty, baud, baud);
1da177e4
LT		 1486}
1487
1da177e4
LT		 1488/*****************************************************************************
1489 * Driver level functions: *
1da177e4 1490 *****************************************************************************/
1da177e4 1491
b4173f45 1492static void MoxaPortFlushData(struct moxa_port *port, int mode)
1da177e4
LT		 1493{
1494 void __iomem *ofsAddr;
eaa95a8d 1495 if (mode < 0 || mode > 2)
1da177e4 1496 return;
b4173f45 1497 ofsAddr = port->tableAddr;
1da177e4
LT		 1498 moxafunc(ofsAddr, FC_FlushQueue, mode);
1499 if (mode != 1) {
b4173f45 1500 port->lowChkFlag = 0;
6f56b658 1501 moxa_low_water_check(ofsAddr);
1da177e4
LT		 1502 }
1503}
1504
1da177e4
LT		 1505/*
1506 * Moxa Port Number Description:
1507 *
1508 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1509 * the port number using in MOXA driver functions will be 0 to 31 for
1510 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1511 * to 127 for fourth. For example, if you setup three MOXA boards,
1512 * first board is C218, second board is C320-16 and third board is
1513 * C320-32. The port number of first board (C218 - 8 ports) is from
1514 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1515 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1516 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1517 * 127 will be invalid.
1518 *
1519 *
1520 * Moxa Functions Description:
1521 *
1522 * Function 1: Driver initialization routine, this routine must be
1523 * called when initialized driver.
1524 * Syntax:
1525 * void MoxaDriverInit();
1526 *
1527 *
1528 * Function 2: Moxa driver private IOCTL command processing.
1529 * Syntax:
1530 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1531 *
1532 * unsigned int cmd : IOCTL command
1533 * unsigned long arg : IOCTL argument
1534 * int port : port number (0 - 127)
1535 *
1536 * return: 0 (OK)
1537 * -EINVAL
1538 * -ENOIOCTLCMD
1539 *
1540 *
1da177e4
LT		 1541 * Function 6: Enable this port to start Tx/Rx data.
1542 * Syntax:
1543 * void MoxaPortEnable(int port);
1544 * int port : port number (0 - 127)
1545 *
1546 *
1547 * Function 7: Disable this port
1548 * Syntax:
1549 * void MoxaPortDisable(int port);
1550 * int port : port number (0 - 127)
1551 *
1552 *
1da177e4
LT		 1553 * Function 10: Setting baud rate of this port.
1554 * Syntax:
08d01c79 1555 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1da177e4
LT		 1556 * int port : port number (0 - 127)
1557 * long baud : baud rate (50 - 115200)
1558 *
1559 * return: 0 : this port is invalid or baud < 50
1560 * 50 - 115200 : the real baud rate set to the port, if
1561 * the argument baud is large than maximun
1562 * available baud rate, the real setting
1563 * baud rate will be the maximun baud rate.
1564 *
1565 *
1da177e4
LT		 1566 * Function 12: Configure the port.
1567 * Syntax:
606d099c 1568 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1da177e4 1569 * int port : port number (0 - 127)
606d099c 1570 * struct ktermios * termio : termio structure pointer
c7bce309 1571 * speed_t baud : baud rate
1da177e4
LT		 1572 *
1573 * return: -1 : this port is invalid or termio == NULL
1574 * 0 : setting O.K.
1575 *
1576 *
1577 * Function 13: Get the DTR/RTS state of this port.
1578 * Syntax:
1579 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1580 * int port : port number (0 - 127)
1581 * int * dtrState : pointer to INT to receive the current DTR
1582 * state. (if NULL, this function will not
1583 * write to this address)
1584 * int * rtsState : pointer to INT to receive the current RTS
1585 * state. (if NULL, this function will not
1586 * write to this address)
1587 *
1588 * return: -1 : this port is invalid
1589 * 0 : O.K.
1590 *
1591 *
1592 * Function 14: Setting the DTR/RTS output state of this port.
1593 * Syntax:
1594 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1595 * int port : port number (0 - 127)
1596 * int dtrState : DTR output state (0: off, 1: on)
1597 * int rtsState : RTS output state (0: off, 1: on)
1598 *
1599 *
1600 * Function 15: Setting the flow control of this port.
1601 * Syntax:
1602 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1603 * int txFlow,int xany);
1604 * int port : port number (0 - 127)
1605 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1606 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1607 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1608 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1609 * int xany : S/W XANY flow control (0: no, 1: yes)
1610 *
1611 *
1612 * Function 16: Get ths line status of this port
1613 * Syntax:
1614 * int MoxaPortLineStatus(int port);
1615 * int port : port number (0 - 127)
1616 *
1617 * return: Bit 0 - CTS state (0: off, 1: on)
1618 * Bit 1 - DSR state (0: off, 1: on)
1619 * Bit 2 - DCD state (0: off, 1: on)
1620 *
1621 *
1da177e4
LT		 1622 * Function 19: Flush the Rx/Tx buffer data of this port.
1623 * Syntax:
1624 * void MoxaPortFlushData(int port, int mode);
1625 * int port : port number (0 - 127)
1626 * int mode
1627 * 0 : flush the Rx buffer
1628 * 1 : flush the Tx buffer
1629 * 2 : flush the Rx and Tx buffer
1630 *
1631 *
1632 * Function 20: Write data.
1633 * Syntax:
1634 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1635 * int port : port number (0 - 127)
1636 * unsigned char * buffer : pointer to write data buffer.
1637 * int length : write data length
1638 *
1639 * return: 0 - length : real write data length
1640 *
1641 *
1642 * Function 21: Read data.
1643 * Syntax:
33f0f88f 1644 * int MoxaPortReadData(int port, struct tty_struct *tty);
1da177e4 1645 * int port : port number (0 - 127)
33f0f88f 1646 * struct tty_struct *tty : tty for data
1da177e4
LT		 1647 *
1648 * return: 0 - length : real read data length
1649 *
1650 *
1da177e4
LT		 1651 * Function 24: Get the Tx buffer current queued data bytes
1652 * Syntax:
1653 * int MoxaPortTxQueue(int port);
1654 * int port : port number (0 - 127)
1655 *
1656 * return: .. : Tx buffer current queued data bytes
1657 *
1658 *
1659 * Function 25: Get the Tx buffer current free space
1660 * Syntax:
1661 * int MoxaPortTxFree(int port);
1662 * int port : port number (0 - 127)
1663 *
1664 * return: .. : Tx buffer current free space
1665 *
1666 *
1667 * Function 26: Get the Rx buffer current queued data bytes
1668 * Syntax:
1669 * int MoxaPortRxQueue(int port);
1670 * int port : port number (0 - 127)
1671 *
1672 * return: .. : Rx buffer current queued data bytes
1673 *
1674 *
1da177e4
LT		 1675 * Function 28: Disable port data transmission.
1676 * Syntax:
1677 * void MoxaPortTxDisable(int port);
1678 * int port : port number (0 - 127)
1679 *
1680 *
1681 * Function 29: Enable port data transmission.
1682 * Syntax:
1683 * void MoxaPortTxEnable(int port);
1684 * int port : port number (0 - 127)
1685 *
1686 *
1da177e4
LT		 1687 * Function 31: Get the received BREAK signal count and reset it.
1688 * Syntax:
1689 * int MoxaPortResetBrkCnt(int port);
1690 * int port : port number (0 - 127)
1691 *
1692 * return: 0 - .. : BREAK signal count
1693 *
1694 *
1da177e4 1695 */
1da177e4 1696
b4173f45 1697static void MoxaPortEnable(struct moxa_port *port)
1da177e4
LT		 1698{
1699 void __iomem *ofsAddr;
eaa95a8d 1700 u16 lowwater = 512;
1da177e4 1701
b4173f45 1702 ofsAddr = port->tableAddr;
1da177e4 1703 writew(lowwater, ofsAddr + Low_water);
08d01c79 1704 if (MOXA_IS_320(port->board))
1da177e4 1705 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
eaa95a8d
JS		 1706 else
1707 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1708 ofsAddr + HostStat);
1da177e4
LT		 1709
1710 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1711 moxafunc(ofsAddr, FC_FlushQueue, 2);
1712
1713 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1714 MoxaPortLineStatus(port);
1715}
1716
b4173f45 1717static void MoxaPortDisable(struct moxa_port *port)
1da177e4 1718{
b4173f45 1719 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT		 1720
1721 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1722 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1723 writew(0, ofsAddr + HostStat);
1724 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1725}
1726
08d01c79 1727static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1da177e4 1728{
08d01c79
JS		 1729 void __iomem *ofsAddr = port->tableAddr;
1730 unsigned int clock, val;
1731 speed_t max;
1da177e4 1732
08d01c79
JS		 1733 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1734 if (baud < 50)
eaa95a8d 1735 return 0;
1da177e4
LT		 1736 if (baud > max)
1737 baud = max;
08d01c79 1738 clock = 921600;
1da177e4
LT		 1739 val = clock / baud;
1740 moxafunc(ofsAddr, FC_SetBaud, val);
1741 baud = clock / val;
eaa95a8d 1742 return baud;
1da177e4
LT		 1743}
1744
b4173f45
JS		 1745static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1746 speed_t baud)
1da177e4
LT		 1747{
1748 void __iomem *ofsAddr;
1da177e4
LT		 1749 tcflag_t mode = 0;
1750
b4173f45 1751 ofsAddr = port->tableAddr;
1da177e4
LT		 1752
1753 mode = termio->c_cflag & CSIZE;
1754 if (mode == CS5)
1755 mode = MX_CS5;
1756 else if (mode == CS6)
1757 mode = MX_CS6;
1758 else if (mode == CS7)
1759 mode = MX_CS7;
1760 else if (mode == CS8)
1761 mode = MX_CS8;
1762
1763 if (termio->c_cflag & CSTOPB) {
1764 if (mode == MX_CS5)
1765 mode |= MX_STOP15;
1766 else
1767 mode |= MX_STOP2;
1768 } else
1769 mode |= MX_STOP1;
1770
1771 if (termio->c_cflag & PARENB) {
d8dcbdd0
LK		 1772 if (termio->c_cflag & PARODD) {
1773 if (termio->c_cflag & CMSPAR)
1774 mode |= MX_PARMARK;
1775 else
1776 mode |= MX_PARODD;
1777 } else {
1778 if (termio->c_cflag & CMSPAR)
1779 mode |= MX_PARSPACE;
1780 else
1781 mode |= MX_PAREVEN;
1782 }
1da177e4
LT		 1783 } else
1784 mode |= MX_PARNONE;
1785
eaa95a8d 1786 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1da177e4 1787
08d01c79
JS		 1788 if (MOXA_IS_320(port->board) && baud >= 921600)
1789 return -1;
1790
db1acaa6 1791 baud = MoxaPortSetBaud(port, baud);
1da177e4
LT		 1792
1793 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
f5c5a36d 1794 spin_lock_irq(&moxafunc_lock);
1da177e4
LT		 1795 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1796 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1797 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
6f56b658 1798 moxa_wait_finish(ofsAddr);
a808ac0c 1799 spin_unlock_irq(&moxafunc_lock);
1da177e4
LT		 1800
1801 }
eaa95a8d 1802 return baud;
1da177e4
LT		 1803}
1804
b4173f45
JS		 1805static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1806 int *rtsState)
1da177e4 1807{
b4173f45
JS		 1808 if (dtrState)
1809 *dtrState = !!(port->lineCtrl & DTR_ON);
1810 if (rtsState)
1811 *rtsState = !!(port->lineCtrl & RTS_ON);
1812
eaa95a8d 1813 return 0;
1da177e4
LT		 1814}
1815
b4173f45 1816static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1da177e4 1817{
eaa95a8d 1818 u8 mode = 0;
1da177e4 1819
1da177e4
LT		 1820 if (dtr)
1821 mode |= DTR_ON;
1822 if (rts)
1823 mode |= RTS_ON;
b4173f45
JS		 1824 port->lineCtrl = mode;
1825 moxafunc(port->tableAddr, FC_LineControl, mode);
1da177e4
LT		 1826}
1827
b4173f45
JS		 1828static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1829 int txflow, int rxflow, int txany)
1da177e4 1830{
b4173f45 1831 int mode = 0;
1da177e4 1832
1da177e4
LT		 1833 if (rts)
1834 mode |= RTS_FlowCtl;
1835 if (cts)
1836 mode |= CTS_FlowCtl;
1837 if (txflow)
1838 mode |= Tx_FlowCtl;
1839 if (rxflow)
1840 mode |= Rx_FlowCtl;
1841 if (txany)
1842 mode |= IXM_IXANY;
b4173f45 1843 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1da177e4
LT		 1844}
1845
b4173f45 1846static int MoxaPortLineStatus(struct moxa_port *port)
1da177e4
LT		 1847{
1848 void __iomem *ofsAddr;
1849 int val;
1850
b4173f45 1851 ofsAddr = port->tableAddr;
f5c5a36d
AC		 1852 if (MOXA_IS_320(port->board))
1853 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1854 else
1da177e4 1855 val = readw(ofsAddr + FlagStat) >> 4;
1da177e4 1856 val &= 0x0B;
7bcf97d1 1857 if (val & 8)
1da177e4 1858 val |= 4;
7bcf97d1 1859 moxa_new_dcdstate(port, val & 8);
1da177e4 1860 val &= 7;
7bcf97d1 1861 return val;
1da177e4
LT		 1862}
1863
d450b5a0 1864static int MoxaPortWriteData(struct tty_struct *tty,
2108eba5 1865 const unsigned char *buffer, int len)
1da177e4 1866{
d450b5a0 1867 struct moxa_port *port = tty->driver_data;
1da177e4 1868 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS		 1869 unsigned int c, total;
1870 u16 head, tail, tx_mask, spage, epage;
1871 u16 pageno, pageofs, bufhead;
1da177e4 1872
b4173f45
JS		 1873 ofsAddr = port->tableAddr;
1874 baseAddr = port->board->basemem;
1da177e4
LT		 1875 tx_mask = readw(ofsAddr + TX_mask);
1876 spage = readw(ofsAddr + Page_txb);
1877 epage = readw(ofsAddr + EndPage_txb);
1878 tail = readw(ofsAddr + TXwptr);
1879 head = readw(ofsAddr + TXrptr);
2108eba5 1880 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1da177e4
LT		 1881 if (c > len)
1882 c = len;
9de6a51f 1883 moxaLog.txcnt[port->port.tty->index] += c;
1da177e4
LT		 1884 total = c;
1885 if (spage == epage) {
1886 bufhead = readw(ofsAddr + Ofs_txb);
1887 writew(spage, baseAddr + Control_reg);
1888 while (c > 0) {
1889 if (head > tail)
1890 len = head - tail - 1;
1891 else
1892 len = tx_mask + 1 - tail;
1893 len = (c > len) ? len : c;
1894 ofs = baseAddr + DynPage_addr + bufhead + tail;
2108eba5
JS		 1895 memcpy_toio(ofs, buffer, len);
1896 buffer += len;
1da177e4
LT		 1897 tail = (tail + len) & tx_mask;
1898 c -= len;
1899 }
1da177e4 1900 } else {
1da177e4
LT		 1901 pageno = spage + (tail >> 13);
1902 pageofs = tail & Page_mask;
2108eba5
JS		 1903 while (c > 0) {
1904 len = Page_size - pageofs;
1905 if (len > c)
1906 len = c;
1da177e4
LT		 1907 writeb(pageno, baseAddr + Control_reg);
1908 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS		 1909 memcpy_toio(ofs, buffer, len);
1910 buffer += len;
1da177e4
LT		 1911 if (++pageno == epage)
1912 pageno = spage;
1913 pageofs = 0;
2108eba5
JS		 1914 c -= len;
1915 }
1916 tail = (tail + total) & tx_mask;
1da177e4 1917 }
2108eba5 1918 writew(tail, ofsAddr + TXwptr);
1da177e4 1919 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2108eba5 1920 return total;
1da177e4
LT		 1921}
1922
7bcf97d1 1923static int MoxaPortReadData(struct moxa_port *port)
1da177e4 1924{
9de6a51f 1925 struct tty_struct *tty = port->port.tty;
2108eba5 1926 unsigned char *dst;
1da177e4 1927 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS		 1928 unsigned int count, len, total;
1929 u16 tail, rx_mask, spage, epage;
1930 u16 pageno, pageofs, bufhead, head;
1da177e4 1931
b4173f45
JS		 1932 ofsAddr = port->tableAddr;
1933 baseAddr = port->board->basemem;
1da177e4
LT		 1934 head = readw(ofsAddr + RXrptr);
1935 tail = readw(ofsAddr + RXwptr);
1936 rx_mask = readw(ofsAddr + RX_mask);
1937 spage = readw(ofsAddr + Page_rxb);
1938 epage = readw(ofsAddr + EndPage_rxb);
2108eba5 1939 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1da177e4 1940 if (count == 0)
33f0f88f 1941 return 0;
1da177e4 1942
33f0f88f 1943 total = count;
7bcf97d1 1944 moxaLog.rxcnt[tty->index] += total;
1da177e4
LT		 1945 if (spage == epage) {
1946 bufhead = readw(ofsAddr + Ofs_rxb);
1947 writew(spage, baseAddr + Control_reg);
1948 while (count > 0) {
1da177e4 1949 ofs = baseAddr + DynPage_addr + bufhead + head;
2108eba5
JS		 1950 len = (tail >= head) ? (tail - head) :
1951 (rx_mask + 1 - head);
2f693357 1952 len = tty_prepare_flip_string(&port->port, &dst,
2108eba5
JS		 1953 min(len, count));
1954 memcpy_fromio(dst, ofs, len);
1da177e4
LT		 1955 head = (head + len) & rx_mask;
1956 count -= len;
1957 }
1da177e4 1958 } else {
1da177e4
LT		 1959 pageno = spage + (head >> 13);
1960 pageofs = head & Page_mask;
2108eba5 1961 while (count > 0) {
1da177e4
LT		 1962 writew(pageno, baseAddr + Control_reg);
1963 ofs = baseAddr + DynPage_addr + pageofs;
2f693357 1964 len = tty_prepare_flip_string(&port->port, &dst,
2108eba5
JS		 1965 min(Page_size - pageofs, count));
1966 memcpy_fromio(dst, ofs, len);
1967
1968 count -= len;
1969 pageofs = (pageofs + len) & Page_mask;
1970 if (pageofs == 0 && ++pageno == epage)
1da177e4 1971 pageno = spage;
2108eba5
JS		 1972 }
1973 head = (head + total) & rx_mask;
1da177e4 1974 }
2108eba5
JS		 1975 writew(head, ofsAddr + RXrptr);
1976 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1da177e4 1977 moxaLowWaterChk = 1;
b4173f45 1978 port->lowChkFlag = 1;
1da177e4 1979 }
2108eba5 1980 return total;
1da177e4
LT		 1981}
1982
1983
b4173f45 1984static int MoxaPortTxQueue(struct moxa_port *port)
1da177e4 1985{
b4173f45 1986 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1987 u16 rptr, wptr, mask;
1da177e4 1988
1da177e4
LT		 1989 rptr = readw(ofsAddr + TXrptr);
1990 wptr = readw(ofsAddr + TXwptr);
1991 mask = readw(ofsAddr + TX_mask);
2108eba5 1992 return (wptr - rptr) & mask;
1da177e4
LT		 1993}
1994
b4173f45 1995static int MoxaPortTxFree(struct moxa_port *port)
1da177e4 1996{
b4173f45 1997 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1998 u16 rptr, wptr, mask;
1da177e4 1999
1da177e4
LT		 2000 rptr = readw(ofsAddr + TXrptr);
2001 wptr = readw(ofsAddr + TXwptr);
2002 mask = readw(ofsAddr + TX_mask);
2108eba5 2003 return mask - ((wptr - rptr) & mask);
1da177e4
LT		 2004}
2005
b4173f45 2006static int MoxaPortRxQueue(struct moxa_port *port)
1da177e4 2007{
b4173f45 2008 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2009 u16 rptr, wptr, mask;
1da177e4 2010
1da177e4
LT		 2011 rptr = readw(ofsAddr + RXrptr);
2012 wptr = readw(ofsAddr + RXwptr);
2013 mask = readw(ofsAddr + RX_mask);
2108eba5 2014 return (wptr - rptr) & mask;
1da177e4
LT		 2015}
2016
b4173f45 2017static void MoxaPortTxDisable(struct moxa_port *port)
1da177e4 2018{
b4173f45 2019 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
1da177e4
LT		 2020}
2021
b4173f45 2022static void MoxaPortTxEnable(struct moxa_port *port)
1da177e4 2023{
b4173f45 2024 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
1da177e4
LT		 2025}
2026
1c729ab1
AV		 2027static int moxa_get_serial_info(struct tty_struct *tty,
2028 struct serial_struct *ss)
1da177e4 2029{
1c729ab1
AV		 2030 struct moxa_port *info = tty->driver_data;
2031
2032 if (tty->index == MAX_PORTS)
2033 return -EINVAL;
2034 if (!info)
2035 return -ENODEV;
2036 mutex_lock(&info->port.mutex);
2037 ss->type = info->type,
2038 ss->line = info->port.tty->index,
2039 ss->flags = info->port.flags,
2040 ss->baud_base = 921600,
6e70b73c 2041 ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10;
1c729ab1
AV		 2042 mutex_unlock(&info->port.mutex);
2043 return 0;
1da177e4
LT		 2044}
2045
2046
1c729ab1
AV		 2047static int moxa_set_serial_info(struct tty_struct *tty,
2048 struct serial_struct *ss)
1da177e4 2049{
1c729ab1 2050 struct moxa_port *info = tty->driver_data;
dc8c8437 2051 unsigned int close_delay;
1da177e4 2052
1c729ab1
AV		 2053 if (tty->index == MAX_PORTS)
2054 return -EINVAL;
2055 if (!info)
2056 return -ENODEV;
1da177e4 2057
dc8c8437
JH		 2058 close_delay = msecs_to_jiffies(ss->close_delay * 10);
2059
1c729ab1 2060 mutex_lock(&info->port.mutex);
1da177e4 2061 if (!capable(CAP_SYS_ADMIN)) {
dc8c8437
JH		 2062 if (close_delay != info->port.close_delay ||
2063 ss->type != info->type ||
2064 ((ss->flags & ~ASYNC_USR_MASK) !=
1c729ab1
AV		 2065 (info->port.flags & ~ASYNC_USR_MASK))) {
2066 mutex_unlock(&info->port.mutex);
eaa95a8d 2067 return -EPERM;
1c729ab1 2068 }
dc8c8437
JH		 2069 } else {
2070 info->port.close_delay = close_delay;
1da177e4 2071
dc8c8437 2072 MoxaSetFifo(info, ss->type == PORT_16550A);
1da177e4 2073
dc8c8437
JH		 2074 info->type = ss->type;
2075 }
1c729ab1 2076 mutex_unlock(&info->port.mutex);
eaa95a8d 2077 return 0;
1da177e4
LT		 2078}
2079
2080
2081
2082/*****************************************************************************
2083 * Static local functions: *
2084 *****************************************************************************/
1da177e4 2085
b4173f45 2086static void MoxaSetFifo(struct moxa_port *port, int enable)
1da177e4 2087{
b4173f45 2088 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT		 2089
2090 if (!enable) {
2091 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2092 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2093 } else {
2094 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2095 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2096 }
2097}
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