]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/tty/moxa.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Replace <asm/uaccess.h> with <linux/uaccess.h> globally
[mirror_ubuntu-artful-kernel.git] / drivers / tty / moxa.c
CommitLineData
1da177e4
LT		 1/*****************************************************************************/
2/*
3 * moxa.c -- MOXA Intellio family multiport serial driver.
4 *
b9705b60
JS		 5 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
6 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
1da177e4
LT		 7 *
8 * This code is loosely based on the Linux serial driver, written by
9 * Linus Torvalds, Theodore T'so and others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
1da177e4
LT		 15 */
16
17/*
18 * MOXA Intellio Series Driver
19 * for : LINUX
20 * date : 1999/1/7
21 * version : 5.1
22 */
23
1da177e4
LT		 24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/mm.h>
27#include <linux/ioport.h>
28#include <linux/errno.h>
03718234 29#include <linux/firmware.h>
1da177e4
LT		 30#include <linux/signal.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/interrupt.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/major.h>
37#include <linux/string.h>
38#include <linux/fcntl.h>
39#include <linux/ptrace.h>
40#include <linux/serial.h>
41#include <linux/tty_driver.h>
42#include <linux/delay.h>
43#include <linux/pci.h>
44#include <linux/init.h>
45#include <linux/bitops.h>
5a0e3ad6 46#include <linux/slab.h>
5a3c6b25 47#include <linux/ratelimit.h>
1da177e4 48
1da177e4 49#include <asm/io.h>
7c0f6ba6 50#include <linux/uaccess.h>
1da177e4 51
03718234
JS		 52#include "moxa.h"
53
b9705b60 54#define MOXA_VERSION "6.0k"
1da177e4 55
03718234
JS		 56#define MOXA_FW_HDRLEN 32
57
11324edd 58#define MOXAMAJOR 172
1da177e4 59
11324edd 60#define MAX_BOARDS 4 /* Don't change this value */
1da177e4 61#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
11324edd 62#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
1da177e4 63
08d01c79
JS		 64#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
65 (brd)->boardType == MOXA_BOARD_C320_PCI)
66
1da177e4
LT		 67/*
68 * Define the Moxa PCI vendor and device IDs.
69 */
11324edd
JS		 70#define MOXA_BUS_TYPE_ISA 0
71#define MOXA_BUS_TYPE_PCI 1
1da177e4 72
1da177e4
LT		 73enum {
74 MOXA_BOARD_C218_PCI = 1,
75 MOXA_BOARD_C218_ISA,
76 MOXA_BOARD_C320_PCI,
77 MOXA_BOARD_C320_ISA,
78 MOXA_BOARD_CP204J,
79};
80
81static char *moxa_brdname[] =
82{
83 "C218 Turbo PCI series",
84 "C218 Turbo ISA series",
85 "C320 Turbo PCI series",
86 "C320 Turbo ISA series",
87 "CP-204J series",
88};
89
90#ifdef CONFIG_PCI
91static struct pci_device_id moxa_pcibrds[] = {
5ebb4078
JS		 92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
93 .driver_data = MOXA_BOARD_C218_PCI },
94 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
95 .driver_data = MOXA_BOARD_C320_PCI },
96 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
97 .driver_data = MOXA_BOARD_CP204J },
1da177e4
LT		 98 { 0 }
99};
100MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
101#endif /* CONFIG_PCI */
102
03718234
JS		 103struct moxa_port;
104
8f8ecbad 105static struct moxa_board_conf {
1da177e4
LT		 106 int boardType;
107 int numPorts;
1da177e4 108 int busType;
8f8ecbad 109
810ab09b 110 unsigned int ready;
8f8ecbad 111
03718234
JS		 112 struct moxa_port *ports;
113
8f8ecbad
JS		 114 void __iomem *basemem;
115 void __iomem *intNdx;
116 void __iomem *intPend;
117 void __iomem *intTable;
118} moxa_boards[MAX_BOARDS];
119
120struct mxser_mstatus {
121 tcflag_t cflag;
122 int cts;
123 int dsr;
124 int ri;
125 int dcd;
9dff89cd 126};
1da177e4 127
8f8ecbad
JS		 128struct moxaq_str {
129 int inq;
130 int outq;
131};
1da177e4 132
8f8ecbad 133struct moxa_port {
9de6a51f 134 struct tty_port port;
b4173f45 135 struct moxa_board_conf *board;
7bcf97d1
JS		 136 void __iomem *tableAddr;
137
1da177e4 138 int type;
1da177e4 139 int cflag;
7bcf97d1 140 unsigned long statusflags;
1da177e4 141
8482bcd5 142 u8 DCDState; /* Protected by the port lock */
7bcf97d1
JS		 143 u8 lineCtrl;
144 u8 lowChkFlag;
8f8ecbad 145};
1da177e4 146
74d7d97b
JS		 147struct mon_str {
148 int tick;
149 int rxcnt[MAX_PORTS];
150 int txcnt[MAX_PORTS];
151};
152
1da177e4 153/* statusflags */
a808ac0c
AC		 154#define TXSTOPPED 1
155#define LOWWAIT 2
156#define EMPTYWAIT 3
1da177e4 157
1da177e4 158
1da177e4
LT		 159#define WAKEUP_CHARS 256
160
1da177e4 161static int ttymajor = MOXAMAJOR;
74d7d97b
JS		 162static struct mon_str moxaLog;
163static unsigned int moxaFuncTout = HZ / 2;
7bcf97d1 164static unsigned int moxaLowWaterChk;
a8f5cda0 165static DEFINE_MUTEX(moxa_openlock);
e8c62103 166static DEFINE_SPINLOCK(moxa_lock);
c6fc826e 167
d353eca4
JS		 168static unsigned long baseaddr[MAX_BOARDS];
169static unsigned int type[MAX_BOARDS];
170static unsigned int numports[MAX_BOARDS];
793be898 171static struct tty_port moxa_service_port;
1da177e4
LT		 172
173MODULE_AUTHOR("William Chen");
174MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
175MODULE_LICENSE("GPL");
e6c4ef98
BH		 176MODULE_FIRMWARE("c218tunx.cod");
177MODULE_FIRMWARE("cp204unx.cod");
178MODULE_FIRMWARE("c320tunx.cod");
c6fc826e 179
d353eca4
JS		 180module_param_array(type, uint, NULL, 0);
181MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
182module_param_array(baseaddr, ulong, NULL, 0);
183MODULE_PARM_DESC(baseaddr, "base address");
184module_param_array(numports, uint, NULL, 0);
185MODULE_PARM_DESC(numports, "numports (ignored for C218)");
c6fc826e 186
1da177e4 187module_param(ttymajor, int, 0);
1da177e4 188
1da177e4
LT		 189/*
190 * static functions:
191 */
1da177e4
LT		 192static int moxa_open(struct tty_struct *, struct file *);
193static void moxa_close(struct tty_struct *, struct file *);
194static int moxa_write(struct tty_struct *, const unsigned char *, int);
195static int moxa_write_room(struct tty_struct *);
196static void moxa_flush_buffer(struct tty_struct *);
197static int moxa_chars_in_buffer(struct tty_struct *);
606d099c 198static void moxa_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 199static void moxa_stop(struct tty_struct *);
200static void moxa_start(struct tty_struct *);
201static void moxa_hangup(struct tty_struct *);
60b33c13 202static int moxa_tiocmget(struct tty_struct *tty);
20b9d177 203static int moxa_tiocmset(struct tty_struct *tty,
1da177e4
LT		 204 unsigned int set, unsigned int clear);
205static void moxa_poll(unsigned long);
db1acaa6 206static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
f176178b 207static void moxa_shutdown(struct tty_port *);
31f35939 208static int moxa_carrier_raised(struct tty_port *);
f176178b 209static void moxa_dtr_rts(struct tty_port *, int);
1da177e4
LT		 210/*
211 * moxa board interface functions:
212 */
b4173f45
JS		 213static void MoxaPortEnable(struct moxa_port *);
214static void MoxaPortDisable(struct moxa_port *);
215static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
216static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
217static void MoxaPortLineCtrl(struct moxa_port *, int, int);
218static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
219static int MoxaPortLineStatus(struct moxa_port *);
b4173f45 220static void MoxaPortFlushData(struct moxa_port *, int);
d450b5a0 221static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
7bcf97d1 222static int MoxaPortReadData(struct moxa_port *);
b4173f45
JS		 223static int MoxaPortTxQueue(struct moxa_port *);
224static int MoxaPortRxQueue(struct moxa_port *);
225static int MoxaPortTxFree(struct moxa_port *);
226static void MoxaPortTxDisable(struct moxa_port *);
227static void MoxaPortTxEnable(struct moxa_port *);
8f8ecbad
JS		 228static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
229static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
b4173f45 230static void MoxaSetFifo(struct moxa_port *port, int enable);
1da177e4 231
74d7d97b
JS		 232/*
233 * I/O functions
234 */
235
a808ac0c
AC		 236static DEFINE_SPINLOCK(moxafunc_lock);
237
74d7d97b
JS		 238static void moxa_wait_finish(void __iomem *ofsAddr)
239{
240 unsigned long end = jiffies + moxaFuncTout;
241
242 while (readw(ofsAddr + FuncCode) != 0)
243 if (time_after(jiffies, end))
244 return;
5a3c6b25
MZ		 245 if (readw(ofsAddr + FuncCode) != 0)
246 printk_ratelimited(KERN_WARNING "moxa function expired\n");
74d7d97b
JS		 247}
248
eaa95a8d 249static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
74d7d97b 250{
f5c5a36d
AC		 251 unsigned long flags;
252 spin_lock_irqsave(&moxafunc_lock, flags);
74d7d97b
JS		 253 writew(arg, ofsAddr + FuncArg);
254 writew(cmd, ofsAddr + FuncCode);
255 moxa_wait_finish(ofsAddr);
f5c5a36d
AC		 256 spin_unlock_irqrestore(&moxafunc_lock, flags);
257}
258
259static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
260{
261 unsigned long flags;
262 u16 ret;
263 spin_lock_irqsave(&moxafunc_lock, flags);
264 writew(arg, ofsAddr + FuncArg);
265 writew(cmd, ofsAddr + FuncCode);
266 moxa_wait_finish(ofsAddr);
267 ret = readw(ofsAddr + FuncArg);
268 spin_unlock_irqrestore(&moxafunc_lock, flags);
269 return ret;
74d7d97b
JS		 270}
271
7bcf97d1
JS		 272static void moxa_low_water_check(void __iomem *ofsAddr)
273{
274 u16 rptr, wptr, mask, len;
275
276 if (readb(ofsAddr + FlagStat) & Xoff_state) {
277 rptr = readw(ofsAddr + RXrptr);
278 wptr = readw(ofsAddr + RXwptr);
279 mask = readw(ofsAddr + RX_mask);
280 len = (wptr - rptr) & mask;
281 if (len <= Low_water)
282 moxafunc(ofsAddr, FC_SendXon, 0);
283 }
284}
285
74d7d97b
JS		 286/*
287 * TTY operations
288 */
289
6caa76b7 290static int moxa_ioctl(struct tty_struct *tty,
74d7d97b
JS		 291 unsigned int cmd, unsigned long arg)
292{
293 struct moxa_port *ch = tty->driver_data;
294 void __user *argp = (void __user *)arg;
a8f5cda0 295 int status, ret = 0;
74d7d97b
JS		 296
297 if (tty->index == MAX_PORTS) {
298 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
299 cmd != MOXA_GETMSTATUS)
300 return -EINVAL;
301 } else if (!ch)
302 return -ENODEV;
303
304 switch (cmd) {
305 case MOXA_GETDATACOUNT:
306 moxaLog.tick = jiffies;
a8f5cda0
JS		 307 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
308 ret = -EFAULT;
309 break;
74d7d97b
JS		 310 case MOXA_FLUSH_QUEUE:
311 MoxaPortFlushData(ch, arg);
a8f5cda0 312 break;
74d7d97b
JS		 313 case MOXA_GET_IOQUEUE: {
314 struct moxaq_str __user *argm = argp;
315 struct moxaq_str tmp;
316 struct moxa_port *p;
317 unsigned int i, j;
318
319 for (i = 0; i < MAX_BOARDS; i++) {
320 p = moxa_boards[i].ports;
321 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
322 memset(&tmp, 0, sizeof(tmp));
e8c62103 323 spin_lock_bh(&moxa_lock);
74d7d97b
JS		 324 if (moxa_boards[i].ready) {
325 tmp.inq = MoxaPortRxQueue(p);
326 tmp.outq = MoxaPortTxQueue(p);
327 }
e8c62103
AC		 328 spin_unlock_bh(&moxa_lock);
329 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS		 330 return -EFAULT;
331 }
332 }
a8f5cda0 333 break;
74d7d97b
JS		 334 } case MOXA_GET_OQUEUE:
335 status = MoxaPortTxQueue(ch);
a8f5cda0
JS		 336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
74d7d97b
JS		 338 case MOXA_GET_IQUEUE:
339 status = MoxaPortRxQueue(ch);
a8f5cda0
JS		 340 ret = put_user(status, (unsigned long __user *)argp);
341 break;
74d7d97b
JS		 342 case MOXA_GETMSTATUS: {
343 struct mxser_mstatus __user *argm = argp;
344 struct mxser_mstatus tmp;
345 struct moxa_port *p;
346 unsigned int i, j;
347
348 for (i = 0; i < MAX_BOARDS; i++) {
349 p = moxa_boards[i].ports;
350 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
d450b5a0 351 struct tty_struct *ttyp;
74d7d97b 352 memset(&tmp, 0, sizeof(tmp));
e8c62103
AC		 353 spin_lock_bh(&moxa_lock);
354 if (!moxa_boards[i].ready) {
355 spin_unlock_bh(&moxa_lock);
74d7d97b 356 goto copy;
e8c62103 357 }
74d7d97b
JS		 358
359 status = MoxaPortLineStatus(p);
e8c62103
AC		 360 spin_unlock_bh(&moxa_lock);
361
74d7d97b
JS		 362 if (status & 1)
363 tmp.cts = 1;
364 if (status & 2)
365 tmp.dsr = 1;
366 if (status & 4)
367 tmp.dcd = 1;
368
d450b5a0 369 ttyp = tty_port_tty_get(&p->port);
adc8d746 370 if (!ttyp)
74d7d97b
JS		 371 tmp.cflag = p->cflag;
372 else
adc8d746 373 tmp.cflag = ttyp->termios.c_cflag;
df43daaa 374 tty_kref_put(ttyp);
74d7d97b 375copy:
e8c62103 376 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS		 377 return -EFAULT;
378 }
379 }
a8f5cda0 380 break;
74d7d97b
JS		 381 }
382 case TIOCGSERIAL:
a808ac0c 383 mutex_lock(&ch->port.mutex);
a8f5cda0 384 ret = moxa_get_serial_info(ch, argp);
a808ac0c 385 mutex_unlock(&ch->port.mutex);
a8f5cda0 386 break;
74d7d97b 387 case TIOCSSERIAL:
a808ac0c 388 mutex_lock(&ch->port.mutex);
a8f5cda0 389 ret = moxa_set_serial_info(ch, argp);
a808ac0c 390 mutex_unlock(&ch->port.mutex);
a8f5cda0
JS		 391 break;
392 default:
393 ret = -ENOIOCTLCMD;
74d7d97b 394 }
a8f5cda0 395 return ret;
74d7d97b
JS		 396}
397
9e98966c 398static int moxa_break_ctl(struct tty_struct *tty, int state)
74d7d97b
JS		 399{
400 struct moxa_port *port = tty->driver_data;
401
402 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
403 Magic_code);
9e98966c 404 return 0;
74d7d97b
JS		 405}
406
b68e31d0 407static const struct tty_operations moxa_ops = {
1da177e4
LT		 408 .open = moxa_open,
409 .close = moxa_close,
410 .write = moxa_write,
411 .write_room = moxa_write_room,
412 .flush_buffer = moxa_flush_buffer,
413 .chars_in_buffer = moxa_chars_in_buffer,
1da177e4 414 .ioctl = moxa_ioctl,
1da177e4
LT		 415 .set_termios = moxa_set_termios,
416 .stop = moxa_stop,
417 .start = moxa_start,
418 .hangup = moxa_hangup,
74d7d97b 419 .break_ctl = moxa_break_ctl,
1da177e4
LT		 420 .tiocmget = moxa_tiocmget,
421 .tiocmset = moxa_tiocmset,
422};
423
31f35939
AC		 424static const struct tty_port_operations moxa_port_ops = {
425 .carrier_raised = moxa_carrier_raised,
f176178b
AC		 426 .dtr_rts = moxa_dtr_rts,
427 .shutdown = moxa_shutdown,
31f35939
AC		 428};
429
aa7e5221 430static struct tty_driver *moxaDriver;
aa7e5221 431static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
33f0f88f 432
74d7d97b
JS		 433/*
434 * HW init
435 */
436
03718234
JS		 437static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
438{
439 switch (brd->boardType) {
440 case MOXA_BOARD_C218_ISA:
441 case MOXA_BOARD_C218_PCI:
442 if (model != 1)
443 goto err;
444 break;
445 case MOXA_BOARD_CP204J:
446 if (model != 3)
447 goto err;
448 break;
449 default:
450 if (model != 2)
451 goto err;
452 break;
453 }
454 return 0;
455err:
456 return -EINVAL;
457}
458
459static int moxa_check_fw(const void *ptr)
460{
461 const __le16 *lptr = ptr;
462
463 if (*lptr != cpu_to_le16(0x7980))
464 return -EINVAL;
465
466 return 0;
467}
468
469static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
470 size_t len)
471{
472 void __iomem *baseAddr = brd->basemem;
473 u16 tmp;
474
475 writeb(HW_reset, baseAddr + Control_reg); /* reset */
476 msleep(10);
477 memset_io(baseAddr, 0, 4096);
478 memcpy_toio(baseAddr, buf, len); /* download BIOS */
479 writeb(0, baseAddr + Control_reg); /* restart */
480
481 msleep(2000);
482
483 switch (brd->boardType) {
484 case MOXA_BOARD_C218_ISA:
485 case MOXA_BOARD_C218_PCI:
486 tmp = readw(baseAddr + C218_key);
487 if (tmp != C218_KeyCode)
488 goto err;
489 break;
490 case MOXA_BOARD_CP204J:
491 tmp = readw(baseAddr + C218_key);
492 if (tmp != CP204J_KeyCode)
493 goto err;
494 break;
495 default:
496 tmp = readw(baseAddr + C320_key);
497 if (tmp != C320_KeyCode)
498 goto err;
499 tmp = readw(baseAddr + C320_status);
500 if (tmp != STS_init) {
eaa95a8d 501 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
03718234
JS		 502 "module not found\n");
503 return -EIO;
504 }
505 break;
506 }
507
508 return 0;
509err:
eaa95a8d 510 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
03718234
JS		 511 return -EIO;
512}
513
514static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
515 size_t len)
516{
517 void __iomem *baseAddr = brd->basemem;
518
519 if (len < 7168) {
eaa95a8d 520 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
03718234
JS		 521 return -EINVAL;
522 }
523
524 writew(len - 7168 - 2, baseAddr + C320bapi_len);
525 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
526 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
527 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
528 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
529
530 return 0;
531}
532
5292bcd3 533static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
03718234
JS		 534 size_t len)
535{
536 void __iomem *baseAddr = brd->basemem;
b46f69cd 537 const __le16 *uptr = ptr;
03718234 538 size_t wlen, len2, j;
5292bcd3 539 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
08d01c79 540 unsigned int i, retry;
03718234
JS		 541 u16 usum, keycode;
542
5292bcd3
JS		 543 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
544 C218_KeyCode;
03718234 545
5292bcd3
JS		 546 switch (brd->boardType) {
547 case MOXA_BOARD_CP204J:
548 case MOXA_BOARD_C218_ISA:
549 case MOXA_BOARD_C218_PCI:
550 key = C218_key;
551 loadbuf = C218_LoadBuf;
552 loadlen = C218DLoad_len;
553 checksum = C218check_sum;
554 checksum_ok = C218chksum_ok;
555 break;
556 default:
557 key = C320_key;
558 keycode = C320_KeyCode;
559 loadbuf = C320_LoadBuf;
560 loadlen = C320DLoad_len;
561 checksum = C320check_sum;
562 checksum_ok = C320chksum_ok;
563 break;
03718234 564 }
03718234
JS		 565
566 usum = 0;
567 wlen = len >> 1;
568 for (i = 0; i < wlen; i++)
569 usum += le16_to_cpu(uptr[i]);
570 retry = 0;
571 do {
572 wlen = len >> 1;
573 j = 0;
574 while (wlen) {
575 len2 = (wlen > 2048) ? 2048 : wlen;
576 wlen -= len2;
5292bcd3 577 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
03718234 578 j += len2 << 1;
5292bcd3
JS		 579
580 writew(len2, baseAddr + loadlen);
581 writew(0, baseAddr + key);
582 for (i = 0; i < 100; i++) {
583 if (readw(baseAddr + key) == keycode)
03718234
JS		 584 break;
585 msleep(10);
586 }
5292bcd3 587 if (readw(baseAddr + key) != keycode)
03718234
JS		 588 return -EIO;
589 }
5292bcd3
JS		 590 writew(0, baseAddr + loadlen);
591 writew(usum, baseAddr + checksum);
592 writew(0, baseAddr + key);
593 for (i = 0; i < 100; i++) {
594 if (readw(baseAddr + key) == keycode)
03718234
JS		 595 break;
596 msleep(10);
597 }
598 retry++;
5292bcd3
JS		 599 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
600 if (readb(baseAddr + checksum_ok) != 1)
03718234
JS		 601 return -EIO;
602
5292bcd3 603 writew(0, baseAddr + key);
03718234
JS		 604 for (i = 0; i < 600; i++) {
605 if (readw(baseAddr + Magic_no) == Magic_code)
606 break;
607 msleep(10);
608 }
609 if (readw(baseAddr + Magic_no) != Magic_code)
610 return -EIO;
611
08d01c79 612 if (MOXA_IS_320(brd)) {
5292bcd3
JS		 613 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
614 writew(0x3800, baseAddr + TMS320_PORT1);
615 writew(0x3900, baseAddr + TMS320_PORT2);
616 writew(28499, baseAddr + TMS320_CLOCK);
617 } else {
618 writew(0x3200, baseAddr + TMS320_PORT1);
619 writew(0x3400, baseAddr + TMS320_PORT2);
620 writew(19999, baseAddr + TMS320_CLOCK);
621 }
03718234
JS		 622 }
623 writew(1, baseAddr + Disable_IRQ);
624 writew(0, baseAddr + Magic_no);
625 for (i = 0; i < 500; i++) {
626 if (readw(baseAddr + Magic_no) == Magic_code)
627 break;
628 msleep(10);
629 }
630 if (readw(baseAddr + Magic_no) != Magic_code)
631 return -EIO;
632
08d01c79 633 if (MOXA_IS_320(brd)) {
5292bcd3
JS		 634 j = readw(baseAddr + Module_cnt);
635 if (j <= 0)
636 return -EIO;
637 brd->numPorts = j * 8;
638 writew(j, baseAddr + Module_no);
639 writew(0, baseAddr + Magic_no);
640 for (i = 0; i < 600; i++) {
641 if (readw(baseAddr + Magic_no) == Magic_code)
642 break;
643 msleep(10);
644 }
645 if (readw(baseAddr + Magic_no) != Magic_code)
646 return -EIO;
03718234 647 }
03718234
JS		 648 brd->intNdx = baseAddr + IRQindex;
649 brd->intPend = baseAddr + IRQpending;
650 brd->intTable = baseAddr + IRQtable;
651
652 return 0;
653}
654
655static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
656 size_t len)
657{
658 void __iomem *ofsAddr, *baseAddr = brd->basemem;
659 struct moxa_port *port;
660 int retval, i;
661
662 if (len % 2) {
eaa95a8d 663 printk(KERN_ERR "MOXA: bios length is not even\n");
03718234
JS		 664 return -EINVAL;
665 }
666
5292bcd3
JS		 667 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
668 if (retval)
669 return retval;
670
03718234
JS		 671 switch (brd->boardType) {
672 case MOXA_BOARD_C218_ISA:
673 case MOXA_BOARD_C218_PCI:
674 case MOXA_BOARD_CP204J:
03718234
JS		 675 port = brd->ports;
676 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 677 port->board = brd;
03718234
JS		 678 port->DCDState = 0;
679 port->tableAddr = baseAddr + Extern_table +
680 Extern_size * i;
681 ofsAddr = port->tableAddr;
682 writew(C218rx_mask, ofsAddr + RX_mask);
683 writew(C218tx_mask, ofsAddr + TX_mask);
684 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
685 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
686
687 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
688 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
689
690 }
691 break;
692 default:
03718234
JS		 693 port = brd->ports;
694 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 695 port->board = brd;
03718234
JS		 696 port->DCDState = 0;
697 port->tableAddr = baseAddr + Extern_table +
698 Extern_size * i;
699 ofsAddr = port->tableAddr;
700 switch (brd->numPorts) {
701 case 8:
702 writew(C320p8rx_mask, ofsAddr + RX_mask);
703 writew(C320p8tx_mask, ofsAddr + TX_mask);
704 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
705 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
706 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
707 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
708
709 break;
710 case 16:
711 writew(C320p16rx_mask, ofsAddr + RX_mask);
712 writew(C320p16tx_mask, ofsAddr + TX_mask);
713 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
714 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
715 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
716 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
717 break;
718
719 case 24:
720 writew(C320p24rx_mask, ofsAddr + RX_mask);
721 writew(C320p24tx_mask, ofsAddr + TX_mask);
722 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
723 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
724 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
725 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
726 break;
727 case 32:
728 writew(C320p32rx_mask, ofsAddr + RX_mask);
729 writew(C320p32tx_mask, ofsAddr + TX_mask);
730 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
731 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
732 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
733 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
734 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
735 break;
736 }
737 }
738 break;
739 }
03718234
JS		 740 return 0;
741}
742
743static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
744{
2bca76e8 745 const void *ptr = fw->data;
03718234
JS		 746 char rsn[64];
747 u16 lens[5];
748 size_t len;
749 unsigned int a, lenp, lencnt;
750 int ret = -EINVAL;
751 struct {
752 __le32 magic; /* 0x34303430 */
753 u8 reserved1[2];
754 u8 type; /* UNIX = 3 */
755 u8 model; /* C218T=1, C320T=2, CP204=3 */
756 u8 reserved2[8];
757 __le16 len[5];
2bca76e8 758 } const *hdr = ptr;
03718234
JS		 759
760 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
761
762 if (fw->size < MOXA_FW_HDRLEN) {
763 strcpy(rsn, "too short (even header won't fit)");
764 goto err;
765 }
766 if (hdr->magic != cpu_to_le32(0x30343034)) {
767 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
768 goto err;
769 }
770 if (hdr->type != 3) {
771 sprintf(rsn, "not for linux, type is %u", hdr->type);
772 goto err;
773 }
774 if (moxa_check_fw_model(brd, hdr->model)) {
775 sprintf(rsn, "not for this card, model is %u", hdr->model);
776 goto err;
777 }
778
779 len = MOXA_FW_HDRLEN;
780 lencnt = hdr->model == 2 ? 5 : 3;
781 for (a = 0; a < ARRAY_SIZE(lens); a++) {
782 lens[a] = le16_to_cpu(hdr->len[a]);
783 if (lens[a] && len + lens[a] <= fw->size &&
784 moxa_check_fw(&fw->data[len]))
eaa95a8d 785 printk(KERN_WARNING "MOXA firmware: unexpected input "
03718234
JS		 786 "at offset %u, but going on\n", (u32)len);
787 if (!lens[a] && a < lencnt) {
788 sprintf(rsn, "too few entries in fw file");
789 goto err;
790 }
791 len += lens[a];
792 }
793
794 if (len != fw->size) {
795 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
796 (u32)len);
797 goto err;
798 }
799
800 ptr += MOXA_FW_HDRLEN;
801 lenp = 0; /* bios */
802
803 strcpy(rsn, "read above");
804
805 ret = moxa_load_bios(brd, ptr, lens[lenp]);
806 if (ret)
807 goto err;
808
809 /* we skip the tty section (lens[1]), since we don't need it */
810 ptr += lens[lenp] + lens[lenp + 1];
811 lenp += 2; /* comm */
812
813 if (hdr->model == 2) {
814 ret = moxa_load_320b(brd, ptr, lens[lenp]);
815 if (ret)
816 goto err;
817 /* skip another tty */
818 ptr += lens[lenp] + lens[lenp + 1];
819 lenp += 2;
820 }
821
822 ret = moxa_load_code(brd, ptr, lens[lenp]);
823 if (ret)
824 goto err;
825
826 return 0;
827err:
828 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
829 return ret;
830}
831
832static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
833{
834 const struct firmware *fw;
835 const char *file;
810ab09b 836 struct moxa_port *p;
793be898 837 unsigned int i, first_idx;
03718234
JS		 838 int ret;
839
810ab09b
JS		 840 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
841 GFP_KERNEL);
842 if (brd->ports == NULL) {
843 printk(KERN_ERR "cannot allocate memory for ports\n");
844 ret = -ENOMEM;
845 goto err;
846 }
847
848 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
44b7d1b3 849 tty_port_init(&p->port);
31f35939 850 p->port.ops = &moxa_port_ops;
810ab09b 851 p->type = PORT_16550A;
810ab09b 852 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
810ab09b
JS		 853 }
854
03718234
JS		 855 switch (brd->boardType) {
856 case MOXA_BOARD_C218_ISA:
857 case MOXA_BOARD_C218_PCI:
858 file = "c218tunx.cod";
859 break;
860 case MOXA_BOARD_CP204J:
861 file = "cp204unx.cod";
862 break;
863 default:
864 file = "c320tunx.cod";
865 break;
866 }
867
868 ret = request_firmware(&fw, file, dev);
869 if (ret) {
ec09cd56
JS		 870 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
871 "you've placed '%s' file into your firmware "
872 "loader directory (e.g. /lib/firmware)\n",
873 file);
810ab09b 874 goto err_free;
03718234
JS		 875 }
876
877 ret = moxa_load_fw(brd, fw);
878
879 release_firmware(fw);
810ab09b
JS		 880
881 if (ret)
882 goto err_free;
883
2a541341 884 spin_lock_bh(&moxa_lock);
810ab09b 885 brd->ready = 1;
0bcc4caa
JS		 886 if (!timer_pending(&moxaTimer))
887 mod_timer(&moxaTimer, jiffies + HZ / 50);
2a541341 888 spin_unlock_bh(&moxa_lock);
0bcc4caa 889
793be898
JS		 890 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
891 for (i = 0; i < brd->numPorts; i++)
892 tty_port_register_device(&brd->ports[i].port, moxaDriver,
893 first_idx + i, dev);
894
810ab09b
JS		 895 return 0;
896err_free:
191c5f10
JS		 897 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
898 tty_port_destroy(&brd->ports[i].port);
810ab09b
JS		 899 kfree(brd->ports);
900err:
03718234
JS		 901 return ret;
902}
903
810ab09b
JS		 904static void moxa_board_deinit(struct moxa_board_conf *brd)
905{
793be898 906 unsigned int a, opened, first_idx;
a8f5cda0
JS		 907
908 mutex_lock(&moxa_openlock);
7bcf97d1 909 spin_lock_bh(&moxa_lock);
810ab09b 910 brd->ready = 0;
7bcf97d1 911 spin_unlock_bh(&moxa_lock);
a8f5cda0
JS		 912
913 /* pci hot-un-plug support */
914 for (a = 0; a < brd->numPorts; a++)
d41861ca 915 if (tty_port_initialized(&brd->ports[a].port))
aa27a094
JS		 916 tty_port_tty_hangup(&brd->ports[a].port, false);
917
191c5f10
JS		 918 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
919 tty_port_destroy(&brd->ports[a].port);
aa27a094 920
a8f5cda0
JS		 921 while (1) {
922 opened = 0;
923 for (a = 0; a < brd->numPorts; a++)
d41861ca 924 if (tty_port_initialized(&brd->ports[a].port))
a8f5cda0
JS		 925 opened++;
926 mutex_unlock(&moxa_openlock);
927 if (!opened)
928 break;
929 msleep(50);
930 mutex_lock(&moxa_openlock);
931 }
932
793be898
JS		 933 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
934 for (a = 0; a < brd->numPorts; a++)
935 tty_unregister_device(moxaDriver, first_idx + a);
936
810ab09b
JS		 937 iounmap(brd->basemem);
938 brd->basemem = NULL;
939 kfree(brd->ports);
940}
941
1da177e4 942#ifdef CONFIG_PCI
9671f099 943static int moxa_pci_probe(struct pci_dev *pdev,
9cde5bf0 944 const struct pci_device_id *ent)
1da177e4 945{
9cde5bf0
JS		 946 struct moxa_board_conf *board;
947 unsigned int i;
948 int board_type = ent->driver_data;
949 int retval;
950
951 retval = pci_enable_device(pdev);
7aeb95da
JS		 952 if (retval) {
953 dev_err(&pdev->dev, "can't enable pci device\n");
9cde5bf0 954 goto err;
7aeb95da 955 }
9cde5bf0
JS		 956
957 for (i = 0; i < MAX_BOARDS; i++)
958 if (moxa_boards[i].basemem == NULL)
959 break;
960
961 retval = -ENODEV;
962 if (i >= MAX_BOARDS) {
7aeb95da 963 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
9cde5bf0
JS		 964 "found. Board is ignored.\n", MAX_BOARDS);
965 goto err;
966 }
967
968 board = &moxa_boards[i];
e46a5e3f
JS		 969
970 retval = pci_request_region(pdev, 2, "moxa-base");
971 if (retval) {
972 dev_err(&pdev->dev, "can't request pci region 2\n");
973 goto err;
974 }
975
24cb2335 976 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
7aeb95da
JS		 977 if (board->basemem == NULL) {
978 dev_err(&pdev->dev, "can't remap io space 2\n");
386d95b3 979 retval = -ENOMEM;
e46a5e3f 980 goto err_reg;
7aeb95da 981 }
9cde5bf0 982
1da177e4
LT		 983 board->boardType = board_type;
984 switch (board_type) {
985 case MOXA_BOARD_C218_ISA:
986 case MOXA_BOARD_C218_PCI:
987 board->numPorts = 8;
988 break;
989
990 case MOXA_BOARD_CP204J:
991 board->numPorts = 4;
992 break;
993 default:
994 board->numPorts = 0;
995 break;
996 }
997 board->busType = MOXA_BUS_TYPE_PCI;
a784bf7c 998
03718234
JS		 999 retval = moxa_init_board(board, &pdev->dev);
1000 if (retval)
1001 goto err_base;
1002
9cde5bf0 1003 pci_set_drvdata(pdev, board);
1da177e4 1004
bb9f910a
JS		 1005 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
1006 moxa_brdname[board_type - 1], board->numPorts);
1007
eaa95a8d 1008 return 0;
03718234
JS		 1009err_base:
1010 iounmap(board->basemem);
1011 board->basemem = NULL;
e46a5e3f
JS		 1012err_reg:
1013 pci_release_region(pdev, 2);
9cde5bf0
JS		 1014err:
1015 return retval;
1016}
1017
ae8d8a14 1018static void moxa_pci_remove(struct pci_dev *pdev)
9cde5bf0
JS		 1019{
1020 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1021
810ab09b
JS		 1022 moxa_board_deinit(brd);
1023
e46a5e3f 1024 pci_release_region(pdev, 2);
1da177e4 1025}
a784bf7c
JS		 1026
1027static struct pci_driver moxa_pci_driver = {
1028 .name = "moxa",
1029 .id_table = moxa_pcibrds,
1030 .probe = moxa_pci_probe,
91116cba 1031 .remove = moxa_pci_remove
a784bf7c 1032};
1da177e4
LT		 1033#endif /* CONFIG_PCI */
1034
1035static int __init moxa_init(void)
1036{
810ab09b 1037 unsigned int isabrds = 0;
d353eca4 1038 int retval = 0;
c6fc826e
RM		 1039 struct moxa_board_conf *brd = moxa_boards;
1040 unsigned int i;
1da177e4 1041
7aeb95da
JS		 1042 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1043 MOXA_VERSION);
793be898
JS		 1044
1045 tty_port_init(&moxa_service_port);
1046
1047 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1048 TTY_DRIVER_REAL_RAW |
1049 TTY_DRIVER_DYNAMIC_DEV);
c3a6344a
DC		 1050 if (IS_ERR(moxaDriver))
1051 return PTR_ERR(moxaDriver);
1da177e4 1052
9b4e3b13 1053 moxaDriver->name = "ttyMX";
1da177e4
LT		 1054 moxaDriver->major = ttymajor;
1055 moxaDriver->minor_start = 0;
1056 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1057 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1058 moxaDriver->init_termios = tty_std_termios;
1da177e4 1059 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
606d099c
AC		 1060 moxaDriver->init_termios.c_ispeed = 9600;
1061 moxaDriver->init_termios.c_ospeed = 9600;
1da177e4 1062 tty_set_operations(moxaDriver, &moxa_ops);
793be898
JS		 1063 /* Having one more port only for ioctls is ugly */
1064 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1da177e4 1065
1da177e4 1066 if (tty_register_driver(moxaDriver)) {
eaa95a8d 1067 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1da177e4
LT		 1068 put_tty_driver(moxaDriver);
1069 return -1;
1070 }
1da177e4 1071
d353eca4 1072 /* Find the boards defined from module args. */
c6fc826e 1073
1da177e4 1074 for (i = 0; i < MAX_BOARDS; i++) {
d353eca4
JS		 1075 if (!baseaddr[i])
1076 break;
1077 if (type[i] == MOXA_BOARD_C218_ISA ||
1078 type[i] == MOXA_BOARD_C320_ISA) {
7aeb95da 1079 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
d353eca4
JS		 1080 isabrds + 1, moxa_brdname[type[i] - 1],
1081 baseaddr[i]);
1082 brd->boardType = type[i];
1083 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1084 numports[i];
1085 brd->busType = MOXA_BUS_TYPE_ISA;
24cb2335 1086 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
d353eca4 1087 if (!brd->basemem) {
eaa95a8d 1088 printk(KERN_ERR "MOXA: can't remap %lx\n",
d353eca4 1089 baseaddr[i]);
1da177e4
LT		 1090 continue;
1091 }
03718234
JS		 1092 if (moxa_init_board(brd, NULL)) {
1093 iounmap(brd->basemem);
1094 brd->basemem = NULL;
1095 continue;
1096 }
d353eca4 1097
e0525393 1098 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
bb9f910a
JS		 1099 "ready (%u ports, firmware loaded)\n",
1100 baseaddr[i], brd->numPorts);
1101
d353eca4
JS		 1102 brd++;
1103 isabrds++;
1da177e4
LT		 1104 }
1105 }
a784bf7c 1106
1da177e4 1107#ifdef CONFIG_PCI
a784bf7c
JS		 1108 retval = pci_register_driver(&moxa_pci_driver);
1109 if (retval) {
eaa95a8d 1110 printk(KERN_ERR "Can't register MOXA pci driver!\n");
d353eca4 1111 if (isabrds)
a784bf7c 1112 retval = 0;
1da177e4
LT		 1113 }
1114#endif
a784bf7c 1115
a784bf7c 1116 return retval;
1da177e4
LT		 1117}
1118
1119static void __exit moxa_exit(void)
1120{
eaa95a8d 1121 unsigned int i;
1da177e4 1122
9cde5bf0 1123#ifdef CONFIG_PCI
a784bf7c 1124 pci_unregister_driver(&moxa_pci_driver);
9cde5bf0 1125#endif
a784bf7c 1126
810ab09b
JS		 1127 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1128 if (moxa_boards[i].ready)
1129 moxa_board_deinit(&moxa_boards[i]);
2a541341
JS		 1130
1131 del_timer_sync(&moxaTimer);
1132
1133 if (tty_unregister_driver(moxaDriver))
1134 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1135 "serial driver\n");
1136 put_tty_driver(moxaDriver);
1da177e4
LT		 1137}
1138
1139module_init(moxa_init);
1140module_exit(moxa_exit);
1141
f176178b 1142static void moxa_shutdown(struct tty_port *port)
a8f5cda0 1143{
f176178b
AC		 1144 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1145 MoxaPortDisable(ch);
a8f5cda0 1146 MoxaPortFlushData(ch, 2);
a8f5cda0
JS		 1147}
1148
31f35939
AC		 1149static int moxa_carrier_raised(struct tty_port *port)
1150{
1151 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1152 int dcd;
1153
8482bcd5 1154 spin_lock_irq(&port->lock);
31f35939 1155 dcd = ch->DCDState;
8482bcd5 1156 spin_unlock_irq(&port->lock);
31f35939
AC		 1157 return dcd;
1158}
1159
f176178b 1160static void moxa_dtr_rts(struct tty_port *port, int onoff)
a8f5cda0 1161{
f176178b
AC		 1162 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1163 MoxaPortLineCtrl(ch, onoff, onoff);
a8f5cda0
JS		 1164}
1165
f176178b 1166
1da177e4
LT		 1167static int moxa_open(struct tty_struct *tty, struct file *filp)
1168{
810ab09b 1169 struct moxa_board_conf *brd;
8f8ecbad 1170 struct moxa_port *ch;
1da177e4 1171 int port;
1da177e4 1172
11324edd 1173 port = tty->index;
1da177e4 1174 if (port == MAX_PORTS) {
74d7d97b 1175 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1da177e4 1176 }
a8f5cda0
JS		 1177 if (mutex_lock_interruptible(&moxa_openlock))
1178 return -ERESTARTSYS;
810ab09b 1179 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
a8f5cda0
JS		 1180 if (!brd->ready) {
1181 mutex_unlock(&moxa_openlock);
810ab09b 1182 return -ENODEV;
a8f5cda0 1183 }
1da177e4 1184
f0e85277
DE		 1185 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1186 mutex_unlock(&moxa_openlock);
1187 return -ENODEV;
1188 }
1189
810ab09b 1190 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
9de6a51f 1191 ch->port.count++;
1da177e4 1192 tty->driver_data = ch;
d450b5a0 1193 tty_port_tty_set(&ch->port, tty);
f176178b 1194 mutex_lock(&ch->port.mutex);
d41861ca 1195 if (!tty_port_initialized(&ch->port)) {
1da177e4 1196 ch->statusflags = 0;
adc8d746 1197 moxa_set_tty_param(tty, &tty->termios);
b4173f45
JS		 1198 MoxaPortLineCtrl(ch, 1, 1);
1199 MoxaPortEnable(ch);
a8f5cda0 1200 MoxaSetFifo(ch, ch->type == PORT_16550A);
d41861ca 1201 tty_port_set_initialized(&ch->port, 1);
1da177e4 1202 }
f176178b 1203 mutex_unlock(&ch->port.mutex);
a8f5cda0 1204 mutex_unlock(&moxa_openlock);
1da177e4 1205
7c31bdb6 1206 return tty_port_block_til_ready(&ch->port, tty, filp);
1da177e4
LT		 1207}
1208
1209static void moxa_close(struct tty_struct *tty, struct file *filp)
1210{
f176178b 1211 struct moxa_port *ch = tty->driver_data;
adc8d746 1212 ch->cflag = tty->termios.c_cflag;
f176178b 1213 tty_port_close(&ch->port, tty, filp);
1da177e4
LT		 1214}
1215
1216static int moxa_write(struct tty_struct *tty,
1217 const unsigned char *buf, int count)
1218{
b4173f45 1219 struct moxa_port *ch = tty->driver_data;
0ad7c9af 1220 unsigned long flags;
b4173f45 1221 int len;
1da177e4 1222
1da177e4 1223 if (ch == NULL)
b4173f45 1224 return 0;
33f0f88f 1225
0ad7c9af 1226 spin_lock_irqsave(&moxa_lock, flags);
d450b5a0 1227 len = MoxaPortWriteData(tty, buf, count);
0ad7c9af 1228 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4 1229
a808ac0c 1230 set_bit(LOWWAIT, &ch->statusflags);
eaa95a8d 1231 return len;
1da177e4
LT		 1232}
1233
1234static int moxa_write_room(struct tty_struct *tty)
1235{
8f8ecbad 1236 struct moxa_port *ch;
1da177e4
LT		 1237
1238 if (tty->stopped)
eaa95a8d 1239 return 0;
b4173f45 1240 ch = tty->driver_data;
1da177e4 1241 if (ch == NULL)
eaa95a8d 1242 return 0;
b4173f45 1243 return MoxaPortTxFree(ch);
1da177e4
LT		 1244}
1245
1246static void moxa_flush_buffer(struct tty_struct *tty)
1247{
b4173f45 1248 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1249
1250 if (ch == NULL)
1251 return;
b4173f45 1252 MoxaPortFlushData(ch, 1);
1da177e4
LT		 1253 tty_wakeup(tty);
1254}
1255
1256static int moxa_chars_in_buffer(struct tty_struct *tty)
1257{
b4173f45 1258 struct moxa_port *ch = tty->driver_data;
1da177e4 1259 int chars;
1da177e4 1260
b4173f45 1261 chars = MoxaPortTxQueue(ch);
f710ebd7 1262 if (chars)
1da177e4
LT		 1263 /*
1264 * Make it possible to wakeup anything waiting for output
1265 * in tty_ioctl.c, etc.
1266 */
f710ebd7 1267 set_bit(EMPTYWAIT, &ch->statusflags);
eaa95a8d 1268 return chars;
1da177e4
LT		 1269}
1270
60b33c13 1271static int moxa_tiocmget(struct tty_struct *tty)
1da177e4 1272{
8482bcd5 1273 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1274 int flag = 0, dtr, rts;
1275
b4173f45 1276 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT		 1277 if (dtr)
1278 flag |= TIOCM_DTR;
1279 if (rts)
1280 flag |= TIOCM_RTS;
b4173f45 1281 dtr = MoxaPortLineStatus(ch);
1da177e4
LT		 1282 if (dtr & 1)
1283 flag |= TIOCM_CTS;
1284 if (dtr & 2)
1285 flag |= TIOCM_DSR;
1286 if (dtr & 4)
1287 flag |= TIOCM_CD;
1288 return flag;
1289}
1290
20b9d177 1291static int moxa_tiocmset(struct tty_struct *tty,
1da177e4
LT		 1292 unsigned int set, unsigned int clear)
1293{
a8f5cda0 1294 struct moxa_port *ch;
1da177e4
LT		 1295 int dtr, rts;
1296
a8f5cda0
JS		 1297 mutex_lock(&moxa_openlock);
1298 ch = tty->driver_data;
1299 if (!ch) {
1300 mutex_unlock(&moxa_openlock);
74d7d97b 1301 return -EINVAL;
a8f5cda0 1302 }
1da177e4 1303
b4173f45 1304 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT		 1305 if (set & TIOCM_RTS)
1306 rts = 1;
1307 if (set & TIOCM_DTR)
1308 dtr = 1;
1309 if (clear & TIOCM_RTS)
1310 rts = 0;
1311 if (clear & TIOCM_DTR)
1312 dtr = 0;
b4173f45 1313 MoxaPortLineCtrl(ch, dtr, rts);
a8f5cda0 1314 mutex_unlock(&moxa_openlock);
1da177e4
LT		 1315 return 0;
1316}
1317
1da177e4 1318static void moxa_set_termios(struct tty_struct *tty,
eaa95a8d 1319 struct ktermios *old_termios)
1da177e4 1320{
eaa95a8d 1321 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1322
1323 if (ch == NULL)
1324 return;
db1acaa6 1325 moxa_set_tty_param(tty, old_termios);
eaa95a8d 1326 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
9de6a51f 1327 wake_up_interruptible(&ch->port.open_wait);
1da177e4
LT		 1328}
1329
1330static void moxa_stop(struct tty_struct *tty)
1331{
eaa95a8d 1332 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1333
1334 if (ch == NULL)
1335 return;
b4173f45 1336 MoxaPortTxDisable(ch);
a808ac0c 1337 set_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT		 1338}
1339
1340
1341static void moxa_start(struct tty_struct *tty)
1342{
eaa95a8d 1343 struct moxa_port *ch = tty->driver_data;
1da177e4
LT		 1344
1345 if (ch == NULL)
1346 return;
1347
58112dfb 1348 if (!test_bit(TXSTOPPED, &ch->statusflags))
1da177e4
LT		 1349 return;
1350
b4173f45 1351 MoxaPortTxEnable(ch);
a808ac0c 1352 clear_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT		 1353}
1354
1355static void moxa_hangup(struct tty_struct *tty)
1356{
a808ac0c 1357 struct moxa_port *ch = tty->driver_data;
f176178b 1358 tty_port_hangup(&ch->port);
1da177e4
LT		 1359}
1360
7bcf97d1 1361static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1da177e4 1362{
8482bcd5 1363 unsigned long flags;
7bcf97d1 1364 dcd = !!dcd;
1da177e4 1365
8482bcd5 1366 spin_lock_irqsave(&p->port.lock, flags);
d450b5a0 1367 if (dcd != p->DCDState) {
8482bcd5
AC		 1368 p->DCDState = dcd;
1369 spin_unlock_irqrestore(&p->port.lock, flags);
aa27a094
JS		 1370 if (!dcd)
1371 tty_port_tty_hangup(&p->port, true);
7bcf97d1 1372 }
8482bcd5
AC		 1373 else
1374 spin_unlock_irqrestore(&p->port.lock, flags);
7bcf97d1 1375}
1da177e4 1376
7bcf97d1
JS		 1377static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1378 u16 __iomem *ip)
1379{
d450b5a0 1380 struct tty_struct *tty = tty_port_tty_get(&p->port);
7bcf97d1 1381 void __iomem *ofsAddr;
d41861ca 1382 unsigned int inited = tty_port_initialized(&p->port);
7bcf97d1
JS		 1383 u16 intr;
1384
1385 if (tty) {
a808ac0c 1386 if (test_bit(EMPTYWAIT, &p->statusflags) &&
7bcf97d1 1387 MoxaPortTxQueue(p) == 0) {
a808ac0c 1388 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1
JS		 1389 tty_wakeup(tty);
1390 }
a808ac0c 1391 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
7bcf97d1 1392 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
a808ac0c 1393 clear_bit(LOWWAIT, &p->statusflags);
7bcf97d1
JS		 1394 tty_wakeup(tty);
1395 }
1396
97ef38b8 1397 if (inited && !tty_throttled(tty) &&
7bcf97d1
JS		 1398 MoxaPortRxQueue(p) > 0) { /* RX */
1399 MoxaPortReadData(p);
6732c8bb 1400 tty_schedule_flip(&p->port);
7bcf97d1
JS		 1401 }
1402 } else {
a808ac0c 1403 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1 1404 MoxaPortFlushData(p, 0); /* flush RX */
1da177e4 1405 }
0bcc4caa 1406
7bcf97d1 1407 if (!handle) /* nothing else to do */
0e0fd7d7 1408 goto put;
7bcf97d1
JS		 1409
1410 intr = readw(ip); /* port irq status */
1411 if (intr == 0)
0e0fd7d7 1412 goto put;
7bcf97d1
JS		 1413
1414 writew(0, ip); /* ACK port */
1415 ofsAddr = p->tableAddr;
1416 if (intr & IntrTx) /* disable tx intr */
1417 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1418 ofsAddr + HostStat);
1419
1420 if (!inited)
0e0fd7d7 1421 goto put;
7bcf97d1
JS		 1422
1423 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
92a19f9c 1424 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
6732c8bb 1425 tty_schedule_flip(&p->port);
7bcf97d1
JS		 1426 }
1427
1428 if (intr & IntrLine)
1429 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
0e0fd7d7
JS		 1430put:
1431 tty_kref_put(tty);
7bcf97d1
JS		 1432
1433 return 0;
1434}
1435
1436static void moxa_poll(unsigned long ignored)
1437{
1438 struct moxa_board_conf *brd;
1439 u16 __iomem *ip;
2a541341 1440 unsigned int card, port, served = 0;
7bcf97d1
JS		 1441
1442 spin_lock(&moxa_lock);
1da177e4 1443 for (card = 0; card < MAX_BOARDS; card++) {
7bcf97d1
JS		 1444 brd = &moxa_boards[card];
1445 if (!brd->ready)
1da177e4 1446 continue;
7bcf97d1 1447
2a541341
JS		 1448 served++;
1449
7bcf97d1
JS		 1450 ip = NULL;
1451 if (readb(brd->intPend) == 0xff)
1452 ip = brd->intTable + readb(brd->intNdx);
1453
1454 for (port = 0; port < brd->numPorts; port++)
1455 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1456
1457 if (ip)
1458 writeb(0, brd->intPend); /* ACK */
1459
1460 if (moxaLowWaterChk) {
1461 struct moxa_port *p = brd->ports;
1462 for (port = 0; port < brd->numPorts; port++, p++)
1463 if (p->lowChkFlag) {
1464 p->lowChkFlag = 0;
1465 moxa_low_water_check(p->tableAddr);
1da177e4 1466 }
1da177e4
LT		 1467 }
1468 }
7bcf97d1 1469 moxaLowWaterChk = 0;
1da177e4 1470
2a541341
JS		 1471 if (served)
1472 mod_timer(&moxaTimer, jiffies + HZ / 50);
1473 spin_unlock(&moxa_lock);
1da177e4
LT		 1474}
1475
1476/******************************************************************************/
1477
db1acaa6 1478static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1479{
adc8d746 1480 register struct ktermios *ts = &tty->termios;
eaa95a8d 1481 struct moxa_port *ch = tty->driver_data;
db1acaa6 1482 int rts, cts, txflow, rxflow, xany, baud;
1da177e4 1483
1da177e4
LT		 1484 rts = cts = txflow = rxflow = xany = 0;
1485 if (ts->c_cflag & CRTSCTS)
1486 rts = cts = 1;
1487 if (ts->c_iflag & IXON)
1488 txflow = 1;
1489 if (ts->c_iflag & IXOFF)
1490 rxflow = 1;
1491 if (ts->c_iflag & IXANY)
1492 xany = 1;
db1acaa6
AC		 1493
1494 /* Clear the features we don't support */
1495 ts->c_cflag &= ~CMSPAR;
b4173f45
JS		 1496 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1497 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
db1acaa6
AC		 1498 if (baud == -1)
1499 baud = tty_termios_baud_rate(old_termios);
1500 /* Not put the baud rate into the termios data */
1501 tty_encode_baud_rate(tty, baud, baud);
1da177e4
LT		 1502}
1503
1da177e4
LT		 1504/*****************************************************************************
1505 * Driver level functions: *
1da177e4 1506 *****************************************************************************/
1da177e4 1507
b4173f45 1508static void MoxaPortFlushData(struct moxa_port *port, int mode)
1da177e4
LT		 1509{
1510 void __iomem *ofsAddr;
eaa95a8d 1511 if (mode < 0 || mode > 2)
1da177e4 1512 return;
b4173f45 1513 ofsAddr = port->tableAddr;
1da177e4
LT		 1514 moxafunc(ofsAddr, FC_FlushQueue, mode);
1515 if (mode != 1) {
b4173f45 1516 port->lowChkFlag = 0;
6f56b658 1517 moxa_low_water_check(ofsAddr);
1da177e4
LT		 1518 }
1519}
1520
1da177e4
LT		 1521/*
1522 * Moxa Port Number Description:
1523 *
1524 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1525 * the port number using in MOXA driver functions will be 0 to 31 for
1526 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1527 * to 127 for fourth. For example, if you setup three MOXA boards,
1528 * first board is C218, second board is C320-16 and third board is
1529 * C320-32. The port number of first board (C218 - 8 ports) is from
1530 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1531 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1532 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1533 * 127 will be invalid.
1534 *
1535 *
1536 * Moxa Functions Description:
1537 *
1538 * Function 1: Driver initialization routine, this routine must be
1539 * called when initialized driver.
1540 * Syntax:
1541 * void MoxaDriverInit();
1542 *
1543 *
1544 * Function 2: Moxa driver private IOCTL command processing.
1545 * Syntax:
1546 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1547 *
1548 * unsigned int cmd : IOCTL command
1549 * unsigned long arg : IOCTL argument
1550 * int port : port number (0 - 127)
1551 *
1552 * return: 0 (OK)
1553 * -EINVAL
1554 * -ENOIOCTLCMD
1555 *
1556 *
1da177e4
LT		 1557 * Function 6: Enable this port to start Tx/Rx data.
1558 * Syntax:
1559 * void MoxaPortEnable(int port);
1560 * int port : port number (0 - 127)
1561 *
1562 *
1563 * Function 7: Disable this port
1564 * Syntax:
1565 * void MoxaPortDisable(int port);
1566 * int port : port number (0 - 127)
1567 *
1568 *
1da177e4
LT		 1569 * Function 10: Setting baud rate of this port.
1570 * Syntax:
08d01c79 1571 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1da177e4
LT		 1572 * int port : port number (0 - 127)
1573 * long baud : baud rate (50 - 115200)
1574 *
1575 * return: 0 : this port is invalid or baud < 50
1576 * 50 - 115200 : the real baud rate set to the port, if
1577 * the argument baud is large than maximun
1578 * available baud rate, the real setting
1579 * baud rate will be the maximun baud rate.
1580 *
1581 *
1da177e4
LT		 1582 * Function 12: Configure the port.
1583 * Syntax:
606d099c 1584 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1da177e4 1585 * int port : port number (0 - 127)
606d099c 1586 * struct ktermios * termio : termio structure pointer
c7bce309 1587 * speed_t baud : baud rate
1da177e4
LT		 1588 *
1589 * return: -1 : this port is invalid or termio == NULL
1590 * 0 : setting O.K.
1591 *
1592 *
1593 * Function 13: Get the DTR/RTS state of this port.
1594 * Syntax:
1595 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1596 * int port : port number (0 - 127)
1597 * int * dtrState : pointer to INT to receive the current DTR
1598 * state. (if NULL, this function will not
1599 * write to this address)
1600 * int * rtsState : pointer to INT to receive the current RTS
1601 * state. (if NULL, this function will not
1602 * write to this address)
1603 *
1604 * return: -1 : this port is invalid
1605 * 0 : O.K.
1606 *
1607 *
1608 * Function 14: Setting the DTR/RTS output state of this port.
1609 * Syntax:
1610 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1611 * int port : port number (0 - 127)
1612 * int dtrState : DTR output state (0: off, 1: on)
1613 * int rtsState : RTS output state (0: off, 1: on)
1614 *
1615 *
1616 * Function 15: Setting the flow control of this port.
1617 * Syntax:
1618 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1619 * int txFlow,int xany);
1620 * int port : port number (0 - 127)
1621 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1622 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1623 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1624 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1625 * int xany : S/W XANY flow control (0: no, 1: yes)
1626 *
1627 *
1628 * Function 16: Get ths line status of this port
1629 * Syntax:
1630 * int MoxaPortLineStatus(int port);
1631 * int port : port number (0 - 127)
1632 *
1633 * return: Bit 0 - CTS state (0: off, 1: on)
1634 * Bit 1 - DSR state (0: off, 1: on)
1635 * Bit 2 - DCD state (0: off, 1: on)
1636 *
1637 *
1da177e4
LT		 1638 * Function 19: Flush the Rx/Tx buffer data of this port.
1639 * Syntax:
1640 * void MoxaPortFlushData(int port, int mode);
1641 * int port : port number (0 - 127)
1642 * int mode
1643 * 0 : flush the Rx buffer
1644 * 1 : flush the Tx buffer
1645 * 2 : flush the Rx and Tx buffer
1646 *
1647 *
1648 * Function 20: Write data.
1649 * Syntax:
1650 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1651 * int port : port number (0 - 127)
1652 * unsigned char * buffer : pointer to write data buffer.
1653 * int length : write data length
1654 *
1655 * return: 0 - length : real write data length
1656 *
1657 *
1658 * Function 21: Read data.
1659 * Syntax:
33f0f88f 1660 * int MoxaPortReadData(int port, struct tty_struct *tty);
1da177e4 1661 * int port : port number (0 - 127)
33f0f88f 1662 * struct tty_struct *tty : tty for data
1da177e4
LT		 1663 *
1664 * return: 0 - length : real read data length
1665 *
1666 *
1da177e4
LT		 1667 * Function 24: Get the Tx buffer current queued data bytes
1668 * Syntax:
1669 * int MoxaPortTxQueue(int port);
1670 * int port : port number (0 - 127)
1671 *
1672 * return: .. : Tx buffer current queued data bytes
1673 *
1674 *
1675 * Function 25: Get the Tx buffer current free space
1676 * Syntax:
1677 * int MoxaPortTxFree(int port);
1678 * int port : port number (0 - 127)
1679 *
1680 * return: .. : Tx buffer current free space
1681 *
1682 *
1683 * Function 26: Get the Rx buffer current queued data bytes
1684 * Syntax:
1685 * int MoxaPortRxQueue(int port);
1686 * int port : port number (0 - 127)
1687 *
1688 * return: .. : Rx buffer current queued data bytes
1689 *
1690 *
1da177e4
LT		 1691 * Function 28: Disable port data transmission.
1692 * Syntax:
1693 * void MoxaPortTxDisable(int port);
1694 * int port : port number (0 - 127)
1695 *
1696 *
1697 * Function 29: Enable port data transmission.
1698 * Syntax:
1699 * void MoxaPortTxEnable(int port);
1700 * int port : port number (0 - 127)
1701 *
1702 *
1da177e4
LT		 1703 * Function 31: Get the received BREAK signal count and reset it.
1704 * Syntax:
1705 * int MoxaPortResetBrkCnt(int port);
1706 * int port : port number (0 - 127)
1707 *
1708 * return: 0 - .. : BREAK signal count
1709 *
1710 *
1da177e4 1711 */
1da177e4 1712
b4173f45 1713static void MoxaPortEnable(struct moxa_port *port)
1da177e4
LT		 1714{
1715 void __iomem *ofsAddr;
eaa95a8d 1716 u16 lowwater = 512;
1da177e4 1717
b4173f45 1718 ofsAddr = port->tableAddr;
1da177e4 1719 writew(lowwater, ofsAddr + Low_water);
08d01c79 1720 if (MOXA_IS_320(port->board))
1da177e4 1721 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
eaa95a8d
JS		 1722 else
1723 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1724 ofsAddr + HostStat);
1da177e4
LT		 1725
1726 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1727 moxafunc(ofsAddr, FC_FlushQueue, 2);
1728
1729 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1730 MoxaPortLineStatus(port);
1731}
1732
b4173f45 1733static void MoxaPortDisable(struct moxa_port *port)
1da177e4 1734{
b4173f45 1735 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT		 1736
1737 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1738 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1739 writew(0, ofsAddr + HostStat);
1740 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1741}
1742
08d01c79 1743static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1da177e4 1744{
08d01c79
JS		 1745 void __iomem *ofsAddr = port->tableAddr;
1746 unsigned int clock, val;
1747 speed_t max;
1da177e4 1748
08d01c79
JS		 1749 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1750 if (baud < 50)
eaa95a8d 1751 return 0;
1da177e4
LT		 1752 if (baud > max)
1753 baud = max;
08d01c79 1754 clock = 921600;
1da177e4
LT		 1755 val = clock / baud;
1756 moxafunc(ofsAddr, FC_SetBaud, val);
1757 baud = clock / val;
eaa95a8d 1758 return baud;
1da177e4
LT		 1759}
1760
b4173f45
JS		 1761static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1762 speed_t baud)
1da177e4
LT		 1763{
1764 void __iomem *ofsAddr;
1da177e4
LT		 1765 tcflag_t mode = 0;
1766
b4173f45 1767 ofsAddr = port->tableAddr;
1da177e4
LT		 1768
1769 mode = termio->c_cflag & CSIZE;
1770 if (mode == CS5)
1771 mode = MX_CS5;
1772 else if (mode == CS6)
1773 mode = MX_CS6;
1774 else if (mode == CS7)
1775 mode = MX_CS7;
1776 else if (mode == CS8)
1777 mode = MX_CS8;
1778
1779 if (termio->c_cflag & CSTOPB) {
1780 if (mode == MX_CS5)
1781 mode |= MX_STOP15;
1782 else
1783 mode |= MX_STOP2;
1784 } else
1785 mode |= MX_STOP1;
1786
1787 if (termio->c_cflag & PARENB) {
1788 if (termio->c_cflag & PARODD)
1789 mode |= MX_PARODD;
1790 else
1791 mode |= MX_PAREVEN;
1792 } else
1793 mode |= MX_PARNONE;
1794
eaa95a8d 1795 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1da177e4 1796
08d01c79
JS		 1797 if (MOXA_IS_320(port->board) && baud >= 921600)
1798 return -1;
1799
db1acaa6 1800 baud = MoxaPortSetBaud(port, baud);
1da177e4
LT		 1801
1802 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
f5c5a36d 1803 spin_lock_irq(&moxafunc_lock);
1da177e4
LT		 1804 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1805 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1806 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
6f56b658 1807 moxa_wait_finish(ofsAddr);
a808ac0c 1808 spin_unlock_irq(&moxafunc_lock);
1da177e4
LT		 1809
1810 }
eaa95a8d 1811 return baud;
1da177e4
LT		 1812}
1813
b4173f45
JS		 1814static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1815 int *rtsState)
1da177e4 1816{
b4173f45
JS		 1817 if (dtrState)
1818 *dtrState = !!(port->lineCtrl & DTR_ON);
1819 if (rtsState)
1820 *rtsState = !!(port->lineCtrl & RTS_ON);
1821
eaa95a8d 1822 return 0;
1da177e4
LT		 1823}
1824
b4173f45 1825static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1da177e4 1826{
eaa95a8d 1827 u8 mode = 0;
1da177e4 1828
1da177e4
LT		 1829 if (dtr)
1830 mode |= DTR_ON;
1831 if (rts)
1832 mode |= RTS_ON;
b4173f45
JS		 1833 port->lineCtrl = mode;
1834 moxafunc(port->tableAddr, FC_LineControl, mode);
1da177e4
LT		 1835}
1836
b4173f45
JS		 1837static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1838 int txflow, int rxflow, int txany)
1da177e4 1839{
b4173f45 1840 int mode = 0;
1da177e4 1841
1da177e4
LT		 1842 if (rts)
1843 mode |= RTS_FlowCtl;
1844 if (cts)
1845 mode |= CTS_FlowCtl;
1846 if (txflow)
1847 mode |= Tx_FlowCtl;
1848 if (rxflow)
1849 mode |= Rx_FlowCtl;
1850 if (txany)
1851 mode |= IXM_IXANY;
b4173f45 1852 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1da177e4
LT		 1853}
1854
b4173f45 1855static int MoxaPortLineStatus(struct moxa_port *port)
1da177e4
LT		 1856{
1857 void __iomem *ofsAddr;
1858 int val;
1859
b4173f45 1860 ofsAddr = port->tableAddr;
f5c5a36d
AC		 1861 if (MOXA_IS_320(port->board))
1862 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1863 else
1da177e4 1864 val = readw(ofsAddr + FlagStat) >> 4;
1da177e4 1865 val &= 0x0B;
7bcf97d1 1866 if (val & 8)
1da177e4 1867 val |= 4;
7bcf97d1 1868 moxa_new_dcdstate(port, val & 8);
1da177e4 1869 val &= 7;
7bcf97d1 1870 return val;
1da177e4
LT		 1871}
1872
d450b5a0 1873static int MoxaPortWriteData(struct tty_struct *tty,
2108eba5 1874 const unsigned char *buffer, int len)
1da177e4 1875{
d450b5a0 1876 struct moxa_port *port = tty->driver_data;
1da177e4 1877 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS		 1878 unsigned int c, total;
1879 u16 head, tail, tx_mask, spage, epage;
1880 u16 pageno, pageofs, bufhead;
1da177e4 1881
b4173f45
JS		 1882 ofsAddr = port->tableAddr;
1883 baseAddr = port->board->basemem;
1da177e4
LT		 1884 tx_mask = readw(ofsAddr + TX_mask);
1885 spage = readw(ofsAddr + Page_txb);
1886 epage = readw(ofsAddr + EndPage_txb);
1887 tail = readw(ofsAddr + TXwptr);
1888 head = readw(ofsAddr + TXrptr);
2108eba5 1889 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1da177e4
LT		 1890 if (c > len)
1891 c = len;
9de6a51f 1892 moxaLog.txcnt[port->port.tty->index] += c;
1da177e4
LT		 1893 total = c;
1894 if (spage == epage) {
1895 bufhead = readw(ofsAddr + Ofs_txb);
1896 writew(spage, baseAddr + Control_reg);
1897 while (c > 0) {
1898 if (head > tail)
1899 len = head - tail - 1;
1900 else
1901 len = tx_mask + 1 - tail;
1902 len = (c > len) ? len : c;
1903 ofs = baseAddr + DynPage_addr + bufhead + tail;
2108eba5
JS		 1904 memcpy_toio(ofs, buffer, len);
1905 buffer += len;
1da177e4
LT		 1906 tail = (tail + len) & tx_mask;
1907 c -= len;
1908 }
1da177e4 1909 } else {
1da177e4
LT		 1910 pageno = spage + (tail >> 13);
1911 pageofs = tail & Page_mask;
2108eba5
JS		 1912 while (c > 0) {
1913 len = Page_size - pageofs;
1914 if (len > c)
1915 len = c;
1da177e4
LT		 1916 writeb(pageno, baseAddr + Control_reg);
1917 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS		 1918 memcpy_toio(ofs, buffer, len);
1919 buffer += len;
1da177e4
LT		 1920 if (++pageno == epage)
1921 pageno = spage;
1922 pageofs = 0;
2108eba5
JS		 1923 c -= len;
1924 }
1925 tail = (tail + total) & tx_mask;
1da177e4 1926 }
2108eba5 1927 writew(tail, ofsAddr + TXwptr);
1da177e4 1928 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2108eba5 1929 return total;
1da177e4
LT		 1930}
1931
7bcf97d1 1932static int MoxaPortReadData(struct moxa_port *port)
1da177e4 1933{
9de6a51f 1934 struct tty_struct *tty = port->port.tty;
2108eba5 1935 unsigned char *dst;
1da177e4 1936 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS		 1937 unsigned int count, len, total;
1938 u16 tail, rx_mask, spage, epage;
1939 u16 pageno, pageofs, bufhead, head;
1da177e4 1940
b4173f45
JS		 1941 ofsAddr = port->tableAddr;
1942 baseAddr = port->board->basemem;
1da177e4
LT		 1943 head = readw(ofsAddr + RXrptr);
1944 tail = readw(ofsAddr + RXwptr);
1945 rx_mask = readw(ofsAddr + RX_mask);
1946 spage = readw(ofsAddr + Page_rxb);
1947 epage = readw(ofsAddr + EndPage_rxb);
2108eba5 1948 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1da177e4 1949 if (count == 0)
33f0f88f 1950 return 0;
1da177e4 1951
33f0f88f 1952 total = count;
7bcf97d1 1953 moxaLog.rxcnt[tty->index] += total;
1da177e4
LT		 1954 if (spage == epage) {
1955 bufhead = readw(ofsAddr + Ofs_rxb);
1956 writew(spage, baseAddr + Control_reg);
1957 while (count > 0) {
1da177e4 1958 ofs = baseAddr + DynPage_addr + bufhead + head;
2108eba5
JS		 1959 len = (tail >= head) ? (tail - head) :
1960 (rx_mask + 1 - head);
2f693357 1961 len = tty_prepare_flip_string(&port->port, &dst,
2108eba5
JS		 1962 min(len, count));
1963 memcpy_fromio(dst, ofs, len);
1da177e4
LT		 1964 head = (head + len) & rx_mask;
1965 count -= len;
1966 }
1da177e4 1967 } else {
1da177e4
LT		 1968 pageno = spage + (head >> 13);
1969 pageofs = head & Page_mask;
2108eba5 1970 while (count > 0) {
1da177e4
LT		 1971 writew(pageno, baseAddr + Control_reg);
1972 ofs = baseAddr + DynPage_addr + pageofs;
2f693357 1973 len = tty_prepare_flip_string(&port->port, &dst,
2108eba5
JS		 1974 min(Page_size - pageofs, count));
1975 memcpy_fromio(dst, ofs, len);
1976
1977 count -= len;
1978 pageofs = (pageofs + len) & Page_mask;
1979 if (pageofs == 0 && ++pageno == epage)
1da177e4 1980 pageno = spage;
2108eba5
JS		 1981 }
1982 head = (head + total) & rx_mask;
1da177e4 1983 }
2108eba5
JS		 1984 writew(head, ofsAddr + RXrptr);
1985 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1da177e4 1986 moxaLowWaterChk = 1;
b4173f45 1987 port->lowChkFlag = 1;
1da177e4 1988 }
2108eba5 1989 return total;
1da177e4
LT		 1990}
1991
1992
b4173f45 1993static int MoxaPortTxQueue(struct moxa_port *port)
1da177e4 1994{
b4173f45 1995 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1996 u16 rptr, wptr, mask;
1da177e4 1997
1da177e4
LT		 1998 rptr = readw(ofsAddr + TXrptr);
1999 wptr = readw(ofsAddr + TXwptr);
2000 mask = readw(ofsAddr + TX_mask);
2108eba5 2001 return (wptr - rptr) & mask;
1da177e4
LT		 2002}
2003
b4173f45 2004static int MoxaPortTxFree(struct moxa_port *port)
1da177e4 2005{
b4173f45 2006 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2007 u16 rptr, wptr, mask;
1da177e4 2008
1da177e4
LT		 2009 rptr = readw(ofsAddr + TXrptr);
2010 wptr = readw(ofsAddr + TXwptr);
2011 mask = readw(ofsAddr + TX_mask);
2108eba5 2012 return mask - ((wptr - rptr) & mask);
1da177e4
LT		 2013}
2014
b4173f45 2015static int MoxaPortRxQueue(struct moxa_port *port)
1da177e4 2016{
b4173f45 2017 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2018 u16 rptr, wptr, mask;
1da177e4 2019
1da177e4
LT		 2020 rptr = readw(ofsAddr + RXrptr);
2021 wptr = readw(ofsAddr + RXwptr);
2022 mask = readw(ofsAddr + RX_mask);
2108eba5 2023 return (wptr - rptr) & mask;
1da177e4
LT		 2024}
2025
b4173f45 2026static void MoxaPortTxDisable(struct moxa_port *port)
1da177e4 2027{
b4173f45 2028 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
1da177e4
LT		 2029}
2030
b4173f45 2031static void MoxaPortTxEnable(struct moxa_port *port)
1da177e4 2032{
b4173f45 2033 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
1da177e4
LT		 2034}
2035
8f8ecbad 2036static int moxa_get_serial_info(struct moxa_port *info,
eaa95a8d 2037 struct serial_struct __user *retinfo)
1da177e4 2038{
eaa95a8d
JS		 2039 struct serial_struct tmp = {
2040 .type = info->type,
9de6a51f
AC		 2041 .line = info->port.tty->index,
2042 .flags = info->port.flags,
eaa95a8d 2043 .baud_base = 921600,
44b7d1b3 2044 .close_delay = info->port.close_delay
eaa95a8d
JS		 2045 };
2046 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
1da177e4
LT		 2047}
2048
2049
8f8ecbad 2050static int moxa_set_serial_info(struct moxa_port *info,
eaa95a8d 2051 struct serial_struct __user *new_info)
1da177e4
LT		 2052{
2053 struct serial_struct new_serial;
2054
eaa95a8d 2055 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1da177e4
LT		 2056 return -EFAULT;
2057
eaa95a8d
JS		 2058 if (new_serial.irq != 0 || new_serial.port != 0 ||
2059 new_serial.custom_divisor != 0 ||
2060 new_serial.baud_base != 921600)
2061 return -EPERM;
1da177e4
LT		 2062
2063 if (!capable(CAP_SYS_ADMIN)) {
2064 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
9de6a51f 2065 (info->port.flags & ~ASYNC_USR_MASK)))
eaa95a8d
JS		 2066 return -EPERM;
2067 } else
44b7d1b3 2068 info->port.close_delay = new_serial.close_delay * HZ / 100;
1da177e4
LT		 2069
2070 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
9de6a51f 2071 new_serial.flags |= (info->port.flags & ASYNC_FLAGS);
1da177e4 2072
eaa95a8d 2073 MoxaSetFifo(info, new_serial.type == PORT_16550A);
1da177e4
LT		 2074
2075 info->type = new_serial.type;
eaa95a8d 2076 return 0;
1da177e4
LT		 2077}
2078
2079
2080
2081/*****************************************************************************
2082 * Static local functions: *
2083 *****************************************************************************/
1da177e4 2084
b4173f45 2085static void MoxaSetFifo(struct moxa_port *port, int enable)
1da177e4 2086{
b4173f45 2087 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT		 2088
2089 if (!enable) {
2090 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2091 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2092 } else {
2093 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2094 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2095 }
2096}
Ubuntu Artful kernel mirror