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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * mxser.c -- MOXA Smartio/Industio family multiport serial driver. | |
3 | * | |
80ff8a80 JS |
4 | * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). |
5 | * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> | |
1da177e4 | 6 | * |
1c45607a JS |
7 | * This code is loosely based on the 1.8 moxa driver which is based on |
8 | * Linux serial driver, written by Linus Torvalds, Theodore T'so and | |
9 | * others. | |
1da177e4 LT |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
8ea2c2ec | 14 | * (at your option) any later version. |
1da177e4 | 15 | * |
1da177e4 | 16 | * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox |
8eb04cf3 AC |
17 | * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on |
18 | * www.moxa.com. | |
1da177e4 | 19 | * - Fixed x86_64 cleanness |
1da177e4 LT |
20 | */ |
21 | ||
1da177e4 | 22 | #include <linux/module.h> |
1da177e4 LT |
23 | #include <linux/errno.h> |
24 | #include <linux/signal.h> | |
25 | #include <linux/sched.h> | |
26 | #include <linux/timer.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/tty.h> | |
29 | #include <linux/tty_flip.h> | |
30 | #include <linux/serial.h> | |
31 | #include <linux/serial_reg.h> | |
32 | #include <linux/major.h> | |
33 | #include <linux/string.h> | |
34 | #include <linux/fcntl.h> | |
35 | #include <linux/ptrace.h> | |
1da177e4 LT |
36 | #include <linux/ioport.h> |
37 | #include <linux/mm.h> | |
1da177e4 LT |
38 | #include <linux/delay.h> |
39 | #include <linux/pci.h> | |
1977f032 | 40 | #include <linux/bitops.h> |
5a0e3ad6 | 41 | #include <linux/slab.h> |
5a3c6b25 | 42 | #include <linux/ratelimit.h> |
1da177e4 | 43 | |
1da177e4 LT |
44 | #include <asm/io.h> |
45 | #include <asm/irq.h> | |
1da177e4 LT |
46 | #include <asm/uaccess.h> |
47 | ||
48 | #include "mxser.h" | |
49 | ||
502f295f | 50 | #define MXSER_VERSION "2.0.5" /* 1.14 */ |
1da177e4 | 51 | #define MXSERMAJOR 174 |
1da177e4 | 52 | |
1da177e4 | 53 | #define MXSER_BOARDS 4 /* Max. boards */ |
1da177e4 | 54 | #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ |
1c45607a JS |
55 | #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) |
56 | #define MXSER_ISR_PASS_LIMIT 100 | |
1da177e4 | 57 | |
1c45607a JS |
58 | /*CheckIsMoxaMust return value*/ |
59 | #define MOXA_OTHER_UART 0x00 | |
60 | #define MOXA_MUST_MU150_HWID 0x01 | |
61 | #define MOXA_MUST_MU860_HWID 0x02 | |
62 | ||
1da177e4 LT |
63 | #define WAKEUP_CHARS 256 |
64 | ||
65 | #define UART_MCR_AFE 0x20 | |
66 | #define UART_LSR_SPECIAL 0x1E | |
67 | ||
e129deff | 68 | #define PCI_DEVICE_ID_POS104UL 0x1044 |
1c45607a | 69 | #define PCI_DEVICE_ID_CB108 0x1080 |
e129deff | 70 | #define PCI_DEVICE_ID_CP102UF 0x1023 |
502f295f | 71 | #define PCI_DEVICE_ID_CP112UL 0x1120 |
1c45607a | 72 | #define PCI_DEVICE_ID_CB114 0x1142 |
80ff8a80 | 73 | #define PCI_DEVICE_ID_CP114UL 0x1143 |
1c45607a JS |
74 | #define PCI_DEVICE_ID_CB134I 0x1341 |
75 | #define PCI_DEVICE_ID_CP138U 0x1380 | |
1da177e4 | 76 | |
1da177e4 LT |
77 | |
78 | #define C168_ASIC_ID 1 | |
79 | #define C104_ASIC_ID 2 | |
80 | #define C102_ASIC_ID 0xB | |
81 | #define CI132_ASIC_ID 4 | |
82 | #define CI134_ASIC_ID 3 | |
83 | #define CI104J_ASIC_ID 5 | |
84 | ||
1c45607a JS |
85 | #define MXSER_HIGHBAUD 1 |
86 | #define MXSER_HAS2 2 | |
1da177e4 | 87 | |
8ea2c2ec | 88 | /* This is only for PCI */ |
1c45607a | 89 | static const struct { |
1da177e4 LT |
90 | int type; |
91 | int tx_fifo; | |
92 | int rx_fifo; | |
93 | int xmit_fifo_size; | |
94 | int rx_high_water; | |
95 | int rx_trigger; | |
96 | int rx_low_water; | |
97 | long max_baud; | |
1c45607a | 98 | } Gpci_uart_info[] = { |
1da177e4 LT |
99 | {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, |
100 | {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, | |
101 | {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} | |
102 | }; | |
1c45607a | 103 | #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) |
1da177e4 | 104 | |
1c45607a JS |
105 | struct mxser_cardinfo { |
106 | char *name; | |
107 | unsigned int nports; | |
108 | unsigned int flags; | |
109 | }; | |
1da177e4 | 110 | |
1c45607a JS |
111 | static const struct mxser_cardinfo mxser_cards[] = { |
112 | /* 0*/ { "C168 series", 8, }, | |
113 | { "C104 series", 4, }, | |
114 | { "CI-104J series", 4, }, | |
115 | { "C168H/PCI series", 8, }, | |
116 | { "C104H/PCI series", 4, }, | |
117 | /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ | |
118 | { "CI-132 series", 4, MXSER_HAS2 }, | |
119 | { "CI-134 series", 4, }, | |
120 | { "CP-132 series", 2, }, | |
121 | { "CP-114 series", 4, }, | |
122 | /*10*/ { "CT-114 series", 4, }, | |
123 | { "CP-102 series", 2, MXSER_HIGHBAUD }, | |
124 | { "CP-104U series", 4, }, | |
125 | { "CP-168U series", 8, }, | |
126 | { "CP-132U series", 2, }, | |
127 | /*15*/ { "CP-134U series", 4, }, | |
128 | { "CP-104JU series", 4, }, | |
129 | { "Moxa UC7000 Serial", 8, }, /* RC7000 */ | |
130 | { "CP-118U series", 8, }, | |
131 | { "CP-102UL series", 2, }, | |
132 | /*20*/ { "CP-102U series", 2, }, | |
133 | { "CP-118EL series", 8, }, | |
134 | { "CP-168EL series", 8, }, | |
135 | { "CP-104EL series", 4, }, | |
136 | { "CB-108 series", 8, }, | |
137 | /*25*/ { "CB-114 series", 4, }, | |
138 | { "CB-134I series", 4, }, | |
139 | { "CP-138U series", 8, }, | |
80ff8a80 | 140 | { "POS-104UL series", 4, }, |
e129deff | 141 | { "CP-114UL series", 4, }, |
502f295f JS |
142 | /*30*/ { "CP-102UF series", 2, }, |
143 | { "CP-112UL series", 2, }, | |
1c45607a | 144 | }; |
1da177e4 | 145 | |
1c45607a JS |
146 | /* driver_data correspond to the lines in the structure above |
147 | see also ISA probe function before you change something */ | |
1da177e4 | 148 | static struct pci_device_id mxser_pcibrds[] = { |
1c45607a JS |
149 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, |
150 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, | |
151 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, | |
152 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, | |
153 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, | |
154 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, | |
155 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, | |
156 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, | |
157 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, | |
158 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, | |
159 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, | |
160 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, | |
161 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, | |
162 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, | |
163 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, | |
164 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, | |
165 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, | |
166 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, | |
167 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, | |
168 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, | |
169 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, | |
170 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, | |
171 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, | |
80ff8a80 | 172 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, |
e129deff | 173 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, |
502f295f | 174 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, |
1c45607a | 175 | { } |
1da177e4 | 176 | }; |
1da177e4 LT |
177 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); |
178 | ||
1df00924 | 179 | static unsigned long ioaddr[MXSER_BOARDS]; |
1da177e4 | 180 | static int ttymajor = MXSERMAJOR; |
1da177e4 LT |
181 | |
182 | /* Variables for insmod */ | |
183 | ||
184 | MODULE_AUTHOR("Casper Yang"); | |
185 | MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); | |
1df00924 JS |
186 | module_param_array(ioaddr, ulong, NULL, 0); |
187 | MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); | |
8d3b33f6 | 188 | module_param(ttymajor, int, 0); |
1da177e4 LT |
189 | MODULE_LICENSE("GPL"); |
190 | ||
191 | struct mxser_log { | |
192 | int tick; | |
193 | unsigned long rxcnt[MXSER_PORTS]; | |
194 | unsigned long txcnt[MXSER_PORTS]; | |
195 | }; | |
196 | ||
1da177e4 LT |
197 | struct mxser_mon { |
198 | unsigned long rxcnt; | |
199 | unsigned long txcnt; | |
200 | unsigned long up_rxcnt; | |
201 | unsigned long up_txcnt; | |
202 | int modem_status; | |
203 | unsigned char hold_reason; | |
204 | }; | |
205 | ||
206 | struct mxser_mon_ext { | |
207 | unsigned long rx_cnt[32]; | |
208 | unsigned long tx_cnt[32]; | |
209 | unsigned long up_rxcnt[32]; | |
210 | unsigned long up_txcnt[32]; | |
211 | int modem_status[32]; | |
212 | ||
213 | long baudrate[32]; | |
214 | int databits[32]; | |
215 | int stopbits[32]; | |
216 | int parity[32]; | |
217 | int flowctrl[32]; | |
218 | int fifo[32]; | |
219 | int iftype[32]; | |
220 | }; | |
8ea2c2ec | 221 | |
1c45607a JS |
222 | struct mxser_board; |
223 | ||
224 | struct mxser_port { | |
0ad9e7d1 | 225 | struct tty_port port; |
1c45607a | 226 | struct mxser_board *board; |
1c45607a JS |
227 | |
228 | unsigned long ioaddr; | |
229 | unsigned long opmode_ioaddr; | |
230 | int max_baud; | |
1da177e4 | 231 | |
1da177e4 LT |
232 | int rx_high_water; |
233 | int rx_trigger; /* Rx fifo trigger level */ | |
234 | int rx_low_water; | |
235 | int baud_base; /* max. speed */ | |
1da177e4 | 236 | int type; /* UART type */ |
1c45607a | 237 | |
1da177e4 | 238 | int x_char; /* xon/xoff character */ |
1da177e4 LT |
239 | int IER; /* Interrupt Enable Register */ |
240 | int MCR; /* Modem control register */ | |
1c45607a JS |
241 | |
242 | unsigned char stop_rx; | |
243 | unsigned char ldisc_stop_rx; | |
244 | ||
245 | int custom_divisor; | |
1c45607a | 246 | unsigned char err_shadow; |
1c45607a | 247 | |
1c45607a JS |
248 | struct async_icount icount; /* kernel counters for 4 input interrupts */ |
249 | int timeout; | |
250 | ||
251 | int read_status_mask; | |
252 | int ignore_status_mask; | |
253 | int xmit_fifo_size; | |
1da177e4 LT |
254 | int xmit_head; |
255 | int xmit_tail; | |
256 | int xmit_cnt; | |
cd7b4b39 | 257 | int closing; |
1c45607a | 258 | |
606d099c | 259 | struct ktermios normal_termios; |
1c45607a | 260 | |
1da177e4 | 261 | struct mxser_mon mon_data; |
1c45607a | 262 | |
1da177e4 | 263 | spinlock_t slock; |
1c45607a JS |
264 | }; |
265 | ||
266 | struct mxser_board { | |
267 | unsigned int idx; | |
268 | int irq; | |
269 | const struct mxser_cardinfo *info; | |
270 | unsigned long vector; | |
271 | unsigned long vector_mask; | |
272 | ||
273 | int chip_flag; | |
274 | int uart_type; | |
275 | ||
276 | struct mxser_port ports[MXSER_PORTS_PER_BOARD]; | |
1da177e4 LT |
277 | }; |
278 | ||
1da177e4 LT |
279 | struct mxser_mstatus { |
280 | tcflag_t cflag; | |
281 | int cts; | |
282 | int dsr; | |
283 | int ri; | |
284 | int dcd; | |
285 | }; | |
286 | ||
1c45607a | 287 | static struct mxser_board mxser_boards[MXSER_BOARDS]; |
1da177e4 | 288 | static struct tty_driver *mxvar_sdriver; |
1da177e4 | 289 | static struct mxser_log mxvar_log; |
1da177e4 | 290 | static int mxser_set_baud_method[MXSER_PORTS + 1]; |
1da177e4 | 291 | |
148ff86b CH |
292 | static void mxser_enable_must_enchance_mode(unsigned long baseio) |
293 | { | |
294 | u8 oldlcr; | |
295 | u8 efr; | |
296 | ||
297 | oldlcr = inb(baseio + UART_LCR); | |
298 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
299 | ||
300 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
301 | efr |= MOXA_MUST_EFR_EFRB_ENABLE; | |
302 | ||
303 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
304 | outb(oldlcr, baseio + UART_LCR); | |
305 | } | |
306 | ||
e89d67cf | 307 | #ifdef CONFIG_PCI |
148ff86b CH |
308 | static void mxser_disable_must_enchance_mode(unsigned long baseio) |
309 | { | |
310 | u8 oldlcr; | |
311 | u8 efr; | |
312 | ||
313 | oldlcr = inb(baseio + UART_LCR); | |
314 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
315 | ||
316 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
317 | efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; | |
318 | ||
319 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
320 | outb(oldlcr, baseio + UART_LCR); | |
321 | } | |
e89d67cf | 322 | #endif |
148ff86b CH |
323 | |
324 | static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) | |
325 | { | |
326 | u8 oldlcr; | |
327 | u8 efr; | |
328 | ||
329 | oldlcr = inb(baseio + UART_LCR); | |
330 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
331 | ||
332 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
333 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
334 | efr |= MOXA_MUST_EFR_BANK0; | |
335 | ||
336 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
337 | outb(value, baseio + MOXA_MUST_XON1_REGISTER); | |
338 | outb(oldlcr, baseio + UART_LCR); | |
339 | } | |
340 | ||
341 | static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) | |
342 | { | |
343 | u8 oldlcr; | |
344 | u8 efr; | |
345 | ||
346 | oldlcr = inb(baseio + UART_LCR); | |
347 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
348 | ||
349 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
350 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
351 | efr |= MOXA_MUST_EFR_BANK0; | |
352 | ||
353 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
354 | outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); | |
355 | outb(oldlcr, baseio + UART_LCR); | |
356 | } | |
357 | ||
358 | static void mxser_set_must_fifo_value(struct mxser_port *info) | |
359 | { | |
360 | u8 oldlcr; | |
361 | u8 efr; | |
362 | ||
363 | oldlcr = inb(info->ioaddr + UART_LCR); | |
364 | outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); | |
365 | ||
366 | efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
367 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
368 | efr |= MOXA_MUST_EFR_BANK1; | |
369 | ||
370 | outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
371 | outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); | |
372 | outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); | |
373 | outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); | |
374 | outb(oldlcr, info->ioaddr + UART_LCR); | |
375 | } | |
376 | ||
377 | static void mxser_set_must_enum_value(unsigned long baseio, u8 value) | |
378 | { | |
379 | u8 oldlcr; | |
380 | u8 efr; | |
381 | ||
382 | oldlcr = inb(baseio + UART_LCR); | |
383 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
384 | ||
385 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
386 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
387 | efr |= MOXA_MUST_EFR_BANK2; | |
388 | ||
389 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
390 | outb(value, baseio + MOXA_MUST_ENUM_REGISTER); | |
391 | outb(oldlcr, baseio + UART_LCR); | |
392 | } | |
393 | ||
e89d67cf | 394 | #ifdef CONFIG_PCI |
148ff86b CH |
395 | static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) |
396 | { | |
397 | u8 oldlcr; | |
398 | u8 efr; | |
399 | ||
400 | oldlcr = inb(baseio + UART_LCR); | |
401 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
402 | ||
403 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
404 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
405 | efr |= MOXA_MUST_EFR_BANK2; | |
406 | ||
407 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
408 | *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); | |
409 | outb(oldlcr, baseio + UART_LCR); | |
410 | } | |
e89d67cf | 411 | #endif |
148ff86b CH |
412 | |
413 | static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) | |
414 | { | |
415 | u8 oldlcr; | |
416 | u8 efr; | |
417 | ||
418 | oldlcr = inb(baseio + UART_LCR); | |
419 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
420 | ||
421 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
422 | efr &= ~MOXA_MUST_EFR_SF_MASK; | |
423 | ||
424 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
425 | outb(oldlcr, baseio + UART_LCR); | |
426 | } | |
427 | ||
428 | static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) | |
429 | { | |
430 | u8 oldlcr; | |
431 | u8 efr; | |
432 | ||
433 | oldlcr = inb(baseio + UART_LCR); | |
434 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
435 | ||
436 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
437 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
438 | efr |= MOXA_MUST_EFR_SF_TX1; | |
439 | ||
440 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
441 | outb(oldlcr, baseio + UART_LCR); | |
442 | } | |
443 | ||
444 | static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) | |
445 | { | |
446 | u8 oldlcr; | |
447 | u8 efr; | |
448 | ||
449 | oldlcr = inb(baseio + UART_LCR); | |
450 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
451 | ||
452 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
453 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
454 | ||
455 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
456 | outb(oldlcr, baseio + UART_LCR); | |
457 | } | |
458 | ||
459 | static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) | |
460 | { | |
461 | u8 oldlcr; | |
462 | u8 efr; | |
463 | ||
464 | oldlcr = inb(baseio + UART_LCR); | |
465 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
466 | ||
467 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
468 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
469 | efr |= MOXA_MUST_EFR_SF_RX1; | |
470 | ||
471 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
472 | outb(oldlcr, baseio + UART_LCR); | |
473 | } | |
474 | ||
475 | static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) | |
476 | { | |
477 | u8 oldlcr; | |
478 | u8 efr; | |
479 | ||
480 | oldlcr = inb(baseio + UART_LCR); | |
481 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
482 | ||
483 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
484 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
485 | ||
486 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
487 | outb(oldlcr, baseio + UART_LCR); | |
488 | } | |
489 | ||
b8cc5549 | 490 | #ifdef CONFIG_PCI |
9671f099 | 491 | static int CheckIsMoxaMust(unsigned long io) |
1da177e4 LT |
492 | { |
493 | u8 oldmcr, hwid; | |
494 | int i; | |
495 | ||
496 | outb(0, io + UART_LCR); | |
148ff86b | 497 | mxser_disable_must_enchance_mode(io); |
1da177e4 LT |
498 | oldmcr = inb(io + UART_MCR); |
499 | outb(0, io + UART_MCR); | |
148ff86b | 500 | mxser_set_must_xon1_value(io, 0x11); |
1da177e4 LT |
501 | if ((hwid = inb(io + UART_MCR)) != 0) { |
502 | outb(oldmcr, io + UART_MCR); | |
8ea2c2ec | 503 | return MOXA_OTHER_UART; |
1da177e4 LT |
504 | } |
505 | ||
148ff86b | 506 | mxser_get_must_hardware_id(io, &hwid); |
1c45607a JS |
507 | for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ |
508 | if (hwid == Gpci_uart_info[i].type) | |
8ea2c2ec | 509 | return (int)hwid; |
1da177e4 LT |
510 | } |
511 | return MOXA_OTHER_UART; | |
512 | } | |
b8cc5549 | 513 | #endif |
1da177e4 | 514 | |
1c45607a | 515 | static void process_txrx_fifo(struct mxser_port *info) |
1da177e4 LT |
516 | { |
517 | int i; | |
518 | ||
519 | if ((info->type == PORT_16450) || (info->type == PORT_8250)) { | |
520 | info->rx_trigger = 1; | |
521 | info->rx_high_water = 1; | |
522 | info->rx_low_water = 1; | |
523 | info->xmit_fifo_size = 1; | |
1c45607a JS |
524 | } else |
525 | for (i = 0; i < UART_INFO_NUM; i++) | |
526 | if (info->board->chip_flag == Gpci_uart_info[i].type) { | |
1da177e4 LT |
527 | info->rx_trigger = Gpci_uart_info[i].rx_trigger; |
528 | info->rx_low_water = Gpci_uart_info[i].rx_low_water; | |
529 | info->rx_high_water = Gpci_uart_info[i].rx_high_water; | |
530 | info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; | |
531 | break; | |
532 | } | |
1da177e4 LT |
533 | } |
534 | ||
1c45607a | 535 | static unsigned char mxser_get_msr(int baseaddr, int mode, int port) |
1da177e4 | 536 | { |
72800df9 | 537 | static unsigned char mxser_msr[MXSER_PORTS + 1]; |
1c45607a | 538 | unsigned char status = 0; |
1da177e4 | 539 | |
1c45607a | 540 | status = inb(baseaddr + UART_MSR); |
1da177e4 | 541 | |
1c45607a JS |
542 | mxser_msr[port] &= 0x0F; |
543 | mxser_msr[port] |= status; | |
544 | status = mxser_msr[port]; | |
545 | if (mode) | |
546 | mxser_msr[port] = 0; | |
1da177e4 | 547 | |
1c45607a JS |
548 | return status; |
549 | } | |
1da177e4 | 550 | |
31f35939 AC |
551 | static int mxser_carrier_raised(struct tty_port *port) |
552 | { | |
553 | struct mxser_port *mp = container_of(port, struct mxser_port, port); | |
554 | return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; | |
555 | } | |
556 | ||
fcc8ac18 | 557 | static void mxser_dtr_rts(struct tty_port *port, int on) |
5d951fb4 AC |
558 | { |
559 | struct mxser_port *mp = container_of(port, struct mxser_port, port); | |
560 | unsigned long flags; | |
561 | ||
562 | spin_lock_irqsave(&mp->slock, flags); | |
fcc8ac18 AC |
563 | if (on) |
564 | outb(inb(mp->ioaddr + UART_MCR) | | |
565 | UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); | |
566 | else | |
567 | outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), | |
568 | mp->ioaddr + UART_MCR); | |
5d951fb4 AC |
569 | spin_unlock_irqrestore(&mp->slock, flags); |
570 | } | |
571 | ||
216ba023 | 572 | static int mxser_set_baud(struct tty_struct *tty, long newspd) |
1da177e4 | 573 | { |
216ba023 | 574 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
575 | int quot = 0, baud; |
576 | unsigned char cval; | |
1da177e4 | 577 | |
216ba023 | 578 | if (!info->ioaddr) |
1c45607a | 579 | return -1; |
1da177e4 | 580 | |
1c45607a JS |
581 | if (newspd > info->max_baud) |
582 | return -1; | |
1da177e4 | 583 | |
1c45607a JS |
584 | if (newspd == 134) { |
585 | quot = 2 * info->baud_base / 269; | |
216ba023 | 586 | tty_encode_baud_rate(tty, 134, 134); |
1c45607a JS |
587 | } else if (newspd) { |
588 | quot = info->baud_base / newspd; | |
589 | if (quot == 0) | |
590 | quot = 1; | |
591 | baud = info->baud_base/quot; | |
216ba023 | 592 | tty_encode_baud_rate(tty, baud, baud); |
1c45607a JS |
593 | } else { |
594 | quot = 0; | |
595 | } | |
1da177e4 | 596 | |
1c45607a JS |
597 | info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); |
598 | info->timeout += HZ / 50; /* Add .02 seconds of slop */ | |
1da177e4 | 599 | |
1c45607a JS |
600 | if (quot) { |
601 | info->MCR |= UART_MCR_DTR; | |
602 | outb(info->MCR, info->ioaddr + UART_MCR); | |
603 | } else { | |
604 | info->MCR &= ~UART_MCR_DTR; | |
605 | outb(info->MCR, info->ioaddr + UART_MCR); | |
606 | return 0; | |
607 | } | |
1da177e4 | 608 | |
1c45607a | 609 | cval = inb(info->ioaddr + UART_LCR); |
1da177e4 | 610 | |
1c45607a | 611 | outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ |
1da177e4 | 612 | |
1c45607a JS |
613 | outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ |
614 | outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ | |
615 | outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ | |
1da177e4 | 616 | |
1c45607a | 617 | #ifdef BOTHER |
216ba023 | 618 | if (C_BAUD(tty) == BOTHER) { |
1c45607a JS |
619 | quot = info->baud_base % newspd; |
620 | quot *= 8; | |
621 | if (quot % newspd > newspd / 2) { | |
622 | quot /= newspd; | |
623 | quot++; | |
624 | } else | |
625 | quot /= newspd; | |
626 | ||
148ff86b | 627 | mxser_set_must_enum_value(info->ioaddr, quot); |
1c45607a JS |
628 | } else |
629 | #endif | |
148ff86b | 630 | mxser_set_must_enum_value(info->ioaddr, 0); |
1da177e4 | 631 | |
8ea2c2ec | 632 | return 0; |
1da177e4 | 633 | } |
1da177e4 | 634 | |
1c45607a JS |
635 | /* |
636 | * This routine is called to set the UART divisor registers to match | |
637 | * the specified baud rate for a serial port. | |
638 | */ | |
216ba023 AC |
639 | static int mxser_change_speed(struct tty_struct *tty, |
640 | struct ktermios *old_termios) | |
1da177e4 | 641 | { |
216ba023 | 642 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
643 | unsigned cflag, cval, fcr; |
644 | int ret = 0; | |
645 | unsigned char status; | |
1da177e4 | 646 | |
adc8d746 | 647 | cflag = tty->termios.c_cflag; |
216ba023 | 648 | if (!info->ioaddr) |
1c45607a | 649 | return ret; |
1da177e4 | 650 | |
216ba023 AC |
651 | if (mxser_set_baud_method[tty->index] == 0) |
652 | mxser_set_baud(tty, tty_get_baud_rate(tty)); | |
1da177e4 | 653 | |
1c45607a JS |
654 | /* byte size and parity */ |
655 | switch (cflag & CSIZE) { | |
656 | case CS5: | |
657 | cval = 0x00; | |
658 | break; | |
659 | case CS6: | |
660 | cval = 0x01; | |
661 | break; | |
662 | case CS7: | |
663 | cval = 0x02; | |
664 | break; | |
665 | case CS8: | |
666 | cval = 0x03; | |
667 | break; | |
668 | default: | |
669 | cval = 0x00; | |
670 | break; /* too keep GCC shut... */ | |
671 | } | |
672 | if (cflag & CSTOPB) | |
673 | cval |= 0x04; | |
674 | if (cflag & PARENB) | |
675 | cval |= UART_LCR_PARITY; | |
676 | if (!(cflag & PARODD)) | |
677 | cval |= UART_LCR_EPAR; | |
678 | if (cflag & CMSPAR) | |
679 | cval |= UART_LCR_SPAR; | |
1da177e4 | 680 | |
1c45607a JS |
681 | if ((info->type == PORT_8250) || (info->type == PORT_16450)) { |
682 | if (info->board->chip_flag) { | |
683 | fcr = UART_FCR_ENABLE_FIFO; | |
684 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 685 | mxser_set_must_fifo_value(info); |
1c45607a JS |
686 | } else |
687 | fcr = 0; | |
688 | } else { | |
689 | fcr = UART_FCR_ENABLE_FIFO; | |
690 | if (info->board->chip_flag) { | |
691 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 692 | mxser_set_must_fifo_value(info); |
1c45607a JS |
693 | } else { |
694 | switch (info->rx_trigger) { | |
695 | case 1: | |
696 | fcr |= UART_FCR_TRIGGER_1; | |
697 | break; | |
698 | case 4: | |
699 | fcr |= UART_FCR_TRIGGER_4; | |
700 | break; | |
701 | case 8: | |
702 | fcr |= UART_FCR_TRIGGER_8; | |
703 | break; | |
704 | default: | |
705 | fcr |= UART_FCR_TRIGGER_14; | |
706 | break; | |
707 | } | |
1da177e4 | 708 | } |
1da177e4 LT |
709 | } |
710 | ||
1c45607a JS |
711 | /* CTS flow control flag and modem status interrupts */ |
712 | info->IER &= ~UART_IER_MSI; | |
713 | info->MCR &= ~UART_MCR_AFE; | |
714 | if (cflag & CRTSCTS) { | |
0ad9e7d1 | 715 | info->port.flags |= ASYNC_CTS_FLOW; |
1c45607a JS |
716 | info->IER |= UART_IER_MSI; |
717 | if ((info->type == PORT_16550A) || (info->board->chip_flag)) { | |
718 | info->MCR |= UART_MCR_AFE; | |
719 | } else { | |
720 | status = inb(info->ioaddr + UART_MSR); | |
216ba023 | 721 | if (tty->hw_stopped) { |
1c45607a | 722 | if (status & UART_MSR_CTS) { |
216ba023 | 723 | tty->hw_stopped = 0; |
1c45607a JS |
724 | if (info->type != PORT_16550A && |
725 | !info->board->chip_flag) { | |
726 | outb(info->IER & ~UART_IER_THRI, | |
727 | info->ioaddr + | |
728 | UART_IER); | |
729 | info->IER |= UART_IER_THRI; | |
730 | outb(info->IER, info->ioaddr + | |
731 | UART_IER); | |
732 | } | |
216ba023 | 733 | tty_wakeup(tty); |
1c45607a JS |
734 | } |
735 | } else { | |
736 | if (!(status & UART_MSR_CTS)) { | |
216ba023 | 737 | tty->hw_stopped = 1; |
1c45607a JS |
738 | if ((info->type != PORT_16550A) && |
739 | (!info->board->chip_flag)) { | |
740 | info->IER &= ~UART_IER_THRI; | |
741 | outb(info->IER, info->ioaddr + | |
742 | UART_IER); | |
743 | } | |
744 | } | |
745 | } | |
1da177e4 | 746 | } |
1c45607a | 747 | } else { |
0ad9e7d1 | 748 | info->port.flags &= ~ASYNC_CTS_FLOW; |
1c45607a JS |
749 | } |
750 | outb(info->MCR, info->ioaddr + UART_MCR); | |
751 | if (cflag & CLOCAL) { | |
0ad9e7d1 | 752 | info->port.flags &= ~ASYNC_CHECK_CD; |
1c45607a | 753 | } else { |
0ad9e7d1 | 754 | info->port.flags |= ASYNC_CHECK_CD; |
1c45607a JS |
755 | info->IER |= UART_IER_MSI; |
756 | } | |
757 | outb(info->IER, info->ioaddr + UART_IER); | |
758 | ||
759 | /* | |
760 | * Set up parity check flag | |
761 | */ | |
762 | info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; | |
216ba023 | 763 | if (I_INPCK(tty)) |
1c45607a | 764 | info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; |
216ba023 | 765 | if (I_BRKINT(tty) || I_PARMRK(tty)) |
1c45607a | 766 | info->read_status_mask |= UART_LSR_BI; |
1da177e4 | 767 | |
1c45607a | 768 | info->ignore_status_mask = 0; |
1da177e4 | 769 | |
216ba023 | 770 | if (I_IGNBRK(tty)) { |
1c45607a JS |
771 | info->ignore_status_mask |= UART_LSR_BI; |
772 | info->read_status_mask |= UART_LSR_BI; | |
8ea2c2ec | 773 | /* |
1c45607a JS |
774 | * If we're ignore parity and break indicators, ignore |
775 | * overruns too. (For real raw support). | |
8ea2c2ec | 776 | */ |
216ba023 | 777 | if (I_IGNPAR(tty)) { |
1c45607a JS |
778 | info->ignore_status_mask |= |
779 | UART_LSR_OE | | |
780 | UART_LSR_PE | | |
781 | UART_LSR_FE; | |
782 | info->read_status_mask |= | |
783 | UART_LSR_OE | | |
784 | UART_LSR_PE | | |
785 | UART_LSR_FE; | |
786 | } | |
1da177e4 | 787 | } |
1c45607a | 788 | if (info->board->chip_flag) { |
216ba023 AC |
789 | mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); |
790 | mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); | |
791 | if (I_IXON(tty)) { | |
148ff86b CH |
792 | mxser_enable_must_rx_software_flow_control( |
793 | info->ioaddr); | |
1c45607a | 794 | } else { |
148ff86b CH |
795 | mxser_disable_must_rx_software_flow_control( |
796 | info->ioaddr); | |
1da177e4 | 797 | } |
216ba023 | 798 | if (I_IXOFF(tty)) { |
148ff86b CH |
799 | mxser_enable_must_tx_software_flow_control( |
800 | info->ioaddr); | |
1c45607a | 801 | } else { |
148ff86b CH |
802 | mxser_disable_must_tx_software_flow_control( |
803 | info->ioaddr); | |
1da177e4 LT |
804 | } |
805 | } | |
1da177e4 | 806 | |
1da177e4 | 807 | |
1c45607a JS |
808 | outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ |
809 | outb(cval, info->ioaddr + UART_LCR); | |
1da177e4 | 810 | |
1c45607a | 811 | return ret; |
1da177e4 LT |
812 | } |
813 | ||
216ba023 AC |
814 | static void mxser_check_modem_status(struct tty_struct *tty, |
815 | struct mxser_port *port, int status) | |
1da177e4 | 816 | { |
1c45607a JS |
817 | /* update input line counters */ |
818 | if (status & UART_MSR_TERI) | |
819 | port->icount.rng++; | |
820 | if (status & UART_MSR_DDSR) | |
821 | port->icount.dsr++; | |
822 | if (status & UART_MSR_DDCD) | |
823 | port->icount.dcd++; | |
824 | if (status & UART_MSR_DCTS) | |
825 | port->icount.cts++; | |
826 | port->mon_data.modem_status = status; | |
bdc04e31 | 827 | wake_up_interruptible(&port->port.delta_msr_wait); |
1da177e4 | 828 | |
0ad9e7d1 | 829 | if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { |
1c45607a | 830 | if (status & UART_MSR_DCD) |
0ad9e7d1 | 831 | wake_up_interruptible(&port->port.open_wait); |
1c45607a | 832 | } |
1da177e4 | 833 | |
f21ec3d2 | 834 | if (tty_port_cts_enabled(&port->port)) { |
216ba023 | 835 | if (tty->hw_stopped) { |
1c45607a | 836 | if (status & UART_MSR_CTS) { |
216ba023 | 837 | tty->hw_stopped = 0; |
1c45607a JS |
838 | |
839 | if ((port->type != PORT_16550A) && | |
840 | (!port->board->chip_flag)) { | |
841 | outb(port->IER & ~UART_IER_THRI, | |
842 | port->ioaddr + UART_IER); | |
843 | port->IER |= UART_IER_THRI; | |
844 | outb(port->IER, port->ioaddr + | |
845 | UART_IER); | |
846 | } | |
216ba023 | 847 | tty_wakeup(tty); |
1c45607a JS |
848 | } |
849 | } else { | |
850 | if (!(status & UART_MSR_CTS)) { | |
216ba023 | 851 | tty->hw_stopped = 1; |
1c45607a JS |
852 | if (port->type != PORT_16550A && |
853 | !port->board->chip_flag) { | |
854 | port->IER &= ~UART_IER_THRI; | |
855 | outb(port->IER, port->ioaddr + | |
856 | UART_IER); | |
857 | } | |
858 | } | |
859 | } | |
1da177e4 LT |
860 | } |
861 | } | |
862 | ||
6769140d | 863 | static int mxser_activate(struct tty_port *port, struct tty_struct *tty) |
1da177e4 | 864 | { |
6769140d | 865 | struct mxser_port *info = container_of(port, struct mxser_port, port); |
1c45607a JS |
866 | unsigned long page; |
867 | unsigned long flags; | |
1da177e4 | 868 | |
1c45607a JS |
869 | page = __get_free_page(GFP_KERNEL); |
870 | if (!page) | |
871 | return -ENOMEM; | |
1da177e4 | 872 | |
1c45607a | 873 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 874 | |
1c45607a | 875 | if (!info->ioaddr || !info->type) { |
216ba023 | 876 | set_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a JS |
877 | free_page(page); |
878 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 879 | return 0; |
1c45607a | 880 | } |
6769140d | 881 | info->port.xmit_buf = (unsigned char *) page; |
1da177e4 | 882 | |
1da177e4 | 883 | /* |
1c45607a JS |
884 | * Clear the FIFO buffers and disable them |
885 | * (they will be reenabled in mxser_change_speed()) | |
1da177e4 | 886 | */ |
1c45607a JS |
887 | if (info->board->chip_flag) |
888 | outb((UART_FCR_CLEAR_RCVR | | |
889 | UART_FCR_CLEAR_XMIT | | |
890 | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); | |
891 | else | |
892 | outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
893 | info->ioaddr + UART_FCR); | |
1da177e4 | 894 | |
1c45607a JS |
895 | /* |
896 | * At this point there's no way the LSR could still be 0xFF; | |
897 | * if it is, then bail out, because there's likely no UART | |
898 | * here. | |
899 | */ | |
900 | if (inb(info->ioaddr + UART_LSR) == 0xff) { | |
901 | spin_unlock_irqrestore(&info->slock, flags); | |
902 | if (capable(CAP_SYS_ADMIN)) { | |
f43a510d | 903 | set_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a JS |
904 | return 0; |
905 | } else | |
906 | return -ENODEV; | |
907 | } | |
1da177e4 | 908 | |
1c45607a JS |
909 | /* |
910 | * Clear the interrupt registers. | |
911 | */ | |
912 | (void) inb(info->ioaddr + UART_LSR); | |
913 | (void) inb(info->ioaddr + UART_RX); | |
914 | (void) inb(info->ioaddr + UART_IIR); | |
915 | (void) inb(info->ioaddr + UART_MSR); | |
916 | ||
917 | /* | |
918 | * Now, initialize the UART | |
919 | */ | |
920 | outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ | |
921 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | |
922 | outb(info->MCR, info->ioaddr + UART_MCR); | |
923 | ||
924 | /* | |
925 | * Finally, enable interrupts | |
926 | */ | |
927 | info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; | |
928 | ||
929 | if (info->board->chip_flag) | |
930 | info->IER |= MOXA_MUST_IER_EGDAI; | |
931 | outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ | |
932 | ||
933 | /* | |
934 | * And clear the interrupt registers again for luck. | |
935 | */ | |
936 | (void) inb(info->ioaddr + UART_LSR); | |
937 | (void) inb(info->ioaddr + UART_RX); | |
938 | (void) inb(info->ioaddr + UART_IIR); | |
939 | (void) inb(info->ioaddr + UART_MSR); | |
940 | ||
216ba023 | 941 | clear_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a JS |
942 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
943 | ||
944 | /* | |
945 | * and set the speed of the serial port | |
946 | */ | |
216ba023 | 947 | mxser_change_speed(tty, NULL); |
1c45607a JS |
948 | spin_unlock_irqrestore(&info->slock, flags); |
949 | ||
950 | return 0; | |
951 | } | |
952 | ||
953 | /* | |
6769140d | 954 | * This routine will shutdown a serial port |
1c45607a | 955 | */ |
6769140d | 956 | static void mxser_shutdown_port(struct tty_port *port) |
1c45607a | 957 | { |
6769140d | 958 | struct mxser_port *info = container_of(port, struct mxser_port, port); |
1c45607a JS |
959 | unsigned long flags; |
960 | ||
1c45607a JS |
961 | spin_lock_irqsave(&info->slock, flags); |
962 | ||
963 | /* | |
964 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | |
965 | * here so the queue might never be waken up | |
966 | */ | |
bdc04e31 | 967 | wake_up_interruptible(&info->port.delta_msr_wait); |
1c45607a JS |
968 | |
969 | /* | |
6769140d | 970 | * Free the xmit buffer, if necessary |
1c45607a | 971 | */ |
0ad9e7d1 AC |
972 | if (info->port.xmit_buf) { |
973 | free_page((unsigned long) info->port.xmit_buf); | |
974 | info->port.xmit_buf = NULL; | |
1da177e4 LT |
975 | } |
976 | ||
1c45607a JS |
977 | info->IER = 0; |
978 | outb(0x00, info->ioaddr + UART_IER); | |
979 | ||
1c45607a JS |
980 | /* clear Rx/Tx FIFO's */ |
981 | if (info->board->chip_flag) | |
982 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | | |
983 | MOXA_MUST_FCR_GDA_MODE_ENABLE, | |
984 | info->ioaddr + UART_FCR); | |
985 | else | |
986 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, | |
987 | info->ioaddr + UART_FCR); | |
988 | ||
989 | /* read data port to reset things */ | |
990 | (void) inb(info->ioaddr + UART_RX); | |
991 | ||
1c45607a JS |
992 | |
993 | if (info->board->chip_flag) | |
994 | SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
995 | ||
996 | spin_unlock_irqrestore(&info->slock, flags); | |
997 | } | |
998 | ||
999 | /* | |
1000 | * This routine is called whenever a serial port is opened. It | |
1001 | * enables interrupts for a serial port, linking in its async structure into | |
1002 | * the IRQ chain. It also performs the serial-specific | |
1003 | * initialization for the tty structure. | |
1004 | */ | |
1005 | static int mxser_open(struct tty_struct *tty, struct file *filp) | |
1006 | { | |
1007 | struct mxser_port *info; | |
6769140d | 1008 | int line; |
1c45607a JS |
1009 | |
1010 | line = tty->index; | |
1011 | if (line == MXSER_PORTS) | |
1012 | return 0; | |
1c45607a JS |
1013 | info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; |
1014 | if (!info->ioaddr) | |
1015 | return -ENODEV; | |
1016 | ||
a2d1e351 | 1017 | tty->driver_data = info; |
6769140d | 1018 | return tty_port_open(&info->port, tty, filp); |
1da177e4 LT |
1019 | } |
1020 | ||
978e595f AC |
1021 | static void mxser_flush_buffer(struct tty_struct *tty) |
1022 | { | |
1023 | struct mxser_port *info = tty->driver_data; | |
1024 | char fcr; | |
1025 | unsigned long flags; | |
1026 | ||
1027 | ||
1028 | spin_lock_irqsave(&info->slock, flags); | |
1029 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
1030 | ||
1031 | fcr = inb(info->ioaddr + UART_FCR); | |
1032 | outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
1033 | info->ioaddr + UART_FCR); | |
1034 | outb(fcr, info->ioaddr + UART_FCR); | |
1035 | ||
1036 | spin_unlock_irqrestore(&info->slock, flags); | |
1037 | ||
1038 | tty_wakeup(tty); | |
1039 | } | |
1040 | ||
1041 | ||
6769140d | 1042 | static void mxser_close_port(struct tty_port *port) |
1da177e4 | 1043 | { |
1e2b0254 | 1044 | struct mxser_port *info = container_of(port, struct mxser_port, port); |
1da177e4 | 1045 | unsigned long timeout; |
1da177e4 LT |
1046 | /* |
1047 | * At this point we stop accepting input. To do this, we | |
1048 | * disable the receive line status interrupts, and tell the | |
1049 | * interrupt driver to stop checking the data ready bit in the | |
1050 | * line status register. | |
1051 | */ | |
1052 | info->IER &= ~UART_IER_RLSI; | |
1c45607a | 1053 | if (info->board->chip_flag) |
1da177e4 | 1054 | info->IER &= ~MOXA_MUST_RECV_ISR; |
1c45607a | 1055 | |
6769140d AC |
1056 | outb(info->IER, info->ioaddr + UART_IER); |
1057 | /* | |
1058 | * Before we drop DTR, make sure the UART transmitter | |
1059 | * has completely drained; this is especially | |
1060 | * important if there is a transmit FIFO! | |
1061 | */ | |
1062 | timeout = jiffies + HZ; | |
1063 | while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { | |
1064 | schedule_timeout_interruptible(5); | |
1065 | if (time_after(jiffies, timeout)) | |
1066 | break; | |
1da177e4 | 1067 | } |
1e2b0254 AC |
1068 | } |
1069 | ||
1070 | /* | |
1071 | * This routine is called when the serial port gets closed. First, we | |
1072 | * wait for the last remaining data to be sent. Then, we unlink its | |
1073 | * async structure from the interrupt chain if necessary, and we free | |
1074 | * that IRQ if nothing is left in the chain. | |
1075 | */ | |
1076 | static void mxser_close(struct tty_struct *tty, struct file *filp) | |
1077 | { | |
1078 | struct mxser_port *info = tty->driver_data; | |
1079 | struct tty_port *port = &info->port; | |
1080 | ||
a2d1e351 | 1081 | if (tty->index == MXSER_PORTS || info == NULL) |
1e2b0254 AC |
1082 | return; |
1083 | if (tty_port_close_start(port, tty, filp) == 0) | |
1084 | return; | |
cd7b4b39 | 1085 | info->closing = 1; |
6769140d AC |
1086 | mutex_lock(&port->mutex); |
1087 | mxser_close_port(port); | |
1e2b0254 | 1088 | mxser_flush_buffer(tty); |
957dacae JH |
1089 | if (test_bit(ASYNCB_INITIALIZED, &port->flags)) { |
1090 | if (C_HUPCL(tty)) | |
1091 | tty_port_lower_dtr_rts(port); | |
1092 | } | |
6769140d AC |
1093 | mxser_shutdown_port(port); |
1094 | clear_bit(ASYNCB_INITIALIZED, &port->flags); | |
1095 | mutex_unlock(&port->mutex); | |
cd7b4b39 | 1096 | info->closing = 0; |
a6614999 AC |
1097 | /* Right now the tty_port set is done outside of the close_end helper |
1098 | as we don't yet have everyone using refcounts */ | |
1099 | tty_port_close_end(port, tty); | |
1100 | tty_port_tty_set(port, NULL); | |
1da177e4 LT |
1101 | } |
1102 | ||
1103 | static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
1104 | { | |
1105 | int c, total = 0; | |
1c45607a | 1106 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1107 | unsigned long flags; |
1108 | ||
0ad9e7d1 | 1109 | if (!info->port.xmit_buf) |
8ea2c2ec | 1110 | return 0; |
1da177e4 LT |
1111 | |
1112 | while (1) { | |
8ea2c2ec JJ |
1113 | c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, |
1114 | SERIAL_XMIT_SIZE - info->xmit_head)); | |
1da177e4 LT |
1115 | if (c <= 0) |
1116 | break; | |
1117 | ||
0ad9e7d1 | 1118 | memcpy(info->port.xmit_buf + info->xmit_head, buf, c); |
1da177e4 | 1119 | spin_lock_irqsave(&info->slock, flags); |
8ea2c2ec JJ |
1120 | info->xmit_head = (info->xmit_head + c) & |
1121 | (SERIAL_XMIT_SIZE - 1); | |
1da177e4 LT |
1122 | info->xmit_cnt += c; |
1123 | spin_unlock_irqrestore(&info->slock, flags); | |
1124 | ||
1125 | buf += c; | |
1126 | count -= c; | |
1127 | total += c; | |
1da177e4 LT |
1128 | } |
1129 | ||
1c45607a | 1130 | if (info->xmit_cnt && !tty->stopped) { |
8ea2c2ec JJ |
1131 | if (!tty->hw_stopped || |
1132 | (info->type == PORT_16550A) || | |
1c45607a | 1133 | (info->board->chip_flag)) { |
1da177e4 | 1134 | spin_lock_irqsave(&info->slock, flags); |
1c45607a JS |
1135 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + |
1136 | UART_IER); | |
1da177e4 | 1137 | info->IER |= UART_IER_THRI; |
1c45607a | 1138 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1139 | spin_unlock_irqrestore(&info->slock, flags); |
1140 | } | |
1141 | } | |
1142 | return total; | |
1143 | } | |
1144 | ||
0be2eade | 1145 | static int mxser_put_char(struct tty_struct *tty, unsigned char ch) |
1da177e4 | 1146 | { |
1c45607a | 1147 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1148 | unsigned long flags; |
1149 | ||
0ad9e7d1 | 1150 | if (!info->port.xmit_buf) |
0be2eade | 1151 | return 0; |
1da177e4 LT |
1152 | |
1153 | if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) | |
0be2eade | 1154 | return 0; |
1da177e4 LT |
1155 | |
1156 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1157 | info->port.xmit_buf[info->xmit_head++] = ch; |
1da177e4 LT |
1158 | info->xmit_head &= SERIAL_XMIT_SIZE - 1; |
1159 | info->xmit_cnt++; | |
1160 | spin_unlock_irqrestore(&info->slock, flags); | |
1c45607a | 1161 | if (!tty->stopped) { |
8ea2c2ec JJ |
1162 | if (!tty->hw_stopped || |
1163 | (info->type == PORT_16550A) || | |
1c45607a | 1164 | info->board->chip_flag) { |
1da177e4 | 1165 | spin_lock_irqsave(&info->slock, flags); |
1c45607a | 1166 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1167 | info->IER |= UART_IER_THRI; |
1c45607a | 1168 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1169 | spin_unlock_irqrestore(&info->slock, flags); |
1170 | } | |
1171 | } | |
0be2eade | 1172 | return 1; |
1da177e4 LT |
1173 | } |
1174 | ||
1175 | ||
1176 | static void mxser_flush_chars(struct tty_struct *tty) | |
1177 | { | |
1c45607a | 1178 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1179 | unsigned long flags; |
1180 | ||
ace7dd96 JS |
1181 | if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || |
1182 | (tty->hw_stopped && info->type != PORT_16550A && | |
1183 | !info->board->chip_flag)) | |
1da177e4 LT |
1184 | return; |
1185 | ||
1186 | spin_lock_irqsave(&info->slock, flags); | |
1187 | ||
1c45607a | 1188 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1189 | info->IER |= UART_IER_THRI; |
1c45607a | 1190 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1191 | |
1192 | spin_unlock_irqrestore(&info->slock, flags); | |
1193 | } | |
1194 | ||
1195 | static int mxser_write_room(struct tty_struct *tty) | |
1196 | { | |
1c45607a | 1197 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1198 | int ret; |
1199 | ||
1200 | ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; | |
ace7dd96 | 1201 | return ret < 0 ? 0 : ret; |
1da177e4 LT |
1202 | } |
1203 | ||
1204 | static int mxser_chars_in_buffer(struct tty_struct *tty) | |
1205 | { | |
1c45607a | 1206 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1207 | return info->xmit_cnt; |
1208 | } | |
1209 | ||
1c45607a JS |
1210 | /* |
1211 | * ------------------------------------------------------------ | |
1212 | * friends of mxser_ioctl() | |
1213 | * ------------------------------------------------------------ | |
1214 | */ | |
216ba023 | 1215 | static int mxser_get_serial_info(struct tty_struct *tty, |
1c45607a JS |
1216 | struct serial_struct __user *retinfo) |
1217 | { | |
216ba023 | 1218 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
1219 | struct serial_struct tmp = { |
1220 | .type = info->type, | |
216ba023 | 1221 | .line = tty->index, |
1c45607a JS |
1222 | .port = info->ioaddr, |
1223 | .irq = info->board->irq, | |
0ad9e7d1 | 1224 | .flags = info->port.flags, |
1c45607a | 1225 | .baud_base = info->baud_base, |
44b7d1b3 AC |
1226 | .close_delay = info->port.close_delay, |
1227 | .closing_wait = info->port.closing_wait, | |
1c45607a JS |
1228 | .custom_divisor = info->custom_divisor, |
1229 | .hub6 = 0 | |
1230 | }; | |
1231 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) | |
1232 | return -EFAULT; | |
1233 | return 0; | |
1234 | } | |
1235 | ||
216ba023 | 1236 | static int mxser_set_serial_info(struct tty_struct *tty, |
1c45607a | 1237 | struct serial_struct __user *new_info) |
1da177e4 | 1238 | { |
216ba023 | 1239 | struct mxser_port *info = tty->driver_data; |
07f86c03 | 1240 | struct tty_port *port = &info->port; |
1c45607a | 1241 | struct serial_struct new_serial; |
80ff8a80 | 1242 | speed_t baud; |
1c45607a JS |
1243 | unsigned long sl_flags; |
1244 | unsigned int flags; | |
1245 | int retval = 0; | |
1da177e4 | 1246 | |
1c45607a | 1247 | if (!new_info || !info->ioaddr) |
80ff8a80 | 1248 | return -ENODEV; |
1c45607a JS |
1249 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) |
1250 | return -EFAULT; | |
1da177e4 | 1251 | |
80ff8a80 JS |
1252 | if (new_serial.irq != info->board->irq || |
1253 | new_serial.port != info->ioaddr) | |
1254 | return -EINVAL; | |
1da177e4 | 1255 | |
07f86c03 | 1256 | flags = port->flags & ASYNC_SPD_MASK; |
1da177e4 | 1257 | |
1c45607a JS |
1258 | if (!capable(CAP_SYS_ADMIN)) { |
1259 | if ((new_serial.baud_base != info->baud_base) || | |
44b7d1b3 | 1260 | (new_serial.close_delay != info->port.close_delay) || |
0ad9e7d1 | 1261 | ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) |
1c45607a | 1262 | return -EPERM; |
0ad9e7d1 | 1263 | info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | |
1c45607a JS |
1264 | (new_serial.flags & ASYNC_USR_MASK)); |
1265 | } else { | |
1da177e4 | 1266 | /* |
1c45607a JS |
1267 | * OK, past this point, all the error checking has been done. |
1268 | * At this point, we start making changes..... | |
1da177e4 | 1269 | */ |
07f86c03 | 1270 | port->flags = ((port->flags & ~ASYNC_FLAGS) | |
1c45607a | 1271 | (new_serial.flags & ASYNC_FLAGS)); |
07f86c03 AC |
1272 | port->close_delay = new_serial.close_delay * HZ / 100; |
1273 | port->closing_wait = new_serial.closing_wait * HZ / 100; | |
d6c53c0e | 1274 | port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; |
07f86c03 | 1275 | if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && |
80ff8a80 JS |
1276 | (new_serial.baud_base != info->baud_base || |
1277 | new_serial.custom_divisor != | |
1278 | info->custom_divisor)) { | |
07f86c03 AC |
1279 | if (new_serial.custom_divisor == 0) |
1280 | return -EINVAL; | |
80ff8a80 | 1281 | baud = new_serial.baud_base / new_serial.custom_divisor; |
216ba023 | 1282 | tty_encode_baud_rate(tty, baud, baud); |
80ff8a80 | 1283 | } |
1c45607a | 1284 | } |
fc83815c | 1285 | |
1c45607a | 1286 | info->type = new_serial.type; |
1da177e4 | 1287 | |
1c45607a JS |
1288 | process_txrx_fifo(info); |
1289 | ||
07f86c03 AC |
1290 | if (test_bit(ASYNCB_INITIALIZED, &port->flags)) { |
1291 | if (flags != (port->flags & ASYNC_SPD_MASK)) { | |
1c45607a | 1292 | spin_lock_irqsave(&info->slock, sl_flags); |
216ba023 | 1293 | mxser_change_speed(tty, NULL); |
1c45607a | 1294 | spin_unlock_irqrestore(&info->slock, sl_flags); |
1da177e4 | 1295 | } |
6769140d | 1296 | } else { |
07f86c03 | 1297 | retval = mxser_activate(port, tty); |
6769140d | 1298 | if (retval == 0) |
07f86c03 | 1299 | set_bit(ASYNCB_INITIALIZED, &port->flags); |
6769140d | 1300 | } |
1c45607a JS |
1301 | return retval; |
1302 | } | |
1da177e4 | 1303 | |
1c45607a JS |
1304 | /* |
1305 | * mxser_get_lsr_info - get line status register info | |
1306 | * | |
1307 | * Purpose: Let user call ioctl() to get info when the UART physically | |
1308 | * is emptied. On bus types like RS485, the transmitter must | |
1309 | * release the bus after transmitting. This must be done when | |
1310 | * the transmit shift register is empty, not be done when the | |
1311 | * transmit holding register is empty. This functionality | |
1312 | * allows an RS485 driver to be written in user space. | |
1313 | */ | |
1314 | static int mxser_get_lsr_info(struct mxser_port *info, | |
1315 | unsigned int __user *value) | |
1316 | { | |
1317 | unsigned char status; | |
1318 | unsigned int result; | |
1319 | unsigned long flags; | |
1da177e4 | 1320 | |
1c45607a JS |
1321 | spin_lock_irqsave(&info->slock, flags); |
1322 | status = inb(info->ioaddr + UART_LSR); | |
1323 | spin_unlock_irqrestore(&info->slock, flags); | |
1324 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | |
1325 | return put_user(result, value); | |
1326 | } | |
1da177e4 | 1327 | |
60b33c13 | 1328 | static int mxser_tiocmget(struct tty_struct *tty) |
1c45607a JS |
1329 | { |
1330 | struct mxser_port *info = tty->driver_data; | |
1331 | unsigned char control, status; | |
1332 | unsigned long flags; | |
1da177e4 | 1333 | |
8ea2c2ec | 1334 | |
1c45607a JS |
1335 | if (tty->index == MXSER_PORTS) |
1336 | return -ENOIOCTLCMD; | |
1337 | if (test_bit(TTY_IO_ERROR, &tty->flags)) | |
1338 | return -EIO; | |
1da177e4 | 1339 | |
1c45607a | 1340 | control = info->MCR; |
1da177e4 | 1341 | |
1c45607a JS |
1342 | spin_lock_irqsave(&info->slock, flags); |
1343 | status = inb(info->ioaddr + UART_MSR); | |
1344 | if (status & UART_MSR_ANY_DELTA) | |
216ba023 | 1345 | mxser_check_modem_status(tty, info, status); |
1c45607a JS |
1346 | spin_unlock_irqrestore(&info->slock, flags); |
1347 | return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | | |
1348 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | | |
1349 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | | |
1350 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | | |
1351 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | | |
1352 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | |
1353 | } | |
1da177e4 | 1354 | |
20b9d177 | 1355 | static int mxser_tiocmset(struct tty_struct *tty, |
1c45607a JS |
1356 | unsigned int set, unsigned int clear) |
1357 | { | |
1358 | struct mxser_port *info = tty->driver_data; | |
1359 | unsigned long flags; | |
1da177e4 | 1360 | |
1da177e4 | 1361 | |
1c45607a JS |
1362 | if (tty->index == MXSER_PORTS) |
1363 | return -ENOIOCTLCMD; | |
1364 | if (test_bit(TTY_IO_ERROR, &tty->flags)) | |
1365 | return -EIO; | |
1da177e4 | 1366 | |
1c45607a | 1367 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 1368 | |
1c45607a JS |
1369 | if (set & TIOCM_RTS) |
1370 | info->MCR |= UART_MCR_RTS; | |
1371 | if (set & TIOCM_DTR) | |
1372 | info->MCR |= UART_MCR_DTR; | |
1da177e4 | 1373 | |
1c45607a JS |
1374 | if (clear & TIOCM_RTS) |
1375 | info->MCR &= ~UART_MCR_RTS; | |
1376 | if (clear & TIOCM_DTR) | |
1377 | info->MCR &= ~UART_MCR_DTR; | |
8ea2c2ec | 1378 | |
1c45607a JS |
1379 | outb(info->MCR, info->ioaddr + UART_MCR); |
1380 | spin_unlock_irqrestore(&info->slock, flags); | |
1381 | return 0; | |
1382 | } | |
1da177e4 | 1383 | |
1c45607a JS |
1384 | static int __init mxser_program_mode(int port) |
1385 | { | |
1386 | int id, i, j, n; | |
1387 | ||
1388 | outb(0, port); | |
1389 | outb(0, port); | |
1390 | outb(0, port); | |
1391 | (void)inb(port); | |
1392 | (void)inb(port); | |
1393 | outb(0, port); | |
1394 | (void)inb(port); | |
1395 | ||
1396 | id = inb(port + 1) & 0x1F; | |
1397 | if ((id != C168_ASIC_ID) && | |
1398 | (id != C104_ASIC_ID) && | |
1399 | (id != C102_ASIC_ID) && | |
1400 | (id != CI132_ASIC_ID) && | |
1401 | (id != CI134_ASIC_ID) && | |
1402 | (id != CI104J_ASIC_ID)) | |
1403 | return -1; | |
1404 | for (i = 0, j = 0; i < 4; i++) { | |
1405 | n = inb(port + 2); | |
1406 | if (n == 'M') { | |
1407 | j = 1; | |
1408 | } else if ((j == 1) && (n == 1)) { | |
1409 | j = 2; | |
1410 | break; | |
1411 | } else | |
1412 | j = 0; | |
1da177e4 | 1413 | } |
1c45607a JS |
1414 | if (j != 2) |
1415 | id = -2; | |
1416 | return id; | |
1da177e4 LT |
1417 | } |
1418 | ||
1c45607a JS |
1419 | static void __init mxser_normal_mode(int port) |
1420 | { | |
1421 | int i, n; | |
1422 | ||
1423 | outb(0xA5, port + 1); | |
1424 | outb(0x80, port + 3); | |
1425 | outb(12, port + 0); /* 9600 bps */ | |
1426 | outb(0, port + 1); | |
1427 | outb(0x03, port + 3); /* 8 data bits */ | |
1428 | outb(0x13, port + 4); /* loop back mode */ | |
1429 | for (i = 0; i < 16; i++) { | |
1430 | n = inb(port + 5); | |
1431 | if ((n & 0x61) == 0x60) | |
1432 | break; | |
1433 | if ((n & 1) == 1) | |
1434 | (void)inb(port); | |
1435 | } | |
1436 | outb(0x00, port + 4); | |
1437 | } | |
1438 | ||
1439 | #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ | |
1440 | #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ | |
1441 | #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ | |
1442 | #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ | |
1443 | #define EN_CCMD 0x000 /* Chip's command register */ | |
1444 | #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ | |
1445 | #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ | |
1446 | #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ | |
1447 | #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ | |
1448 | #define EN0_DCFG 0x00E /* Data configuration reg WR */ | |
1449 | #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ | |
1450 | #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ | |
1451 | #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ | |
1452 | static int __init mxser_read_register(int port, unsigned short *regs) | |
1453 | { | |
1454 | int i, k, value, id; | |
1455 | unsigned int j; | |
1456 | ||
1457 | id = mxser_program_mode(port); | |
1458 | if (id < 0) | |
1459 | return id; | |
1460 | for (i = 0; i < 14; i++) { | |
1461 | k = (i & 0x3F) | 0x180; | |
1462 | for (j = 0x100; j > 0; j >>= 1) { | |
1463 | outb(CHIP_CS, port); | |
1464 | if (k & j) { | |
1465 | outb(CHIP_CS | CHIP_DO, port); | |
1466 | outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ | |
1467 | } else { | |
1468 | outb(CHIP_CS, port); | |
1469 | outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ | |
1470 | } | |
1471 | } | |
1472 | (void)inb(port); | |
1473 | value = 0; | |
1474 | for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { | |
1475 | outb(CHIP_CS, port); | |
1476 | outb(CHIP_CS | CHIP_SK, port); | |
1477 | if (inb(port) & CHIP_DI) | |
1478 | value |= j; | |
1479 | } | |
1480 | regs[i] = value; | |
1481 | outb(0, port); | |
1482 | } | |
1483 | mxser_normal_mode(port); | |
1484 | return id; | |
1485 | } | |
1da177e4 LT |
1486 | |
1487 | static int mxser_ioctl_special(unsigned int cmd, void __user *argp) | |
1488 | { | |
07f86c03 AC |
1489 | struct mxser_port *ip; |
1490 | struct tty_port *port; | |
216ba023 | 1491 | struct tty_struct *tty; |
1c45607a JS |
1492 | int result, status; |
1493 | unsigned int i, j; | |
9d6d162d | 1494 | int ret = 0; |
1da177e4 LT |
1495 | |
1496 | switch (cmd) { | |
1da177e4 | 1497 | case MOXA_GET_MAJOR: |
5a3c6b25 | 1498 | printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl " |
8f3d137e JS |
1499 | "%x (GET_MAJOR), fix your userspace\n", |
1500 | current->comm, cmd); | |
1c45607a | 1501 | return put_user(ttymajor, (int __user *)argp); |
1da177e4 LT |
1502 | |
1503 | case MOXA_CHKPORTENABLE: | |
1504 | result = 0; | |
1c45607a JS |
1505 | for (i = 0; i < MXSER_BOARDS; i++) |
1506 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) | |
1507 | if (mxser_boards[i].ports[j].ioaddr) | |
1508 | result |= (1 << i); | |
8ea2c2ec | 1509 | return put_user(result, (unsigned long __user *)argp); |
1da177e4 | 1510 | case MOXA_GETDATACOUNT: |
07f86c03 AC |
1511 | /* The receive side is locked by port->slock but it isn't |
1512 | clear that an exact snapshot is worth copying here */ | |
1da177e4 | 1513 | if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) |
9d6d162d | 1514 | ret = -EFAULT; |
9d6d162d | 1515 | return ret; |
72800df9 JS |
1516 | case MOXA_GETMSTATUS: { |
1517 | struct mxser_mstatus ms, __user *msu = argp; | |
1c45607a JS |
1518 | for (i = 0; i < MXSER_BOARDS; i++) |
1519 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
07f86c03 AC |
1520 | ip = &mxser_boards[i].ports[j]; |
1521 | port = &ip->port; | |
72800df9 | 1522 | memset(&ms, 0, sizeof(ms)); |
1c45607a | 1523 | |
07f86c03 AC |
1524 | mutex_lock(&port->mutex); |
1525 | if (!ip->ioaddr) | |
72800df9 | 1526 | goto copy; |
216ba023 | 1527 | |
07f86c03 | 1528 | tty = tty_port_tty_get(port); |
1da177e4 | 1529 | |
adc8d746 | 1530 | if (!tty) |
07f86c03 | 1531 | ms.cflag = ip->normal_termios.c_cflag; |
1c45607a | 1532 | else |
adc8d746 | 1533 | ms.cflag = tty->termios.c_cflag; |
216ba023 | 1534 | tty_kref_put(tty); |
07f86c03 AC |
1535 | spin_lock_irq(&ip->slock); |
1536 | status = inb(ip->ioaddr + UART_MSR); | |
1537 | spin_unlock_irq(&ip->slock); | |
72800df9 JS |
1538 | if (status & UART_MSR_DCD) |
1539 | ms.dcd = 1; | |
1540 | if (status & UART_MSR_DSR) | |
1541 | ms.dsr = 1; | |
1542 | if (status & UART_MSR_CTS) | |
1543 | ms.cts = 1; | |
1544 | copy: | |
07f86c03 AC |
1545 | mutex_unlock(&port->mutex); |
1546 | if (copy_to_user(msu, &ms, sizeof(ms))) | |
72800df9 | 1547 | return -EFAULT; |
72800df9 | 1548 | msu++; |
1c45607a | 1549 | } |
1da177e4 | 1550 | return 0; |
72800df9 | 1551 | } |
8ea2c2ec | 1552 | case MOXA_ASPP_MON_EXT: { |
72800df9 JS |
1553 | struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ |
1554 | unsigned int cflag, iflag, p; | |
1555 | u8 opmode; | |
1556 | ||
1557 | me = kzalloc(sizeof(*me), GFP_KERNEL); | |
1558 | if (!me) | |
1559 | return -ENOMEM; | |
1c45607a | 1560 | |
72800df9 JS |
1561 | for (i = 0, p = 0; i < MXSER_BOARDS; i++) { |
1562 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { | |
1563 | if (p >= ARRAY_SIZE(me->rx_cnt)) { | |
1564 | i = MXSER_BOARDS; | |
1565 | break; | |
1566 | } | |
07f86c03 AC |
1567 | ip = &mxser_boards[i].ports[j]; |
1568 | port = &ip->port; | |
1569 | ||
1570 | mutex_lock(&port->mutex); | |
1571 | if (!ip->ioaddr) { | |
1572 | mutex_unlock(&port->mutex); | |
1da177e4 | 1573 | continue; |
07f86c03 | 1574 | } |
1da177e4 | 1575 | |
07f86c03 AC |
1576 | spin_lock_irq(&ip->slock); |
1577 | status = mxser_get_msr(ip->ioaddr, 0, p); | |
1c45607a | 1578 | |
1da177e4 | 1579 | if (status & UART_MSR_TERI) |
07f86c03 | 1580 | ip->icount.rng++; |
1da177e4 | 1581 | if (status & UART_MSR_DDSR) |
07f86c03 | 1582 | ip->icount.dsr++; |
1da177e4 | 1583 | if (status & UART_MSR_DDCD) |
07f86c03 | 1584 | ip->icount.dcd++; |
1da177e4 | 1585 | if (status & UART_MSR_DCTS) |
07f86c03 | 1586 | ip->icount.cts++; |
1c45607a | 1587 | |
07f86c03 AC |
1588 | ip->mon_data.modem_status = status; |
1589 | me->rx_cnt[p] = ip->mon_data.rxcnt; | |
1590 | me->tx_cnt[p] = ip->mon_data.txcnt; | |
1591 | me->up_rxcnt[p] = ip->mon_data.up_rxcnt; | |
1592 | me->up_txcnt[p] = ip->mon_data.up_txcnt; | |
72800df9 | 1593 | me->modem_status[p] = |
07f86c03 AC |
1594 | ip->mon_data.modem_status; |
1595 | spin_unlock_irq(&ip->slock); | |
1596 | ||
1597 | tty = tty_port_tty_get(&ip->port); | |
1c45607a | 1598 | |
adc8d746 | 1599 | if (!tty) { |
07f86c03 AC |
1600 | cflag = ip->normal_termios.c_cflag; |
1601 | iflag = ip->normal_termios.c_iflag; | |
1602 | me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios); | |
1da177e4 | 1603 | } else { |
adc8d746 AC |
1604 | cflag = tty->termios.c_cflag; |
1605 | iflag = tty->termios.c_iflag; | |
216ba023 | 1606 | me->baudrate[p] = tty_get_baud_rate(tty); |
1da177e4 | 1607 | } |
216ba023 | 1608 | tty_kref_put(tty); |
1da177e4 | 1609 | |
72800df9 JS |
1610 | me->databits[p] = cflag & CSIZE; |
1611 | me->stopbits[p] = cflag & CSTOPB; | |
1612 | me->parity[p] = cflag & (PARENB | PARODD | | |
1613 | CMSPAR); | |
1da177e4 LT |
1614 | |
1615 | if (cflag & CRTSCTS) | |
72800df9 | 1616 | me->flowctrl[p] |= 0x03; |
1da177e4 LT |
1617 | |
1618 | if (iflag & (IXON | IXOFF)) | |
72800df9 | 1619 | me->flowctrl[p] |= 0x0C; |
1da177e4 | 1620 | |
07f86c03 | 1621 | if (ip->type == PORT_16550A) |
72800df9 | 1622 | me->fifo[p] = 1; |
1da177e4 | 1623 | |
dfc7b837 MK |
1624 | if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) { |
1625 | opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2); | |
1626 | opmode &= OP_MODE_MASK; | |
1627 | } else { | |
1628 | opmode = RS232_MODE; | |
1629 | } | |
72800df9 | 1630 | me->iftype[p] = opmode; |
07f86c03 | 1631 | mutex_unlock(&port->mutex); |
1da177e4 | 1632 | } |
9d6d162d | 1633 | } |
72800df9 JS |
1634 | if (copy_to_user(argp, me, sizeof(*me))) |
1635 | ret = -EFAULT; | |
1636 | kfree(me); | |
1637 | return ret; | |
9d6d162d AC |
1638 | } |
1639 | default: | |
1da177e4 LT |
1640 | return -ENOIOCTLCMD; |
1641 | } | |
1642 | return 0; | |
1643 | } | |
1644 | ||
1c45607a JS |
1645 | static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, |
1646 | struct async_icount *cprev) | |
1da177e4 | 1647 | { |
1c45607a JS |
1648 | struct async_icount cnow; |
1649 | unsigned long flags; | |
1650 | int ret; | |
1da177e4 | 1651 | |
1c45607a JS |
1652 | spin_lock_irqsave(&info->slock, flags); |
1653 | cnow = info->icount; /* atomic copy */ | |
1654 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 1655 | |
1c45607a JS |
1656 | ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || |
1657 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || | |
1658 | ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || | |
1659 | ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); | |
1da177e4 | 1660 | |
1c45607a JS |
1661 | *cprev = cnow; |
1662 | ||
1663 | return ret; | |
1664 | } | |
1665 | ||
6caa76b7 | 1666 | static int mxser_ioctl(struct tty_struct *tty, |
1c45607a | 1667 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1668 | { |
1c45607a | 1669 | struct mxser_port *info = tty->driver_data; |
07f86c03 | 1670 | struct tty_port *port = &info->port; |
1c45607a | 1671 | struct async_icount cnow; |
1c45607a JS |
1672 | unsigned long flags; |
1673 | void __user *argp = (void __user *)arg; | |
1674 | int retval; | |
1da177e4 | 1675 | |
1c45607a JS |
1676 | if (tty->index == MXSER_PORTS) |
1677 | return mxser_ioctl_special(cmd, argp); | |
1da177e4 | 1678 | |
1c45607a JS |
1679 | if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { |
1680 | int p; | |
1681 | unsigned long opmode; | |
1682 | static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; | |
1683 | int shiftbit; | |
1684 | unsigned char val, mask; | |
1da177e4 | 1685 | |
e037f95f MK |
1686 | if (info->board->chip_flag != MOXA_MUST_MU860_HWID) |
1687 | return -EFAULT; | |
1688 | ||
1c45607a JS |
1689 | p = tty->index % 4; |
1690 | if (cmd == MOXA_SET_OP_MODE) { | |
1691 | if (get_user(opmode, (int __user *) argp)) | |
1692 | return -EFAULT; | |
1693 | if (opmode != RS232_MODE && | |
1694 | opmode != RS485_2WIRE_MODE && | |
1695 | opmode != RS422_MODE && | |
1696 | opmode != RS485_4WIRE_MODE) | |
1697 | return -EFAULT; | |
1698 | mask = ModeMask[p]; | |
1699 | shiftbit = p * 2; | |
07f86c03 | 1700 | spin_lock_irq(&info->slock); |
1c45607a JS |
1701 | val = inb(info->opmode_ioaddr); |
1702 | val &= mask; | |
1703 | val |= (opmode << shiftbit); | |
1704 | outb(val, info->opmode_ioaddr); | |
07f86c03 | 1705 | spin_unlock_irq(&info->slock); |
1c45607a JS |
1706 | } else { |
1707 | shiftbit = p * 2; | |
07f86c03 | 1708 | spin_lock_irq(&info->slock); |
1c45607a | 1709 | opmode = inb(info->opmode_ioaddr) >> shiftbit; |
07f86c03 | 1710 | spin_unlock_irq(&info->slock); |
1c45607a JS |
1711 | opmode &= OP_MODE_MASK; |
1712 | if (put_user(opmode, (int __user *)argp)) | |
1713 | return -EFAULT; | |
1714 | } | |
1715 | return 0; | |
1716 | } | |
1717 | ||
0587102c | 1718 | if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && |
1c45607a JS |
1719 | test_bit(TTY_IO_ERROR, &tty->flags)) |
1720 | return -EIO; | |
1721 | ||
1722 | switch (cmd) { | |
1c45607a | 1723 | case TIOCGSERIAL: |
07f86c03 | 1724 | mutex_lock(&port->mutex); |
216ba023 | 1725 | retval = mxser_get_serial_info(tty, argp); |
07f86c03 | 1726 | mutex_unlock(&port->mutex); |
9d6d162d | 1727 | return retval; |
1c45607a | 1728 | case TIOCSSERIAL: |
07f86c03 | 1729 | mutex_lock(&port->mutex); |
216ba023 | 1730 | retval = mxser_set_serial_info(tty, argp); |
07f86c03 | 1731 | mutex_unlock(&port->mutex); |
9d6d162d | 1732 | return retval; |
1c45607a | 1733 | case TIOCSERGETLSR: /* Get line status register */ |
9d6d162d | 1734 | return mxser_get_lsr_info(info, argp); |
1c45607a JS |
1735 | /* |
1736 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | |
1737 | * - mask passed in arg for lines of interest | |
1738 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | |
1739 | * Caller should use TIOCGICOUNT to see which one it was | |
1740 | */ | |
1741 | case TIOCMIWAIT: | |
1742 | spin_lock_irqsave(&info->slock, flags); | |
1743 | cnow = info->icount; /* note the counters on entry */ | |
1744 | spin_unlock_irqrestore(&info->slock, flags); | |
1745 | ||
bdc04e31 | 1746 | return wait_event_interruptible(info->port.delta_msr_wait, |
1c45607a | 1747 | mxser_cflags_changed(info, arg, &cnow)); |
1c45607a JS |
1748 | case MOXA_HighSpeedOn: |
1749 | return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); | |
1750 | case MOXA_SDS_RSTICOUNTER: | |
07f86c03 | 1751 | spin_lock_irq(&info->slock); |
1c45607a JS |
1752 | info->mon_data.rxcnt = 0; |
1753 | info->mon_data.txcnt = 0; | |
07f86c03 | 1754 | spin_unlock_irq(&info->slock); |
1c45607a JS |
1755 | return 0; |
1756 | ||
1757 | case MOXA_ASPP_OQUEUE:{ | |
1758 | int len, lsr; | |
1759 | ||
1760 | len = mxser_chars_in_buffer(tty); | |
c6eb69ac | 1761 | spin_lock_irq(&info->slock); |
a75b7b68 | 1762 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; |
07f86c03 | 1763 | spin_unlock_irq(&info->slock); |
1c45607a JS |
1764 | len += (lsr ? 0 : 1); |
1765 | ||
1766 | return put_user(len, (int __user *)argp); | |
1767 | } | |
1768 | case MOXA_ASPP_MON: { | |
1769 | int mcr, status; | |
1770 | ||
c6eb69ac | 1771 | spin_lock_irq(&info->slock); |
1c45607a | 1772 | status = mxser_get_msr(info->ioaddr, 1, tty->index); |
216ba023 | 1773 | mxser_check_modem_status(tty, info, status); |
1c45607a JS |
1774 | |
1775 | mcr = inb(info->ioaddr + UART_MCR); | |
c6eb69ac | 1776 | spin_unlock_irq(&info->slock); |
07f86c03 | 1777 | |
1c45607a JS |
1778 | if (mcr & MOXA_MUST_MCR_XON_FLAG) |
1779 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; | |
1780 | else | |
1781 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; | |
1782 | ||
1783 | if (mcr & MOXA_MUST_MCR_TX_XON) | |
1784 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; | |
1785 | else | |
1786 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; | |
1787 | ||
216ba023 | 1788 | if (tty->hw_stopped) |
1c45607a JS |
1789 | info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; |
1790 | else | |
1791 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; | |
07f86c03 | 1792 | |
1c45607a JS |
1793 | if (copy_to_user(argp, &info->mon_data, |
1794 | sizeof(struct mxser_mon))) | |
1795 | return -EFAULT; | |
1796 | ||
1797 | return 0; | |
1798 | } | |
1799 | case MOXA_ASPP_LSTATUS: { | |
1800 | if (put_user(info->err_shadow, (unsigned char __user *)argp)) | |
1801 | return -EFAULT; | |
1802 | ||
1803 | info->err_shadow = 0; | |
1804 | return 0; | |
1805 | } | |
1806 | case MOXA_SET_BAUD_METHOD: { | |
1807 | int method; | |
1808 | ||
1809 | if (get_user(method, (int __user *)argp)) | |
1810 | return -EFAULT; | |
1811 | mxser_set_baud_method[tty->index] = method; | |
1812 | return put_user(method, (int __user *)argp); | |
1813 | } | |
1814 | default: | |
1815 | return -ENOIOCTLCMD; | |
1816 | } | |
1817 | return 0; | |
1818 | } | |
1819 | ||
0587102c AC |
1820 | /* |
1821 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | |
1822 | * Return: write counters to the user passed counter struct | |
1823 | * NB: both 1->0 and 0->1 transitions are counted except for | |
1824 | * RI where only 0->1 is counted. | |
1825 | */ | |
1826 | ||
1827 | static int mxser_get_icount(struct tty_struct *tty, | |
1828 | struct serial_icounter_struct *icount) | |
1829 | ||
1830 | { | |
1831 | struct mxser_port *info = tty->driver_data; | |
1832 | struct async_icount cnow; | |
1833 | unsigned long flags; | |
1834 | ||
1835 | spin_lock_irqsave(&info->slock, flags); | |
1836 | cnow = info->icount; | |
1837 | spin_unlock_irqrestore(&info->slock, flags); | |
1838 | ||
1839 | icount->frame = cnow.frame; | |
1840 | icount->brk = cnow.brk; | |
1841 | icount->overrun = cnow.overrun; | |
1842 | icount->buf_overrun = cnow.buf_overrun; | |
1843 | icount->parity = cnow.parity; | |
1844 | icount->rx = cnow.rx; | |
1845 | icount->tx = cnow.tx; | |
1846 | icount->cts = cnow.cts; | |
1847 | icount->dsr = cnow.dsr; | |
1848 | icount->rng = cnow.rng; | |
1849 | icount->dcd = cnow.dcd; | |
1850 | return 0; | |
1851 | } | |
1852 | ||
1c45607a JS |
1853 | static void mxser_stoprx(struct tty_struct *tty) |
1854 | { | |
1855 | struct mxser_port *info = tty->driver_data; | |
1856 | ||
1857 | info->ldisc_stop_rx = 1; | |
1858 | if (I_IXOFF(tty)) { | |
1859 | if (info->board->chip_flag) { | |
1860 | info->IER &= ~MOXA_MUST_RECV_ISR; | |
1861 | outb(info->IER, info->ioaddr + UART_IER); | |
1862 | } else { | |
1863 | info->x_char = STOP_CHAR(tty); | |
1864 | outb(0, info->ioaddr + UART_IER); | |
1865 | info->IER |= UART_IER_THRI; | |
1866 | outb(info->IER, info->ioaddr + UART_IER); | |
1da177e4 LT |
1867 | } |
1868 | } | |
1869 | ||
9db276f8 | 1870 | if (C_CRTSCTS(tty)) { |
1c45607a JS |
1871 | info->MCR &= ~UART_MCR_RTS; |
1872 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
1873 | } |
1874 | } | |
1875 | ||
1876 | /* | |
1877 | * This routine is called by the upper-layer tty layer to signal that | |
1878 | * incoming characters should be throttled. | |
1879 | */ | |
1880 | static void mxser_throttle(struct tty_struct *tty) | |
1881 | { | |
1da177e4 | 1882 | mxser_stoprx(tty); |
1da177e4 LT |
1883 | } |
1884 | ||
1885 | static void mxser_unthrottle(struct tty_struct *tty) | |
1886 | { | |
1c45607a | 1887 | struct mxser_port *info = tty->driver_data; |
1da177e4 | 1888 | |
1c45607a JS |
1889 | /* startrx */ |
1890 | info->ldisc_stop_rx = 0; | |
1891 | if (I_IXOFF(tty)) { | |
1892 | if (info->x_char) | |
1893 | info->x_char = 0; | |
1894 | else { | |
1895 | if (info->board->chip_flag) { | |
1896 | info->IER |= MOXA_MUST_RECV_ISR; | |
1897 | outb(info->IER, info->ioaddr + UART_IER); | |
1898 | } else { | |
1899 | info->x_char = START_CHAR(tty); | |
1900 | outb(0, info->ioaddr + UART_IER); | |
1901 | info->IER |= UART_IER_THRI; | |
1902 | outb(info->IER, info->ioaddr + UART_IER); | |
1903 | } | |
1da177e4 | 1904 | } |
1c45607a | 1905 | } |
1da177e4 | 1906 | |
9db276f8 | 1907 | if (C_CRTSCTS(tty)) { |
1c45607a JS |
1908 | info->MCR |= UART_MCR_RTS; |
1909 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
1910 | } |
1911 | } | |
1912 | ||
1913 | /* | |
1914 | * mxser_stop() and mxser_start() | |
1915 | * | |
1916 | * This routines are called before setting or resetting tty->stopped. | |
1917 | * They enable or disable transmitter interrupts, as necessary. | |
1918 | */ | |
1919 | static void mxser_stop(struct tty_struct *tty) | |
1920 | { | |
1c45607a | 1921 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1922 | unsigned long flags; |
1923 | ||
1924 | spin_lock_irqsave(&info->slock, flags); | |
1925 | if (info->IER & UART_IER_THRI) { | |
1926 | info->IER &= ~UART_IER_THRI; | |
1c45607a | 1927 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1928 | } |
1929 | spin_unlock_irqrestore(&info->slock, flags); | |
1930 | } | |
1931 | ||
1932 | static void mxser_start(struct tty_struct *tty) | |
1933 | { | |
1c45607a | 1934 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1935 | unsigned long flags; |
1936 | ||
1937 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1938 | if (info->xmit_cnt && info->port.xmit_buf) { |
1c45607a | 1939 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1940 | info->IER |= UART_IER_THRI; |
1c45607a | 1941 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1942 | } |
1943 | spin_unlock_irqrestore(&info->slock, flags); | |
1944 | } | |
1945 | ||
1c45607a JS |
1946 | static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) |
1947 | { | |
1948 | struct mxser_port *info = tty->driver_data; | |
1949 | unsigned long flags; | |
1950 | ||
1951 | spin_lock_irqsave(&info->slock, flags); | |
216ba023 | 1952 | mxser_change_speed(tty, old_termios); |
1c45607a JS |
1953 | spin_unlock_irqrestore(&info->slock, flags); |
1954 | ||
9db276f8 | 1955 | if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) { |
1c45607a JS |
1956 | tty->hw_stopped = 0; |
1957 | mxser_start(tty); | |
1958 | } | |
1959 | ||
1960 | /* Handle sw stopped */ | |
9db276f8 | 1961 | if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) { |
1c45607a JS |
1962 | tty->stopped = 0; |
1963 | ||
1964 | if (info->board->chip_flag) { | |
1965 | spin_lock_irqsave(&info->slock, flags); | |
148ff86b CH |
1966 | mxser_disable_must_rx_software_flow_control( |
1967 | info->ioaddr); | |
1c45607a JS |
1968 | spin_unlock_irqrestore(&info->slock, flags); |
1969 | } | |
1970 | ||
1971 | mxser_start(tty); | |
1972 | } | |
1973 | } | |
1974 | ||
1da177e4 LT |
1975 | /* |
1976 | * mxser_wait_until_sent() --- wait until the transmitter is empty | |
1977 | */ | |
1978 | static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) | |
1979 | { | |
1c45607a | 1980 | struct mxser_port *info = tty->driver_data; |
1da177e4 | 1981 | unsigned long orig_jiffies, char_time; |
07f86c03 | 1982 | unsigned long flags; |
1da177e4 LT |
1983 | int lsr; |
1984 | ||
1985 | if (info->type == PORT_UNKNOWN) | |
1986 | return; | |
1987 | ||
1988 | if (info->xmit_fifo_size == 0) | |
1989 | return; /* Just in case.... */ | |
1990 | ||
1991 | orig_jiffies = jiffies; | |
1992 | /* | |
1993 | * Set the check interval to be 1/5 of the estimated time to | |
1994 | * send a single character, and make it at least 1. The check | |
1995 | * interval should also be less than the timeout. | |
1996 | * | |
1997 | * Note: we have to use pretty tight timings here to satisfy | |
1998 | * the NIST-PCTS. | |
1999 | */ | |
2000 | char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; | |
2001 | char_time = char_time / 5; | |
2002 | if (char_time == 0) | |
2003 | char_time = 1; | |
2004 | if (timeout && timeout < char_time) | |
2005 | char_time = timeout; | |
2006 | /* | |
2007 | * If the transmitter hasn't cleared in twice the approximate | |
2008 | * amount of time to send the entire FIFO, it probably won't | |
2009 | * ever clear. This assumes the UART isn't doing flow | |
2010 | * control, which is currently the case. Hence, if it ever | |
2011 | * takes longer than info->timeout, this is probably due to a | |
2012 | * UART bug of some kind. So, we clamp the timeout parameter at | |
2013 | * 2*info->timeout. | |
2014 | */ | |
2015 | if (!timeout || timeout > 2 * info->timeout) | |
2016 | timeout = 2 * info->timeout; | |
8bab534b | 2017 | |
07f86c03 | 2018 | spin_lock_irqsave(&info->slock, flags); |
1c45607a | 2019 | while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { |
07f86c03 | 2020 | spin_unlock_irqrestore(&info->slock, flags); |
da4cd8df | 2021 | schedule_timeout_interruptible(char_time); |
07f86c03 | 2022 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 2023 | if (signal_pending(current)) |
1c45607a JS |
2024 | break; |
2025 | if (timeout && time_after(jiffies, orig_jiffies + timeout)) | |
2026 | break; | |
1da177e4 | 2027 | } |
07f86c03 | 2028 | spin_unlock_irqrestore(&info->slock, flags); |
1c45607a | 2029 | set_current_state(TASK_RUNNING); |
1c45607a | 2030 | } |
1da177e4 | 2031 | |
1c45607a JS |
2032 | /* |
2033 | * This routine is called by tty_hangup() when a hangup is signaled. | |
2034 | */ | |
2035 | static void mxser_hangup(struct tty_struct *tty) | |
2036 | { | |
2037 | struct mxser_port *info = tty->driver_data; | |
1da177e4 | 2038 | |
1c45607a | 2039 | mxser_flush_buffer(tty); |
3b6826b2 | 2040 | tty_port_hangup(&info->port); |
1da177e4 LT |
2041 | } |
2042 | ||
1c45607a JS |
2043 | /* |
2044 | * mxser_rs_break() --- routine which turns the break handling on or off | |
2045 | */ | |
9e98966c | 2046 | static int mxser_rs_break(struct tty_struct *tty, int break_state) |
1da177e4 | 2047 | { |
1c45607a | 2048 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2049 | unsigned long flags; |
2050 | ||
1c45607a JS |
2051 | spin_lock_irqsave(&info->slock, flags); |
2052 | if (break_state == -1) | |
2053 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
2054 | info->ioaddr + UART_LCR); | |
2055 | else | |
2056 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
2057 | info->ioaddr + UART_LCR); | |
2058 | spin_unlock_irqrestore(&info->slock, flags); | |
9e98966c | 2059 | return 0; |
1c45607a | 2060 | } |
1da177e4 | 2061 | |
216ba023 AC |
2062 | static void mxser_receive_chars(struct tty_struct *tty, |
2063 | struct mxser_port *port, int *status) | |
1c45607a | 2064 | { |
1c45607a JS |
2065 | unsigned char ch, gdl; |
2066 | int ignored = 0; | |
2067 | int cnt = 0; | |
2068 | int recv_room; | |
2069 | int max = 256; | |
1da177e4 | 2070 | |
1c45607a | 2071 | recv_room = tty->receive_room; |
216ba023 | 2072 | if (recv_room == 0 && !port->ldisc_stop_rx) |
1c45607a | 2073 | mxser_stoprx(tty); |
1c45607a | 2074 | if (port->board->chip_flag != MOXA_OTHER_UART) { |
1da177e4 | 2075 | |
1c45607a JS |
2076 | if (*status & UART_LSR_SPECIAL) |
2077 | goto intr_old; | |
2078 | if (port->board->chip_flag == MOXA_MUST_MU860_HWID && | |
2079 | (*status & MOXA_MUST_LSR_RERR)) | |
2080 | goto intr_old; | |
2081 | if (*status & MOXA_MUST_LSR_RERR) | |
2082 | goto intr_old; | |
1da177e4 | 2083 | |
1c45607a JS |
2084 | gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); |
2085 | ||
2086 | if (port->board->chip_flag == MOXA_MUST_MU150_HWID) | |
2087 | gdl &= MOXA_MUST_GDL_MASK; | |
2088 | if (gdl >= recv_room) { | |
2089 | if (!port->ldisc_stop_rx) | |
2090 | mxser_stoprx(tty); | |
2091 | } | |
2092 | while (gdl--) { | |
2093 | ch = inb(port->ioaddr + UART_RX); | |
92a19f9c | 2094 | tty_insert_flip_char(&port->port, ch, 0); |
1c45607a JS |
2095 | cnt++; |
2096 | } | |
2097 | goto end_intr; | |
1da177e4 | 2098 | } |
1c45607a JS |
2099 | intr_old: |
2100 | ||
2101 | do { | |
2102 | if (max-- < 0) | |
2103 | break; | |
1da177e4 | 2104 | |
1c45607a JS |
2105 | ch = inb(port->ioaddr + UART_RX); |
2106 | if (port->board->chip_flag && (*status & UART_LSR_OE)) | |
2107 | outb(0x23, port->ioaddr + UART_FCR); | |
2108 | *status &= port->read_status_mask; | |
2109 | if (*status & port->ignore_status_mask) { | |
2110 | if (++ignored > 100) | |
2111 | break; | |
2112 | } else { | |
2113 | char flag = 0; | |
2114 | if (*status & UART_LSR_SPECIAL) { | |
2115 | if (*status & UART_LSR_BI) { | |
2116 | flag = TTY_BREAK; | |
2117 | port->icount.brk++; | |
1da177e4 | 2118 | |
0ad9e7d1 | 2119 | if (port->port.flags & ASYNC_SAK) |
1c45607a JS |
2120 | do_SAK(tty); |
2121 | } else if (*status & UART_LSR_PE) { | |
2122 | flag = TTY_PARITY; | |
2123 | port->icount.parity++; | |
2124 | } else if (*status & UART_LSR_FE) { | |
2125 | flag = TTY_FRAME; | |
2126 | port->icount.frame++; | |
2127 | } else if (*status & UART_LSR_OE) { | |
2128 | flag = TTY_OVERRUN; | |
2129 | port->icount.overrun++; | |
2130 | } else | |
2131 | flag = TTY_BREAK; | |
2132 | } | |
92a19f9c | 2133 | tty_insert_flip_char(&port->port, ch, flag); |
1c45607a JS |
2134 | cnt++; |
2135 | if (cnt >= recv_room) { | |
2136 | if (!port->ldisc_stop_rx) | |
2137 | mxser_stoprx(tty); | |
2138 | break; | |
2139 | } | |
1da177e4 | 2140 | |
1c45607a | 2141 | } |
1da177e4 | 2142 | |
1c45607a JS |
2143 | if (port->board->chip_flag) |
2144 | break; | |
1da177e4 | 2145 | |
1c45607a JS |
2146 | *status = inb(port->ioaddr + UART_LSR); |
2147 | } while (*status & UART_LSR_DR); | |
1da177e4 | 2148 | |
1c45607a | 2149 | end_intr: |
216ba023 | 2150 | mxvar_log.rxcnt[tty->index] += cnt; |
1c45607a JS |
2151 | port->mon_data.rxcnt += cnt; |
2152 | port->mon_data.up_rxcnt += cnt; | |
1da177e4 | 2153 | |
1c45607a JS |
2154 | /* |
2155 | * We are called from an interrupt context with &port->slock | |
2156 | * being held. Drop it temporarily in order to prevent | |
2157 | * recursive locking. | |
2158 | */ | |
2159 | spin_unlock(&port->slock); | |
2e124b4a | 2160 | tty_flip_buffer_push(&port->port); |
1c45607a | 2161 | spin_lock(&port->slock); |
1da177e4 LT |
2162 | } |
2163 | ||
216ba023 | 2164 | static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) |
1da177e4 | 2165 | { |
1c45607a | 2166 | int count, cnt; |
1da177e4 | 2167 | |
1c45607a JS |
2168 | if (port->x_char) { |
2169 | outb(port->x_char, port->ioaddr + UART_TX); | |
2170 | port->x_char = 0; | |
216ba023 | 2171 | mxvar_log.txcnt[tty->index]++; |
1c45607a JS |
2172 | port->mon_data.txcnt++; |
2173 | port->mon_data.up_txcnt++; | |
2174 | port->icount.tx++; | |
2175 | return; | |
2176 | } | |
1da177e4 | 2177 | |
0ad9e7d1 | 2178 | if (port->port.xmit_buf == NULL) |
1c45607a | 2179 | return; |
1da177e4 | 2180 | |
216ba023 AC |
2181 | if (port->xmit_cnt <= 0 || tty->stopped || |
2182 | (tty->hw_stopped && | |
1c45607a JS |
2183 | (port->type != PORT_16550A) && |
2184 | (!port->board->chip_flag))) { | |
2185 | port->IER &= ~UART_IER_THRI; | |
2186 | outb(port->IER, port->ioaddr + UART_IER); | |
2187 | return; | |
1da177e4 LT |
2188 | } |
2189 | ||
1c45607a JS |
2190 | cnt = port->xmit_cnt; |
2191 | count = port->xmit_fifo_size; | |
2192 | do { | |
0ad9e7d1 | 2193 | outb(port->port.xmit_buf[port->xmit_tail++], |
1c45607a JS |
2194 | port->ioaddr + UART_TX); |
2195 | port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); | |
2196 | if (--port->xmit_cnt <= 0) | |
2197 | break; | |
2198 | } while (--count > 0); | |
216ba023 | 2199 | mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); |
1da177e4 | 2200 | |
1c45607a JS |
2201 | port->mon_data.txcnt += (cnt - port->xmit_cnt); |
2202 | port->mon_data.up_txcnt += (cnt - port->xmit_cnt); | |
2203 | port->icount.tx += (cnt - port->xmit_cnt); | |
1da177e4 | 2204 | |
464eb8f5 | 2205 | if (port->xmit_cnt < WAKEUP_CHARS) |
216ba023 | 2206 | tty_wakeup(tty); |
1c45607a JS |
2207 | |
2208 | if (port->xmit_cnt <= 0) { | |
2209 | port->IER &= ~UART_IER_THRI; | |
2210 | outb(port->IER, port->ioaddr + UART_IER); | |
1da177e4 | 2211 | } |
1da177e4 LT |
2212 | } |
2213 | ||
2214 | /* | |
1c45607a | 2215 | * This is the serial driver's generic interrupt routine |
1da177e4 | 2216 | */ |
1c45607a | 2217 | static irqreturn_t mxser_interrupt(int irq, void *dev_id) |
1da177e4 | 2218 | { |
1c45607a JS |
2219 | int status, iir, i; |
2220 | struct mxser_board *brd = NULL; | |
2221 | struct mxser_port *port; | |
2222 | int max, irqbits, bits, msr; | |
2223 | unsigned int int_cnt, pass_counter = 0; | |
2224 | int handled = IRQ_NONE; | |
216ba023 | 2225 | struct tty_struct *tty; |
1da177e4 | 2226 | |
1c45607a JS |
2227 | for (i = 0; i < MXSER_BOARDS; i++) |
2228 | if (dev_id == &mxser_boards[i]) { | |
2229 | brd = dev_id; | |
2230 | break; | |
2231 | } | |
1da177e4 | 2232 | |
1c45607a JS |
2233 | if (i == MXSER_BOARDS) |
2234 | goto irq_stop; | |
2235 | if (brd == NULL) | |
2236 | goto irq_stop; | |
2237 | max = brd->info->nports; | |
2238 | while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { | |
2239 | irqbits = inb(brd->vector) & brd->vector_mask; | |
2240 | if (irqbits == brd->vector_mask) | |
2241 | break; | |
1da177e4 | 2242 | |
1c45607a JS |
2243 | handled = IRQ_HANDLED; |
2244 | for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { | |
2245 | if (irqbits == brd->vector_mask) | |
2246 | break; | |
2247 | if (bits & irqbits) | |
2248 | continue; | |
2249 | port = &brd->ports[i]; | |
2250 | ||
2251 | int_cnt = 0; | |
2252 | spin_lock(&port->slock); | |
2253 | do { | |
2254 | iir = inb(port->ioaddr + UART_IIR); | |
2255 | if (iir & UART_IIR_NO_INT) | |
2256 | break; | |
2257 | iir &= MOXA_MUST_IIR_MASK; | |
216ba023 | 2258 | tty = tty_port_tty_get(&port->port); |
cd7b4b39 PH |
2259 | if (!tty || port->closing || |
2260 | !(port->port.flags & ASYNC_INITIALIZED)) { | |
1c45607a JS |
2261 | status = inb(port->ioaddr + UART_LSR); |
2262 | outb(0x27, port->ioaddr + UART_FCR); | |
2263 | inb(port->ioaddr + UART_MSR); | |
216ba023 | 2264 | tty_kref_put(tty); |
1c45607a JS |
2265 | break; |
2266 | } | |
1da177e4 | 2267 | |
1c45607a JS |
2268 | status = inb(port->ioaddr + UART_LSR); |
2269 | ||
2270 | if (status & UART_LSR_PE) | |
2271 | port->err_shadow |= NPPI_NOTIFY_PARITY; | |
2272 | if (status & UART_LSR_FE) | |
2273 | port->err_shadow |= NPPI_NOTIFY_FRAMING; | |
2274 | if (status & UART_LSR_OE) | |
2275 | port->err_shadow |= | |
2276 | NPPI_NOTIFY_HW_OVERRUN; | |
2277 | if (status & UART_LSR_BI) | |
2278 | port->err_shadow |= NPPI_NOTIFY_BREAK; | |
2279 | ||
2280 | if (port->board->chip_flag) { | |
2281 | if (iir == MOXA_MUST_IIR_GDA || | |
2282 | iir == MOXA_MUST_IIR_RDA || | |
2283 | iir == MOXA_MUST_IIR_RTO || | |
2284 | iir == MOXA_MUST_IIR_LSR) | |
216ba023 | 2285 | mxser_receive_chars(tty, port, |
1c45607a JS |
2286 | &status); |
2287 | ||
2288 | } else { | |
2289 | status &= port->read_status_mask; | |
2290 | if (status & UART_LSR_DR) | |
216ba023 | 2291 | mxser_receive_chars(tty, port, |
1c45607a JS |
2292 | &status); |
2293 | } | |
2294 | msr = inb(port->ioaddr + UART_MSR); | |
2295 | if (msr & UART_MSR_ANY_DELTA) | |
216ba023 | 2296 | mxser_check_modem_status(tty, port, msr); |
1c45607a JS |
2297 | |
2298 | if (port->board->chip_flag) { | |
2299 | if (iir == 0x02 && (status & | |
2300 | UART_LSR_THRE)) | |
216ba023 | 2301 | mxser_transmit_chars(tty, port); |
1c45607a JS |
2302 | } else { |
2303 | if (status & UART_LSR_THRE) | |
216ba023 | 2304 | mxser_transmit_chars(tty, port); |
1c45607a | 2305 | } |
216ba023 | 2306 | tty_kref_put(tty); |
1c45607a JS |
2307 | } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); |
2308 | spin_unlock(&port->slock); | |
2309 | } | |
2310 | } | |
1da177e4 | 2311 | |
1c45607a JS |
2312 | irq_stop: |
2313 | return handled; | |
2314 | } | |
1da177e4 | 2315 | |
1c45607a JS |
2316 | static const struct tty_operations mxser_ops = { |
2317 | .open = mxser_open, | |
2318 | .close = mxser_close, | |
2319 | .write = mxser_write, | |
2320 | .put_char = mxser_put_char, | |
2321 | .flush_chars = mxser_flush_chars, | |
2322 | .write_room = mxser_write_room, | |
2323 | .chars_in_buffer = mxser_chars_in_buffer, | |
2324 | .flush_buffer = mxser_flush_buffer, | |
2325 | .ioctl = mxser_ioctl, | |
2326 | .throttle = mxser_throttle, | |
2327 | .unthrottle = mxser_unthrottle, | |
2328 | .set_termios = mxser_set_termios, | |
2329 | .stop = mxser_stop, | |
2330 | .start = mxser_start, | |
2331 | .hangup = mxser_hangup, | |
2332 | .break_ctl = mxser_rs_break, | |
2333 | .wait_until_sent = mxser_wait_until_sent, | |
2334 | .tiocmget = mxser_tiocmget, | |
2335 | .tiocmset = mxser_tiocmset, | |
0587102c | 2336 | .get_icount = mxser_get_icount, |
1c45607a | 2337 | }; |
1da177e4 | 2338 | |
04b757df | 2339 | static const struct tty_port_operations mxser_port_ops = { |
31f35939 | 2340 | .carrier_raised = mxser_carrier_raised, |
fcc8ac18 | 2341 | .dtr_rts = mxser_dtr_rts, |
6769140d AC |
2342 | .activate = mxser_activate, |
2343 | .shutdown = mxser_shutdown_port, | |
31f35939 AC |
2344 | }; |
2345 | ||
1c45607a JS |
2346 | /* |
2347 | * The MOXA Smartio/Industio serial driver boot-time initialization code! | |
2348 | */ | |
1da177e4 | 2349 | |
38daf88a | 2350 | static bool allow_overlapping_vector; |
a342ca1c | 2351 | module_param(allow_overlapping_vector, bool, S_IRUGO); |
38daf88a JS |
2352 | MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)"); |
2353 | ||
2354 | static bool mxser_overlapping_vector(struct mxser_board *brd) | |
2355 | { | |
2356 | return allow_overlapping_vector && | |
2357 | brd->vector >= brd->ports[0].ioaddr && | |
2358 | brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports; | |
2359 | } | |
2360 | ||
2361 | static int mxser_request_vector(struct mxser_board *brd) | |
2362 | { | |
2363 | if (mxser_overlapping_vector(brd)) | |
2364 | return 0; | |
2365 | return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO; | |
2366 | } | |
2367 | ||
2368 | static void mxser_release_vector(struct mxser_board *brd) | |
2369 | { | |
2370 | if (mxser_overlapping_vector(brd)) | |
2371 | return; | |
2372 | release_region(brd->vector, 1); | |
2373 | } | |
2374 | ||
df480518 | 2375 | static void mxser_release_ISA_res(struct mxser_board *brd) |
1c45607a | 2376 | { |
df480518 | 2377 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); |
38daf88a | 2378 | mxser_release_vector(brd); |
1da177e4 LT |
2379 | } |
2380 | ||
9671f099 | 2381 | static int mxser_initbrd(struct mxser_board *brd, |
1c45607a | 2382 | struct pci_dev *pdev) |
1da177e4 | 2383 | { |
1c45607a JS |
2384 | struct mxser_port *info; |
2385 | unsigned int i; | |
2386 | int retval; | |
1da177e4 | 2387 | |
83766bc6 JS |
2388 | printk(KERN_INFO "mxser: max. baud rate = %d bps\n", |
2389 | brd->ports[0].max_baud); | |
1da177e4 | 2390 | |
1c45607a JS |
2391 | for (i = 0; i < brd->info->nports; i++) { |
2392 | info = &brd->ports[i]; | |
44b7d1b3 | 2393 | tty_port_init(&info->port); |
31f35939 | 2394 | info->port.ops = &mxser_port_ops; |
1c45607a JS |
2395 | info->board = brd; |
2396 | info->stop_rx = 0; | |
2397 | info->ldisc_stop_rx = 0; | |
1da177e4 | 2398 | |
1c45607a JS |
2399 | /* Enhance mode enabled here */ |
2400 | if (brd->chip_flag != MOXA_OTHER_UART) | |
148ff86b | 2401 | mxser_enable_must_enchance_mode(info->ioaddr); |
1da177e4 | 2402 | |
0ad9e7d1 | 2403 | info->port.flags = ASYNC_SHARE_IRQ; |
1c45607a | 2404 | info->type = brd->uart_type; |
1da177e4 | 2405 | |
1c45607a | 2406 | process_txrx_fifo(info); |
1da177e4 | 2407 | |
1c45607a | 2408 | info->custom_divisor = info->baud_base * 16; |
44b7d1b3 AC |
2409 | info->port.close_delay = 5 * HZ / 10; |
2410 | info->port.closing_wait = 30 * HZ; | |
1c45607a | 2411 | info->normal_termios = mxvar_sdriver->init_termios; |
1c45607a JS |
2412 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); |
2413 | info->err_shadow = 0; | |
2414 | spin_lock_init(&info->slock); | |
1da177e4 | 2415 | |
1c45607a JS |
2416 | /* before set INT ISR, disable all int */ |
2417 | outb(inb(info->ioaddr + UART_IER) & 0xf0, | |
2418 | info->ioaddr + UART_IER); | |
2419 | } | |
1da177e4 | 2420 | |
1c45607a JS |
2421 | retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", |
2422 | brd); | |
191c5f10 JS |
2423 | if (retval) { |
2424 | for (i = 0; i < brd->info->nports; i++) | |
2425 | tty_port_destroy(&brd->ports[i].port); | |
1c45607a JS |
2426 | printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " |
2427 | "conflict with another device.\n", | |
2428 | brd->info->name, brd->irq); | |
191c5f10 | 2429 | } |
df480518 | 2430 | |
1c45607a JS |
2431 | return retval; |
2432 | } | |
1da177e4 | 2433 | |
191c5f10 JS |
2434 | static void mxser_board_remove(struct mxser_board *brd) |
2435 | { | |
2436 | unsigned int i; | |
2437 | ||
2438 | for (i = 0; i < brd->info->nports; i++) { | |
2439 | tty_unregister_device(mxvar_sdriver, brd->idx + i); | |
2440 | tty_port_destroy(&brd->ports[i].port); | |
2441 | } | |
9e17df37 | 2442 | free_irq(brd->irq, brd); |
191c5f10 JS |
2443 | } |
2444 | ||
1c45607a | 2445 | static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) |
1da177e4 | 2446 | { |
38daf88a | 2447 | int id, i, bits, ret; |
1da177e4 LT |
2448 | unsigned short regs[16], irq; |
2449 | unsigned char scratch, scratch2; | |
2450 | ||
1c45607a | 2451 | brd->chip_flag = MOXA_OTHER_UART; |
1da177e4 LT |
2452 | |
2453 | id = mxser_read_register(cap, regs); | |
1c45607a JS |
2454 | switch (id) { |
2455 | case C168_ASIC_ID: | |
2456 | brd->info = &mxser_cards[0]; | |
2457 | break; | |
2458 | case C104_ASIC_ID: | |
2459 | brd->info = &mxser_cards[1]; | |
2460 | break; | |
2461 | case CI104J_ASIC_ID: | |
2462 | brd->info = &mxser_cards[2]; | |
2463 | break; | |
2464 | case C102_ASIC_ID: | |
2465 | brd->info = &mxser_cards[5]; | |
2466 | break; | |
2467 | case CI132_ASIC_ID: | |
2468 | brd->info = &mxser_cards[6]; | |
2469 | break; | |
2470 | case CI134_ASIC_ID: | |
2471 | brd->info = &mxser_cards[7]; | |
2472 | break; | |
2473 | default: | |
8ea2c2ec | 2474 | return 0; |
1c45607a | 2475 | } |
1da177e4 LT |
2476 | |
2477 | irq = 0; | |
1c45607a JS |
2478 | /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) |
2479 | Flag-hack checks if configuration should be read as 2-port here. */ | |
2480 | if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { | |
1da177e4 LT |
2481 | irq = regs[9] & 0xF000; |
2482 | irq = irq | (irq >> 4); | |
2483 | if (irq != (regs[9] & 0xFF00)) | |
83766bc6 | 2484 | goto err_irqconflict; |
1c45607a | 2485 | } else if (brd->info->nports == 4) { |
1da177e4 LT |
2486 | irq = regs[9] & 0xF000; |
2487 | irq = irq | (irq >> 4); | |
2488 | irq = irq | (irq >> 8); | |
2489 | if (irq != regs[9]) | |
83766bc6 | 2490 | goto err_irqconflict; |
1c45607a | 2491 | } else if (brd->info->nports == 8) { |
1da177e4 LT |
2492 | irq = regs[9] & 0xF000; |
2493 | irq = irq | (irq >> 4); | |
2494 | irq = irq | (irq >> 8); | |
2495 | if ((irq != regs[9]) || (irq != regs[10])) | |
83766bc6 | 2496 | goto err_irqconflict; |
1da177e4 LT |
2497 | } |
2498 | ||
83766bc6 JS |
2499 | if (!irq) { |
2500 | printk(KERN_ERR "mxser: interrupt number unset\n"); | |
2501 | return -EIO; | |
2502 | } | |
1c45607a | 2503 | brd->irq = ((int)(irq & 0xF000) >> 12); |
1da177e4 | 2504 | for (i = 0; i < 8; i++) |
1c45607a | 2505 | brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; |
83766bc6 JS |
2506 | if ((regs[12] & 0x80) == 0) { |
2507 | printk(KERN_ERR "mxser: invalid interrupt vector\n"); | |
2508 | return -EIO; | |
2509 | } | |
1c45607a | 2510 | brd->vector = (int)regs[11]; /* interrupt vector */ |
1da177e4 | 2511 | if (id == 1) |
1c45607a | 2512 | brd->vector_mask = 0x00FF; |
1da177e4 | 2513 | else |
1c45607a | 2514 | brd->vector_mask = 0x000F; |
1da177e4 LT |
2515 | for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { |
2516 | if (regs[12] & bits) { | |
1c45607a JS |
2517 | brd->ports[i].baud_base = 921600; |
2518 | brd->ports[i].max_baud = 921600; | |
1da177e4 | 2519 | } else { |
1c45607a JS |
2520 | brd->ports[i].baud_base = 115200; |
2521 | brd->ports[i].max_baud = 115200; | |
1da177e4 LT |
2522 | } |
2523 | } | |
2524 | scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); | |
2525 | outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); | |
2526 | outb(0, cap + UART_EFR); /* EFR is the same as FCR */ | |
2527 | outb(scratch2, cap + UART_LCR); | |
2528 | outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); | |
2529 | scratch = inb(cap + UART_IIR); | |
2530 | ||
2531 | if (scratch & 0xC0) | |
1c45607a | 2532 | brd->uart_type = PORT_16550A; |
1da177e4 | 2533 | else |
1c45607a JS |
2534 | brd->uart_type = PORT_16450; |
2535 | if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, | |
83766bc6 JS |
2536 | "mxser(IO)")) { |
2537 | printk(KERN_ERR "mxser: can't request ports I/O region: " | |
2538 | "0x%.8lx-0x%.8lx\n", | |
2539 | brd->ports[0].ioaddr, brd->ports[0].ioaddr + | |
2540 | 8 * brd->info->nports - 1); | |
2541 | return -EIO; | |
2542 | } | |
38daf88a JS |
2543 | |
2544 | ret = mxser_request_vector(brd); | |
2545 | if (ret) { | |
1c45607a | 2546 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); |
83766bc6 JS |
2547 | printk(KERN_ERR "mxser: can't request interrupt vector region: " |
2548 | "0x%.8lx-0x%.8lx\n", | |
2549 | brd->ports[0].ioaddr, brd->ports[0].ioaddr + | |
2550 | 8 * brd->info->nports - 1); | |
38daf88a | 2551 | return ret; |
1c45607a JS |
2552 | } |
2553 | return brd->info->nports; | |
83766bc6 JS |
2554 | |
2555 | err_irqconflict: | |
2556 | printk(KERN_ERR "mxser: invalid interrupt number\n"); | |
2557 | return -EIO; | |
1da177e4 LT |
2558 | } |
2559 | ||
9671f099 | 2560 | static int mxser_probe(struct pci_dev *pdev, |
1c45607a | 2561 | const struct pci_device_id *ent) |
1da177e4 | 2562 | { |
1c45607a JS |
2563 | #ifdef CONFIG_PCI |
2564 | struct mxser_board *brd; | |
2565 | unsigned int i, j; | |
2566 | unsigned long ioaddress; | |
9e17df37 | 2567 | struct device *tty_dev; |
1c45607a | 2568 | int retval = -EINVAL; |
1da177e4 | 2569 | |
1c45607a JS |
2570 | for (i = 0; i < MXSER_BOARDS; i++) |
2571 | if (mxser_boards[i].info == NULL) | |
2572 | break; | |
2573 | ||
2574 | if (i >= MXSER_BOARDS) { | |
83766bc6 JS |
2575 | dev_err(&pdev->dev, "too many boards found (maximum %d), board " |
2576 | "not configured\n", MXSER_BOARDS); | |
1c45607a JS |
2577 | goto err; |
2578 | } | |
2579 | ||
2580 | brd = &mxser_boards[i]; | |
2581 | brd->idx = i * MXSER_PORTS_PER_BOARD; | |
83766bc6 | 2582 | dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", |
1c45607a JS |
2583 | mxser_cards[ent->driver_data].name, |
2584 | pdev->bus->number, PCI_SLOT(pdev->devfn)); | |
2585 | ||
2586 | retval = pci_enable_device(pdev); | |
2587 | if (retval) { | |
83766bc6 | 2588 | dev_err(&pdev->dev, "PCI enable failed\n"); |
1c45607a JS |
2589 | goto err; |
2590 | } | |
2591 | ||
2592 | /* io address */ | |
2593 | ioaddress = pci_resource_start(pdev, 2); | |
2594 | retval = pci_request_region(pdev, 2, "mxser(IO)"); | |
2595 | if (retval) | |
df480518 | 2596 | goto err_dis; |
1c45607a JS |
2597 | |
2598 | brd->info = &mxser_cards[ent->driver_data]; | |
2599 | for (i = 0; i < brd->info->nports; i++) | |
2600 | brd->ports[i].ioaddr = ioaddress + 8 * i; | |
2601 | ||
2602 | /* vector */ | |
2603 | ioaddress = pci_resource_start(pdev, 3); | |
2604 | retval = pci_request_region(pdev, 3, "mxser(vector)"); | |
2605 | if (retval) | |
df480518 | 2606 | goto err_zero; |
1c45607a JS |
2607 | brd->vector = ioaddress; |
2608 | ||
2609 | /* irq */ | |
2610 | brd->irq = pdev->irq; | |
2611 | ||
2612 | brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); | |
2613 | brd->uart_type = PORT_16550A; | |
2614 | brd->vector_mask = 0; | |
2615 | ||
2616 | for (i = 0; i < brd->info->nports; i++) { | |
2617 | for (j = 0; j < UART_INFO_NUM; j++) { | |
2618 | if (Gpci_uart_info[j].type == brd->chip_flag) { | |
2619 | brd->ports[i].max_baud = | |
2620 | Gpci_uart_info[j].max_baud; | |
2621 | ||
2622 | /* exception....CP-102 */ | |
2623 | if (brd->info->flags & MXSER_HIGHBAUD) | |
2624 | brd->ports[i].max_baud = 921600; | |
2625 | break; | |
1da177e4 LT |
2626 | } |
2627 | } | |
1c45607a JS |
2628 | } |
2629 | ||
2630 | if (brd->chip_flag == MOXA_MUST_MU860_HWID) { | |
2631 | for (i = 0; i < brd->info->nports; i++) { | |
2632 | if (i < 4) | |
2633 | brd->ports[i].opmode_ioaddr = ioaddress + 4; | |
2634 | else | |
2635 | brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; | |
1da177e4 | 2636 | } |
1c45607a JS |
2637 | outb(0, ioaddress + 4); /* default set to RS232 mode */ |
2638 | outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ | |
1da177e4 | 2639 | } |
1c45607a JS |
2640 | |
2641 | for (i = 0; i < brd->info->nports; i++) { | |
2642 | brd->vector_mask |= (1 << i); | |
2643 | brd->ports[i].baud_base = 921600; | |
2644 | } | |
2645 | ||
2646 | /* mxser_initbrd will hook ISR. */ | |
2647 | retval = mxser_initbrd(brd, pdev); | |
2648 | if (retval) | |
df480518 | 2649 | goto err_rel3; |
1c45607a | 2650 | |
9e17df37 AK |
2651 | for (i = 0; i < brd->info->nports; i++) { |
2652 | tty_dev = tty_port_register_device(&brd->ports[i].port, | |
2653 | mxvar_sdriver, brd->idx + i, &pdev->dev); | |
2654 | if (IS_ERR(tty_dev)) { | |
2655 | retval = PTR_ERR(tty_dev); | |
1b581f17 | 2656 | for (; i > 0; i--) |
9e17df37 | 2657 | tty_unregister_device(mxvar_sdriver, |
1b581f17 | 2658 | brd->idx + i - 1); |
9e17df37 AK |
2659 | goto err_relbrd; |
2660 | } | |
2661 | } | |
1c45607a JS |
2662 | |
2663 | pci_set_drvdata(pdev, brd); | |
2664 | ||
2665 | return 0; | |
9e17df37 AK |
2666 | err_relbrd: |
2667 | for (i = 0; i < brd->info->nports; i++) | |
2668 | tty_port_destroy(&brd->ports[i].port); | |
2669 | free_irq(brd->irq, brd); | |
df480518 JS |
2670 | err_rel3: |
2671 | pci_release_region(pdev, 3); | |
2672 | err_zero: | |
1c45607a | 2673 | brd->info = NULL; |
df480518 JS |
2674 | pci_release_region(pdev, 2); |
2675 | err_dis: | |
2676 | pci_disable_device(pdev); | |
1c45607a JS |
2677 | err: |
2678 | return retval; | |
2679 | #else | |
2680 | return -ENODEV; | |
2681 | #endif | |
1da177e4 LT |
2682 | } |
2683 | ||
ae8d8a14 | 2684 | static void mxser_remove(struct pci_dev *pdev) |
1da177e4 | 2685 | { |
df480518 | 2686 | #ifdef CONFIG_PCI |
1c45607a | 2687 | struct mxser_board *brd = pci_get_drvdata(pdev); |
1da177e4 | 2688 | |
191c5f10 | 2689 | mxser_board_remove(brd); |
1da177e4 | 2690 | |
df480518 JS |
2691 | pci_release_region(pdev, 2); |
2692 | pci_release_region(pdev, 3); | |
2693 | pci_disable_device(pdev); | |
1c45607a | 2694 | brd->info = NULL; |
df480518 | 2695 | #endif |
1da177e4 LT |
2696 | } |
2697 | ||
1c45607a JS |
2698 | static struct pci_driver mxser_driver = { |
2699 | .name = "mxser", | |
2700 | .id_table = mxser_pcibrds, | |
2701 | .probe = mxser_probe, | |
91116cba | 2702 | .remove = mxser_remove |
1c45607a JS |
2703 | }; |
2704 | ||
2705 | static int __init mxser_module_init(void) | |
1da177e4 | 2706 | { |
1c45607a | 2707 | struct mxser_board *brd; |
9e17df37 | 2708 | struct device *tty_dev; |
1df00924 JS |
2709 | unsigned int b, i, m; |
2710 | int retval; | |
1da177e4 | 2711 | |
1c45607a JS |
2712 | mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); |
2713 | if (!mxvar_sdriver) | |
2714 | return -ENOMEM; | |
2715 | ||
2716 | printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", | |
2717 | MXSER_VERSION); | |
2718 | ||
2719 | /* Initialize the tty_driver structure */ | |
1c45607a JS |
2720 | mxvar_sdriver->name = "ttyMI"; |
2721 | mxvar_sdriver->major = ttymajor; | |
2722 | mxvar_sdriver->minor_start = 0; | |
1c45607a JS |
2723 | mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; |
2724 | mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; | |
2725 | mxvar_sdriver->init_termios = tty_std_termios; | |
2726 | mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; | |
2727 | mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; | |
2728 | tty_set_operations(mxvar_sdriver, &mxser_ops); | |
2729 | ||
2730 | retval = tty_register_driver(mxvar_sdriver); | |
2731 | if (retval) { | |
2732 | printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " | |
2733 | "tty driver !\n"); | |
2734 | goto err_put; | |
1da177e4 | 2735 | } |
1c45607a | 2736 | |
1c45607a | 2737 | /* Start finding ISA boards here */ |
1df00924 JS |
2738 | for (m = 0, b = 0; b < MXSER_BOARDS; b++) { |
2739 | if (!ioaddr[b]) | |
2740 | continue; | |
2741 | ||
2742 | brd = &mxser_boards[m]; | |
96050dfb | 2743 | retval = mxser_get_ISA_conf(ioaddr[b], brd); |
1df00924 JS |
2744 | if (retval <= 0) { |
2745 | brd->info = NULL; | |
2746 | continue; | |
2747 | } | |
1c45607a | 2748 | |
1df00924 JS |
2749 | printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", |
2750 | brd->info->name, ioaddr[b]); | |
83766bc6 | 2751 | |
1df00924 JS |
2752 | /* mxser_initbrd will hook ISR. */ |
2753 | if (mxser_initbrd(brd, NULL) < 0) { | |
9e17df37 | 2754 | mxser_release_ISA_res(brd); |
1df00924 JS |
2755 | brd->info = NULL; |
2756 | continue; | |
2757 | } | |
1c45607a | 2758 | |
1df00924 | 2759 | brd->idx = m * MXSER_PORTS_PER_BOARD; |
9e17df37 AK |
2760 | for (i = 0; i < brd->info->nports; i++) { |
2761 | tty_dev = tty_port_register_device(&brd->ports[i].port, | |
734cc178 | 2762 | mxvar_sdriver, brd->idx + i, NULL); |
9e17df37 | 2763 | if (IS_ERR(tty_dev)) { |
1b581f17 | 2764 | for (; i > 0; i--) |
9e17df37 | 2765 | tty_unregister_device(mxvar_sdriver, |
1b581f17 | 2766 | brd->idx + i - 1); |
9e17df37 AK |
2767 | for (i = 0; i < brd->info->nports; i++) |
2768 | tty_port_destroy(&brd->ports[i].port); | |
2769 | free_irq(brd->irq, brd); | |
2770 | mxser_release_ISA_res(brd); | |
2771 | brd->info = NULL; | |
2772 | break; | |
2773 | } | |
2774 | } | |
2775 | if (brd->info == NULL) | |
2776 | continue; | |
1c45607a | 2777 | |
1df00924 JS |
2778 | m++; |
2779 | } | |
1c45607a JS |
2780 | |
2781 | retval = pci_register_driver(&mxser_driver); | |
2782 | if (retval) { | |
83766bc6 | 2783 | printk(KERN_ERR "mxser: can't register pci driver\n"); |
1c45607a JS |
2784 | if (!m) { |
2785 | retval = -ENODEV; | |
2786 | goto err_unr; | |
2787 | } /* else: we have some ISA cards under control */ | |
2788 | } | |
2789 | ||
1c45607a JS |
2790 | return 0; |
2791 | err_unr: | |
2792 | tty_unregister_driver(mxvar_sdriver); | |
2793 | err_put: | |
2794 | put_tty_driver(mxvar_sdriver); | |
2795 | return retval; | |
2796 | } | |
2797 | ||
2798 | static void __exit mxser_module_exit(void) | |
2799 | { | |
191c5f10 | 2800 | unsigned int i; |
1c45607a | 2801 | |
1c45607a JS |
2802 | pci_unregister_driver(&mxser_driver); |
2803 | ||
2804 | for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ | |
2805 | if (mxser_boards[i].info != NULL) | |
191c5f10 | 2806 | mxser_board_remove(&mxser_boards[i]); |
1c45607a JS |
2807 | tty_unregister_driver(mxvar_sdriver); |
2808 | put_tty_driver(mxvar_sdriver); | |
2809 | ||
2810 | for (i = 0; i < MXSER_BOARDS; i++) | |
2811 | if (mxser_boards[i].info != NULL) | |
df480518 | 2812 | mxser_release_ISA_res(&mxser_boards[i]); |
1da177e4 LT |
2813 | } |
2814 | ||
2815 | module_init(mxser_module_init); | |
2816 | module_exit(mxser_module_exit); |