]>
Commit | Line | Data |
---|---|---|
e3b3d0f5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
1da177e4 LT |
2 | /* |
3 | * mxser.c -- MOXA Smartio/Industio family multiport serial driver. | |
4 | * | |
80ff8a80 JS |
5 | * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). |
6 | * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> | |
1da177e4 | 7 | * |
1c45607a JS |
8 | * This code is loosely based on the 1.8 moxa driver which is based on |
9 | * Linux serial driver, written by Linus Torvalds, Theodore T'so and | |
10 | * others. | |
1da177e4 | 11 | * |
1da177e4 | 12 | * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox |
8eb04cf3 AC |
13 | * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on |
14 | * www.moxa.com. | |
1da177e4 | 15 | * - Fixed x86_64 cleanness |
1da177e4 LT |
16 | */ |
17 | ||
1da177e4 | 18 | #include <linux/module.h> |
1da177e4 LT |
19 | #include <linux/errno.h> |
20 | #include <linux/signal.h> | |
21 | #include <linux/sched.h> | |
22 | #include <linux/timer.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/tty.h> | |
25 | #include <linux/tty_flip.h> | |
26 | #include <linux/serial.h> | |
27 | #include <linux/serial_reg.h> | |
28 | #include <linux/major.h> | |
29 | #include <linux/string.h> | |
30 | #include <linux/fcntl.h> | |
31 | #include <linux/ptrace.h> | |
1da177e4 LT |
32 | #include <linux/ioport.h> |
33 | #include <linux/mm.h> | |
1da177e4 LT |
34 | #include <linux/delay.h> |
35 | #include <linux/pci.h> | |
1977f032 | 36 | #include <linux/bitops.h> |
5a0e3ad6 | 37 | #include <linux/slab.h> |
5a3c6b25 | 38 | #include <linux/ratelimit.h> |
1da177e4 | 39 | |
1da177e4 LT |
40 | #include <asm/io.h> |
41 | #include <asm/irq.h> | |
7c0f6ba6 | 42 | #include <linux/uaccess.h> |
1da177e4 LT |
43 | |
44 | #include "mxser.h" | |
45 | ||
502f295f | 46 | #define MXSER_VERSION "2.0.5" /* 1.14 */ |
1da177e4 | 47 | #define MXSERMAJOR 174 |
1da177e4 | 48 | |
1da177e4 | 49 | #define MXSER_BOARDS 4 /* Max. boards */ |
1da177e4 | 50 | #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ |
1c45607a JS |
51 | #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) |
52 | #define MXSER_ISR_PASS_LIMIT 100 | |
1da177e4 | 53 | |
1c45607a JS |
54 | /*CheckIsMoxaMust return value*/ |
55 | #define MOXA_OTHER_UART 0x00 | |
56 | #define MOXA_MUST_MU150_HWID 0x01 | |
57 | #define MOXA_MUST_MU860_HWID 0x02 | |
58 | ||
1da177e4 LT |
59 | #define WAKEUP_CHARS 256 |
60 | ||
61 | #define UART_MCR_AFE 0x20 | |
62 | #define UART_LSR_SPECIAL 0x1E | |
63 | ||
e129deff | 64 | #define PCI_DEVICE_ID_POS104UL 0x1044 |
1c45607a | 65 | #define PCI_DEVICE_ID_CB108 0x1080 |
e129deff | 66 | #define PCI_DEVICE_ID_CP102UF 0x1023 |
502f295f | 67 | #define PCI_DEVICE_ID_CP112UL 0x1120 |
1c45607a | 68 | #define PCI_DEVICE_ID_CB114 0x1142 |
80ff8a80 | 69 | #define PCI_DEVICE_ID_CP114UL 0x1143 |
1c45607a JS |
70 | #define PCI_DEVICE_ID_CB134I 0x1341 |
71 | #define PCI_DEVICE_ID_CP138U 0x1380 | |
1da177e4 | 72 | |
1da177e4 LT |
73 | |
74 | #define C168_ASIC_ID 1 | |
75 | #define C104_ASIC_ID 2 | |
76 | #define C102_ASIC_ID 0xB | |
77 | #define CI132_ASIC_ID 4 | |
78 | #define CI134_ASIC_ID 3 | |
79 | #define CI104J_ASIC_ID 5 | |
80 | ||
1c45607a JS |
81 | #define MXSER_HIGHBAUD 1 |
82 | #define MXSER_HAS2 2 | |
1da177e4 | 83 | |
8ea2c2ec | 84 | /* This is only for PCI */ |
1c45607a | 85 | static const struct { |
1da177e4 LT |
86 | int type; |
87 | int tx_fifo; | |
88 | int rx_fifo; | |
89 | int xmit_fifo_size; | |
90 | int rx_high_water; | |
91 | int rx_trigger; | |
92 | int rx_low_water; | |
93 | long max_baud; | |
1c45607a | 94 | } Gpci_uart_info[] = { |
1da177e4 LT |
95 | {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, |
96 | {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, | |
97 | {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} | |
98 | }; | |
1c45607a | 99 | #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) |
1da177e4 | 100 | |
1c45607a JS |
101 | struct mxser_cardinfo { |
102 | char *name; | |
103 | unsigned int nports; | |
104 | unsigned int flags; | |
105 | }; | |
1da177e4 | 106 | |
1c45607a JS |
107 | static const struct mxser_cardinfo mxser_cards[] = { |
108 | /* 0*/ { "C168 series", 8, }, | |
109 | { "C104 series", 4, }, | |
110 | { "CI-104J series", 4, }, | |
111 | { "C168H/PCI series", 8, }, | |
112 | { "C104H/PCI series", 4, }, | |
113 | /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ | |
114 | { "CI-132 series", 4, MXSER_HAS2 }, | |
115 | { "CI-134 series", 4, }, | |
116 | { "CP-132 series", 2, }, | |
117 | { "CP-114 series", 4, }, | |
118 | /*10*/ { "CT-114 series", 4, }, | |
119 | { "CP-102 series", 2, MXSER_HIGHBAUD }, | |
120 | { "CP-104U series", 4, }, | |
121 | { "CP-168U series", 8, }, | |
122 | { "CP-132U series", 2, }, | |
123 | /*15*/ { "CP-134U series", 4, }, | |
124 | { "CP-104JU series", 4, }, | |
125 | { "Moxa UC7000 Serial", 8, }, /* RC7000 */ | |
126 | { "CP-118U series", 8, }, | |
127 | { "CP-102UL series", 2, }, | |
128 | /*20*/ { "CP-102U series", 2, }, | |
129 | { "CP-118EL series", 8, }, | |
130 | { "CP-168EL series", 8, }, | |
131 | { "CP-104EL series", 4, }, | |
132 | { "CB-108 series", 8, }, | |
133 | /*25*/ { "CB-114 series", 4, }, | |
134 | { "CB-134I series", 4, }, | |
135 | { "CP-138U series", 8, }, | |
80ff8a80 | 136 | { "POS-104UL series", 4, }, |
e129deff | 137 | { "CP-114UL series", 4, }, |
502f295f JS |
138 | /*30*/ { "CP-102UF series", 2, }, |
139 | { "CP-112UL series", 2, }, | |
1c45607a | 140 | }; |
1da177e4 | 141 | |
1c45607a JS |
142 | /* driver_data correspond to the lines in the structure above |
143 | see also ISA probe function before you change something */ | |
3385ecf8 | 144 | static const struct pci_device_id mxser_pcibrds[] = { |
1c45607a JS |
145 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, |
146 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, | |
147 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, | |
148 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, | |
149 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, | |
150 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, | |
151 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, | |
152 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, | |
153 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, | |
154 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, | |
155 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, | |
156 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, | |
157 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, | |
158 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, | |
159 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, | |
160 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, | |
161 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, | |
162 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, | |
163 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, | |
164 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, | |
165 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, | |
166 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, | |
167 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, | |
80ff8a80 | 168 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, |
e129deff | 169 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, |
502f295f | 170 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, |
1c45607a | 171 | { } |
1da177e4 | 172 | }; |
1da177e4 LT |
173 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); |
174 | ||
1df00924 | 175 | static unsigned long ioaddr[MXSER_BOARDS]; |
1da177e4 | 176 | static int ttymajor = MXSERMAJOR; |
1da177e4 LT |
177 | |
178 | /* Variables for insmod */ | |
179 | ||
180 | MODULE_AUTHOR("Casper Yang"); | |
181 | MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); | |
3b60daf8 | 182 | module_param_hw_array(ioaddr, ulong, ioport, NULL, 0); |
1df00924 | 183 | MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); |
8d3b33f6 | 184 | module_param(ttymajor, int, 0); |
1da177e4 LT |
185 | MODULE_LICENSE("GPL"); |
186 | ||
187 | struct mxser_log { | |
188 | int tick; | |
189 | unsigned long rxcnt[MXSER_PORTS]; | |
190 | unsigned long txcnt[MXSER_PORTS]; | |
191 | }; | |
192 | ||
1da177e4 LT |
193 | struct mxser_mon { |
194 | unsigned long rxcnt; | |
195 | unsigned long txcnt; | |
196 | unsigned long up_rxcnt; | |
197 | unsigned long up_txcnt; | |
198 | int modem_status; | |
199 | unsigned char hold_reason; | |
200 | }; | |
201 | ||
202 | struct mxser_mon_ext { | |
203 | unsigned long rx_cnt[32]; | |
204 | unsigned long tx_cnt[32]; | |
205 | unsigned long up_rxcnt[32]; | |
206 | unsigned long up_txcnt[32]; | |
207 | int modem_status[32]; | |
208 | ||
209 | long baudrate[32]; | |
210 | int databits[32]; | |
211 | int stopbits[32]; | |
212 | int parity[32]; | |
213 | int flowctrl[32]; | |
214 | int fifo[32]; | |
215 | int iftype[32]; | |
216 | }; | |
8ea2c2ec | 217 | |
1c45607a JS |
218 | struct mxser_board; |
219 | ||
220 | struct mxser_port { | |
0ad9e7d1 | 221 | struct tty_port port; |
1c45607a | 222 | struct mxser_board *board; |
1c45607a JS |
223 | |
224 | unsigned long ioaddr; | |
225 | unsigned long opmode_ioaddr; | |
226 | int max_baud; | |
1da177e4 | 227 | |
1da177e4 LT |
228 | int rx_high_water; |
229 | int rx_trigger; /* Rx fifo trigger level */ | |
230 | int rx_low_water; | |
231 | int baud_base; /* max. speed */ | |
1da177e4 | 232 | int type; /* UART type */ |
1c45607a | 233 | |
1da177e4 | 234 | int x_char; /* xon/xoff character */ |
1da177e4 LT |
235 | int IER; /* Interrupt Enable Register */ |
236 | int MCR; /* Modem control register */ | |
1c45607a JS |
237 | |
238 | unsigned char stop_rx; | |
239 | unsigned char ldisc_stop_rx; | |
240 | ||
241 | int custom_divisor; | |
1c45607a | 242 | unsigned char err_shadow; |
1c45607a | 243 | |
1c45607a | 244 | struct async_icount icount; /* kernel counters for 4 input interrupts */ |
104583b5 | 245 | unsigned int timeout; |
1c45607a JS |
246 | |
247 | int read_status_mask; | |
248 | int ignore_status_mask; | |
104583b5 | 249 | unsigned int xmit_fifo_size; |
1da177e4 LT |
250 | int xmit_head; |
251 | int xmit_tail; | |
252 | int xmit_cnt; | |
cd7b4b39 | 253 | int closing; |
1c45607a | 254 | |
606d099c | 255 | struct ktermios normal_termios; |
1c45607a | 256 | |
1da177e4 | 257 | struct mxser_mon mon_data; |
1c45607a | 258 | |
1da177e4 | 259 | spinlock_t slock; |
1c45607a JS |
260 | }; |
261 | ||
262 | struct mxser_board { | |
263 | unsigned int idx; | |
264 | int irq; | |
265 | const struct mxser_cardinfo *info; | |
266 | unsigned long vector; | |
267 | unsigned long vector_mask; | |
268 | ||
269 | int chip_flag; | |
270 | int uart_type; | |
271 | ||
272 | struct mxser_port ports[MXSER_PORTS_PER_BOARD]; | |
1da177e4 LT |
273 | }; |
274 | ||
1da177e4 LT |
275 | struct mxser_mstatus { |
276 | tcflag_t cflag; | |
277 | int cts; | |
278 | int dsr; | |
279 | int ri; | |
280 | int dcd; | |
281 | }; | |
282 | ||
1c45607a | 283 | static struct mxser_board mxser_boards[MXSER_BOARDS]; |
1da177e4 | 284 | static struct tty_driver *mxvar_sdriver; |
1da177e4 | 285 | static struct mxser_log mxvar_log; |
1da177e4 | 286 | static int mxser_set_baud_method[MXSER_PORTS + 1]; |
1da177e4 | 287 | |
148ff86b CH |
288 | static void mxser_enable_must_enchance_mode(unsigned long baseio) |
289 | { | |
290 | u8 oldlcr; | |
291 | u8 efr; | |
292 | ||
293 | oldlcr = inb(baseio + UART_LCR); | |
294 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
295 | ||
296 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
297 | efr |= MOXA_MUST_EFR_EFRB_ENABLE; | |
298 | ||
299 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
300 | outb(oldlcr, baseio + UART_LCR); | |
301 | } | |
302 | ||
e89d67cf | 303 | #ifdef CONFIG_PCI |
148ff86b CH |
304 | static void mxser_disable_must_enchance_mode(unsigned long baseio) |
305 | { | |
306 | u8 oldlcr; | |
307 | u8 efr; | |
308 | ||
309 | oldlcr = inb(baseio + UART_LCR); | |
310 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
311 | ||
312 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
313 | efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; | |
314 | ||
315 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
316 | outb(oldlcr, baseio + UART_LCR); | |
317 | } | |
e89d67cf | 318 | #endif |
148ff86b CH |
319 | |
320 | static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) | |
321 | { | |
322 | u8 oldlcr; | |
323 | u8 efr; | |
324 | ||
325 | oldlcr = inb(baseio + UART_LCR); | |
326 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
327 | ||
328 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
329 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
330 | efr |= MOXA_MUST_EFR_BANK0; | |
331 | ||
332 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
333 | outb(value, baseio + MOXA_MUST_XON1_REGISTER); | |
334 | outb(oldlcr, baseio + UART_LCR); | |
335 | } | |
336 | ||
337 | static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) | |
338 | { | |
339 | u8 oldlcr; | |
340 | u8 efr; | |
341 | ||
342 | oldlcr = inb(baseio + UART_LCR); | |
343 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
344 | ||
345 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
346 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
347 | efr |= MOXA_MUST_EFR_BANK0; | |
348 | ||
349 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
350 | outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); | |
351 | outb(oldlcr, baseio + UART_LCR); | |
352 | } | |
353 | ||
354 | static void mxser_set_must_fifo_value(struct mxser_port *info) | |
355 | { | |
356 | u8 oldlcr; | |
357 | u8 efr; | |
358 | ||
359 | oldlcr = inb(info->ioaddr + UART_LCR); | |
360 | outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); | |
361 | ||
362 | efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
363 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
364 | efr |= MOXA_MUST_EFR_BANK1; | |
365 | ||
366 | outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); | |
367 | outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); | |
368 | outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); | |
369 | outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); | |
370 | outb(oldlcr, info->ioaddr + UART_LCR); | |
371 | } | |
372 | ||
373 | static void mxser_set_must_enum_value(unsigned long baseio, u8 value) | |
374 | { | |
375 | u8 oldlcr; | |
376 | u8 efr; | |
377 | ||
378 | oldlcr = inb(baseio + UART_LCR); | |
379 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
380 | ||
381 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
382 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
383 | efr |= MOXA_MUST_EFR_BANK2; | |
384 | ||
385 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
386 | outb(value, baseio + MOXA_MUST_ENUM_REGISTER); | |
387 | outb(oldlcr, baseio + UART_LCR); | |
388 | } | |
389 | ||
e89d67cf | 390 | #ifdef CONFIG_PCI |
148ff86b CH |
391 | static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) |
392 | { | |
393 | u8 oldlcr; | |
394 | u8 efr; | |
395 | ||
396 | oldlcr = inb(baseio + UART_LCR); | |
397 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
398 | ||
399 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
400 | efr &= ~MOXA_MUST_EFR_BANK_MASK; | |
401 | efr |= MOXA_MUST_EFR_BANK2; | |
402 | ||
403 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
404 | *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); | |
405 | outb(oldlcr, baseio + UART_LCR); | |
406 | } | |
e89d67cf | 407 | #endif |
148ff86b CH |
408 | |
409 | static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) | |
410 | { | |
411 | u8 oldlcr; | |
412 | u8 efr; | |
413 | ||
414 | oldlcr = inb(baseio + UART_LCR); | |
415 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
416 | ||
417 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
418 | efr &= ~MOXA_MUST_EFR_SF_MASK; | |
419 | ||
420 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
421 | outb(oldlcr, baseio + UART_LCR); | |
422 | } | |
423 | ||
424 | static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) | |
425 | { | |
426 | u8 oldlcr; | |
427 | u8 efr; | |
428 | ||
429 | oldlcr = inb(baseio + UART_LCR); | |
430 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
431 | ||
432 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
433 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
434 | efr |= MOXA_MUST_EFR_SF_TX1; | |
435 | ||
436 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
437 | outb(oldlcr, baseio + UART_LCR); | |
438 | } | |
439 | ||
440 | static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) | |
441 | { | |
442 | u8 oldlcr; | |
443 | u8 efr; | |
444 | ||
445 | oldlcr = inb(baseio + UART_LCR); | |
446 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
447 | ||
448 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
449 | efr &= ~MOXA_MUST_EFR_SF_TX_MASK; | |
450 | ||
451 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
452 | outb(oldlcr, baseio + UART_LCR); | |
453 | } | |
454 | ||
455 | static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) | |
456 | { | |
457 | u8 oldlcr; | |
458 | u8 efr; | |
459 | ||
460 | oldlcr = inb(baseio + UART_LCR); | |
461 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
462 | ||
463 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
464 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
465 | efr |= MOXA_MUST_EFR_SF_RX1; | |
466 | ||
467 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
468 | outb(oldlcr, baseio + UART_LCR); | |
469 | } | |
470 | ||
471 | static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) | |
472 | { | |
473 | u8 oldlcr; | |
474 | u8 efr; | |
475 | ||
476 | oldlcr = inb(baseio + UART_LCR); | |
477 | outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); | |
478 | ||
479 | efr = inb(baseio + MOXA_MUST_EFR_REGISTER); | |
480 | efr &= ~MOXA_MUST_EFR_SF_RX_MASK; | |
481 | ||
482 | outb(efr, baseio + MOXA_MUST_EFR_REGISTER); | |
483 | outb(oldlcr, baseio + UART_LCR); | |
484 | } | |
485 | ||
b8cc5549 | 486 | #ifdef CONFIG_PCI |
9671f099 | 487 | static int CheckIsMoxaMust(unsigned long io) |
1da177e4 LT |
488 | { |
489 | u8 oldmcr, hwid; | |
490 | int i; | |
491 | ||
492 | outb(0, io + UART_LCR); | |
148ff86b | 493 | mxser_disable_must_enchance_mode(io); |
1da177e4 LT |
494 | oldmcr = inb(io + UART_MCR); |
495 | outb(0, io + UART_MCR); | |
148ff86b | 496 | mxser_set_must_xon1_value(io, 0x11); |
1da177e4 LT |
497 | if ((hwid = inb(io + UART_MCR)) != 0) { |
498 | outb(oldmcr, io + UART_MCR); | |
8ea2c2ec | 499 | return MOXA_OTHER_UART; |
1da177e4 LT |
500 | } |
501 | ||
148ff86b | 502 | mxser_get_must_hardware_id(io, &hwid); |
1c45607a JS |
503 | for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ |
504 | if (hwid == Gpci_uart_info[i].type) | |
8ea2c2ec | 505 | return (int)hwid; |
1da177e4 LT |
506 | } |
507 | return MOXA_OTHER_UART; | |
508 | } | |
b8cc5549 | 509 | #endif |
1da177e4 | 510 | |
1c45607a | 511 | static void process_txrx_fifo(struct mxser_port *info) |
1da177e4 LT |
512 | { |
513 | int i; | |
514 | ||
515 | if ((info->type == PORT_16450) || (info->type == PORT_8250)) { | |
516 | info->rx_trigger = 1; | |
517 | info->rx_high_water = 1; | |
518 | info->rx_low_water = 1; | |
519 | info->xmit_fifo_size = 1; | |
1c45607a JS |
520 | } else |
521 | for (i = 0; i < UART_INFO_NUM; i++) | |
522 | if (info->board->chip_flag == Gpci_uart_info[i].type) { | |
1da177e4 LT |
523 | info->rx_trigger = Gpci_uart_info[i].rx_trigger; |
524 | info->rx_low_water = Gpci_uart_info[i].rx_low_water; | |
525 | info->rx_high_water = Gpci_uart_info[i].rx_high_water; | |
526 | info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; | |
527 | break; | |
528 | } | |
1da177e4 LT |
529 | } |
530 | ||
1c45607a | 531 | static unsigned char mxser_get_msr(int baseaddr, int mode, int port) |
1da177e4 | 532 | { |
72800df9 | 533 | static unsigned char mxser_msr[MXSER_PORTS + 1]; |
1c45607a | 534 | unsigned char status = 0; |
1da177e4 | 535 | |
1c45607a | 536 | status = inb(baseaddr + UART_MSR); |
1da177e4 | 537 | |
1c45607a JS |
538 | mxser_msr[port] &= 0x0F; |
539 | mxser_msr[port] |= status; | |
540 | status = mxser_msr[port]; | |
541 | if (mode) | |
542 | mxser_msr[port] = 0; | |
1da177e4 | 543 | |
1c45607a JS |
544 | return status; |
545 | } | |
1da177e4 | 546 | |
31f35939 AC |
547 | static int mxser_carrier_raised(struct tty_port *port) |
548 | { | |
549 | struct mxser_port *mp = container_of(port, struct mxser_port, port); | |
550 | return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; | |
551 | } | |
552 | ||
fcc8ac18 | 553 | static void mxser_dtr_rts(struct tty_port *port, int on) |
5d951fb4 AC |
554 | { |
555 | struct mxser_port *mp = container_of(port, struct mxser_port, port); | |
556 | unsigned long flags; | |
557 | ||
558 | spin_lock_irqsave(&mp->slock, flags); | |
fcc8ac18 AC |
559 | if (on) |
560 | outb(inb(mp->ioaddr + UART_MCR) | | |
561 | UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); | |
562 | else | |
563 | outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), | |
564 | mp->ioaddr + UART_MCR); | |
5d951fb4 AC |
565 | spin_unlock_irqrestore(&mp->slock, flags); |
566 | } | |
567 | ||
216ba023 | 568 | static int mxser_set_baud(struct tty_struct *tty, long newspd) |
1da177e4 | 569 | { |
216ba023 | 570 | struct mxser_port *info = tty->driver_data; |
104583b5 | 571 | unsigned int quot = 0, baud; |
1c45607a | 572 | unsigned char cval; |
104583b5 | 573 | u64 timeout; |
1da177e4 | 574 | |
216ba023 | 575 | if (!info->ioaddr) |
1c45607a | 576 | return -1; |
1da177e4 | 577 | |
1c45607a JS |
578 | if (newspd > info->max_baud) |
579 | return -1; | |
1da177e4 | 580 | |
1c45607a JS |
581 | if (newspd == 134) { |
582 | quot = 2 * info->baud_base / 269; | |
216ba023 | 583 | tty_encode_baud_rate(tty, 134, 134); |
1c45607a JS |
584 | } else if (newspd) { |
585 | quot = info->baud_base / newspd; | |
586 | if (quot == 0) | |
587 | quot = 1; | |
588 | baud = info->baud_base/quot; | |
216ba023 | 589 | tty_encode_baud_rate(tty, baud, baud); |
1c45607a JS |
590 | } else { |
591 | quot = 0; | |
592 | } | |
1da177e4 | 593 | |
104583b5 JS |
594 | /* |
595 | * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the | |
596 | * u64 domain | |
597 | */ | |
598 | timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot; | |
599 | do_div(timeout, info->baud_base); | |
600 | info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */ | |
1da177e4 | 601 | |
1c45607a JS |
602 | if (quot) { |
603 | info->MCR |= UART_MCR_DTR; | |
604 | outb(info->MCR, info->ioaddr + UART_MCR); | |
605 | } else { | |
606 | info->MCR &= ~UART_MCR_DTR; | |
607 | outb(info->MCR, info->ioaddr + UART_MCR); | |
608 | return 0; | |
609 | } | |
1da177e4 | 610 | |
1c45607a | 611 | cval = inb(info->ioaddr + UART_LCR); |
1da177e4 | 612 | |
1c45607a | 613 | outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ |
1da177e4 | 614 | |
1c45607a JS |
615 | outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ |
616 | outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ | |
617 | outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ | |
1da177e4 | 618 | |
1c45607a | 619 | #ifdef BOTHER |
216ba023 | 620 | if (C_BAUD(tty) == BOTHER) { |
1c45607a JS |
621 | quot = info->baud_base % newspd; |
622 | quot *= 8; | |
623 | if (quot % newspd > newspd / 2) { | |
624 | quot /= newspd; | |
625 | quot++; | |
626 | } else | |
627 | quot /= newspd; | |
628 | ||
148ff86b | 629 | mxser_set_must_enum_value(info->ioaddr, quot); |
1c45607a JS |
630 | } else |
631 | #endif | |
148ff86b | 632 | mxser_set_must_enum_value(info->ioaddr, 0); |
1da177e4 | 633 | |
8ea2c2ec | 634 | return 0; |
1da177e4 | 635 | } |
1da177e4 | 636 | |
1c45607a JS |
637 | /* |
638 | * This routine is called to set the UART divisor registers to match | |
639 | * the specified baud rate for a serial port. | |
640 | */ | |
2799707f | 641 | static int mxser_change_speed(struct tty_struct *tty) |
1da177e4 | 642 | { |
216ba023 | 643 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
644 | unsigned cflag, cval, fcr; |
645 | int ret = 0; | |
646 | unsigned char status; | |
1da177e4 | 647 | |
adc8d746 | 648 | cflag = tty->termios.c_cflag; |
216ba023 | 649 | if (!info->ioaddr) |
1c45607a | 650 | return ret; |
1da177e4 | 651 | |
216ba023 AC |
652 | if (mxser_set_baud_method[tty->index] == 0) |
653 | mxser_set_baud(tty, tty_get_baud_rate(tty)); | |
1da177e4 | 654 | |
1c45607a JS |
655 | /* byte size and parity */ |
656 | switch (cflag & CSIZE) { | |
657 | case CS5: | |
658 | cval = 0x00; | |
659 | break; | |
660 | case CS6: | |
661 | cval = 0x01; | |
662 | break; | |
663 | case CS7: | |
664 | cval = 0x02; | |
665 | break; | |
666 | case CS8: | |
667 | cval = 0x03; | |
668 | break; | |
669 | default: | |
670 | cval = 0x00; | |
671 | break; /* too keep GCC shut... */ | |
672 | } | |
673 | if (cflag & CSTOPB) | |
674 | cval |= 0x04; | |
675 | if (cflag & PARENB) | |
676 | cval |= UART_LCR_PARITY; | |
677 | if (!(cflag & PARODD)) | |
678 | cval |= UART_LCR_EPAR; | |
679 | if (cflag & CMSPAR) | |
680 | cval |= UART_LCR_SPAR; | |
1da177e4 | 681 | |
1c45607a JS |
682 | if ((info->type == PORT_8250) || (info->type == PORT_16450)) { |
683 | if (info->board->chip_flag) { | |
684 | fcr = UART_FCR_ENABLE_FIFO; | |
685 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 686 | mxser_set_must_fifo_value(info); |
1c45607a JS |
687 | } else |
688 | fcr = 0; | |
689 | } else { | |
690 | fcr = UART_FCR_ENABLE_FIFO; | |
691 | if (info->board->chip_flag) { | |
692 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
148ff86b | 693 | mxser_set_must_fifo_value(info); |
1c45607a JS |
694 | } else { |
695 | switch (info->rx_trigger) { | |
696 | case 1: | |
697 | fcr |= UART_FCR_TRIGGER_1; | |
698 | break; | |
699 | case 4: | |
700 | fcr |= UART_FCR_TRIGGER_4; | |
701 | break; | |
702 | case 8: | |
703 | fcr |= UART_FCR_TRIGGER_8; | |
704 | break; | |
705 | default: | |
706 | fcr |= UART_FCR_TRIGGER_14; | |
707 | break; | |
708 | } | |
1da177e4 | 709 | } |
1da177e4 LT |
710 | } |
711 | ||
1c45607a JS |
712 | /* CTS flow control flag and modem status interrupts */ |
713 | info->IER &= ~UART_IER_MSI; | |
714 | info->MCR &= ~UART_MCR_AFE; | |
5604a98e | 715 | tty_port_set_cts_flow(&info->port, cflag & CRTSCTS); |
1c45607a | 716 | if (cflag & CRTSCTS) { |
1c45607a JS |
717 | info->IER |= UART_IER_MSI; |
718 | if ((info->type == PORT_16550A) || (info->board->chip_flag)) { | |
719 | info->MCR |= UART_MCR_AFE; | |
720 | } else { | |
721 | status = inb(info->ioaddr + UART_MSR); | |
216ba023 | 722 | if (tty->hw_stopped) { |
1c45607a | 723 | if (status & UART_MSR_CTS) { |
216ba023 | 724 | tty->hw_stopped = 0; |
1c45607a JS |
725 | if (info->type != PORT_16550A && |
726 | !info->board->chip_flag) { | |
727 | outb(info->IER & ~UART_IER_THRI, | |
728 | info->ioaddr + | |
729 | UART_IER); | |
730 | info->IER |= UART_IER_THRI; | |
731 | outb(info->IER, info->ioaddr + | |
732 | UART_IER); | |
733 | } | |
216ba023 | 734 | tty_wakeup(tty); |
1c45607a JS |
735 | } |
736 | } else { | |
737 | if (!(status & UART_MSR_CTS)) { | |
216ba023 | 738 | tty->hw_stopped = 1; |
1c45607a JS |
739 | if ((info->type != PORT_16550A) && |
740 | (!info->board->chip_flag)) { | |
741 | info->IER &= ~UART_IER_THRI; | |
742 | outb(info->IER, info->ioaddr + | |
743 | UART_IER); | |
744 | } | |
745 | } | |
746 | } | |
1da177e4 | 747 | } |
1c45607a JS |
748 | } |
749 | outb(info->MCR, info->ioaddr + UART_MCR); | |
2d68655d PH |
750 | tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL); |
751 | if (~cflag & CLOCAL) | |
1c45607a | 752 | info->IER |= UART_IER_MSI; |
1c45607a JS |
753 | outb(info->IER, info->ioaddr + UART_IER); |
754 | ||
755 | /* | |
756 | * Set up parity check flag | |
757 | */ | |
758 | info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; | |
216ba023 | 759 | if (I_INPCK(tty)) |
1c45607a | 760 | info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; |
216ba023 | 761 | if (I_BRKINT(tty) || I_PARMRK(tty)) |
1c45607a | 762 | info->read_status_mask |= UART_LSR_BI; |
1da177e4 | 763 | |
1c45607a | 764 | info->ignore_status_mask = 0; |
1da177e4 | 765 | |
216ba023 | 766 | if (I_IGNBRK(tty)) { |
1c45607a JS |
767 | info->ignore_status_mask |= UART_LSR_BI; |
768 | info->read_status_mask |= UART_LSR_BI; | |
8ea2c2ec | 769 | /* |
1c45607a JS |
770 | * If we're ignore parity and break indicators, ignore |
771 | * overruns too. (For real raw support). | |
8ea2c2ec | 772 | */ |
216ba023 | 773 | if (I_IGNPAR(tty)) { |
1c45607a JS |
774 | info->ignore_status_mask |= |
775 | UART_LSR_OE | | |
776 | UART_LSR_PE | | |
777 | UART_LSR_FE; | |
778 | info->read_status_mask |= | |
779 | UART_LSR_OE | | |
780 | UART_LSR_PE | | |
781 | UART_LSR_FE; | |
782 | } | |
1da177e4 | 783 | } |
1c45607a | 784 | if (info->board->chip_flag) { |
216ba023 AC |
785 | mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); |
786 | mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); | |
787 | if (I_IXON(tty)) { | |
148ff86b CH |
788 | mxser_enable_must_rx_software_flow_control( |
789 | info->ioaddr); | |
1c45607a | 790 | } else { |
148ff86b CH |
791 | mxser_disable_must_rx_software_flow_control( |
792 | info->ioaddr); | |
1da177e4 | 793 | } |
216ba023 | 794 | if (I_IXOFF(tty)) { |
148ff86b CH |
795 | mxser_enable_must_tx_software_flow_control( |
796 | info->ioaddr); | |
1c45607a | 797 | } else { |
148ff86b CH |
798 | mxser_disable_must_tx_software_flow_control( |
799 | info->ioaddr); | |
1da177e4 LT |
800 | } |
801 | } | |
1da177e4 | 802 | |
1da177e4 | 803 | |
1c45607a JS |
804 | outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ |
805 | outb(cval, info->ioaddr + UART_LCR); | |
1da177e4 | 806 | |
1c45607a | 807 | return ret; |
1da177e4 LT |
808 | } |
809 | ||
216ba023 AC |
810 | static void mxser_check_modem_status(struct tty_struct *tty, |
811 | struct mxser_port *port, int status) | |
1da177e4 | 812 | { |
1c45607a JS |
813 | /* update input line counters */ |
814 | if (status & UART_MSR_TERI) | |
815 | port->icount.rng++; | |
816 | if (status & UART_MSR_DDSR) | |
817 | port->icount.dsr++; | |
818 | if (status & UART_MSR_DDCD) | |
819 | port->icount.dcd++; | |
820 | if (status & UART_MSR_DCTS) | |
821 | port->icount.cts++; | |
822 | port->mon_data.modem_status = status; | |
bdc04e31 | 823 | wake_up_interruptible(&port->port.delta_msr_wait); |
1da177e4 | 824 | |
2d68655d | 825 | if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) { |
1c45607a | 826 | if (status & UART_MSR_DCD) |
0ad9e7d1 | 827 | wake_up_interruptible(&port->port.open_wait); |
1c45607a | 828 | } |
1da177e4 | 829 | |
f21ec3d2 | 830 | if (tty_port_cts_enabled(&port->port)) { |
216ba023 | 831 | if (tty->hw_stopped) { |
1c45607a | 832 | if (status & UART_MSR_CTS) { |
216ba023 | 833 | tty->hw_stopped = 0; |
1c45607a JS |
834 | |
835 | if ((port->type != PORT_16550A) && | |
836 | (!port->board->chip_flag)) { | |
837 | outb(port->IER & ~UART_IER_THRI, | |
838 | port->ioaddr + UART_IER); | |
839 | port->IER |= UART_IER_THRI; | |
840 | outb(port->IER, port->ioaddr + | |
841 | UART_IER); | |
842 | } | |
216ba023 | 843 | tty_wakeup(tty); |
1c45607a JS |
844 | } |
845 | } else { | |
846 | if (!(status & UART_MSR_CTS)) { | |
216ba023 | 847 | tty->hw_stopped = 1; |
1c45607a JS |
848 | if (port->type != PORT_16550A && |
849 | !port->board->chip_flag) { | |
850 | port->IER &= ~UART_IER_THRI; | |
851 | outb(port->IER, port->ioaddr + | |
852 | UART_IER); | |
853 | } | |
854 | } | |
855 | } | |
1da177e4 LT |
856 | } |
857 | } | |
858 | ||
6769140d | 859 | static int mxser_activate(struct tty_port *port, struct tty_struct *tty) |
1da177e4 | 860 | { |
6769140d | 861 | struct mxser_port *info = container_of(port, struct mxser_port, port); |
1c45607a JS |
862 | unsigned long page; |
863 | unsigned long flags; | |
1da177e4 | 864 | |
1c45607a JS |
865 | page = __get_free_page(GFP_KERNEL); |
866 | if (!page) | |
867 | return -ENOMEM; | |
1da177e4 | 868 | |
1c45607a | 869 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 870 | |
1c45607a | 871 | if (!info->ioaddr || !info->type) { |
216ba023 | 872 | set_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a JS |
873 | free_page(page); |
874 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 875 | return 0; |
1c45607a | 876 | } |
6769140d | 877 | info->port.xmit_buf = (unsigned char *) page; |
1da177e4 | 878 | |
1da177e4 | 879 | /* |
1c45607a JS |
880 | * Clear the FIFO buffers and disable them |
881 | * (they will be reenabled in mxser_change_speed()) | |
1da177e4 | 882 | */ |
1c45607a JS |
883 | if (info->board->chip_flag) |
884 | outb((UART_FCR_CLEAR_RCVR | | |
885 | UART_FCR_CLEAR_XMIT | | |
886 | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); | |
887 | else | |
888 | outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
889 | info->ioaddr + UART_FCR); | |
1da177e4 | 890 | |
1c45607a JS |
891 | /* |
892 | * At this point there's no way the LSR could still be 0xFF; | |
893 | * if it is, then bail out, because there's likely no UART | |
894 | * here. | |
895 | */ | |
896 | if (inb(info->ioaddr + UART_LSR) == 0xff) { | |
897 | spin_unlock_irqrestore(&info->slock, flags); | |
898 | if (capable(CAP_SYS_ADMIN)) { | |
f43a510d | 899 | set_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a JS |
900 | return 0; |
901 | } else | |
902 | return -ENODEV; | |
903 | } | |
1da177e4 | 904 | |
1c45607a JS |
905 | /* |
906 | * Clear the interrupt registers. | |
907 | */ | |
908 | (void) inb(info->ioaddr + UART_LSR); | |
909 | (void) inb(info->ioaddr + UART_RX); | |
910 | (void) inb(info->ioaddr + UART_IIR); | |
911 | (void) inb(info->ioaddr + UART_MSR); | |
912 | ||
913 | /* | |
914 | * Now, initialize the UART | |
915 | */ | |
916 | outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ | |
917 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | |
918 | outb(info->MCR, info->ioaddr + UART_MCR); | |
919 | ||
920 | /* | |
921 | * Finally, enable interrupts | |
922 | */ | |
923 | info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; | |
924 | ||
925 | if (info->board->chip_flag) | |
926 | info->IER |= MOXA_MUST_IER_EGDAI; | |
927 | outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ | |
928 | ||
929 | /* | |
930 | * And clear the interrupt registers again for luck. | |
931 | */ | |
932 | (void) inb(info->ioaddr + UART_LSR); | |
933 | (void) inb(info->ioaddr + UART_RX); | |
934 | (void) inb(info->ioaddr + UART_IIR); | |
935 | (void) inb(info->ioaddr + UART_MSR); | |
936 | ||
216ba023 | 937 | clear_bit(TTY_IO_ERROR, &tty->flags); |
1c45607a JS |
938 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
939 | ||
940 | /* | |
941 | * and set the speed of the serial port | |
942 | */ | |
2799707f | 943 | mxser_change_speed(tty); |
1c45607a JS |
944 | spin_unlock_irqrestore(&info->slock, flags); |
945 | ||
946 | return 0; | |
947 | } | |
948 | ||
949 | /* | |
6769140d | 950 | * This routine will shutdown a serial port |
1c45607a | 951 | */ |
6769140d | 952 | static void mxser_shutdown_port(struct tty_port *port) |
1c45607a | 953 | { |
6769140d | 954 | struct mxser_port *info = container_of(port, struct mxser_port, port); |
1c45607a JS |
955 | unsigned long flags; |
956 | ||
1c45607a JS |
957 | spin_lock_irqsave(&info->slock, flags); |
958 | ||
959 | /* | |
960 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | |
961 | * here so the queue might never be waken up | |
962 | */ | |
bdc04e31 | 963 | wake_up_interruptible(&info->port.delta_msr_wait); |
1c45607a JS |
964 | |
965 | /* | |
6769140d | 966 | * Free the xmit buffer, if necessary |
1c45607a | 967 | */ |
0ad9e7d1 AC |
968 | if (info->port.xmit_buf) { |
969 | free_page((unsigned long) info->port.xmit_buf); | |
970 | info->port.xmit_buf = NULL; | |
1da177e4 LT |
971 | } |
972 | ||
1c45607a JS |
973 | info->IER = 0; |
974 | outb(0x00, info->ioaddr + UART_IER); | |
975 | ||
1c45607a JS |
976 | /* clear Rx/Tx FIFO's */ |
977 | if (info->board->chip_flag) | |
978 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | | |
979 | MOXA_MUST_FCR_GDA_MODE_ENABLE, | |
980 | info->ioaddr + UART_FCR); | |
981 | else | |
982 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, | |
983 | info->ioaddr + UART_FCR); | |
984 | ||
985 | /* read data port to reset things */ | |
986 | (void) inb(info->ioaddr + UART_RX); | |
987 | ||
1c45607a JS |
988 | |
989 | if (info->board->chip_flag) | |
990 | SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
991 | ||
992 | spin_unlock_irqrestore(&info->slock, flags); | |
993 | } | |
994 | ||
995 | /* | |
996 | * This routine is called whenever a serial port is opened. It | |
997 | * enables interrupts for a serial port, linking in its async structure into | |
998 | * the IRQ chain. It also performs the serial-specific | |
999 | * initialization for the tty structure. | |
1000 | */ | |
1001 | static int mxser_open(struct tty_struct *tty, struct file *filp) | |
1002 | { | |
1003 | struct mxser_port *info; | |
6769140d | 1004 | int line; |
1c45607a JS |
1005 | |
1006 | line = tty->index; | |
1007 | if (line == MXSER_PORTS) | |
1008 | return 0; | |
1c45607a JS |
1009 | info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; |
1010 | if (!info->ioaddr) | |
1011 | return -ENODEV; | |
1012 | ||
a2d1e351 | 1013 | tty->driver_data = info; |
6769140d | 1014 | return tty_port_open(&info->port, tty, filp); |
1da177e4 LT |
1015 | } |
1016 | ||
978e595f AC |
1017 | static void mxser_flush_buffer(struct tty_struct *tty) |
1018 | { | |
1019 | struct mxser_port *info = tty->driver_data; | |
1020 | char fcr; | |
1021 | unsigned long flags; | |
1022 | ||
1023 | ||
1024 | spin_lock_irqsave(&info->slock, flags); | |
1025 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
1026 | ||
1027 | fcr = inb(info->ioaddr + UART_FCR); | |
1028 | outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
1029 | info->ioaddr + UART_FCR); | |
1030 | outb(fcr, info->ioaddr + UART_FCR); | |
1031 | ||
1032 | spin_unlock_irqrestore(&info->slock, flags); | |
1033 | ||
1034 | tty_wakeup(tty); | |
1035 | } | |
1036 | ||
1037 | ||
6769140d | 1038 | static void mxser_close_port(struct tty_port *port) |
1da177e4 | 1039 | { |
1e2b0254 | 1040 | struct mxser_port *info = container_of(port, struct mxser_port, port); |
1da177e4 | 1041 | unsigned long timeout; |
1da177e4 LT |
1042 | /* |
1043 | * At this point we stop accepting input. To do this, we | |
1044 | * disable the receive line status interrupts, and tell the | |
1045 | * interrupt driver to stop checking the data ready bit in the | |
1046 | * line status register. | |
1047 | */ | |
1048 | info->IER &= ~UART_IER_RLSI; | |
1c45607a | 1049 | if (info->board->chip_flag) |
1da177e4 | 1050 | info->IER &= ~MOXA_MUST_RECV_ISR; |
1c45607a | 1051 | |
6769140d AC |
1052 | outb(info->IER, info->ioaddr + UART_IER); |
1053 | /* | |
1054 | * Before we drop DTR, make sure the UART transmitter | |
1055 | * has completely drained; this is especially | |
1056 | * important if there is a transmit FIFO! | |
1057 | */ | |
1058 | timeout = jiffies + HZ; | |
1059 | while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { | |
1060 | schedule_timeout_interruptible(5); | |
1061 | if (time_after(jiffies, timeout)) | |
1062 | break; | |
1da177e4 | 1063 | } |
1e2b0254 AC |
1064 | } |
1065 | ||
1066 | /* | |
1067 | * This routine is called when the serial port gets closed. First, we | |
1068 | * wait for the last remaining data to be sent. Then, we unlink its | |
1069 | * async structure from the interrupt chain if necessary, and we free | |
1070 | * that IRQ if nothing is left in the chain. | |
1071 | */ | |
1072 | static void mxser_close(struct tty_struct *tty, struct file *filp) | |
1073 | { | |
1074 | struct mxser_port *info = tty->driver_data; | |
1075 | struct tty_port *port = &info->port; | |
1076 | ||
a2d1e351 | 1077 | if (tty->index == MXSER_PORTS || info == NULL) |
1e2b0254 AC |
1078 | return; |
1079 | if (tty_port_close_start(port, tty, filp) == 0) | |
1080 | return; | |
cd7b4b39 | 1081 | info->closing = 1; |
6769140d AC |
1082 | mutex_lock(&port->mutex); |
1083 | mxser_close_port(port); | |
1e2b0254 | 1084 | mxser_flush_buffer(tty); |
d41861ca PH |
1085 | if (tty_port_initialized(port) && C_HUPCL(tty)) |
1086 | tty_port_lower_dtr_rts(port); | |
6769140d | 1087 | mxser_shutdown_port(port); |
d41861ca | 1088 | tty_port_set_initialized(port, 0); |
6769140d | 1089 | mutex_unlock(&port->mutex); |
cd7b4b39 | 1090 | info->closing = 0; |
a6614999 AC |
1091 | /* Right now the tty_port set is done outside of the close_end helper |
1092 | as we don't yet have everyone using refcounts */ | |
1093 | tty_port_close_end(port, tty); | |
1094 | tty_port_tty_set(port, NULL); | |
1da177e4 LT |
1095 | } |
1096 | ||
1097 | static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
1098 | { | |
1099 | int c, total = 0; | |
1c45607a | 1100 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1101 | unsigned long flags; |
1102 | ||
0ad9e7d1 | 1103 | if (!info->port.xmit_buf) |
8ea2c2ec | 1104 | return 0; |
1da177e4 LT |
1105 | |
1106 | while (1) { | |
8ea2c2ec JJ |
1107 | c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, |
1108 | SERIAL_XMIT_SIZE - info->xmit_head)); | |
1da177e4 LT |
1109 | if (c <= 0) |
1110 | break; | |
1111 | ||
0ad9e7d1 | 1112 | memcpy(info->port.xmit_buf + info->xmit_head, buf, c); |
1da177e4 | 1113 | spin_lock_irqsave(&info->slock, flags); |
8ea2c2ec JJ |
1114 | info->xmit_head = (info->xmit_head + c) & |
1115 | (SERIAL_XMIT_SIZE - 1); | |
1da177e4 LT |
1116 | info->xmit_cnt += c; |
1117 | spin_unlock_irqrestore(&info->slock, flags); | |
1118 | ||
1119 | buf += c; | |
1120 | count -= c; | |
1121 | total += c; | |
1da177e4 LT |
1122 | } |
1123 | ||
1c45607a | 1124 | if (info->xmit_cnt && !tty->stopped) { |
8ea2c2ec JJ |
1125 | if (!tty->hw_stopped || |
1126 | (info->type == PORT_16550A) || | |
1c45607a | 1127 | (info->board->chip_flag)) { |
1da177e4 | 1128 | spin_lock_irqsave(&info->slock, flags); |
1c45607a JS |
1129 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + |
1130 | UART_IER); | |
1da177e4 | 1131 | info->IER |= UART_IER_THRI; |
1c45607a | 1132 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1133 | spin_unlock_irqrestore(&info->slock, flags); |
1134 | } | |
1135 | } | |
1136 | return total; | |
1137 | } | |
1138 | ||
0be2eade | 1139 | static int mxser_put_char(struct tty_struct *tty, unsigned char ch) |
1da177e4 | 1140 | { |
1c45607a | 1141 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1142 | unsigned long flags; |
1143 | ||
0ad9e7d1 | 1144 | if (!info->port.xmit_buf) |
0be2eade | 1145 | return 0; |
1da177e4 LT |
1146 | |
1147 | if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) | |
0be2eade | 1148 | return 0; |
1da177e4 LT |
1149 | |
1150 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1151 | info->port.xmit_buf[info->xmit_head++] = ch; |
1da177e4 LT |
1152 | info->xmit_head &= SERIAL_XMIT_SIZE - 1; |
1153 | info->xmit_cnt++; | |
1154 | spin_unlock_irqrestore(&info->slock, flags); | |
1c45607a | 1155 | if (!tty->stopped) { |
8ea2c2ec JJ |
1156 | if (!tty->hw_stopped || |
1157 | (info->type == PORT_16550A) || | |
1c45607a | 1158 | info->board->chip_flag) { |
1da177e4 | 1159 | spin_lock_irqsave(&info->slock, flags); |
1c45607a | 1160 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1161 | info->IER |= UART_IER_THRI; |
1c45607a | 1162 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1163 | spin_unlock_irqrestore(&info->slock, flags); |
1164 | } | |
1165 | } | |
0be2eade | 1166 | return 1; |
1da177e4 LT |
1167 | } |
1168 | ||
1169 | ||
1170 | static void mxser_flush_chars(struct tty_struct *tty) | |
1171 | { | |
1c45607a | 1172 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1173 | unsigned long flags; |
1174 | ||
ace7dd96 JS |
1175 | if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || |
1176 | (tty->hw_stopped && info->type != PORT_16550A && | |
1177 | !info->board->chip_flag)) | |
1da177e4 LT |
1178 | return; |
1179 | ||
1180 | spin_lock_irqsave(&info->slock, flags); | |
1181 | ||
1c45607a | 1182 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1183 | info->IER |= UART_IER_THRI; |
1c45607a | 1184 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1185 | |
1186 | spin_unlock_irqrestore(&info->slock, flags); | |
1187 | } | |
1188 | ||
1189 | static int mxser_write_room(struct tty_struct *tty) | |
1190 | { | |
1c45607a | 1191 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1192 | int ret; |
1193 | ||
1194 | ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; | |
ace7dd96 | 1195 | return ret < 0 ? 0 : ret; |
1da177e4 LT |
1196 | } |
1197 | ||
1198 | static int mxser_chars_in_buffer(struct tty_struct *tty) | |
1199 | { | |
1c45607a | 1200 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1201 | return info->xmit_cnt; |
1202 | } | |
1203 | ||
1c45607a JS |
1204 | /* |
1205 | * ------------------------------------------------------------ | |
1206 | * friends of mxser_ioctl() | |
1207 | * ------------------------------------------------------------ | |
1208 | */ | |
216ba023 | 1209 | static int mxser_get_serial_info(struct tty_struct *tty, |
1c45607a JS |
1210 | struct serial_struct __user *retinfo) |
1211 | { | |
216ba023 | 1212 | struct mxser_port *info = tty->driver_data; |
1c45607a JS |
1213 | struct serial_struct tmp = { |
1214 | .type = info->type, | |
216ba023 | 1215 | .line = tty->index, |
1c45607a JS |
1216 | .port = info->ioaddr, |
1217 | .irq = info->board->irq, | |
0ad9e7d1 | 1218 | .flags = info->port.flags, |
1c45607a | 1219 | .baud_base = info->baud_base, |
44b7d1b3 AC |
1220 | .close_delay = info->port.close_delay, |
1221 | .closing_wait = info->port.closing_wait, | |
1c45607a | 1222 | .custom_divisor = info->custom_divisor, |
1c45607a JS |
1223 | }; |
1224 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) | |
1225 | return -EFAULT; | |
1226 | return 0; | |
1227 | } | |
1228 | ||
216ba023 | 1229 | static int mxser_set_serial_info(struct tty_struct *tty, |
1c45607a | 1230 | struct serial_struct __user *new_info) |
1da177e4 | 1231 | { |
216ba023 | 1232 | struct mxser_port *info = tty->driver_data; |
07f86c03 | 1233 | struct tty_port *port = &info->port; |
1c45607a | 1234 | struct serial_struct new_serial; |
80ff8a80 | 1235 | speed_t baud; |
1c45607a JS |
1236 | unsigned long sl_flags; |
1237 | unsigned int flags; | |
1238 | int retval = 0; | |
1da177e4 | 1239 | |
1c45607a | 1240 | if (!new_info || !info->ioaddr) |
80ff8a80 | 1241 | return -ENODEV; |
1c45607a JS |
1242 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) |
1243 | return -EFAULT; | |
1da177e4 | 1244 | |
80ff8a80 JS |
1245 | if (new_serial.irq != info->board->irq || |
1246 | new_serial.port != info->ioaddr) | |
1247 | return -EINVAL; | |
1da177e4 | 1248 | |
07f86c03 | 1249 | flags = port->flags & ASYNC_SPD_MASK; |
1da177e4 | 1250 | |
1c45607a JS |
1251 | if (!capable(CAP_SYS_ADMIN)) { |
1252 | if ((new_serial.baud_base != info->baud_base) || | |
44b7d1b3 | 1253 | (new_serial.close_delay != info->port.close_delay) || |
0ad9e7d1 | 1254 | ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) |
1c45607a | 1255 | return -EPERM; |
0ad9e7d1 | 1256 | info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | |
1c45607a JS |
1257 | (new_serial.flags & ASYNC_USR_MASK)); |
1258 | } else { | |
1da177e4 | 1259 | /* |
1c45607a JS |
1260 | * OK, past this point, all the error checking has been done. |
1261 | * At this point, we start making changes..... | |
1da177e4 | 1262 | */ |
07f86c03 | 1263 | port->flags = ((port->flags & ~ASYNC_FLAGS) | |
1c45607a | 1264 | (new_serial.flags & ASYNC_FLAGS)); |
07f86c03 AC |
1265 | port->close_delay = new_serial.close_delay * HZ / 100; |
1266 | port->closing_wait = new_serial.closing_wait * HZ / 100; | |
d6c53c0e | 1267 | port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; |
07f86c03 | 1268 | if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && |
80ff8a80 JS |
1269 | (new_serial.baud_base != info->baud_base || |
1270 | new_serial.custom_divisor != | |
1271 | info->custom_divisor)) { | |
07f86c03 AC |
1272 | if (new_serial.custom_divisor == 0) |
1273 | return -EINVAL; | |
80ff8a80 | 1274 | baud = new_serial.baud_base / new_serial.custom_divisor; |
216ba023 | 1275 | tty_encode_baud_rate(tty, baud, baud); |
80ff8a80 | 1276 | } |
1c45607a | 1277 | } |
fc83815c | 1278 | |
1c45607a | 1279 | info->type = new_serial.type; |
1da177e4 | 1280 | |
1c45607a JS |
1281 | process_txrx_fifo(info); |
1282 | ||
d41861ca | 1283 | if (tty_port_initialized(port)) { |
07f86c03 | 1284 | if (flags != (port->flags & ASYNC_SPD_MASK)) { |
1c45607a | 1285 | spin_lock_irqsave(&info->slock, sl_flags); |
2799707f | 1286 | mxser_change_speed(tty); |
1c45607a | 1287 | spin_unlock_irqrestore(&info->slock, sl_flags); |
1da177e4 | 1288 | } |
6769140d | 1289 | } else { |
07f86c03 | 1290 | retval = mxser_activate(port, tty); |
6769140d | 1291 | if (retval == 0) |
d41861ca | 1292 | tty_port_set_initialized(port, 1); |
6769140d | 1293 | } |
1c45607a JS |
1294 | return retval; |
1295 | } | |
1da177e4 | 1296 | |
1c45607a JS |
1297 | /* |
1298 | * mxser_get_lsr_info - get line status register info | |
1299 | * | |
1300 | * Purpose: Let user call ioctl() to get info when the UART physically | |
1301 | * is emptied. On bus types like RS485, the transmitter must | |
1302 | * release the bus after transmitting. This must be done when | |
1303 | * the transmit shift register is empty, not be done when the | |
1304 | * transmit holding register is empty. This functionality | |
1305 | * allows an RS485 driver to be written in user space. | |
1306 | */ | |
1307 | static int mxser_get_lsr_info(struct mxser_port *info, | |
1308 | unsigned int __user *value) | |
1309 | { | |
1310 | unsigned char status; | |
1311 | unsigned int result; | |
1312 | unsigned long flags; | |
1da177e4 | 1313 | |
1c45607a JS |
1314 | spin_lock_irqsave(&info->slock, flags); |
1315 | status = inb(info->ioaddr + UART_LSR); | |
1316 | spin_unlock_irqrestore(&info->slock, flags); | |
1317 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | |
1318 | return put_user(result, value); | |
1319 | } | |
1da177e4 | 1320 | |
60b33c13 | 1321 | static int mxser_tiocmget(struct tty_struct *tty) |
1c45607a JS |
1322 | { |
1323 | struct mxser_port *info = tty->driver_data; | |
1324 | unsigned char control, status; | |
1325 | unsigned long flags; | |
1da177e4 | 1326 | |
8ea2c2ec | 1327 | |
1c45607a JS |
1328 | if (tty->index == MXSER_PORTS) |
1329 | return -ENOIOCTLCMD; | |
18900ca6 | 1330 | if (tty_io_error(tty)) |
1c45607a | 1331 | return -EIO; |
1da177e4 | 1332 | |
1c45607a | 1333 | control = info->MCR; |
1da177e4 | 1334 | |
1c45607a JS |
1335 | spin_lock_irqsave(&info->slock, flags); |
1336 | status = inb(info->ioaddr + UART_MSR); | |
1337 | if (status & UART_MSR_ANY_DELTA) | |
216ba023 | 1338 | mxser_check_modem_status(tty, info, status); |
1c45607a JS |
1339 | spin_unlock_irqrestore(&info->slock, flags); |
1340 | return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | | |
1341 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | | |
1342 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | | |
1343 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | | |
1344 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | | |
1345 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | |
1346 | } | |
1da177e4 | 1347 | |
20b9d177 | 1348 | static int mxser_tiocmset(struct tty_struct *tty, |
1c45607a JS |
1349 | unsigned int set, unsigned int clear) |
1350 | { | |
1351 | struct mxser_port *info = tty->driver_data; | |
1352 | unsigned long flags; | |
1da177e4 | 1353 | |
1da177e4 | 1354 | |
1c45607a JS |
1355 | if (tty->index == MXSER_PORTS) |
1356 | return -ENOIOCTLCMD; | |
18900ca6 | 1357 | if (tty_io_error(tty)) |
1c45607a | 1358 | return -EIO; |
1da177e4 | 1359 | |
1c45607a | 1360 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 1361 | |
1c45607a JS |
1362 | if (set & TIOCM_RTS) |
1363 | info->MCR |= UART_MCR_RTS; | |
1364 | if (set & TIOCM_DTR) | |
1365 | info->MCR |= UART_MCR_DTR; | |
1da177e4 | 1366 | |
1c45607a JS |
1367 | if (clear & TIOCM_RTS) |
1368 | info->MCR &= ~UART_MCR_RTS; | |
1369 | if (clear & TIOCM_DTR) | |
1370 | info->MCR &= ~UART_MCR_DTR; | |
8ea2c2ec | 1371 | |
1c45607a JS |
1372 | outb(info->MCR, info->ioaddr + UART_MCR); |
1373 | spin_unlock_irqrestore(&info->slock, flags); | |
1374 | return 0; | |
1375 | } | |
1da177e4 | 1376 | |
1c45607a JS |
1377 | static int __init mxser_program_mode(int port) |
1378 | { | |
1379 | int id, i, j, n; | |
1380 | ||
1381 | outb(0, port); | |
1382 | outb(0, port); | |
1383 | outb(0, port); | |
1384 | (void)inb(port); | |
1385 | (void)inb(port); | |
1386 | outb(0, port); | |
1387 | (void)inb(port); | |
1388 | ||
1389 | id = inb(port + 1) & 0x1F; | |
1390 | if ((id != C168_ASIC_ID) && | |
1391 | (id != C104_ASIC_ID) && | |
1392 | (id != C102_ASIC_ID) && | |
1393 | (id != CI132_ASIC_ID) && | |
1394 | (id != CI134_ASIC_ID) && | |
1395 | (id != CI104J_ASIC_ID)) | |
1396 | return -1; | |
1397 | for (i = 0, j = 0; i < 4; i++) { | |
1398 | n = inb(port + 2); | |
1399 | if (n == 'M') { | |
1400 | j = 1; | |
1401 | } else if ((j == 1) && (n == 1)) { | |
1402 | j = 2; | |
1403 | break; | |
1404 | } else | |
1405 | j = 0; | |
1da177e4 | 1406 | } |
1c45607a JS |
1407 | if (j != 2) |
1408 | id = -2; | |
1409 | return id; | |
1da177e4 LT |
1410 | } |
1411 | ||
1c45607a JS |
1412 | static void __init mxser_normal_mode(int port) |
1413 | { | |
1414 | int i, n; | |
1415 | ||
1416 | outb(0xA5, port + 1); | |
1417 | outb(0x80, port + 3); | |
1418 | outb(12, port + 0); /* 9600 bps */ | |
1419 | outb(0, port + 1); | |
1420 | outb(0x03, port + 3); /* 8 data bits */ | |
1421 | outb(0x13, port + 4); /* loop back mode */ | |
1422 | for (i = 0; i < 16; i++) { | |
1423 | n = inb(port + 5); | |
1424 | if ((n & 0x61) == 0x60) | |
1425 | break; | |
1426 | if ((n & 1) == 1) | |
1427 | (void)inb(port); | |
1428 | } | |
1429 | outb(0x00, port + 4); | |
1430 | } | |
1431 | ||
1432 | #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ | |
1433 | #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ | |
1434 | #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ | |
1435 | #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ | |
1436 | #define EN_CCMD 0x000 /* Chip's command register */ | |
1437 | #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ | |
1438 | #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ | |
1439 | #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ | |
1440 | #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ | |
1441 | #define EN0_DCFG 0x00E /* Data configuration reg WR */ | |
1442 | #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ | |
1443 | #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ | |
1444 | #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ | |
1445 | static int __init mxser_read_register(int port, unsigned short *regs) | |
1446 | { | |
1447 | int i, k, value, id; | |
1448 | unsigned int j; | |
1449 | ||
1450 | id = mxser_program_mode(port); | |
1451 | if (id < 0) | |
1452 | return id; | |
1453 | for (i = 0; i < 14; i++) { | |
1454 | k = (i & 0x3F) | 0x180; | |
1455 | for (j = 0x100; j > 0; j >>= 1) { | |
1456 | outb(CHIP_CS, port); | |
1457 | if (k & j) { | |
1458 | outb(CHIP_CS | CHIP_DO, port); | |
1459 | outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ | |
1460 | } else { | |
1461 | outb(CHIP_CS, port); | |
1462 | outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ | |
1463 | } | |
1464 | } | |
1465 | (void)inb(port); | |
1466 | value = 0; | |
1467 | for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { | |
1468 | outb(CHIP_CS, port); | |
1469 | outb(CHIP_CS | CHIP_SK, port); | |
1470 | if (inb(port) & CHIP_DI) | |
1471 | value |= j; | |
1472 | } | |
1473 | regs[i] = value; | |
1474 | outb(0, port); | |
1475 | } | |
1476 | mxser_normal_mode(port); | |
1477 | return id; | |
1478 | } | |
1da177e4 LT |
1479 | |
1480 | static int mxser_ioctl_special(unsigned int cmd, void __user *argp) | |
1481 | { | |
07f86c03 AC |
1482 | struct mxser_port *ip; |
1483 | struct tty_port *port; | |
216ba023 | 1484 | struct tty_struct *tty; |
1c45607a JS |
1485 | int result, status; |
1486 | unsigned int i, j; | |
9d6d162d | 1487 | int ret = 0; |
1da177e4 LT |
1488 | |
1489 | switch (cmd) { | |
1da177e4 | 1490 | case MOXA_GET_MAJOR: |
5a3c6b25 | 1491 | printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl " |
8f3d137e JS |
1492 | "%x (GET_MAJOR), fix your userspace\n", |
1493 | current->comm, cmd); | |
1c45607a | 1494 | return put_user(ttymajor, (int __user *)argp); |
1da177e4 LT |
1495 | |
1496 | case MOXA_CHKPORTENABLE: | |
1497 | result = 0; | |
1c45607a JS |
1498 | for (i = 0; i < MXSER_BOARDS; i++) |
1499 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) | |
1500 | if (mxser_boards[i].ports[j].ioaddr) | |
1501 | result |= (1 << i); | |
8ea2c2ec | 1502 | return put_user(result, (unsigned long __user *)argp); |
1da177e4 | 1503 | case MOXA_GETDATACOUNT: |
07f86c03 AC |
1504 | /* The receive side is locked by port->slock but it isn't |
1505 | clear that an exact snapshot is worth copying here */ | |
1da177e4 | 1506 | if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) |
9d6d162d | 1507 | ret = -EFAULT; |
9d6d162d | 1508 | return ret; |
72800df9 JS |
1509 | case MOXA_GETMSTATUS: { |
1510 | struct mxser_mstatus ms, __user *msu = argp; | |
1c45607a JS |
1511 | for (i = 0; i < MXSER_BOARDS; i++) |
1512 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
07f86c03 AC |
1513 | ip = &mxser_boards[i].ports[j]; |
1514 | port = &ip->port; | |
72800df9 | 1515 | memset(&ms, 0, sizeof(ms)); |
1c45607a | 1516 | |
07f86c03 AC |
1517 | mutex_lock(&port->mutex); |
1518 | if (!ip->ioaddr) | |
72800df9 | 1519 | goto copy; |
216ba023 | 1520 | |
07f86c03 | 1521 | tty = tty_port_tty_get(port); |
1da177e4 | 1522 | |
adc8d746 | 1523 | if (!tty) |
07f86c03 | 1524 | ms.cflag = ip->normal_termios.c_cflag; |
1c45607a | 1525 | else |
adc8d746 | 1526 | ms.cflag = tty->termios.c_cflag; |
216ba023 | 1527 | tty_kref_put(tty); |
07f86c03 AC |
1528 | spin_lock_irq(&ip->slock); |
1529 | status = inb(ip->ioaddr + UART_MSR); | |
1530 | spin_unlock_irq(&ip->slock); | |
72800df9 JS |
1531 | if (status & UART_MSR_DCD) |
1532 | ms.dcd = 1; | |
1533 | if (status & UART_MSR_DSR) | |
1534 | ms.dsr = 1; | |
1535 | if (status & UART_MSR_CTS) | |
1536 | ms.cts = 1; | |
1537 | copy: | |
07f86c03 AC |
1538 | mutex_unlock(&port->mutex); |
1539 | if (copy_to_user(msu, &ms, sizeof(ms))) | |
72800df9 | 1540 | return -EFAULT; |
72800df9 | 1541 | msu++; |
1c45607a | 1542 | } |
1da177e4 | 1543 | return 0; |
72800df9 | 1544 | } |
8ea2c2ec | 1545 | case MOXA_ASPP_MON_EXT: { |
72800df9 JS |
1546 | struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ |
1547 | unsigned int cflag, iflag, p; | |
1548 | u8 opmode; | |
1549 | ||
1550 | me = kzalloc(sizeof(*me), GFP_KERNEL); | |
1551 | if (!me) | |
1552 | return -ENOMEM; | |
1c45607a | 1553 | |
72800df9 JS |
1554 | for (i = 0, p = 0; i < MXSER_BOARDS; i++) { |
1555 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { | |
1556 | if (p >= ARRAY_SIZE(me->rx_cnt)) { | |
1557 | i = MXSER_BOARDS; | |
1558 | break; | |
1559 | } | |
07f86c03 AC |
1560 | ip = &mxser_boards[i].ports[j]; |
1561 | port = &ip->port; | |
1562 | ||
1563 | mutex_lock(&port->mutex); | |
1564 | if (!ip->ioaddr) { | |
1565 | mutex_unlock(&port->mutex); | |
1da177e4 | 1566 | continue; |
07f86c03 | 1567 | } |
1da177e4 | 1568 | |
07f86c03 AC |
1569 | spin_lock_irq(&ip->slock); |
1570 | status = mxser_get_msr(ip->ioaddr, 0, p); | |
1c45607a | 1571 | |
1da177e4 | 1572 | if (status & UART_MSR_TERI) |
07f86c03 | 1573 | ip->icount.rng++; |
1da177e4 | 1574 | if (status & UART_MSR_DDSR) |
07f86c03 | 1575 | ip->icount.dsr++; |
1da177e4 | 1576 | if (status & UART_MSR_DDCD) |
07f86c03 | 1577 | ip->icount.dcd++; |
1da177e4 | 1578 | if (status & UART_MSR_DCTS) |
07f86c03 | 1579 | ip->icount.cts++; |
1c45607a | 1580 | |
07f86c03 AC |
1581 | ip->mon_data.modem_status = status; |
1582 | me->rx_cnt[p] = ip->mon_data.rxcnt; | |
1583 | me->tx_cnt[p] = ip->mon_data.txcnt; | |
1584 | me->up_rxcnt[p] = ip->mon_data.up_rxcnt; | |
1585 | me->up_txcnt[p] = ip->mon_data.up_txcnt; | |
72800df9 | 1586 | me->modem_status[p] = |
07f86c03 AC |
1587 | ip->mon_data.modem_status; |
1588 | spin_unlock_irq(&ip->slock); | |
1589 | ||
1590 | tty = tty_port_tty_get(&ip->port); | |
1c45607a | 1591 | |
adc8d746 | 1592 | if (!tty) { |
07f86c03 AC |
1593 | cflag = ip->normal_termios.c_cflag; |
1594 | iflag = ip->normal_termios.c_iflag; | |
1595 | me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios); | |
1da177e4 | 1596 | } else { |
adc8d746 AC |
1597 | cflag = tty->termios.c_cflag; |
1598 | iflag = tty->termios.c_iflag; | |
216ba023 | 1599 | me->baudrate[p] = tty_get_baud_rate(tty); |
1da177e4 | 1600 | } |
216ba023 | 1601 | tty_kref_put(tty); |
1da177e4 | 1602 | |
72800df9 JS |
1603 | me->databits[p] = cflag & CSIZE; |
1604 | me->stopbits[p] = cflag & CSTOPB; | |
1605 | me->parity[p] = cflag & (PARENB | PARODD | | |
1606 | CMSPAR); | |
1da177e4 LT |
1607 | |
1608 | if (cflag & CRTSCTS) | |
72800df9 | 1609 | me->flowctrl[p] |= 0x03; |
1da177e4 LT |
1610 | |
1611 | if (iflag & (IXON | IXOFF)) | |
72800df9 | 1612 | me->flowctrl[p] |= 0x0C; |
1da177e4 | 1613 | |
07f86c03 | 1614 | if (ip->type == PORT_16550A) |
72800df9 | 1615 | me->fifo[p] = 1; |
1da177e4 | 1616 | |
dfc7b837 MK |
1617 | if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) { |
1618 | opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2); | |
1619 | opmode &= OP_MODE_MASK; | |
1620 | } else { | |
1621 | opmode = RS232_MODE; | |
1622 | } | |
72800df9 | 1623 | me->iftype[p] = opmode; |
07f86c03 | 1624 | mutex_unlock(&port->mutex); |
1da177e4 | 1625 | } |
9d6d162d | 1626 | } |
72800df9 JS |
1627 | if (copy_to_user(argp, me, sizeof(*me))) |
1628 | ret = -EFAULT; | |
1629 | kfree(me); | |
1630 | return ret; | |
9d6d162d AC |
1631 | } |
1632 | default: | |
1da177e4 LT |
1633 | return -ENOIOCTLCMD; |
1634 | } | |
1635 | return 0; | |
1636 | } | |
1637 | ||
1c45607a JS |
1638 | static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, |
1639 | struct async_icount *cprev) | |
1da177e4 | 1640 | { |
1c45607a JS |
1641 | struct async_icount cnow; |
1642 | unsigned long flags; | |
1643 | int ret; | |
1da177e4 | 1644 | |
1c45607a JS |
1645 | spin_lock_irqsave(&info->slock, flags); |
1646 | cnow = info->icount; /* atomic copy */ | |
1647 | spin_unlock_irqrestore(&info->slock, flags); | |
1da177e4 | 1648 | |
1c45607a JS |
1649 | ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || |
1650 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || | |
1651 | ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || | |
1652 | ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); | |
1da177e4 | 1653 | |
1c45607a JS |
1654 | *cprev = cnow; |
1655 | ||
1656 | return ret; | |
1657 | } | |
1658 | ||
6caa76b7 | 1659 | static int mxser_ioctl(struct tty_struct *tty, |
1c45607a | 1660 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1661 | { |
1c45607a | 1662 | struct mxser_port *info = tty->driver_data; |
07f86c03 | 1663 | struct tty_port *port = &info->port; |
1c45607a | 1664 | struct async_icount cnow; |
1c45607a JS |
1665 | unsigned long flags; |
1666 | void __user *argp = (void __user *)arg; | |
1667 | int retval; | |
1da177e4 | 1668 | |
1c45607a JS |
1669 | if (tty->index == MXSER_PORTS) |
1670 | return mxser_ioctl_special(cmd, argp); | |
1da177e4 | 1671 | |
1c45607a JS |
1672 | if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { |
1673 | int p; | |
1674 | unsigned long opmode; | |
1675 | static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; | |
1676 | int shiftbit; | |
1677 | unsigned char val, mask; | |
1da177e4 | 1678 | |
e037f95f MK |
1679 | if (info->board->chip_flag != MOXA_MUST_MU860_HWID) |
1680 | return -EFAULT; | |
1681 | ||
1c45607a JS |
1682 | p = tty->index % 4; |
1683 | if (cmd == MOXA_SET_OP_MODE) { | |
1684 | if (get_user(opmode, (int __user *) argp)) | |
1685 | return -EFAULT; | |
1686 | if (opmode != RS232_MODE && | |
1687 | opmode != RS485_2WIRE_MODE && | |
1688 | opmode != RS422_MODE && | |
1689 | opmode != RS485_4WIRE_MODE) | |
1690 | return -EFAULT; | |
1691 | mask = ModeMask[p]; | |
1692 | shiftbit = p * 2; | |
07f86c03 | 1693 | spin_lock_irq(&info->slock); |
1c45607a JS |
1694 | val = inb(info->opmode_ioaddr); |
1695 | val &= mask; | |
1696 | val |= (opmode << shiftbit); | |
1697 | outb(val, info->opmode_ioaddr); | |
07f86c03 | 1698 | spin_unlock_irq(&info->slock); |
1c45607a JS |
1699 | } else { |
1700 | shiftbit = p * 2; | |
07f86c03 | 1701 | spin_lock_irq(&info->slock); |
1c45607a | 1702 | opmode = inb(info->opmode_ioaddr) >> shiftbit; |
07f86c03 | 1703 | spin_unlock_irq(&info->slock); |
1c45607a JS |
1704 | opmode &= OP_MODE_MASK; |
1705 | if (put_user(opmode, (int __user *)argp)) | |
1706 | return -EFAULT; | |
1707 | } | |
1708 | return 0; | |
1709 | } | |
1710 | ||
18900ca6 | 1711 | if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && tty_io_error(tty)) |
1c45607a JS |
1712 | return -EIO; |
1713 | ||
1714 | switch (cmd) { | |
1c45607a | 1715 | case TIOCGSERIAL: |
07f86c03 | 1716 | mutex_lock(&port->mutex); |
216ba023 | 1717 | retval = mxser_get_serial_info(tty, argp); |
07f86c03 | 1718 | mutex_unlock(&port->mutex); |
9d6d162d | 1719 | return retval; |
1c45607a | 1720 | case TIOCSSERIAL: |
07f86c03 | 1721 | mutex_lock(&port->mutex); |
216ba023 | 1722 | retval = mxser_set_serial_info(tty, argp); |
07f86c03 | 1723 | mutex_unlock(&port->mutex); |
9d6d162d | 1724 | return retval; |
1c45607a | 1725 | case TIOCSERGETLSR: /* Get line status register */ |
9d6d162d | 1726 | return mxser_get_lsr_info(info, argp); |
1c45607a JS |
1727 | /* |
1728 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | |
1729 | * - mask passed in arg for lines of interest | |
1730 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | |
1731 | * Caller should use TIOCGICOUNT to see which one it was | |
1732 | */ | |
1733 | case TIOCMIWAIT: | |
1734 | spin_lock_irqsave(&info->slock, flags); | |
1735 | cnow = info->icount; /* note the counters on entry */ | |
1736 | spin_unlock_irqrestore(&info->slock, flags); | |
1737 | ||
bdc04e31 | 1738 | return wait_event_interruptible(info->port.delta_msr_wait, |
1c45607a | 1739 | mxser_cflags_changed(info, arg, &cnow)); |
1c45607a JS |
1740 | case MOXA_HighSpeedOn: |
1741 | return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); | |
1742 | case MOXA_SDS_RSTICOUNTER: | |
07f86c03 | 1743 | spin_lock_irq(&info->slock); |
1c45607a JS |
1744 | info->mon_data.rxcnt = 0; |
1745 | info->mon_data.txcnt = 0; | |
07f86c03 | 1746 | spin_unlock_irq(&info->slock); |
1c45607a JS |
1747 | return 0; |
1748 | ||
1749 | case MOXA_ASPP_OQUEUE:{ | |
1750 | int len, lsr; | |
1751 | ||
1752 | len = mxser_chars_in_buffer(tty); | |
c6eb69ac | 1753 | spin_lock_irq(&info->slock); |
a75b7b68 | 1754 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; |
07f86c03 | 1755 | spin_unlock_irq(&info->slock); |
1c45607a JS |
1756 | len += (lsr ? 0 : 1); |
1757 | ||
1758 | return put_user(len, (int __user *)argp); | |
1759 | } | |
1760 | case MOXA_ASPP_MON: { | |
1761 | int mcr, status; | |
1762 | ||
c6eb69ac | 1763 | spin_lock_irq(&info->slock); |
1c45607a | 1764 | status = mxser_get_msr(info->ioaddr, 1, tty->index); |
216ba023 | 1765 | mxser_check_modem_status(tty, info, status); |
1c45607a JS |
1766 | |
1767 | mcr = inb(info->ioaddr + UART_MCR); | |
c6eb69ac | 1768 | spin_unlock_irq(&info->slock); |
07f86c03 | 1769 | |
1c45607a JS |
1770 | if (mcr & MOXA_MUST_MCR_XON_FLAG) |
1771 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; | |
1772 | else | |
1773 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; | |
1774 | ||
1775 | if (mcr & MOXA_MUST_MCR_TX_XON) | |
1776 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; | |
1777 | else | |
1778 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; | |
1779 | ||
216ba023 | 1780 | if (tty->hw_stopped) |
1c45607a JS |
1781 | info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; |
1782 | else | |
1783 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; | |
07f86c03 | 1784 | |
1c45607a JS |
1785 | if (copy_to_user(argp, &info->mon_data, |
1786 | sizeof(struct mxser_mon))) | |
1787 | return -EFAULT; | |
1788 | ||
1789 | return 0; | |
1790 | } | |
1791 | case MOXA_ASPP_LSTATUS: { | |
1792 | if (put_user(info->err_shadow, (unsigned char __user *)argp)) | |
1793 | return -EFAULT; | |
1794 | ||
1795 | info->err_shadow = 0; | |
1796 | return 0; | |
1797 | } | |
1798 | case MOXA_SET_BAUD_METHOD: { | |
1799 | int method; | |
1800 | ||
1801 | if (get_user(method, (int __user *)argp)) | |
1802 | return -EFAULT; | |
1803 | mxser_set_baud_method[tty->index] = method; | |
1804 | return put_user(method, (int __user *)argp); | |
1805 | } | |
1806 | default: | |
1807 | return -ENOIOCTLCMD; | |
1808 | } | |
1809 | return 0; | |
1810 | } | |
1811 | ||
0587102c AC |
1812 | /* |
1813 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | |
1814 | * Return: write counters to the user passed counter struct | |
1815 | * NB: both 1->0 and 0->1 transitions are counted except for | |
1816 | * RI where only 0->1 is counted. | |
1817 | */ | |
1818 | ||
1819 | static int mxser_get_icount(struct tty_struct *tty, | |
1820 | struct serial_icounter_struct *icount) | |
1821 | ||
1822 | { | |
1823 | struct mxser_port *info = tty->driver_data; | |
1824 | struct async_icount cnow; | |
1825 | unsigned long flags; | |
1826 | ||
1827 | spin_lock_irqsave(&info->slock, flags); | |
1828 | cnow = info->icount; | |
1829 | spin_unlock_irqrestore(&info->slock, flags); | |
1830 | ||
1831 | icount->frame = cnow.frame; | |
1832 | icount->brk = cnow.brk; | |
1833 | icount->overrun = cnow.overrun; | |
1834 | icount->buf_overrun = cnow.buf_overrun; | |
1835 | icount->parity = cnow.parity; | |
1836 | icount->rx = cnow.rx; | |
1837 | icount->tx = cnow.tx; | |
1838 | icount->cts = cnow.cts; | |
1839 | icount->dsr = cnow.dsr; | |
1840 | icount->rng = cnow.rng; | |
1841 | icount->dcd = cnow.dcd; | |
1842 | return 0; | |
1843 | } | |
1844 | ||
1c45607a JS |
1845 | static void mxser_stoprx(struct tty_struct *tty) |
1846 | { | |
1847 | struct mxser_port *info = tty->driver_data; | |
1848 | ||
1849 | info->ldisc_stop_rx = 1; | |
1850 | if (I_IXOFF(tty)) { | |
1851 | if (info->board->chip_flag) { | |
1852 | info->IER &= ~MOXA_MUST_RECV_ISR; | |
1853 | outb(info->IER, info->ioaddr + UART_IER); | |
1854 | } else { | |
1855 | info->x_char = STOP_CHAR(tty); | |
1856 | outb(0, info->ioaddr + UART_IER); | |
1857 | info->IER |= UART_IER_THRI; | |
1858 | outb(info->IER, info->ioaddr + UART_IER); | |
1da177e4 LT |
1859 | } |
1860 | } | |
1861 | ||
9db276f8 | 1862 | if (C_CRTSCTS(tty)) { |
1c45607a JS |
1863 | info->MCR &= ~UART_MCR_RTS; |
1864 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
1865 | } |
1866 | } | |
1867 | ||
1868 | /* | |
1869 | * This routine is called by the upper-layer tty layer to signal that | |
1870 | * incoming characters should be throttled. | |
1871 | */ | |
1872 | static void mxser_throttle(struct tty_struct *tty) | |
1873 | { | |
1da177e4 | 1874 | mxser_stoprx(tty); |
1da177e4 LT |
1875 | } |
1876 | ||
1877 | static void mxser_unthrottle(struct tty_struct *tty) | |
1878 | { | |
1c45607a | 1879 | struct mxser_port *info = tty->driver_data; |
1da177e4 | 1880 | |
1c45607a JS |
1881 | /* startrx */ |
1882 | info->ldisc_stop_rx = 0; | |
1883 | if (I_IXOFF(tty)) { | |
1884 | if (info->x_char) | |
1885 | info->x_char = 0; | |
1886 | else { | |
1887 | if (info->board->chip_flag) { | |
1888 | info->IER |= MOXA_MUST_RECV_ISR; | |
1889 | outb(info->IER, info->ioaddr + UART_IER); | |
1890 | } else { | |
1891 | info->x_char = START_CHAR(tty); | |
1892 | outb(0, info->ioaddr + UART_IER); | |
1893 | info->IER |= UART_IER_THRI; | |
1894 | outb(info->IER, info->ioaddr + UART_IER); | |
1895 | } | |
1da177e4 | 1896 | } |
1c45607a | 1897 | } |
1da177e4 | 1898 | |
9db276f8 | 1899 | if (C_CRTSCTS(tty)) { |
1c45607a JS |
1900 | info->MCR |= UART_MCR_RTS; |
1901 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1da177e4 LT |
1902 | } |
1903 | } | |
1904 | ||
1905 | /* | |
1906 | * mxser_stop() and mxser_start() | |
1907 | * | |
1908 | * This routines are called before setting or resetting tty->stopped. | |
1909 | * They enable or disable transmitter interrupts, as necessary. | |
1910 | */ | |
1911 | static void mxser_stop(struct tty_struct *tty) | |
1912 | { | |
1c45607a | 1913 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1914 | unsigned long flags; |
1915 | ||
1916 | spin_lock_irqsave(&info->slock, flags); | |
1917 | if (info->IER & UART_IER_THRI) { | |
1918 | info->IER &= ~UART_IER_THRI; | |
1c45607a | 1919 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1920 | } |
1921 | spin_unlock_irqrestore(&info->slock, flags); | |
1922 | } | |
1923 | ||
1924 | static void mxser_start(struct tty_struct *tty) | |
1925 | { | |
1c45607a | 1926 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
1927 | unsigned long flags; |
1928 | ||
1929 | spin_lock_irqsave(&info->slock, flags); | |
0ad9e7d1 | 1930 | if (info->xmit_cnt && info->port.xmit_buf) { |
1c45607a | 1931 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
1da177e4 | 1932 | info->IER |= UART_IER_THRI; |
1c45607a | 1933 | outb(info->IER, info->ioaddr + UART_IER); |
1da177e4 LT |
1934 | } |
1935 | spin_unlock_irqrestore(&info->slock, flags); | |
1936 | } | |
1937 | ||
1c45607a JS |
1938 | static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) |
1939 | { | |
1940 | struct mxser_port *info = tty->driver_data; | |
1941 | unsigned long flags; | |
1942 | ||
1943 | spin_lock_irqsave(&info->slock, flags); | |
2799707f | 1944 | mxser_change_speed(tty); |
1c45607a JS |
1945 | spin_unlock_irqrestore(&info->slock, flags); |
1946 | ||
9db276f8 | 1947 | if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) { |
1c45607a JS |
1948 | tty->hw_stopped = 0; |
1949 | mxser_start(tty); | |
1950 | } | |
1951 | ||
1952 | /* Handle sw stopped */ | |
9db276f8 | 1953 | if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) { |
1c45607a JS |
1954 | tty->stopped = 0; |
1955 | ||
1956 | if (info->board->chip_flag) { | |
1957 | spin_lock_irqsave(&info->slock, flags); | |
148ff86b CH |
1958 | mxser_disable_must_rx_software_flow_control( |
1959 | info->ioaddr); | |
1c45607a JS |
1960 | spin_unlock_irqrestore(&info->slock, flags); |
1961 | } | |
1962 | ||
1963 | mxser_start(tty); | |
1964 | } | |
1965 | } | |
1966 | ||
1da177e4 LT |
1967 | /* |
1968 | * mxser_wait_until_sent() --- wait until the transmitter is empty | |
1969 | */ | |
1970 | static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) | |
1971 | { | |
1c45607a | 1972 | struct mxser_port *info = tty->driver_data; |
1da177e4 | 1973 | unsigned long orig_jiffies, char_time; |
07f86c03 | 1974 | unsigned long flags; |
1da177e4 LT |
1975 | int lsr; |
1976 | ||
1977 | if (info->type == PORT_UNKNOWN) | |
1978 | return; | |
1979 | ||
1980 | if (info->xmit_fifo_size == 0) | |
1981 | return; /* Just in case.... */ | |
1982 | ||
1983 | orig_jiffies = jiffies; | |
1984 | /* | |
1985 | * Set the check interval to be 1/5 of the estimated time to | |
1986 | * send a single character, and make it at least 1. The check | |
1987 | * interval should also be less than the timeout. | |
1988 | * | |
1989 | * Note: we have to use pretty tight timings here to satisfy | |
1990 | * the NIST-PCTS. | |
1991 | */ | |
1992 | char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; | |
1993 | char_time = char_time / 5; | |
1994 | if (char_time == 0) | |
1995 | char_time = 1; | |
1996 | if (timeout && timeout < char_time) | |
1997 | char_time = timeout; | |
1998 | /* | |
1999 | * If the transmitter hasn't cleared in twice the approximate | |
2000 | * amount of time to send the entire FIFO, it probably won't | |
2001 | * ever clear. This assumes the UART isn't doing flow | |
2002 | * control, which is currently the case. Hence, if it ever | |
2003 | * takes longer than info->timeout, this is probably due to a | |
2004 | * UART bug of some kind. So, we clamp the timeout parameter at | |
2005 | * 2*info->timeout. | |
2006 | */ | |
2007 | if (!timeout || timeout > 2 * info->timeout) | |
2008 | timeout = 2 * info->timeout; | |
8bab534b | 2009 | |
07f86c03 | 2010 | spin_lock_irqsave(&info->slock, flags); |
1c45607a | 2011 | while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { |
07f86c03 | 2012 | spin_unlock_irqrestore(&info->slock, flags); |
da4cd8df | 2013 | schedule_timeout_interruptible(char_time); |
07f86c03 | 2014 | spin_lock_irqsave(&info->slock, flags); |
1da177e4 | 2015 | if (signal_pending(current)) |
1c45607a JS |
2016 | break; |
2017 | if (timeout && time_after(jiffies, orig_jiffies + timeout)) | |
2018 | break; | |
1da177e4 | 2019 | } |
07f86c03 | 2020 | spin_unlock_irqrestore(&info->slock, flags); |
1c45607a | 2021 | set_current_state(TASK_RUNNING); |
1c45607a | 2022 | } |
1da177e4 | 2023 | |
1c45607a JS |
2024 | /* |
2025 | * This routine is called by tty_hangup() when a hangup is signaled. | |
2026 | */ | |
2027 | static void mxser_hangup(struct tty_struct *tty) | |
2028 | { | |
2029 | struct mxser_port *info = tty->driver_data; | |
1da177e4 | 2030 | |
1c45607a | 2031 | mxser_flush_buffer(tty); |
3b6826b2 | 2032 | tty_port_hangup(&info->port); |
1da177e4 LT |
2033 | } |
2034 | ||
1c45607a JS |
2035 | /* |
2036 | * mxser_rs_break() --- routine which turns the break handling on or off | |
2037 | */ | |
9e98966c | 2038 | static int mxser_rs_break(struct tty_struct *tty, int break_state) |
1da177e4 | 2039 | { |
1c45607a | 2040 | struct mxser_port *info = tty->driver_data; |
1da177e4 LT |
2041 | unsigned long flags; |
2042 | ||
1c45607a JS |
2043 | spin_lock_irqsave(&info->slock, flags); |
2044 | if (break_state == -1) | |
2045 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
2046 | info->ioaddr + UART_LCR); | |
2047 | else | |
2048 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
2049 | info->ioaddr + UART_LCR); | |
2050 | spin_unlock_irqrestore(&info->slock, flags); | |
9e98966c | 2051 | return 0; |
1c45607a | 2052 | } |
1da177e4 | 2053 | |
216ba023 AC |
2054 | static void mxser_receive_chars(struct tty_struct *tty, |
2055 | struct mxser_port *port, int *status) | |
1c45607a | 2056 | { |
1c45607a JS |
2057 | unsigned char ch, gdl; |
2058 | int ignored = 0; | |
2059 | int cnt = 0; | |
2060 | int recv_room; | |
2061 | int max = 256; | |
1da177e4 | 2062 | |
1c45607a | 2063 | recv_room = tty->receive_room; |
216ba023 | 2064 | if (recv_room == 0 && !port->ldisc_stop_rx) |
1c45607a | 2065 | mxser_stoprx(tty); |
1c45607a | 2066 | if (port->board->chip_flag != MOXA_OTHER_UART) { |
1da177e4 | 2067 | |
1c45607a JS |
2068 | if (*status & UART_LSR_SPECIAL) |
2069 | goto intr_old; | |
2070 | if (port->board->chip_flag == MOXA_MUST_MU860_HWID && | |
2071 | (*status & MOXA_MUST_LSR_RERR)) | |
2072 | goto intr_old; | |
2073 | if (*status & MOXA_MUST_LSR_RERR) | |
2074 | goto intr_old; | |
1da177e4 | 2075 | |
1c45607a JS |
2076 | gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); |
2077 | ||
2078 | if (port->board->chip_flag == MOXA_MUST_MU150_HWID) | |
2079 | gdl &= MOXA_MUST_GDL_MASK; | |
2080 | if (gdl >= recv_room) { | |
2081 | if (!port->ldisc_stop_rx) | |
2082 | mxser_stoprx(tty); | |
2083 | } | |
2084 | while (gdl--) { | |
2085 | ch = inb(port->ioaddr + UART_RX); | |
92a19f9c | 2086 | tty_insert_flip_char(&port->port, ch, 0); |
1c45607a JS |
2087 | cnt++; |
2088 | } | |
2089 | goto end_intr; | |
1da177e4 | 2090 | } |
1c45607a JS |
2091 | intr_old: |
2092 | ||
2093 | do { | |
2094 | if (max-- < 0) | |
2095 | break; | |
1da177e4 | 2096 | |
1c45607a JS |
2097 | ch = inb(port->ioaddr + UART_RX); |
2098 | if (port->board->chip_flag && (*status & UART_LSR_OE)) | |
2099 | outb(0x23, port->ioaddr + UART_FCR); | |
2100 | *status &= port->read_status_mask; | |
2101 | if (*status & port->ignore_status_mask) { | |
2102 | if (++ignored > 100) | |
2103 | break; | |
2104 | } else { | |
2105 | char flag = 0; | |
2106 | if (*status & UART_LSR_SPECIAL) { | |
2107 | if (*status & UART_LSR_BI) { | |
2108 | flag = TTY_BREAK; | |
2109 | port->icount.brk++; | |
1da177e4 | 2110 | |
0ad9e7d1 | 2111 | if (port->port.flags & ASYNC_SAK) |
1c45607a JS |
2112 | do_SAK(tty); |
2113 | } else if (*status & UART_LSR_PE) { | |
2114 | flag = TTY_PARITY; | |
2115 | port->icount.parity++; | |
2116 | } else if (*status & UART_LSR_FE) { | |
2117 | flag = TTY_FRAME; | |
2118 | port->icount.frame++; | |
2119 | } else if (*status & UART_LSR_OE) { | |
2120 | flag = TTY_OVERRUN; | |
2121 | port->icount.overrun++; | |
2122 | } else | |
2123 | flag = TTY_BREAK; | |
2124 | } | |
92a19f9c | 2125 | tty_insert_flip_char(&port->port, ch, flag); |
1c45607a JS |
2126 | cnt++; |
2127 | if (cnt >= recv_room) { | |
2128 | if (!port->ldisc_stop_rx) | |
2129 | mxser_stoprx(tty); | |
2130 | break; | |
2131 | } | |
1da177e4 | 2132 | |
1c45607a | 2133 | } |
1da177e4 | 2134 | |
1c45607a JS |
2135 | if (port->board->chip_flag) |
2136 | break; | |
1da177e4 | 2137 | |
1c45607a JS |
2138 | *status = inb(port->ioaddr + UART_LSR); |
2139 | } while (*status & UART_LSR_DR); | |
1da177e4 | 2140 | |
1c45607a | 2141 | end_intr: |
216ba023 | 2142 | mxvar_log.rxcnt[tty->index] += cnt; |
1c45607a JS |
2143 | port->mon_data.rxcnt += cnt; |
2144 | port->mon_data.up_rxcnt += cnt; | |
1da177e4 | 2145 | |
1c45607a JS |
2146 | /* |
2147 | * We are called from an interrupt context with &port->slock | |
2148 | * being held. Drop it temporarily in order to prevent | |
2149 | * recursive locking. | |
2150 | */ | |
2151 | spin_unlock(&port->slock); | |
2e124b4a | 2152 | tty_flip_buffer_push(&port->port); |
1c45607a | 2153 | spin_lock(&port->slock); |
1da177e4 LT |
2154 | } |
2155 | ||
216ba023 | 2156 | static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) |
1da177e4 | 2157 | { |
1c45607a | 2158 | int count, cnt; |
1da177e4 | 2159 | |
1c45607a JS |
2160 | if (port->x_char) { |
2161 | outb(port->x_char, port->ioaddr + UART_TX); | |
2162 | port->x_char = 0; | |
216ba023 | 2163 | mxvar_log.txcnt[tty->index]++; |
1c45607a JS |
2164 | port->mon_data.txcnt++; |
2165 | port->mon_data.up_txcnt++; | |
2166 | port->icount.tx++; | |
2167 | return; | |
2168 | } | |
1da177e4 | 2169 | |
0ad9e7d1 | 2170 | if (port->port.xmit_buf == NULL) |
1c45607a | 2171 | return; |
1da177e4 | 2172 | |
216ba023 AC |
2173 | if (port->xmit_cnt <= 0 || tty->stopped || |
2174 | (tty->hw_stopped && | |
1c45607a JS |
2175 | (port->type != PORT_16550A) && |
2176 | (!port->board->chip_flag))) { | |
2177 | port->IER &= ~UART_IER_THRI; | |
2178 | outb(port->IER, port->ioaddr + UART_IER); | |
2179 | return; | |
1da177e4 LT |
2180 | } |
2181 | ||
1c45607a JS |
2182 | cnt = port->xmit_cnt; |
2183 | count = port->xmit_fifo_size; | |
2184 | do { | |
0ad9e7d1 | 2185 | outb(port->port.xmit_buf[port->xmit_tail++], |
1c45607a JS |
2186 | port->ioaddr + UART_TX); |
2187 | port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); | |
2188 | if (--port->xmit_cnt <= 0) | |
2189 | break; | |
2190 | } while (--count > 0); | |
216ba023 | 2191 | mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); |
1da177e4 | 2192 | |
1c45607a JS |
2193 | port->mon_data.txcnt += (cnt - port->xmit_cnt); |
2194 | port->mon_data.up_txcnt += (cnt - port->xmit_cnt); | |
2195 | port->icount.tx += (cnt - port->xmit_cnt); | |
1da177e4 | 2196 | |
464eb8f5 | 2197 | if (port->xmit_cnt < WAKEUP_CHARS) |
216ba023 | 2198 | tty_wakeup(tty); |
1c45607a JS |
2199 | |
2200 | if (port->xmit_cnt <= 0) { | |
2201 | port->IER &= ~UART_IER_THRI; | |
2202 | outb(port->IER, port->ioaddr + UART_IER); | |
1da177e4 | 2203 | } |
1da177e4 LT |
2204 | } |
2205 | ||
2206 | /* | |
1c45607a | 2207 | * This is the serial driver's generic interrupt routine |
1da177e4 | 2208 | */ |
1c45607a | 2209 | static irqreturn_t mxser_interrupt(int irq, void *dev_id) |
1da177e4 | 2210 | { |
1c45607a JS |
2211 | int status, iir, i; |
2212 | struct mxser_board *brd = NULL; | |
2213 | struct mxser_port *port; | |
2214 | int max, irqbits, bits, msr; | |
2215 | unsigned int int_cnt, pass_counter = 0; | |
2216 | int handled = IRQ_NONE; | |
216ba023 | 2217 | struct tty_struct *tty; |
1da177e4 | 2218 | |
1c45607a JS |
2219 | for (i = 0; i < MXSER_BOARDS; i++) |
2220 | if (dev_id == &mxser_boards[i]) { | |
2221 | brd = dev_id; | |
2222 | break; | |
2223 | } | |
1da177e4 | 2224 | |
1c45607a JS |
2225 | if (i == MXSER_BOARDS) |
2226 | goto irq_stop; | |
2227 | if (brd == NULL) | |
2228 | goto irq_stop; | |
2229 | max = brd->info->nports; | |
2230 | while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { | |
2231 | irqbits = inb(brd->vector) & brd->vector_mask; | |
2232 | if (irqbits == brd->vector_mask) | |
2233 | break; | |
1da177e4 | 2234 | |
1c45607a JS |
2235 | handled = IRQ_HANDLED; |
2236 | for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { | |
2237 | if (irqbits == brd->vector_mask) | |
2238 | break; | |
2239 | if (bits & irqbits) | |
2240 | continue; | |
2241 | port = &brd->ports[i]; | |
2242 | ||
2243 | int_cnt = 0; | |
2244 | spin_lock(&port->slock); | |
2245 | do { | |
2246 | iir = inb(port->ioaddr + UART_IIR); | |
2247 | if (iir & UART_IIR_NO_INT) | |
2248 | break; | |
2249 | iir &= MOXA_MUST_IIR_MASK; | |
216ba023 | 2250 | tty = tty_port_tty_get(&port->port); |
cd7b4b39 | 2251 | if (!tty || port->closing || |
d41861ca | 2252 | !tty_port_initialized(&port->port)) { |
1c45607a JS |
2253 | status = inb(port->ioaddr + UART_LSR); |
2254 | outb(0x27, port->ioaddr + UART_FCR); | |
2255 | inb(port->ioaddr + UART_MSR); | |
216ba023 | 2256 | tty_kref_put(tty); |
1c45607a JS |
2257 | break; |
2258 | } | |
1da177e4 | 2259 | |
1c45607a JS |
2260 | status = inb(port->ioaddr + UART_LSR); |
2261 | ||
2262 | if (status & UART_LSR_PE) | |
2263 | port->err_shadow |= NPPI_NOTIFY_PARITY; | |
2264 | if (status & UART_LSR_FE) | |
2265 | port->err_shadow |= NPPI_NOTIFY_FRAMING; | |
2266 | if (status & UART_LSR_OE) | |
2267 | port->err_shadow |= | |
2268 | NPPI_NOTIFY_HW_OVERRUN; | |
2269 | if (status & UART_LSR_BI) | |
2270 | port->err_shadow |= NPPI_NOTIFY_BREAK; | |
2271 | ||
2272 | if (port->board->chip_flag) { | |
2273 | if (iir == MOXA_MUST_IIR_GDA || | |
2274 | iir == MOXA_MUST_IIR_RDA || | |
2275 | iir == MOXA_MUST_IIR_RTO || | |
2276 | iir == MOXA_MUST_IIR_LSR) | |
216ba023 | 2277 | mxser_receive_chars(tty, port, |
1c45607a JS |
2278 | &status); |
2279 | ||
2280 | } else { | |
2281 | status &= port->read_status_mask; | |
2282 | if (status & UART_LSR_DR) | |
216ba023 | 2283 | mxser_receive_chars(tty, port, |
1c45607a JS |
2284 | &status); |
2285 | } | |
2286 | msr = inb(port->ioaddr + UART_MSR); | |
2287 | if (msr & UART_MSR_ANY_DELTA) | |
216ba023 | 2288 | mxser_check_modem_status(tty, port, msr); |
1c45607a JS |
2289 | |
2290 | if (port->board->chip_flag) { | |
2291 | if (iir == 0x02 && (status & | |
2292 | UART_LSR_THRE)) | |
216ba023 | 2293 | mxser_transmit_chars(tty, port); |
1c45607a JS |
2294 | } else { |
2295 | if (status & UART_LSR_THRE) | |
216ba023 | 2296 | mxser_transmit_chars(tty, port); |
1c45607a | 2297 | } |
216ba023 | 2298 | tty_kref_put(tty); |
1c45607a JS |
2299 | } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); |
2300 | spin_unlock(&port->slock); | |
2301 | } | |
2302 | } | |
1da177e4 | 2303 | |
1c45607a JS |
2304 | irq_stop: |
2305 | return handled; | |
2306 | } | |
1da177e4 | 2307 | |
1c45607a JS |
2308 | static const struct tty_operations mxser_ops = { |
2309 | .open = mxser_open, | |
2310 | .close = mxser_close, | |
2311 | .write = mxser_write, | |
2312 | .put_char = mxser_put_char, | |
2313 | .flush_chars = mxser_flush_chars, | |
2314 | .write_room = mxser_write_room, | |
2315 | .chars_in_buffer = mxser_chars_in_buffer, | |
2316 | .flush_buffer = mxser_flush_buffer, | |
2317 | .ioctl = mxser_ioctl, | |
2318 | .throttle = mxser_throttle, | |
2319 | .unthrottle = mxser_unthrottle, | |
2320 | .set_termios = mxser_set_termios, | |
2321 | .stop = mxser_stop, | |
2322 | .start = mxser_start, | |
2323 | .hangup = mxser_hangup, | |
2324 | .break_ctl = mxser_rs_break, | |
2325 | .wait_until_sent = mxser_wait_until_sent, | |
2326 | .tiocmget = mxser_tiocmget, | |
2327 | .tiocmset = mxser_tiocmset, | |
0587102c | 2328 | .get_icount = mxser_get_icount, |
1c45607a | 2329 | }; |
1da177e4 | 2330 | |
04b757df | 2331 | static const struct tty_port_operations mxser_port_ops = { |
31f35939 | 2332 | .carrier_raised = mxser_carrier_raised, |
fcc8ac18 | 2333 | .dtr_rts = mxser_dtr_rts, |
6769140d AC |
2334 | .activate = mxser_activate, |
2335 | .shutdown = mxser_shutdown_port, | |
31f35939 AC |
2336 | }; |
2337 | ||
1c45607a JS |
2338 | /* |
2339 | * The MOXA Smartio/Industio serial driver boot-time initialization code! | |
2340 | */ | |
1da177e4 | 2341 | |
38daf88a | 2342 | static bool allow_overlapping_vector; |
a342ca1c | 2343 | module_param(allow_overlapping_vector, bool, S_IRUGO); |
38daf88a JS |
2344 | MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)"); |
2345 | ||
2346 | static bool mxser_overlapping_vector(struct mxser_board *brd) | |
2347 | { | |
2348 | return allow_overlapping_vector && | |
2349 | brd->vector >= brd->ports[0].ioaddr && | |
2350 | brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports; | |
2351 | } | |
2352 | ||
2353 | static int mxser_request_vector(struct mxser_board *brd) | |
2354 | { | |
2355 | if (mxser_overlapping_vector(brd)) | |
2356 | return 0; | |
2357 | return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO; | |
2358 | } | |
2359 | ||
2360 | static void mxser_release_vector(struct mxser_board *brd) | |
2361 | { | |
2362 | if (mxser_overlapping_vector(brd)) | |
2363 | return; | |
2364 | release_region(brd->vector, 1); | |
2365 | } | |
2366 | ||
df480518 | 2367 | static void mxser_release_ISA_res(struct mxser_board *brd) |
1c45607a | 2368 | { |
df480518 | 2369 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); |
38daf88a | 2370 | mxser_release_vector(brd); |
1da177e4 LT |
2371 | } |
2372 | ||
2799707f | 2373 | static int mxser_initbrd(struct mxser_board *brd) |
1da177e4 | 2374 | { |
1c45607a JS |
2375 | struct mxser_port *info; |
2376 | unsigned int i; | |
2377 | int retval; | |
1da177e4 | 2378 | |
83766bc6 JS |
2379 | printk(KERN_INFO "mxser: max. baud rate = %d bps\n", |
2380 | brd->ports[0].max_baud); | |
1da177e4 | 2381 | |
1c45607a JS |
2382 | for (i = 0; i < brd->info->nports; i++) { |
2383 | info = &brd->ports[i]; | |
44b7d1b3 | 2384 | tty_port_init(&info->port); |
31f35939 | 2385 | info->port.ops = &mxser_port_ops; |
1c45607a JS |
2386 | info->board = brd; |
2387 | info->stop_rx = 0; | |
2388 | info->ldisc_stop_rx = 0; | |
1da177e4 | 2389 | |
1c45607a JS |
2390 | /* Enhance mode enabled here */ |
2391 | if (brd->chip_flag != MOXA_OTHER_UART) | |
148ff86b | 2392 | mxser_enable_must_enchance_mode(info->ioaddr); |
1da177e4 | 2393 | |
1c45607a | 2394 | info->type = brd->uart_type; |
1da177e4 | 2395 | |
1c45607a | 2396 | process_txrx_fifo(info); |
1da177e4 | 2397 | |
1c45607a | 2398 | info->custom_divisor = info->baud_base * 16; |
44b7d1b3 AC |
2399 | info->port.close_delay = 5 * HZ / 10; |
2400 | info->port.closing_wait = 30 * HZ; | |
1c45607a | 2401 | info->normal_termios = mxvar_sdriver->init_termios; |
1c45607a JS |
2402 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); |
2403 | info->err_shadow = 0; | |
2404 | spin_lock_init(&info->slock); | |
1da177e4 | 2405 | |
1c45607a JS |
2406 | /* before set INT ISR, disable all int */ |
2407 | outb(inb(info->ioaddr + UART_IER) & 0xf0, | |
2408 | info->ioaddr + UART_IER); | |
2409 | } | |
1da177e4 | 2410 | |
1c45607a JS |
2411 | retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", |
2412 | brd); | |
191c5f10 JS |
2413 | if (retval) { |
2414 | for (i = 0; i < brd->info->nports; i++) | |
2415 | tty_port_destroy(&brd->ports[i].port); | |
1c45607a JS |
2416 | printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " |
2417 | "conflict with another device.\n", | |
2418 | brd->info->name, brd->irq); | |
191c5f10 | 2419 | } |
df480518 | 2420 | |
1c45607a JS |
2421 | return retval; |
2422 | } | |
1da177e4 | 2423 | |
191c5f10 JS |
2424 | static void mxser_board_remove(struct mxser_board *brd) |
2425 | { | |
2426 | unsigned int i; | |
2427 | ||
2428 | for (i = 0; i < brd->info->nports; i++) { | |
2429 | tty_unregister_device(mxvar_sdriver, brd->idx + i); | |
2430 | tty_port_destroy(&brd->ports[i].port); | |
2431 | } | |
9e17df37 | 2432 | free_irq(brd->irq, brd); |
191c5f10 JS |
2433 | } |
2434 | ||
1c45607a | 2435 | static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) |
1da177e4 | 2436 | { |
38daf88a | 2437 | int id, i, bits, ret; |
1da177e4 LT |
2438 | unsigned short regs[16], irq; |
2439 | unsigned char scratch, scratch2; | |
2440 | ||
1c45607a | 2441 | brd->chip_flag = MOXA_OTHER_UART; |
1da177e4 LT |
2442 | |
2443 | id = mxser_read_register(cap, regs); | |
1c45607a JS |
2444 | switch (id) { |
2445 | case C168_ASIC_ID: | |
2446 | brd->info = &mxser_cards[0]; | |
2447 | break; | |
2448 | case C104_ASIC_ID: | |
2449 | brd->info = &mxser_cards[1]; | |
2450 | break; | |
2451 | case CI104J_ASIC_ID: | |
2452 | brd->info = &mxser_cards[2]; | |
2453 | break; | |
2454 | case C102_ASIC_ID: | |
2455 | brd->info = &mxser_cards[5]; | |
2456 | break; | |
2457 | case CI132_ASIC_ID: | |
2458 | brd->info = &mxser_cards[6]; | |
2459 | break; | |
2460 | case CI134_ASIC_ID: | |
2461 | brd->info = &mxser_cards[7]; | |
2462 | break; | |
2463 | default: | |
8ea2c2ec | 2464 | return 0; |
1c45607a | 2465 | } |
1da177e4 LT |
2466 | |
2467 | irq = 0; | |
1c45607a JS |
2468 | /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) |
2469 | Flag-hack checks if configuration should be read as 2-port here. */ | |
2470 | if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { | |
1da177e4 LT |
2471 | irq = regs[9] & 0xF000; |
2472 | irq = irq | (irq >> 4); | |
2473 | if (irq != (regs[9] & 0xFF00)) | |
83766bc6 | 2474 | goto err_irqconflict; |
1c45607a | 2475 | } else if (brd->info->nports == 4) { |
1da177e4 LT |
2476 | irq = regs[9] & 0xF000; |
2477 | irq = irq | (irq >> 4); | |
2478 | irq = irq | (irq >> 8); | |
2479 | if (irq != regs[9]) | |
83766bc6 | 2480 | goto err_irqconflict; |
1c45607a | 2481 | } else if (brd->info->nports == 8) { |
1da177e4 LT |
2482 | irq = regs[9] & 0xF000; |
2483 | irq = irq | (irq >> 4); | |
2484 | irq = irq | (irq >> 8); | |
2485 | if ((irq != regs[9]) || (irq != regs[10])) | |
83766bc6 | 2486 | goto err_irqconflict; |
1da177e4 LT |
2487 | } |
2488 | ||
83766bc6 JS |
2489 | if (!irq) { |
2490 | printk(KERN_ERR "mxser: interrupt number unset\n"); | |
2491 | return -EIO; | |
2492 | } | |
1c45607a | 2493 | brd->irq = ((int)(irq & 0xF000) >> 12); |
1da177e4 | 2494 | for (i = 0; i < 8; i++) |
1c45607a | 2495 | brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; |
83766bc6 JS |
2496 | if ((regs[12] & 0x80) == 0) { |
2497 | printk(KERN_ERR "mxser: invalid interrupt vector\n"); | |
2498 | return -EIO; | |
2499 | } | |
1c45607a | 2500 | brd->vector = (int)regs[11]; /* interrupt vector */ |
1da177e4 | 2501 | if (id == 1) |
1c45607a | 2502 | brd->vector_mask = 0x00FF; |
1da177e4 | 2503 | else |
1c45607a | 2504 | brd->vector_mask = 0x000F; |
1da177e4 LT |
2505 | for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { |
2506 | if (regs[12] & bits) { | |
1c45607a JS |
2507 | brd->ports[i].baud_base = 921600; |
2508 | brd->ports[i].max_baud = 921600; | |
1da177e4 | 2509 | } else { |
1c45607a JS |
2510 | brd->ports[i].baud_base = 115200; |
2511 | brd->ports[i].max_baud = 115200; | |
1da177e4 LT |
2512 | } |
2513 | } | |
2514 | scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); | |
2515 | outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); | |
2516 | outb(0, cap + UART_EFR); /* EFR is the same as FCR */ | |
2517 | outb(scratch2, cap + UART_LCR); | |
2518 | outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); | |
2519 | scratch = inb(cap + UART_IIR); | |
2520 | ||
2521 | if (scratch & 0xC0) | |
1c45607a | 2522 | brd->uart_type = PORT_16550A; |
1da177e4 | 2523 | else |
1c45607a JS |
2524 | brd->uart_type = PORT_16450; |
2525 | if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, | |
83766bc6 JS |
2526 | "mxser(IO)")) { |
2527 | printk(KERN_ERR "mxser: can't request ports I/O region: " | |
2528 | "0x%.8lx-0x%.8lx\n", | |
2529 | brd->ports[0].ioaddr, brd->ports[0].ioaddr + | |
2530 | 8 * brd->info->nports - 1); | |
2531 | return -EIO; | |
2532 | } | |
38daf88a JS |
2533 | |
2534 | ret = mxser_request_vector(brd); | |
2535 | if (ret) { | |
1c45607a | 2536 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); |
83766bc6 JS |
2537 | printk(KERN_ERR "mxser: can't request interrupt vector region: " |
2538 | "0x%.8lx-0x%.8lx\n", | |
2539 | brd->ports[0].ioaddr, brd->ports[0].ioaddr + | |
2540 | 8 * brd->info->nports - 1); | |
38daf88a | 2541 | return ret; |
1c45607a JS |
2542 | } |
2543 | return brd->info->nports; | |
83766bc6 JS |
2544 | |
2545 | err_irqconflict: | |
2546 | printk(KERN_ERR "mxser: invalid interrupt number\n"); | |
2547 | return -EIO; | |
1da177e4 LT |
2548 | } |
2549 | ||
9671f099 | 2550 | static int mxser_probe(struct pci_dev *pdev, |
1c45607a | 2551 | const struct pci_device_id *ent) |
1da177e4 | 2552 | { |
1c45607a JS |
2553 | #ifdef CONFIG_PCI |
2554 | struct mxser_board *brd; | |
2555 | unsigned int i, j; | |
2556 | unsigned long ioaddress; | |
9e17df37 | 2557 | struct device *tty_dev; |
1c45607a | 2558 | int retval = -EINVAL; |
1da177e4 | 2559 | |
1c45607a JS |
2560 | for (i = 0; i < MXSER_BOARDS; i++) |
2561 | if (mxser_boards[i].info == NULL) | |
2562 | break; | |
2563 | ||
2564 | if (i >= MXSER_BOARDS) { | |
83766bc6 JS |
2565 | dev_err(&pdev->dev, "too many boards found (maximum %d), board " |
2566 | "not configured\n", MXSER_BOARDS); | |
1c45607a JS |
2567 | goto err; |
2568 | } | |
2569 | ||
2570 | brd = &mxser_boards[i]; | |
2571 | brd->idx = i * MXSER_PORTS_PER_BOARD; | |
83766bc6 | 2572 | dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", |
1c45607a JS |
2573 | mxser_cards[ent->driver_data].name, |
2574 | pdev->bus->number, PCI_SLOT(pdev->devfn)); | |
2575 | ||
2576 | retval = pci_enable_device(pdev); | |
2577 | if (retval) { | |
83766bc6 | 2578 | dev_err(&pdev->dev, "PCI enable failed\n"); |
1c45607a JS |
2579 | goto err; |
2580 | } | |
2581 | ||
2582 | /* io address */ | |
2583 | ioaddress = pci_resource_start(pdev, 2); | |
2584 | retval = pci_request_region(pdev, 2, "mxser(IO)"); | |
2585 | if (retval) | |
df480518 | 2586 | goto err_dis; |
1c45607a JS |
2587 | |
2588 | brd->info = &mxser_cards[ent->driver_data]; | |
2589 | for (i = 0; i < brd->info->nports; i++) | |
2590 | brd->ports[i].ioaddr = ioaddress + 8 * i; | |
2591 | ||
2592 | /* vector */ | |
2593 | ioaddress = pci_resource_start(pdev, 3); | |
2594 | retval = pci_request_region(pdev, 3, "mxser(vector)"); | |
2595 | if (retval) | |
df480518 | 2596 | goto err_zero; |
1c45607a JS |
2597 | brd->vector = ioaddress; |
2598 | ||
2599 | /* irq */ | |
2600 | brd->irq = pdev->irq; | |
2601 | ||
2602 | brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); | |
2603 | brd->uart_type = PORT_16550A; | |
2604 | brd->vector_mask = 0; | |
2605 | ||
2606 | for (i = 0; i < brd->info->nports; i++) { | |
2607 | for (j = 0; j < UART_INFO_NUM; j++) { | |
2608 | if (Gpci_uart_info[j].type == brd->chip_flag) { | |
2609 | brd->ports[i].max_baud = | |
2610 | Gpci_uart_info[j].max_baud; | |
2611 | ||
2612 | /* exception....CP-102 */ | |
2613 | if (brd->info->flags & MXSER_HIGHBAUD) | |
2614 | brd->ports[i].max_baud = 921600; | |
2615 | break; | |
1da177e4 LT |
2616 | } |
2617 | } | |
1c45607a JS |
2618 | } |
2619 | ||
2620 | if (brd->chip_flag == MOXA_MUST_MU860_HWID) { | |
2621 | for (i = 0; i < brd->info->nports; i++) { | |
2622 | if (i < 4) | |
2623 | brd->ports[i].opmode_ioaddr = ioaddress + 4; | |
2624 | else | |
2625 | brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; | |
1da177e4 | 2626 | } |
1c45607a JS |
2627 | outb(0, ioaddress + 4); /* default set to RS232 mode */ |
2628 | outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ | |
1da177e4 | 2629 | } |
1c45607a JS |
2630 | |
2631 | for (i = 0; i < brd->info->nports; i++) { | |
2632 | brd->vector_mask |= (1 << i); | |
2633 | brd->ports[i].baud_base = 921600; | |
2634 | } | |
2635 | ||
2636 | /* mxser_initbrd will hook ISR. */ | |
2799707f | 2637 | retval = mxser_initbrd(brd); |
1c45607a | 2638 | if (retval) |
df480518 | 2639 | goto err_rel3; |
1c45607a | 2640 | |
9e17df37 AK |
2641 | for (i = 0; i < brd->info->nports; i++) { |
2642 | tty_dev = tty_port_register_device(&brd->ports[i].port, | |
2643 | mxvar_sdriver, brd->idx + i, &pdev->dev); | |
2644 | if (IS_ERR(tty_dev)) { | |
2645 | retval = PTR_ERR(tty_dev); | |
1b581f17 | 2646 | for (; i > 0; i--) |
9e17df37 | 2647 | tty_unregister_device(mxvar_sdriver, |
1b581f17 | 2648 | brd->idx + i - 1); |
9e17df37 AK |
2649 | goto err_relbrd; |
2650 | } | |
2651 | } | |
1c45607a JS |
2652 | |
2653 | pci_set_drvdata(pdev, brd); | |
2654 | ||
2655 | return 0; | |
9e17df37 AK |
2656 | err_relbrd: |
2657 | for (i = 0; i < brd->info->nports; i++) | |
2658 | tty_port_destroy(&brd->ports[i].port); | |
2659 | free_irq(brd->irq, brd); | |
df480518 JS |
2660 | err_rel3: |
2661 | pci_release_region(pdev, 3); | |
2662 | err_zero: | |
1c45607a | 2663 | brd->info = NULL; |
df480518 JS |
2664 | pci_release_region(pdev, 2); |
2665 | err_dis: | |
2666 | pci_disable_device(pdev); | |
1c45607a JS |
2667 | err: |
2668 | return retval; | |
2669 | #else | |
2670 | return -ENODEV; | |
2671 | #endif | |
1da177e4 LT |
2672 | } |
2673 | ||
ae8d8a14 | 2674 | static void mxser_remove(struct pci_dev *pdev) |
1da177e4 | 2675 | { |
df480518 | 2676 | #ifdef CONFIG_PCI |
1c45607a | 2677 | struct mxser_board *brd = pci_get_drvdata(pdev); |
1da177e4 | 2678 | |
191c5f10 | 2679 | mxser_board_remove(brd); |
1da177e4 | 2680 | |
df480518 JS |
2681 | pci_release_region(pdev, 2); |
2682 | pci_release_region(pdev, 3); | |
2683 | pci_disable_device(pdev); | |
1c45607a | 2684 | brd->info = NULL; |
df480518 | 2685 | #endif |
1da177e4 LT |
2686 | } |
2687 | ||
1c45607a JS |
2688 | static struct pci_driver mxser_driver = { |
2689 | .name = "mxser", | |
2690 | .id_table = mxser_pcibrds, | |
2691 | .probe = mxser_probe, | |
91116cba | 2692 | .remove = mxser_remove |
1c45607a JS |
2693 | }; |
2694 | ||
2695 | static int __init mxser_module_init(void) | |
1da177e4 | 2696 | { |
1c45607a | 2697 | struct mxser_board *brd; |
9e17df37 | 2698 | struct device *tty_dev; |
1df00924 JS |
2699 | unsigned int b, i, m; |
2700 | int retval; | |
1da177e4 | 2701 | |
1c45607a JS |
2702 | mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); |
2703 | if (!mxvar_sdriver) | |
2704 | return -ENOMEM; | |
2705 | ||
2706 | printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", | |
2707 | MXSER_VERSION); | |
2708 | ||
2709 | /* Initialize the tty_driver structure */ | |
1c45607a JS |
2710 | mxvar_sdriver->name = "ttyMI"; |
2711 | mxvar_sdriver->major = ttymajor; | |
2712 | mxvar_sdriver->minor_start = 0; | |
1c45607a JS |
2713 | mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; |
2714 | mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; | |
2715 | mxvar_sdriver->init_termios = tty_std_termios; | |
2716 | mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; | |
2717 | mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; | |
2718 | tty_set_operations(mxvar_sdriver, &mxser_ops); | |
2719 | ||
2720 | retval = tty_register_driver(mxvar_sdriver); | |
2721 | if (retval) { | |
2722 | printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " | |
2723 | "tty driver !\n"); | |
2724 | goto err_put; | |
1da177e4 | 2725 | } |
1c45607a | 2726 | |
1c45607a | 2727 | /* Start finding ISA boards here */ |
1df00924 JS |
2728 | for (m = 0, b = 0; b < MXSER_BOARDS; b++) { |
2729 | if (!ioaddr[b]) | |
2730 | continue; | |
2731 | ||
2732 | brd = &mxser_boards[m]; | |
96050dfb | 2733 | retval = mxser_get_ISA_conf(ioaddr[b], brd); |
1df00924 JS |
2734 | if (retval <= 0) { |
2735 | brd->info = NULL; | |
2736 | continue; | |
2737 | } | |
1c45607a | 2738 | |
1df00924 JS |
2739 | printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", |
2740 | brd->info->name, ioaddr[b]); | |
83766bc6 | 2741 | |
1df00924 | 2742 | /* mxser_initbrd will hook ISR. */ |
2799707f | 2743 | if (mxser_initbrd(brd) < 0) { |
9e17df37 | 2744 | mxser_release_ISA_res(brd); |
1df00924 JS |
2745 | brd->info = NULL; |
2746 | continue; | |
2747 | } | |
1c45607a | 2748 | |
1df00924 | 2749 | brd->idx = m * MXSER_PORTS_PER_BOARD; |
9e17df37 AK |
2750 | for (i = 0; i < brd->info->nports; i++) { |
2751 | tty_dev = tty_port_register_device(&brd->ports[i].port, | |
734cc178 | 2752 | mxvar_sdriver, brd->idx + i, NULL); |
9e17df37 | 2753 | if (IS_ERR(tty_dev)) { |
1b581f17 | 2754 | for (; i > 0; i--) |
9e17df37 | 2755 | tty_unregister_device(mxvar_sdriver, |
1b581f17 | 2756 | brd->idx + i - 1); |
9e17df37 AK |
2757 | for (i = 0; i < brd->info->nports; i++) |
2758 | tty_port_destroy(&brd->ports[i].port); | |
2759 | free_irq(brd->irq, brd); | |
2760 | mxser_release_ISA_res(brd); | |
2761 | brd->info = NULL; | |
2762 | break; | |
2763 | } | |
2764 | } | |
2765 | if (brd->info == NULL) | |
2766 | continue; | |
1c45607a | 2767 | |
1df00924 JS |
2768 | m++; |
2769 | } | |
1c45607a JS |
2770 | |
2771 | retval = pci_register_driver(&mxser_driver); | |
2772 | if (retval) { | |
83766bc6 | 2773 | printk(KERN_ERR "mxser: can't register pci driver\n"); |
1c45607a JS |
2774 | if (!m) { |
2775 | retval = -ENODEV; | |
2776 | goto err_unr; | |
2777 | } /* else: we have some ISA cards under control */ | |
2778 | } | |
2779 | ||
1c45607a JS |
2780 | return 0; |
2781 | err_unr: | |
2782 | tty_unregister_driver(mxvar_sdriver); | |
2783 | err_put: | |
2784 | put_tty_driver(mxvar_sdriver); | |
2785 | return retval; | |
2786 | } | |
2787 | ||
2788 | static void __exit mxser_module_exit(void) | |
2789 | { | |
191c5f10 | 2790 | unsigned int i; |
1c45607a | 2791 | |
1c45607a JS |
2792 | pci_unregister_driver(&mxser_driver); |
2793 | ||
2794 | for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ | |
2795 | if (mxser_boards[i].info != NULL) | |
191c5f10 | 2796 | mxser_board_remove(&mxser_boards[i]); |
1c45607a JS |
2797 | tty_unregister_driver(mxvar_sdriver); |
2798 | put_tty_driver(mxvar_sdriver); | |
2799 | ||
2800 | for (i = 0; i < MXSER_BOARDS; i++) | |
2801 | if (mxser_boards[i].info != NULL) | |
df480518 | 2802 | mxser_release_ISA_res(&mxser_boards[i]); |
1da177e4 LT |
2803 | } |
2804 | ||
2805 | module_init(mxser_module_init); | |
2806 | module_exit(mxser_module_exit); |