[mirror_ubuntu-artful-kernel.git] / drivers / tty / serial / 8250 / 8250_dma.c

/*
 * 8250_dma.c - DMA Engine API support for 8250.c
 *
 * Copyright (C) 2013 Intel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial_reg.h>
#include <linux/dma-mapping.h>

#include "8250.h"

static void __dma_tx_complete(void *param)
{
	struct uart_8250_port	*p = param;
	struct uart_8250_dma	*dma = p->dma;
	struct circ_buf		*xmit = &p->port.state->xmit;
	unsigned long	flags;
	int		ret;

	dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
				UART_XMIT_SIZE, DMA_TO_DEVICE);

	spin_lock_irqsave(&p->port.lock, flags);

	dma->tx_running = 0;

	xmit->tail += dma->tx_size;
	xmit->tail &= UART_XMIT_SIZE - 1;
	p->port.icount.tx += dma->tx_size;

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(&p->port);

	ret = serial8250_tx_dma(p);
	if (ret) {
		p->ier |= UART_IER_THRI;
		serial_port_out(&p->port, UART_IER, p->ier);
	}

	spin_unlock_irqrestore(&p->port.lock, flags);
}

static void __dma_rx_complete(void *param)
{
	struct uart_8250_port	*p = param;
	struct uart_8250_dma	*dma = p->dma;
	struct tty_port		*tty_port = &p->port.state->port;
	struct dma_tx_state	state;
	int			count;

	dma->rx_running = 0;
	dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);

	count = dma->rx_size - state.residue;

	tty_insert_flip_string(tty_port, dma->rx_buf, count);
	p->port.icount.rx += count;

	tty_flip_buffer_push(tty_port);
}

int serial8250_tx_dma(struct uart_8250_port *p)
{
	struct uart_8250_dma		*dma = p->dma;
	struct circ_buf			*xmit = &p->port.state->xmit;
	struct dma_async_tx_descriptor	*desc;
	int ret;

	if (uart_tx_stopped(&p->port) || dma->tx_running ||
	    uart_circ_empty(xmit))
		return 0;

	dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);

	desc = dmaengine_prep_slave_single(dma->txchan,
					   dma->tx_addr + xmit->tail,
					   dma->tx_size, DMA_MEM_TO_DEV,
					   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
	if (!desc) {
		ret = -EBUSY;
		goto err;
	}

	dma->tx_running = 1;
	desc->callback = __dma_tx_complete;
	desc->callback_param = p;

	dma->tx_cookie = dmaengine_submit(desc);

	dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
				   UART_XMIT_SIZE, DMA_TO_DEVICE);

	dma_async_issue_pending(dma->txchan);
	if (dma->tx_err) {
		dma->tx_err = 0;
		if (p->ier & UART_IER_THRI) {
			p->ier &= ~UART_IER_THRI;
			serial_out(p, UART_IER, p->ier);
		}
	}
	return 0;
err:
	dma->tx_err = 1;
	return ret;
}

int serial8250_rx_dma(struct uart_8250_port *p)
{
	struct uart_8250_dma		*dma = p->dma;
	struct dma_async_tx_descriptor	*desc;

	if (dma->rx_running)
		return 0;

	desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
					   dma->rx_size, DMA_DEV_TO_MEM,
					   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
	if (!desc)
		return -EBUSY;

	dma->rx_running = 1;
	desc->callback = __dma_rx_complete;
	desc->callback_param = p;

	dma->rx_cookie = dmaengine_submit(desc);

	dma_async_issue_pending(dma->rxchan);

	return 0;
}

void serial8250_rx_dma_flush(struct uart_8250_port *p)
{
	struct uart_8250_dma *dma = p->dma;

	if (dma->rx_running) {
		dmaengine_pause(dma->rxchan);
		__dma_rx_complete(p);
		dmaengine_terminate_async(dma->rxchan);
	}
}
EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush);

int serial8250_request_dma(struct uart_8250_port *p)
{
	struct uart_8250_dma	*dma = p->dma;
	phys_addr_t rx_dma_addr = dma->rx_dma_addr ?
				  dma->rx_dma_addr : p->port.mapbase;
	phys_addr_t tx_dma_addr = dma->tx_dma_addr ?
				  dma->tx_dma_addr : p->port.mapbase;
	dma_cap_mask_t		mask;
	struct dma_slave_caps	caps;
	int			ret;

	/* Default slave configuration parameters */
	dma->rxconf.direction		= DMA_DEV_TO_MEM;
	dma->rxconf.src_addr_width	= DMA_SLAVE_BUSWIDTH_1_BYTE;
	dma->rxconf.src_addr		= rx_dma_addr + UART_RX;

	dma->txconf.direction		= DMA_MEM_TO_DEV;
	dma->txconf.dst_addr_width	= DMA_SLAVE_BUSWIDTH_1_BYTE;
	dma->txconf.dst_addr		= tx_dma_addr + UART_TX;

	dma_cap_zero(mask);
	dma_cap_set(DMA_SLAVE, mask);

	/* Get a channel for RX */
	dma->rxchan = dma_request_slave_channel_compat(mask,
						       dma->fn, dma->rx_param,
						       p->port.dev, "rx");
	if (!dma->rxchan)
		return -ENODEV;

	/* 8250 rx dma requires dmaengine driver to support pause/terminate */
	ret = dma_get_slave_caps(dma->rxchan, &caps);
	if (ret)
		goto release_rx;
	if (!caps.cmd_pause || !caps.cmd_terminate ||
	    caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
		ret = -EINVAL;
		goto release_rx;
	}

	dmaengine_slave_config(dma->rxchan, &dma->rxconf);

	/* Get a channel for TX */
	dma->txchan = dma_request_slave_channel_compat(mask,
						       dma->fn, dma->tx_param,
						       p->port.dev, "tx");
	if (!dma->txchan) {
		ret = -ENODEV;
		goto release_rx;
	}

	/* 8250 tx dma requires dmaengine driver to support terminate */
	ret = dma_get_slave_caps(dma->txchan, &caps);
	if (ret)
		goto err;
	if (!caps.cmd_terminate) {
		ret = -EINVAL;
		goto err;
	}

	dmaengine_slave_config(dma->txchan, &dma->txconf);

	/* RX buffer */
	if (!dma->rx_size)
		dma->rx_size = PAGE_SIZE;

	dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
					&dma->rx_addr, GFP_KERNEL);
	if (!dma->rx_buf) {
		ret = -ENOMEM;
		goto err;
	}

	/* TX buffer */
	dma->tx_addr = dma_map_single(dma->txchan->device->dev,
					p->port.state->xmit.buf,
					UART_XMIT_SIZE,
					DMA_TO_DEVICE);
	if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
		dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
				  dma->rx_buf, dma->rx_addr);
		ret = -ENOMEM;
		goto err;
	}

	dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");

	return 0;
err:
	dma_release_channel(dma->txchan);
release_rx:
	dma_release_channel(dma->rxchan);
	return ret;
}
EXPORT_SYMBOL_GPL(serial8250_request_dma);

void serial8250_release_dma(struct uart_8250_port *p)
{
	struct uart_8250_dma *dma = p->dma;

	if (!dma)
		return;

	/* Release RX resources */
	dmaengine_terminate_sync(dma->rxchan);
	dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
			  dma->rx_addr);
	dma_release_channel(dma->rxchan);
	dma->rxchan = NULL;

	/* Release TX resources */
	dmaengine_terminate_sync(dma->txchan);
	dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
			 UART_XMIT_SIZE, DMA_TO_DEVICE);
	dma_release_channel(dma->txchan);
	dma->txchan = NULL;
	dma->tx_running = 0;

	dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
}
EXPORT_SYMBOL_GPL(serial8250_release_dma);
Commit	Line	Data
9ee4b83e HK	1	/*
	2	* 8250_dma.c - DMA Engine API support for 8250.c
	3	*
	4	* Copyright (C) 2013 Intel Corporation
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11	#include <linux/tty.h>
	12	#include <linux/tty_flip.h>
	13	#include <linux/serial_reg.h>
	14	#include <linux/dma-mapping.h>
	15
	16	#include "8250.h"
	17
	18	static void __dma_tx_complete(void *param)
	19	{
	20	struct uart_8250_port *p = param;
	21	struct uart_8250_dma *dma = p->dma;
	22	struct circ_buf *xmit = &p->port.state->xmit;
f8fd1b03	23	unsigned long flags;
2dc98946	24	int ret;
9ee4b83e HK	25
	26	dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
	27	UART_XMIT_SIZE, DMA_TO_DEVICE);
	28
f8fd1b03 LP	29	spin_lock_irqsave(&p->port.lock, flags);
	30
	31	dma->tx_running = 0;
	32
9ee4b83e HK	33	xmit->tail += dma->tx_size;
	34	xmit->tail &= UART_XMIT_SIZE - 1;
	35	p->port.icount.tx += dma->tx_size;
	36
	37	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	38	uart_write_wakeup(&p->port);
	39
2dc98946 AS	40	ret = serial8250_tx_dma(p);
2dc98946 AS	41	if (ret) {
2dc98946 AS	42	p->ier \|= UART_IER_THRI;
2dc98946 AS	43	serial_port_out(&p->port, UART_IER, p->ier);
b2202821	44	}
f8fd1b03 LP	45
f8fd1b03 LP	46	spin_unlock_irqrestore(&p->port.lock, flags);
9ee4b83e HK	47	}
	48
	49	static void __dma_rx_complete(void *param)
	50	{
	51	struct uart_8250_port *p = param;
	52	struct uart_8250_dma *dma = p->dma;
6f3fe3b1	53	struct tty_port *tty_port = &p->port.state->port;
9ee4b83e	54	struct dma_tx_state state;
6f3fe3b1	55	int count;
9ee4b83e	56
0fcb7901	57	dma->rx_running = 0;
9ee4b83e	58	dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
9ee4b83e	59
6f3fe3b1	60	count = dma->rx_size - state.residue;
9ee4b83e	61
6f3fe3b1 HK	62	tty_insert_flip_string(tty_port, dma->rx_buf, count);
	63	p->port.icount.rx += count;
	64
	65	tty_flip_buffer_push(tty_port);
9ee4b83e HK	66	}
	67
	68	int serial8250_tx_dma(struct uart_8250_port *p)
	69	{
	70	struct uart_8250_dma *dma = p->dma;
	71	struct circ_buf *xmit = &p->port.state->xmit;
	72	struct dma_async_tx_descriptor *desc;
b2202821	73	int ret;
9ee4b83e	74
5ea5b24d HK	75	if (uart_tx_stopped(&p->port) \|\| dma->tx_running \|\|
	76	uart_circ_empty(xmit))
	77	return 0;
9ee4b83e HK	78
	79	dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
	80
	81	desc = dmaengine_prep_slave_single(dma->txchan,
	82	dma->tx_addr + xmit->tail,
	83	dma->tx_size, DMA_MEM_TO_DEV,
	84	DMA_PREP_INTERRUPT \| DMA_CTRL_ACK);
b2202821 SAS	85	if (!desc) {
	86	ret = -EBUSY;
	87	goto err;
	88	}
9ee4b83e HK	89
9ee4b83e HK	90	dma->tx_running = 1;
9ee4b83e HK	91	desc->callback = __dma_tx_complete;
	92	desc->callback_param = p;
	93
	94	dma->tx_cookie = dmaengine_submit(desc);
	95
	96	dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
	97	UART_XMIT_SIZE, DMA_TO_DEVICE);
	98
	99	dma_async_issue_pending(dma->txchan);
b2202821 SAS	100	if (dma->tx_err) {
	101	dma->tx_err = 0;
	102	if (p->ier & UART_IER_THRI) {
	103	p->ier &= ~UART_IER_THRI;
	104	serial_out(p, UART_IER, p->ier);
	105	}
	106	}
9ee4b83e	107	return 0;
b2202821 SAS	108	err:
	109	dma->tx_err = 1;
	110	return ret;
9ee4b83e	111	}
9ee4b83e	112
33d9b8b2	113	int serial8250_rx_dma(struct uart_8250_port *p)
9ee4b83e HK	114	{
	115	struct uart_8250_dma *dma = p->dma;
	116	struct dma_async_tx_descriptor *desc;
75df022b	117
0fcb7901	118	if (dma->rx_running)
75df022b HK	119	return 0;
75df022b HK	120
9ee4b83e HK	121	desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
	122	dma->rx_size, DMA_DEV_TO_MEM,
	123	DMA_PREP_INTERRUPT \| DMA_CTRL_ACK);
	124	if (!desc)
	125	return -EBUSY;
	126
0fcb7901	127	dma->rx_running = 1;
9ee4b83e HK	128	desc->callback = __dma_rx_complete;
	129	desc->callback_param = p;
	130
	131	dma->rx_cookie = dmaengine_submit(desc);
	132
9ee4b83e HK	133	dma_async_issue_pending(dma->rxchan);
	134
	135	return 0;
	136	}
9ee4b83e	137
33d9b8b2 PH	138	void serial8250_rx_dma_flush(struct uart_8250_port *p)
	139	{
	140	struct uart_8250_dma *dma = p->dma;
	141
	142	if (dma->rx_running) {
	143	dmaengine_pause(dma->rxchan);
	144	__dma_rx_complete(p);
8d170472	145	dmaengine_terminate_async(dma->rxchan);
33d9b8b2 PH	146	}
33d9b8b2 PH	147	}
fd9e516d	148	EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush);
33d9b8b2	149
9ee4b83e HK	150	int serial8250_request_dma(struct uart_8250_port *p)
	151	{
	152	struct uart_8250_dma *dma = p->dma;
d1834bab AS	153	phys_addr_t rx_dma_addr = dma->rx_dma_addr ?
	154	dma->rx_dma_addr : p->port.mapbase;
	155	phys_addr_t tx_dma_addr = dma->tx_dma_addr ?
	156	dma->tx_dma_addr : p->port.mapbase;
9ee4b83e	157	dma_cap_mask_t mask;
ec5a11a9 PH	158	struct dma_slave_caps caps;
ec5a11a9 PH	159	int ret;
9ee4b83e	160
ab19479a HK	161	/* Default slave configuration parameters */
	162	dma->rxconf.direction = DMA_DEV_TO_MEM;
	163	dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
d1834bab	164	dma->rxconf.src_addr = rx_dma_addr + UART_RX;
ab19479a HK	165
	166	dma->txconf.direction = DMA_MEM_TO_DEV;
	167	dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
d1834bab	168	dma->txconf.dst_addr = tx_dma_addr + UART_TX;
9ee4b83e HK	169
	170	dma_cap_zero(mask);
	171	dma_cap_set(DMA_SLAVE, mask);
	172
	173	/* Get a channel for RX */
e4fb3b88 HK	174	dma->rxchan = dma_request_slave_channel_compat(mask,
	175	dma->fn, dma->rx_param,
	176	p->port.dev, "rx");
9ee4b83e HK	177	if (!dma->rxchan)
	178	return -ENODEV;
	179
ec5a11a9 PH	180	/* 8250 rx dma requires dmaengine driver to support pause/terminate */
	181	ret = dma_get_slave_caps(dma->rxchan, &caps);
	182	if (ret)
	183	goto release_rx;
	184	if (!caps.cmd_pause \|\| !caps.cmd_terminate \|\|
	185	caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
	186	ret = -EINVAL;
	187	goto release_rx;
	188	}
	189
9ee4b83e HK	190	dmaengine_slave_config(dma->rxchan, &dma->rxconf);
	191
	192	/* Get a channel for TX */
e4fb3b88 HK	193	dma->txchan = dma_request_slave_channel_compat(mask,
	194	dma->fn, dma->tx_param,
	195	p->port.dev, "tx");
9ee4b83e	196	if (!dma->txchan) {
ec5a11a9 PH	197	ret = -ENODEV;
ec5a11a9 PH	198	goto release_rx;
9ee4b83e HK	199	}
9ee4b83e HK	200
ddedfd82 PH	201	/* 8250 tx dma requires dmaengine driver to support terminate */
	202	ret = dma_get_slave_caps(dma->txchan, &caps);
	203	if (ret)
	204	goto err;
	205	if (!caps.cmd_terminate) {
	206	ret = -EINVAL;
	207	goto err;
	208	}
	209
9ee4b83e HK	210	dmaengine_slave_config(dma->txchan, &dma->txconf);
	211
	212	/* RX buffer */
	213	if (!dma->rx_size)
	214	dma->rx_size = PAGE_SIZE;
	215
	216	dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
	217	&dma->rx_addr, GFP_KERNEL);
ec5a11a9 PH	218	if (!dma->rx_buf) {
ec5a11a9 PH	219	ret = -ENOMEM;
d4089a33	220	goto err;
ec5a11a9	221	}
9ee4b83e HK	222
	223	/* TX buffer */
	224	dma->tx_addr = dma_map_single(dma->txchan->device->dev,
	225	p->port.state->xmit.buf,
	226	UART_XMIT_SIZE,
	227	DMA_TO_DEVICE);
d4089a33 HK	228	if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
	229	dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
	230	dma->rx_buf, dma->rx_addr);
ec5a11a9	231	ret = -ENOMEM;
d4089a33 HK	232	goto err;
d4089a33 HK	233	}
9ee4b83e HK	234
	235	dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
	236
	237	return 0;
d4089a33	238	err:
d4089a33	239	dma_release_channel(dma->txchan);
ec5a11a9 PH	240	release_rx:
	241	dma_release_channel(dma->rxchan);
	242	return ret;
9ee4b83e HK	243	}
	244	EXPORT_SYMBOL_GPL(serial8250_request_dma);
	245
	246	void serial8250_release_dma(struct uart_8250_port *p)
	247	{
	248	struct uart_8250_dma *dma = p->dma;
	249
	250	if (!dma)
	251	return;
	252
	253	/* Release RX resources */
8d170472	254	dmaengine_terminate_sync(dma->rxchan);
9ee4b83e HK	255	dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
	256	dma->rx_addr);
	257	dma_release_channel(dma->rxchan);
	258	dma->rxchan = NULL;
	259
	260	/* Release TX resources */
8d170472	261	dmaengine_terminate_sync(dma->txchan);
9ee4b83e HK	262	dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
	263	UART_XMIT_SIZE, DMA_TO_DEVICE);
	264	dma_release_channel(dma->txchan);
	265	dma->txchan = NULL;
	266	dma->tx_running = 0;
	267
	268	dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
	269	}
	270	EXPORT_SYMBOL_GPL(serial8250_release_dma);