[mirror_ubuntu-bionic-kernel.git] / drivers / tty / serial / earlycon.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2014 Linaro Ltd.
 * Author: Rob Herring <robh@kernel.org>
 *
 * Based on 8250 earlycon:
 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
 *	Bjorn Helgaas <bjorn.helgaas@hp.com>
 */

#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt

#include <linux/console.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/serial_core.h>
#include <linux/sizes.h>
#include <linux/of.h>
#include <linux/of_fdt.h>
#include <linux/acpi.h>

#ifdef CONFIG_FIX_EARLYCON_MEM
#include <asm/fixmap.h>
#endif

#include <asm/serial.h>

static struct console early_con = {
	.name =		"uart",		/* fixed up at earlycon registration */
	.flags =	CON_PRINTBUFFER | CON_BOOT,
	.index =	0,
};

static struct earlycon_device early_console_dev = {
	.con = &early_con,
};

static void __iomem * __init earlycon_map(resource_size_t paddr, size_t size)
{
	void __iomem *base;
#ifdef CONFIG_FIX_EARLYCON_MEM
	set_fixmap_io(FIX_EARLYCON_MEM_BASE, paddr & PAGE_MASK);
	base = (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
	base += paddr & ~PAGE_MASK;
#else
	base = ioremap(paddr, size);
#endif
	if (!base)
		pr_err("%s: Couldn't map %pa\n", __func__, &paddr);

	return base;
}

static void __init earlycon_init(struct earlycon_device *device,
				 const char *name)
{
	struct console *earlycon = device->con;
	struct uart_port *port = &device->port;
	const char *s;
	size_t len;

	/* scan backwards from end of string for first non-numeral */
	for (s = name + strlen(name);
	     s > name && s[-1] >= '0' && s[-1] <= '9';
	     s--)
		;
	if (*s)
		earlycon->index = simple_strtoul(s, NULL, 10);
	len = s - name;
	strlcpy(earlycon->name, name, min(len + 1, sizeof(earlycon->name)));
	earlycon->data = &early_console_dev;

	if (port->iotype == UPIO_MEM || port->iotype == UPIO_MEM16 ||
	    port->iotype == UPIO_MEM32 || port->iotype == UPIO_MEM32BE)
		pr_info("%s%d at MMIO%s %pa (options '%s')\n",
			earlycon->name, earlycon->index,
			(port->iotype == UPIO_MEM) ? "" :
			(port->iotype == UPIO_MEM16) ? "16" :
			(port->iotype == UPIO_MEM32) ? "32" : "32be",
			&port->mapbase, device->options);
	else
		pr_info("%s%d at I/O port 0x%lx (options '%s')\n",
			earlycon->name, earlycon->index,
			port->iobase, device->options);
}

static int __init parse_options(struct earlycon_device *device, char *options)
{
	struct uart_port *port = &device->port;
	int length;
	resource_size_t addr;

	if (uart_parse_earlycon(options, &port->iotype, &addr, &options))
		return -EINVAL;

	switch (port->iotype) {
	case UPIO_MEM:
		port->mapbase = addr;
		break;
	case UPIO_MEM16:
		port->regshift = 1;
		port->mapbase = addr;
		break;
	case UPIO_MEM32:
	case UPIO_MEM32BE:
		port->regshift = 2;
		port->mapbase = addr;
		break;
	case UPIO_PORT:
		port->iobase = addr;
		break;
	default:
		return -EINVAL;
	}

	if (options) {
		device->baud = simple_strtoul(options, NULL, 0);
		length = min(strcspn(options, " ") + 1,
			     (size_t)(sizeof(device->options)));
		strlcpy(device->options, options, length);
	}

	return 0;
}

static int __init register_earlycon(char *buf, const struct earlycon_id *match)
{
	int err;
	struct uart_port *port = &early_console_dev.port;

	/* On parsing error, pass the options buf to the setup function */
	if (buf && !parse_options(&early_console_dev, buf))
		buf = NULL;

	spin_lock_init(&port->lock);
	port->uartclk = BASE_BAUD * 16;
	if (port->mapbase)
		port->membase = earlycon_map(port->mapbase, 64);

	earlycon_init(&early_console_dev, match->name);
	err = match->setup(&early_console_dev, buf);
	if (err < 0)
		return err;
	if (!early_console_dev.con->write)
		return -ENODEV;

	register_console(early_console_dev.con);
	return 0;
}

/**
 *	setup_earlycon - match and register earlycon console
 *	@buf:	earlycon param string
 *
 *	Registers the earlycon console matching the earlycon specified
 *	in the param string @buf. Acceptable param strings are of the form
 *	   <name>,io|mmio|mmio32|mmio32be,<addr>,<options>
 *	   <name>,0x<addr>,<options>
 *	   <name>,<options>
 *	   <name>
 *
 *	Only for the third form does the earlycon setup() method receive the
 *	<options> string in the 'options' parameter; all other forms set
 *	the parameter to NULL.
 *
 *	Returns 0 if an attempt to register the earlycon was made,
 *	otherwise negative error code
 */
int __init setup_earlycon(char *buf)
{
	const struct earlycon_id **p_match;

	if (!buf || !buf[0])
		return -EINVAL;

	if (early_con.flags & CON_ENABLED)
		return -EALREADY;

	for (p_match = __earlycon_table; p_match < __earlycon_table_end;
	     p_match++) {
		const struct earlycon_id *match = *p_match;
		size_t len = strlen(match->name);

		if (strncmp(buf, match->name, len))
			continue;

		if (buf[len]) {
			if (buf[len] != ',')
				continue;
			buf += len + 1;
		} else
			buf = NULL;

		return register_earlycon(buf, match);
	}

	return -ENOENT;
}

/*
 * When CONFIG_ACPI_SPCR_TABLE is defined, "earlycon" without parameters in
 * command line does not start DT earlycon immediately, instead it defers
 * starting it until DT/ACPI decision is made.  At that time if ACPI is enabled
 * call parse_spcr(), else call early_init_dt_scan_chosen_stdout()
 */
bool earlycon_init_is_deferred __initdata;

/* early_param wrapper for setup_earlycon() */
static int __init param_setup_earlycon(char *buf)
{
	int err;

	/*
	 * Just 'earlycon' is a valid param for devicetree earlycons;
	 * don't generate a warning from parse_early_params() in that case
	 */
	if (!buf || !buf[0]) {
		if (IS_ENABLED(CONFIG_ACPI_SPCR_TABLE)) {
			earlycon_init_is_deferred = true;
			return 0;
		} else if (!buf) {
			return early_init_dt_scan_chosen_stdout();
		}
	}

	err = setup_earlycon(buf);
	if (err == -ENOENT || err == -EALREADY)
		return 0;
	return err;
}
early_param("earlycon", param_setup_earlycon);

#ifdef CONFIG_OF_EARLY_FLATTREE

int __init of_setup_earlycon(const struct earlycon_id *match,
			     unsigned long node,
			     const char *options)
{
	int err;
	struct uart_port *port = &early_console_dev.port;
	const __be32 *val;
	bool big_endian;
	u64 addr;

	spin_lock_init(&port->lock);
	port->iotype = UPIO_MEM;
	addr = of_flat_dt_translate_address(node);
	if (addr == OF_BAD_ADDR) {
		pr_warn("[%s] bad address\n", match->name);
		return -ENXIO;
	}
	port->mapbase = addr;
	port->uartclk = BASE_BAUD * 16;

	val = of_get_flat_dt_prop(node, "reg-offset", NULL);
	if (val)
		port->mapbase += be32_to_cpu(*val);
	port->membase = earlycon_map(port->mapbase, SZ_4K);

	val = of_get_flat_dt_prop(node, "reg-shift", NULL);
	if (val)
		port->regshift = be32_to_cpu(*val);
	big_endian = of_get_flat_dt_prop(node, "big-endian", NULL) != NULL ||
		(IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) &&
		 of_get_flat_dt_prop(node, "native-endian", NULL) != NULL);
	val = of_get_flat_dt_prop(node, "reg-io-width", NULL);
	if (val) {
		switch (be32_to_cpu(*val)) {
		case 1:
			port->iotype = UPIO_MEM;
			break;
		case 2:
			port->iotype = UPIO_MEM16;
			break;
		case 4:
			port->iotype = (big_endian) ? UPIO_MEM32BE : UPIO_MEM32;
			break;
		default:
			pr_warn("[%s] unsupported reg-io-width\n", match->name);
			return -EINVAL;
		}
	}

	val = of_get_flat_dt_prop(node, "current-speed", NULL);
	if (val)
		early_console_dev.baud = be32_to_cpu(*val);

	if (options) {
		early_console_dev.baud = simple_strtoul(options, NULL, 0);
		strlcpy(early_console_dev.options, options,
			sizeof(early_console_dev.options));
	}
	earlycon_init(&early_console_dev, match->name);
	err = match->setup(&early_console_dev, options);
	if (err < 0)
		return err;
	if (!early_console_dev.con->write)
		return -ENODEV;


	register_console(early_console_dev.con);
	return 0;
}

#endif /* CONFIG_OF_EARLY_FLATTREE */
Commit	Line	Data
e3b3d0f5	1	// SPDX-License-Identifier: GPL-2.0
9aac5887 RH	2	/*
	3	* Copyright (C) 2014 Linaro Ltd.
	4	* Author: Rob Herring <robh@kernel.org>
	5	*
	6	* Based on 8250 earlycon:
	7	* (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
	8	* Bjorn Helgaas <bjorn.helgaas@hp.com>
9aac5887	9	*/
470ca0de PH	10
	11	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	12
9aac5887 RH	13	#include <linux/console.h>
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
	16	#include <linux/io.h>
	17	#include <linux/serial_core.h>
b0b6abd3	18	#include <linux/sizes.h>
c90fe9c0	19	#include <linux/of.h>
088da2a1	20	#include <linux/of_fdt.h>
ad1696f6	21	#include <linux/acpi.h>
9aac5887 RH	22
	23	#ifdef CONFIG_FIX_EARLYCON_MEM
	24	#include <asm/fixmap.h>
	25	#endif
	26
	27	#include <asm/serial.h>
	28
	29	static struct console early_con = {
cda64e68	30	.name = "uart", /* fixed up at earlycon registration */
9aac5887	31	.flags = CON_PRINTBUFFER \| CON_BOOT,
cda64e68	32	.index = 0,
9aac5887 RH	33	};
	34
	35	static struct earlycon_device early_console_dev = {
	36	.con = &early_con,
	37	};
	38
46e36683	39	static void __iomem * __init earlycon_map(resource_size_t paddr, size_t size)
9aac5887 RH	40	{
	41	void __iomem *base;
	42	#ifdef CONFIG_FIX_EARLYCON_MEM
	43	set_fixmap_io(FIX_EARLYCON_MEM_BASE, paddr & PAGE_MASK);
	44	base = (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
	45	base += paddr & ~PAGE_MASK;
	46	#else
	47	base = ioremap(paddr, size);
	48	#endif
	49	if (!base)
46e36683	50	pr_err("%s: Couldn't map %pa\n", __func__, &paddr);
9aac5887 RH	51
	52	return base;
	53	}
	54
cda64e68 PH	55	static void __init earlycon_init(struct earlycon_device *device,
	56	const char *name)
	57	{
	58	struct console *earlycon = device->con;
8e773739	59	struct uart_port *port = &device->port;
cda64e68 PH	60	const char *s;
	61	size_t len;
	62
	63	/* scan backwards from end of string for first non-numeral */
	64	for (s = name + strlen(name);
	65	s > name && s[-1] >= '0' && s[-1] <= '9';
	66	s--)
	67	;
	68	if (*s)
	69	earlycon->index = simple_strtoul(s, NULL, 10);
	70	len = s - name;
	71	strlcpy(earlycon->name, name, min(len + 1, sizeof(earlycon->name)));
	72	earlycon->data = &early_console_dev;
8e773739 PH	73
	74	if (port->iotype == UPIO_MEM \|\| port->iotype == UPIO_MEM16 \|\|
	75	port->iotype == UPIO_MEM32 \|\| port->iotype == UPIO_MEM32BE)
b9693984 PH	76	pr_info("%s%d at MMIO%s %pa (options '%s')\n",
b9693984 PH	77	earlycon->name, earlycon->index,
8e773739 PH	78	(port->iotype == UPIO_MEM) ? "" :
	79	(port->iotype == UPIO_MEM16) ? "16" :
	80	(port->iotype == UPIO_MEM32) ? "32" : "32be",
b9693984	81	&port->mapbase, device->options);
8e773739	82	else
b9693984 PH	83	pr_info("%s%d at I/O port 0x%lx (options '%s')\n",
	84	earlycon->name, earlycon->index,
	85	port->iobase, device->options);
cda64e68 PH	86	}
cda64e68 PH	87
73abaf87	88	static int __init parse_options(struct earlycon_device device, char options)
9aac5887 RH	89	{
9aac5887 RH	90	struct uart_port *port = &device->port;
73abaf87	91	int length;
46e36683	92	resource_size_t addr;
9aac5887	93
73abaf87 PH	94	if (uart_parse_earlycon(options, &port->iotype, &addr, &options))
73abaf87 PH	95	return -EINVAL;
9aac5887	96
73abaf87	97	switch (port->iotype) {
bd94c407 MY	98	case UPIO_MEM:
	99	port->mapbase = addr;
	100	break;
	101	case UPIO_MEM16:
	102	port->regshift = 1;
	103	port->mapbase = addr;
	104	break;
73abaf87	105	case UPIO_MEM32:
6e63be3f	106	case UPIO_MEM32BE:
bd94c407	107	port->regshift = 2;
9aac5887	108	port->mapbase = addr;
73abaf87 PH	109	break;
73abaf87 PH	110	case UPIO_PORT:
9aac5887	111	port->iobase = addr;
73abaf87 PH	112	break;
73abaf87 PH	113	default:
9aac5887 RH	114	return -EINVAL;
	115	}
	116
9aac5887	117	if (options) {
e26f1db9	118	device->baud = simple_strtoul(options, NULL, 0);
9aac5887 RH	119	length = min(strcspn(options, " ") + 1,
	120	(size_t)(sizeof(device->options)));
	121	strlcpy(device->options, options, length);
	122	}
	123
9aac5887 RH	124	return 0;
	125	}
	126
470ca0de	127	static int __init register_earlycon(char buf, const struct earlycon_id match)
9aac5887 RH	128	{
9aac5887 RH	129	int err;
9aac5887 RH	130	struct uart_port *port = &early_console_dev.port;
9aac5887 RH	131
9aac5887	132	/* On parsing error, pass the options buf to the setup function */
60846880	133	if (buf && !parse_options(&early_console_dev, buf))
9aac5887 RH	134	buf = NULL;
9aac5887 RH	135
e1dd3bef	136	spin_lock_init(&port->lock);
feed5bab	137	port->uartclk = BASE_BAUD * 16;
9aac5887 RH	138	if (port->mapbase)
	139	port->membase = earlycon_map(port->mapbase, 64);
	140
cda64e68	141	earlycon_init(&early_console_dev, match->name);
470ca0de	142	err = match->setup(&early_console_dev, buf);
9aac5887 RH	143	if (err < 0)
	144	return err;
	145	if (!early_console_dev.con->write)
	146	return -ENODEV;
	147
	148	register_console(early_console_dev.con);
	149	return 0;
	150	}
b0b6abd3	151
470ca0de PH	152	/**
	153	* setup_earlycon - match and register earlycon console
	154	* @buf: earlycon param string
	155	*
	156	* Registers the earlycon console matching the earlycon specified
	157	* in the param string @buf. Acceptable param strings are of the form
6e63be3f	158	* <name>,io\|mmio\|mmio32\|mmio32be,<addr>,<options>
470ca0de PH	159	* <name>,0x<addr>,<options>
	160	* <name>,<options>
	161	* <name>
	162	*
	163	* Only for the third form does the earlycon setup() method receive the
	164	* <options> string in the 'options' parameter; all other forms set
	165	* the parameter to NULL.
	166	*
	167	* Returns 0 if an attempt to register the earlycon was made,
	168	* otherwise negative error code
	169	*/
	170	int __init setup_earlycon(char *buf)
7c53cb3d	171	{
1f67d7a5	172	const struct earlycon_id **p_match;
7c53cb3d	173
470ca0de PH	174	if (!buf \|\| !buf[0])
470ca0de PH	175	return -EINVAL;
7c53cb3d	176
470ca0de PH	177	if (early_con.flags & CON_ENABLED)
470ca0de PH	178	return -EALREADY;
7c53cb3d	179
1f67d7a5 DK	180	for (p_match = __earlycon_table; p_match < __earlycon_table_end;
	181	p_match++) {
	182	const struct earlycon_id match = p_match;
470ca0de	183	size_t len = strlen(match->name);
7c53cb3d	184
470ca0de PH	185	if (strncmp(buf, match->name, len))
	186	continue;
	187
	188	if (buf[len]) {
	189	if (buf[len] != ',')
	190	continue;
	191	buf += len + 1;
	192	} else
	193	buf = NULL;
	194
	195	return register_earlycon(buf, match);
	196	}
	197
	198	return -ENOENT;
	199	}
	200
ad1696f6 AM	201	/*
	202	* When CONFIG_ACPI_SPCR_TABLE is defined, "earlycon" without parameters in
	203	* command line does not start DT earlycon immediately, instead it defers
	204	* starting it until DT/ACPI decision is made. At that time if ACPI is enabled
	205	* call parse_spcr(), else call early_init_dt_scan_chosen_stdout()
	206	*/
	207	bool earlycon_init_is_deferred __initdata;
	208
470ca0de PH	209	/* early_param wrapper for setup_earlycon() */
	210	static int __init param_setup_earlycon(char *buf)
	211	{
	212	int err;
	213
	214	/*
	215	* Just 'earlycon' is a valid param for devicetree earlycons;
	216	* don't generate a warning from parse_early_params() in that case
	217	*/
ad1696f6 AM	218	if (!buf \|\| !buf[0]) {
	219	if (IS_ENABLED(CONFIG_ACPI_SPCR_TABLE)) {
	220	earlycon_init_is_deferred = true;
	221	return 0;
447ef990	222	} else if (!buf) {
ad1696f6 AM	223	return early_init_dt_scan_chosen_stdout();
	224	}
	225	}
470ca0de PH	226
470ca0de PH	227	err = setup_earlycon(buf);
66c53aaa PH	228	if (err == -ENOENT \|\| err == -EALREADY)
66c53aaa PH	229	return 0;
470ca0de	230	return err;
7c53cb3d	231	}
470ca0de	232	early_param("earlycon", param_setup_earlycon);
7c53cb3d	233
8477614d PH	234	#ifdef CONFIG_OF_EARLY_FLATTREE
8477614d PH	235
c90fe9c0	236	int __init of_setup_earlycon(const struct earlycon_id *match,
088da2a1	237	unsigned long node,
4d118c9a	238	const char *options)
b0b6abd3 RH	239	{
	240	int err;
	241	struct uart_port *port = &early_console_dev.port;
088da2a1 PH	242	const __be32 *val;
088da2a1 PH	243	bool big_endian;
c90fe9c0	244	u64 addr;
b0b6abd3	245
e1dd3bef	246	spin_lock_init(&port->lock);
b0b6abd3	247	port->iotype = UPIO_MEM;
c90fe9c0 PH	248	addr = of_flat_dt_translate_address(node);
	249	if (addr == OF_BAD_ADDR) {
	250	pr_warn("[%s] bad address\n", match->name);
	251	return -ENXIO;
	252	}
b0b6abd3 RH	253	port->mapbase = addr;
b0b6abd3 RH	254	port->uartclk = BASE_BAUD * 16;
b0b6abd3	255
088da2a1 PH	256	val = of_get_flat_dt_prop(node, "reg-offset", NULL);
	257	if (val)
	258	port->mapbase += be32_to_cpu(*val);
f264f1f2 GH	259	port->membase = earlycon_map(port->mapbase, SZ_4K);
f264f1f2 GH	260
088da2a1 PH	261	val = of_get_flat_dt_prop(node, "reg-shift", NULL);
	262	if (val)
	263	port->regshift = be32_to_cpu(*val);
	264	big_endian = of_get_flat_dt_prop(node, "big-endian", NULL) != NULL \|\|
	265	(IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) &&
	266	of_get_flat_dt_prop(node, "native-endian", NULL) != NULL);
	267	val = of_get_flat_dt_prop(node, "reg-io-width", NULL);
	268	if (val) {
	269	switch (be32_to_cpu(*val)) {
	270	case 1:
	271	port->iotype = UPIO_MEM;
	272	break;
	273	case 2:
	274	port->iotype = UPIO_MEM16;
	275	break;
	276	case 4:
	277	port->iotype = (big_endian) ? UPIO_MEM32BE : UPIO_MEM32;
	278	break;
	279	default:
	280	pr_warn("[%s] unsupported reg-io-width\n", match->name);
	281	return -EINVAL;
	282	}
	283	}
	284
31cb9a85 EP	285	val = of_get_flat_dt_prop(node, "current-speed", NULL);
	286	if (val)
	287	early_console_dev.baud = be32_to_cpu(*val);
	288
4d118c9a	289	if (options) {
31cb9a85	290	early_console_dev.baud = simple_strtoul(options, NULL, 0);
4d118c9a PH	291	strlcpy(early_console_dev.options, options,
	292	sizeof(early_console_dev.options));
	293	}
05d96132	294	earlycon_init(&early_console_dev, match->name);
4d118c9a	295	err = match->setup(&early_console_dev, options);
b0b6abd3 RH	296	if (err < 0)
	297	return err;
	298	if (!early_console_dev.con->write)
	299	return -ENODEV;
	300
	301
	302	register_console(early_console_dev.con);
	303	return 0;
	304	}
8477614d PH	305
8477614d PH	306	#endif /* CONFIG_OF_EARLY_FLATTREE */