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e3b3d0f5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
1da177e4 LT |
2 | /************************************************************************ |
3 | * Copyright 2003 Digi International (www.digi.com) | |
4 | * | |
5 | * Copyright (C) 2004 IBM Corporation. All rights reserved. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2, or (at your option) | |
10 | * any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the | |
14 | * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR | |
15 | * PURPOSE. See the GNU General Public License for more details. | |
16 | * | |
1da177e4 LT |
17 | * Contact Information: |
18 | * Scott H Kilau <Scott_Kilau@digi.com> | |
0a577ce3 AK |
19 | * Ananda Venkatarman <mansarov@us.ibm.com> |
20 | * Modifications: | |
21 | * 01/19/06: changed jsm_input routine to use the dynamically allocated | |
22 | * tty_buffer changes. Contributors: Scott Kilau and Ananda V. | |
1da177e4 LT |
23 | ***********************************************************************/ |
24 | #include <linux/tty.h> | |
25 | #include <linux/tty_flip.h> | |
26 | #include <linux/serial_reg.h> | |
27 | #include <linux/delay.h> /* For udelay */ | |
28 | #include <linux/pci.h> | |
5a0e3ad6 | 29 | #include <linux/slab.h> |
1da177e4 LT |
30 | |
31 | #include "jsm.h" | |
32 | ||
13858d36 AF |
33 | static DECLARE_BITMAP(linemap, MAXLINES); |
34 | ||
408b664a AB |
35 | static void jsm_carrier(struct jsm_channel *ch); |
36 | ||
1da177e4 LT |
37 | static inline int jsm_get_mstat(struct jsm_channel *ch) |
38 | { | |
39 | unsigned char mstat; | |
c100a3f1 | 40 | int result; |
1da177e4 | 41 | |
669fef46 | 42 | jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
43 | |
44 | mstat = (ch->ch_mostat | ch->ch_mistat); | |
45 | ||
46 | result = 0; | |
47 | ||
48 | if (mstat & UART_MCR_DTR) | |
49 | result |= TIOCM_DTR; | |
50 | if (mstat & UART_MCR_RTS) | |
51 | result |= TIOCM_RTS; | |
52 | if (mstat & UART_MSR_CTS) | |
53 | result |= TIOCM_CTS; | |
54 | if (mstat & UART_MSR_DSR) | |
55 | result |= TIOCM_DSR; | |
56 | if (mstat & UART_MSR_RI) | |
57 | result |= TIOCM_RI; | |
58 | if (mstat & UART_MSR_DCD) | |
59 | result |= TIOCM_CD; | |
60 | ||
669fef46 | 61 | jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n"); |
1da177e4 LT |
62 | return result; |
63 | } | |
64 | ||
65 | static unsigned int jsm_tty_tx_empty(struct uart_port *port) | |
66 | { | |
67 | return TIOCSER_TEMT; | |
68 | } | |
69 | ||
70 | /* | |
71 | * Return modem signals to ld. | |
72 | */ | |
73 | static unsigned int jsm_tty_get_mctrl(struct uart_port *port) | |
74 | { | |
75 | int result; | |
a15ad348 FF |
76 | struct jsm_channel *channel = |
77 | container_of(port, struct jsm_channel, uart_port); | |
1da177e4 | 78 | |
669fef46 | 79 | jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
80 | |
81 | result = jsm_get_mstat(channel); | |
82 | ||
83 | if (result < 0) | |
84 | return -ENXIO; | |
85 | ||
669fef46 | 86 | jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n"); |
1da177e4 LT |
87 | |
88 | return result; | |
89 | } | |
90 | ||
91 | /* | |
92 | * jsm_set_modem_info() | |
93 | * | |
94 | * Set modem signals, called by ld. | |
95 | */ | |
96 | static void jsm_tty_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
97 | { | |
a15ad348 FF |
98 | struct jsm_channel *channel = |
99 | container_of(port, struct jsm_channel, uart_port); | |
1da177e4 | 100 | |
669fef46 | 101 | jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
102 | |
103 | if (mctrl & TIOCM_RTS) | |
104 | channel->ch_mostat |= UART_MCR_RTS; | |
105 | else | |
106 | channel->ch_mostat &= ~UART_MCR_RTS; | |
107 | ||
108 | if (mctrl & TIOCM_DTR) | |
109 | channel->ch_mostat |= UART_MCR_DTR; | |
110 | else | |
111 | channel->ch_mostat &= ~UART_MCR_DTR; | |
112 | ||
113 | channel->ch_bd->bd_ops->assert_modem_signals(channel); | |
114 | ||
669fef46 | 115 | jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n"); |
1da177e4 LT |
116 | udelay(10); |
117 | } | |
118 | ||
9d898966 TLSC |
119 | /* |
120 | * jsm_tty_write() | |
121 | * | |
122 | * Take data from the user or kernel and send it out to the FEP. | |
123 | * In here exists all the Transparent Print magic as well. | |
124 | */ | |
125 | static void jsm_tty_write(struct uart_port *port) | |
126 | { | |
127 | struct jsm_channel *channel; | |
d13551d1 | 128 | |
9d898966 TLSC |
129 | channel = container_of(port, struct jsm_channel, uart_port); |
130 | channel->ch_bd->bd_ops->copy_data_from_queue_to_uart(channel); | |
131 | } | |
132 | ||
b129a8cc | 133 | static void jsm_tty_start_tx(struct uart_port *port) |
1da177e4 | 134 | { |
a15ad348 FF |
135 | struct jsm_channel *channel = |
136 | container_of(port, struct jsm_channel, uart_port); | |
1da177e4 | 137 | |
669fef46 | 138 | jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
139 | |
140 | channel->ch_flags &= ~(CH_STOP); | |
141 | jsm_tty_write(port); | |
142 | ||
669fef46 | 143 | jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n"); |
1da177e4 LT |
144 | } |
145 | ||
b129a8cc | 146 | static void jsm_tty_stop_tx(struct uart_port *port) |
1da177e4 | 147 | { |
a15ad348 FF |
148 | struct jsm_channel *channel = |
149 | container_of(port, struct jsm_channel, uart_port); | |
1da177e4 | 150 | |
669fef46 | 151 | jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
152 | |
153 | channel->ch_flags |= (CH_STOP); | |
154 | ||
669fef46 | 155 | jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n"); |
1da177e4 LT |
156 | } |
157 | ||
158 | static void jsm_tty_send_xchar(struct uart_port *port, char ch) | |
159 | { | |
160 | unsigned long lock_flags; | |
a15ad348 FF |
161 | struct jsm_channel *channel = |
162 | container_of(port, struct jsm_channel, uart_port); | |
606d099c | 163 | struct ktermios *termios; |
1da177e4 LT |
164 | |
165 | spin_lock_irqsave(&port->lock, lock_flags); | |
adc8d746 | 166 | termios = &port->state->port.tty->termios; |
a58e00e7 | 167 | if (ch == termios->c_cc[VSTART]) |
1da177e4 LT |
168 | channel->ch_bd->bd_ops->send_start_character(channel); |
169 | ||
a58e00e7 | 170 | if (ch == termios->c_cc[VSTOP]) |
1da177e4 LT |
171 | channel->ch_bd->bd_ops->send_stop_character(channel); |
172 | spin_unlock_irqrestore(&port->lock, lock_flags); | |
173 | } | |
174 | ||
175 | static void jsm_tty_stop_rx(struct uart_port *port) | |
176 | { | |
a15ad348 FF |
177 | struct jsm_channel *channel = |
178 | container_of(port, struct jsm_channel, uart_port); | |
1da177e4 LT |
179 | |
180 | channel->ch_bd->bd_ops->disable_receiver(channel); | |
181 | } | |
182 | ||
183 | static void jsm_tty_break(struct uart_port *port, int break_state) | |
184 | { | |
185 | unsigned long lock_flags; | |
a15ad348 FF |
186 | struct jsm_channel *channel = |
187 | container_of(port, struct jsm_channel, uart_port); | |
1da177e4 LT |
188 | |
189 | spin_lock_irqsave(&port->lock, lock_flags); | |
190 | if (break_state == -1) | |
191 | channel->ch_bd->bd_ops->send_break(channel); | |
192 | else | |
333f4eb1 | 193 | channel->ch_bd->bd_ops->clear_break(channel); |
1da177e4 LT |
194 | |
195 | spin_unlock_irqrestore(&port->lock, lock_flags); | |
196 | } | |
197 | ||
198 | static int jsm_tty_open(struct uart_port *port) | |
199 | { | |
200 | struct jsm_board *brd; | |
a15ad348 FF |
201 | struct jsm_channel *channel = |
202 | container_of(port, struct jsm_channel, uart_port); | |
606d099c | 203 | struct ktermios *termios; |
1da177e4 LT |
204 | |
205 | /* Get board pointer from our array of majors we have allocated */ | |
206 | brd = channel->ch_bd; | |
207 | ||
208 | /* | |
209 | * Allocate channel buffers for read/write/error. | |
210 | * Set flag, so we don't get trounced on. | |
211 | */ | |
212 | channel->ch_flags |= (CH_OPENING); | |
213 | ||
214 | /* Drop locks, as malloc with GFP_KERNEL can sleep */ | |
215 | ||
216 | if (!channel->ch_rqueue) { | |
8f31bb39 | 217 | channel->ch_rqueue = kzalloc(RQUEUESIZE, GFP_KERNEL); |
1da177e4 | 218 | if (!channel->ch_rqueue) { |
669fef46 JP |
219 | jsm_dbg(INIT, &channel->ch_bd->pci_dev, |
220 | "unable to allocate read queue buf\n"); | |
1da177e4 LT |
221 | return -ENOMEM; |
222 | } | |
1da177e4 LT |
223 | } |
224 | if (!channel->ch_equeue) { | |
8f31bb39 | 225 | channel->ch_equeue = kzalloc(EQUEUESIZE, GFP_KERNEL); |
1da177e4 | 226 | if (!channel->ch_equeue) { |
669fef46 JP |
227 | jsm_dbg(INIT, &channel->ch_bd->pci_dev, |
228 | "unable to allocate error queue buf\n"); | |
1da177e4 LT |
229 | return -ENOMEM; |
230 | } | |
1da177e4 | 231 | } |
1da177e4 LT |
232 | |
233 | channel->ch_flags &= ~(CH_OPENING); | |
234 | /* | |
235 | * Initialize if neither terminal is open. | |
236 | */ | |
669fef46 | 237 | jsm_dbg(OPEN, &channel->ch_bd->pci_dev, |
1da177e4 LT |
238 | "jsm_open: initializing channel in open...\n"); |
239 | ||
240 | /* | |
241 | * Flush input queues. | |
242 | */ | |
243 | channel->ch_r_head = channel->ch_r_tail = 0; | |
244 | channel->ch_e_head = channel->ch_e_tail = 0; | |
1da177e4 LT |
245 | |
246 | brd->bd_ops->flush_uart_write(channel); | |
247 | brd->bd_ops->flush_uart_read(channel); | |
248 | ||
249 | channel->ch_flags = 0; | |
250 | channel->ch_cached_lsr = 0; | |
251 | channel->ch_stops_sent = 0; | |
252 | ||
adc8d746 | 253 | termios = &port->state->port.tty->termios; |
a58e00e7 JJ |
254 | channel->ch_c_cflag = termios->c_cflag; |
255 | channel->ch_c_iflag = termios->c_iflag; | |
256 | channel->ch_c_oflag = termios->c_oflag; | |
257 | channel->ch_c_lflag = termios->c_lflag; | |
258 | channel->ch_startc = termios->c_cc[VSTART]; | |
259 | channel->ch_stopc = termios->c_cc[VSTOP]; | |
1da177e4 LT |
260 | |
261 | /* Tell UART to init itself */ | |
262 | brd->bd_ops->uart_init(channel); | |
263 | ||
264 | /* | |
265 | * Run param in case we changed anything | |
266 | */ | |
267 | brd->bd_ops->param(channel); | |
268 | ||
269 | jsm_carrier(channel); | |
270 | ||
271 | channel->ch_open_count++; | |
272 | ||
669fef46 | 273 | jsm_dbg(OPEN, &channel->ch_bd->pci_dev, "finish\n"); |
8e7d91c9 | 274 | return 0; |
1da177e4 LT |
275 | } |
276 | ||
277 | static void jsm_tty_close(struct uart_port *port) | |
278 | { | |
279 | struct jsm_board *bd; | |
a15ad348 FF |
280 | struct jsm_channel *channel = |
281 | container_of(port, struct jsm_channel, uart_port); | |
1da177e4 | 282 | |
669fef46 | 283 | jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
284 | |
285 | bd = channel->ch_bd; | |
1da177e4 LT |
286 | |
287 | channel->ch_flags &= ~(CH_STOPI); | |
288 | ||
289 | channel->ch_open_count--; | |
290 | ||
291 | /* | |
292 | * If we have HUPCL set, lower DTR and RTS | |
293 | */ | |
294 | if (channel->ch_c_cflag & HUPCL) { | |
669fef46 | 295 | jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, |
1da177e4 LT |
296 | "Close. HUPCL set, dropping DTR/RTS\n"); |
297 | ||
298 | /* Drop RTS/DTR */ | |
299 | channel->ch_mostat &= ~(UART_MCR_DTR | UART_MCR_RTS); | |
300 | bd->bd_ops->assert_modem_signals(channel); | |
301 | } | |
302 | ||
1da177e4 LT |
303 | /* Turn off UART interrupts for this port */ |
304 | channel->ch_bd->bd_ops->uart_off(channel); | |
305 | ||
669fef46 | 306 | jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "finish\n"); |
1da177e4 LT |
307 | } |
308 | ||
309 | static void jsm_tty_set_termios(struct uart_port *port, | |
606d099c AC |
310 | struct ktermios *termios, |
311 | struct ktermios *old_termios) | |
1da177e4 LT |
312 | { |
313 | unsigned long lock_flags; | |
a15ad348 FF |
314 | struct jsm_channel *channel = |
315 | container_of(port, struct jsm_channel, uart_port); | |
1da177e4 LT |
316 | |
317 | spin_lock_irqsave(&port->lock, lock_flags); | |
318 | channel->ch_c_cflag = termios->c_cflag; | |
319 | channel->ch_c_iflag = termios->c_iflag; | |
320 | channel->ch_c_oflag = termios->c_oflag; | |
321 | channel->ch_c_lflag = termios->c_lflag; | |
322 | channel->ch_startc = termios->c_cc[VSTART]; | |
323 | channel->ch_stopc = termios->c_cc[VSTOP]; | |
324 | ||
325 | channel->ch_bd->bd_ops->param(channel); | |
326 | jsm_carrier(channel); | |
327 | spin_unlock_irqrestore(&port->lock, lock_flags); | |
328 | } | |
329 | ||
330 | static const char *jsm_tty_type(struct uart_port *port) | |
331 | { | |
332 | return "jsm"; | |
333 | } | |
334 | ||
335 | static void jsm_tty_release_port(struct uart_port *port) | |
336 | { | |
337 | } | |
338 | ||
339 | static int jsm_tty_request_port(struct uart_port *port) | |
340 | { | |
341 | return 0; | |
342 | } | |
343 | ||
344 | static void jsm_config_port(struct uart_port *port, int flags) | |
345 | { | |
346 | port->type = PORT_JSM; | |
347 | } | |
348 | ||
5d9b9530 | 349 | static const struct uart_ops jsm_ops = { |
1da177e4 LT |
350 | .tx_empty = jsm_tty_tx_empty, |
351 | .set_mctrl = jsm_tty_set_mctrl, | |
352 | .get_mctrl = jsm_tty_get_mctrl, | |
353 | .stop_tx = jsm_tty_stop_tx, | |
354 | .start_tx = jsm_tty_start_tx, | |
355 | .send_xchar = jsm_tty_send_xchar, | |
356 | .stop_rx = jsm_tty_stop_rx, | |
357 | .break_ctl = jsm_tty_break, | |
358 | .startup = jsm_tty_open, | |
359 | .shutdown = jsm_tty_close, | |
360 | .set_termios = jsm_tty_set_termios, | |
361 | .type = jsm_tty_type, | |
362 | .release_port = jsm_tty_release_port, | |
363 | .request_port = jsm_tty_request_port, | |
364 | .config_port = jsm_config_port, | |
365 | }; | |
366 | ||
367 | /* | |
368 | * jsm_tty_init() | |
369 | * | |
370 | * Init the tty subsystem. Called once per board after board has been | |
371 | * downloaded and init'ed. | |
372 | */ | |
9671f099 | 373 | int jsm_tty_init(struct jsm_board *brd) |
1da177e4 LT |
374 | { |
375 | int i; | |
376 | void __iomem *vaddr; | |
377 | struct jsm_channel *ch; | |
378 | ||
379 | if (!brd) | |
380 | return -ENXIO; | |
381 | ||
669fef46 | 382 | jsm_dbg(INIT, &brd->pci_dev, "start\n"); |
1da177e4 LT |
383 | |
384 | /* | |
385 | * Initialize board structure elements. | |
386 | */ | |
387 | ||
388 | brd->nasync = brd->maxports; | |
389 | ||
390 | /* | |
391 | * Allocate channel memory that might not have been allocated | |
392 | * when the driver was first loaded. | |
393 | */ | |
394 | for (i = 0; i < brd->nasync; i++) { | |
395 | if (!brd->channels[i]) { | |
396 | ||
397 | /* | |
398 | * Okay to malloc with GFP_KERNEL, we are not at | |
399 | * interrupt context, and there are no locks held. | |
400 | */ | |
8f31bb39 | 401 | brd->channels[i] = kzalloc(sizeof(struct jsm_channel), GFP_KERNEL); |
1da177e4 | 402 | if (!brd->channels[i]) { |
669fef46 | 403 | jsm_dbg(CORE, &brd->pci_dev, |
1da177e4 | 404 | "%s:%d Unable to allocate memory for channel struct\n", |
669fef46 | 405 | __FILE__, __LINE__); |
1da177e4 | 406 | } |
1da177e4 LT |
407 | } |
408 | } | |
409 | ||
410 | ch = brd->channels[0]; | |
411 | vaddr = brd->re_map_membase; | |
412 | ||
413 | /* Set up channel variables */ | |
414 | for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) { | |
415 | ||
416 | if (!brd->channels[i]) | |
417 | continue; | |
418 | ||
419 | spin_lock_init(&ch->ch_lock); | |
420 | ||
421 | if (brd->bd_uart_offset == 0x200) | |
422 | ch->ch_neo_uart = vaddr + (brd->bd_uart_offset * i); | |
03a8482c KZ |
423 | else |
424 | ch->ch_cls_uart = vaddr + (brd->bd_uart_offset * i); | |
1da177e4 LT |
425 | |
426 | ch->ch_bd = brd; | |
427 | ch->ch_portnum = i; | |
428 | ||
429 | /* .25 second delay */ | |
430 | ch->ch_close_delay = 250; | |
431 | ||
432 | init_waitqueue_head(&ch->ch_flags_wait); | |
433 | } | |
434 | ||
669fef46 | 435 | jsm_dbg(INIT, &brd->pci_dev, "finish\n"); |
1da177e4 LT |
436 | return 0; |
437 | } | |
438 | ||
e6bdf24c | 439 | int jsm_uart_port_init(struct jsm_board *brd) |
1da177e4 | 440 | { |
137ee2f5 | 441 | int i, rc; |
13858d36 | 442 | unsigned int line; |
1da177e4 LT |
443 | struct jsm_channel *ch; |
444 | ||
445 | if (!brd) | |
446 | return -ENXIO; | |
447 | ||
669fef46 | 448 | jsm_dbg(INIT, &brd->pci_dev, "start\n"); |
1da177e4 LT |
449 | |
450 | /* | |
451 | * Initialize board structure elements. | |
452 | */ | |
453 | ||
454 | brd->nasync = brd->maxports; | |
455 | ||
456 | /* Set up channel variables */ | |
457 | for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) { | |
458 | ||
459 | if (!brd->channels[i]) | |
460 | continue; | |
461 | ||
462 | brd->channels[i]->uart_port.irq = brd->irq; | |
3c04c272 | 463 | brd->channels[i]->uart_port.uartclk = 14745600; |
1da177e4 LT |
464 | brd->channels[i]->uart_port.type = PORT_JSM; |
465 | brd->channels[i]->uart_port.iotype = UPIO_MEM; | |
466 | brd->channels[i]->uart_port.membase = brd->re_map_membase; | |
467 | brd->channels[i]->uart_port.fifosize = 16; | |
468 | brd->channels[i]->uart_port.ops = &jsm_ops; | |
13858d36 AF |
469 | line = find_first_zero_bit(linemap, MAXLINES); |
470 | if (line >= MAXLINES) { | |
471 | printk(KERN_INFO "jsm: linemap is full, added device failed\n"); | |
472 | continue; | |
473 | } else | |
2a13373c | 474 | set_bit(line, linemap); |
13858d36 | 475 | brd->channels[i]->uart_port.line = line; |
24719a8d | 476 | rc = uart_add_one_port(&jsm_uart_driver, &brd->channels[i]->uart_port); |
62fadbd8 | 477 | if (rc) { |
137ee2f5 BL |
478 | printk(KERN_INFO "jsm: Port %d failed. Aborting...\n", i); |
479 | return rc; | |
67c6f4b6 | 480 | } else |
354aaf96 | 481 | printk(KERN_INFO "jsm: Port %d added\n", i); |
1da177e4 LT |
482 | } |
483 | ||
669fef46 | 484 | jsm_dbg(INIT, &brd->pci_dev, "finish\n"); |
1da177e4 LT |
485 | return 0; |
486 | } | |
487 | ||
488 | int jsm_remove_uart_port(struct jsm_board *brd) | |
489 | { | |
490 | int i; | |
491 | struct jsm_channel *ch; | |
492 | ||
493 | if (!brd) | |
494 | return -ENXIO; | |
495 | ||
669fef46 | 496 | jsm_dbg(INIT, &brd->pci_dev, "start\n"); |
1da177e4 LT |
497 | |
498 | /* | |
499 | * Initialize board structure elements. | |
500 | */ | |
501 | ||
502 | brd->nasync = brd->maxports; | |
503 | ||
504 | /* Set up channel variables */ | |
505 | for (i = 0; i < brd->nasync; i++) { | |
506 | ||
507 | if (!brd->channels[i]) | |
508 | continue; | |
509 | ||
510 | ch = brd->channels[i]; | |
511 | ||
2a13373c | 512 | clear_bit(ch->uart_port.line, linemap); |
1da177e4 LT |
513 | uart_remove_one_port(&jsm_uart_driver, &brd->channels[i]->uart_port); |
514 | } | |
515 | ||
669fef46 | 516 | jsm_dbg(INIT, &brd->pci_dev, "finish\n"); |
1da177e4 LT |
517 | return 0; |
518 | } | |
519 | ||
520 | void jsm_input(struct jsm_channel *ch) | |
521 | { | |
522 | struct jsm_board *bd; | |
523 | struct tty_struct *tp; | |
227434f8 | 524 | struct tty_port *port; |
1da177e4 LT |
525 | u32 rmask; |
526 | u16 head; | |
527 | u16 tail; | |
528 | int data_len; | |
529 | unsigned long lock_flags; | |
1da177e4 | 530 | int len = 0; |
1da177e4 LT |
531 | int s = 0; |
532 | int i = 0; | |
533 | ||
669fef46 | 534 | jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
535 | |
536 | if (!ch) | |
537 | return; | |
538 | ||
227434f8 JS |
539 | port = &ch->uart_port.state->port; |
540 | tp = port->tty; | |
1da177e4 LT |
541 | |
542 | bd = ch->ch_bd; | |
8191762a | 543 | if (!bd) |
1da177e4 LT |
544 | return; |
545 | ||
546 | spin_lock_irqsave(&ch->ch_lock, lock_flags); | |
547 | ||
548 | /* | |
549 | *Figure the number of characters in the buffer. | |
550 | *Exit immediately if none. | |
551 | */ | |
552 | ||
553 | rmask = RQUEUEMASK; | |
554 | ||
555 | head = ch->ch_r_head & rmask; | |
556 | tail = ch->ch_r_tail & rmask; | |
557 | ||
558 | data_len = (head - tail) & rmask; | |
559 | if (data_len == 0) { | |
560 | spin_unlock_irqrestore(&ch->ch_lock, lock_flags); | |
561 | return; | |
562 | } | |
563 | ||
669fef46 | 564 | jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
565 | |
566 | /* | |
567 | *If the device is not open, or CREAD is off, flush | |
568 | *input data and return immediately. | |
569 | */ | |
9db276f8 | 570 | if (!tp || !C_CREAD(tp)) { |
1da177e4 | 571 | |
669fef46 JP |
572 | jsm_dbg(READ, &ch->ch_bd->pci_dev, |
573 | "input. dropping %d bytes on port %d...\n", | |
574 | data_len, ch->ch_portnum); | |
1da177e4 LT |
575 | ch->ch_r_head = tail; |
576 | ||
577 | /* Force queue flow control to be released, if needed */ | |
578 | jsm_check_queue_flow_control(ch); | |
579 | ||
580 | spin_unlock_irqrestore(&ch->ch_lock, lock_flags); | |
581 | return; | |
582 | } | |
583 | ||
584 | /* | |
585 | * If we are throttled, simply don't read any data. | |
586 | */ | |
587 | if (ch->ch_flags & CH_STOPI) { | |
588 | spin_unlock_irqrestore(&ch->ch_lock, lock_flags); | |
669fef46 | 589 | jsm_dbg(READ, &ch->ch_bd->pci_dev, |
1da177e4 LT |
590 | "Port %d throttled, not reading any data. head: %x tail: %x\n", |
591 | ch->ch_portnum, head, tail); | |
592 | return; | |
593 | } | |
594 | ||
669fef46 | 595 | jsm_dbg(READ, &ch->ch_bd->pci_dev, "start 2\n"); |
1da177e4 | 596 | |
227434f8 | 597 | len = tty_buffer_request_room(port, data_len); |
1da177e4 LT |
598 | |
599 | /* | |
98cb4ab0 | 600 | * len now contains the most amount of data we can copy, |
1da177e4 LT |
601 | * bounded either by the flip buffer size or the amount |
602 | * of data the card actually has pending... | |
603 | */ | |
98cb4ab0 | 604 | while (len) { |
1da177e4 | 605 | s = ((head >= tail) ? head : RQUEUESIZE) - tail; |
98cb4ab0 | 606 | s = min(s, len); |
1da177e4 LT |
607 | |
608 | if (s <= 0) | |
609 | break; | |
610 | ||
0a577ce3 AK |
611 | /* |
612 | * If conditions are such that ld needs to see all | |
613 | * UART errors, we will have to walk each character | |
614 | * and error byte and send them to the buffer one at | |
615 | * a time. | |
616 | */ | |
1da177e4 | 617 | |
1da177e4 | 618 | if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) { |
0a577ce3 | 619 | for (i = 0; i < s; i++) { |
1da177e4 LT |
620 | /* |
621 | * Give the Linux ld the flags in the | |
622 | * format it likes. | |
623 | */ | |
0a577ce3 | 624 | if (*(ch->ch_equeue +tail +i) & UART_LSR_BI) |
92a19f9c | 625 | tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_BREAK); |
0a577ce3 | 626 | else if (*(ch->ch_equeue +tail +i) & UART_LSR_PE) |
92a19f9c | 627 | tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_PARITY); |
0a577ce3 | 628 | else if (*(ch->ch_equeue +tail +i) & UART_LSR_FE) |
92a19f9c | 629 | tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_FRAME); |
1da177e4 | 630 | else |
92a19f9c | 631 | tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_NORMAL); |
1da177e4 LT |
632 | } |
633 | } else { | |
05c7cd39 | 634 | tty_insert_flip_string(port, ch->ch_rqueue + tail, s); |
1da177e4 | 635 | } |
0a577ce3 | 636 | tail += s; |
98cb4ab0 | 637 | len -= s; |
0a577ce3 AK |
638 | /* Flip queue if needed */ |
639 | tail &= rmask; | |
1da177e4 LT |
640 | } |
641 | ||
0a577ce3 AK |
642 | ch->ch_r_tail = tail & rmask; |
643 | ch->ch_e_tail = tail & rmask; | |
644 | jsm_check_queue_flow_control(ch); | |
645 | spin_unlock_irqrestore(&ch->ch_lock, lock_flags); | |
1da177e4 | 646 | |
0a577ce3 | 647 | /* Tell the tty layer its okay to "eat" the data now */ |
2e124b4a | 648 | tty_flip_buffer_push(port); |
1da177e4 | 649 | |
669fef46 | 650 | jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n"); |
1da177e4 LT |
651 | } |
652 | ||
408b664a | 653 | static void jsm_carrier(struct jsm_channel *ch) |
1da177e4 LT |
654 | { |
655 | struct jsm_board *bd; | |
656 | ||
657 | int virt_carrier = 0; | |
658 | int phys_carrier = 0; | |
659 | ||
669fef46 | 660 | jsm_dbg(CARR, &ch->ch_bd->pci_dev, "start\n"); |
1da177e4 LT |
661 | if (!ch) |
662 | return; | |
663 | ||
664 | bd = ch->ch_bd; | |
665 | ||
666 | if (!bd) | |
667 | return; | |
668 | ||
669 | if (ch->ch_mistat & UART_MSR_DCD) { | |
669fef46 JP |
670 | jsm_dbg(CARR, &ch->ch_bd->pci_dev, "mistat: %x D_CD: %x\n", |
671 | ch->ch_mistat, ch->ch_mistat & UART_MSR_DCD); | |
1da177e4 LT |
672 | phys_carrier = 1; |
673 | } | |
674 | ||
675 | if (ch->ch_c_cflag & CLOCAL) | |
676 | virt_carrier = 1; | |
677 | ||
669fef46 JP |
678 | jsm_dbg(CARR, &ch->ch_bd->pci_dev, "DCD: physical: %d virt: %d\n", |
679 | phys_carrier, virt_carrier); | |
1da177e4 LT |
680 | |
681 | /* | |
682 | * Test for a VIRTUAL carrier transition to HIGH. | |
683 | */ | |
684 | if (((ch->ch_flags & CH_FCAR) == 0) && (virt_carrier == 1)) { | |
685 | ||
686 | /* | |
687 | * When carrier rises, wake any threads waiting | |
688 | * for carrier in the open routine. | |
689 | */ | |
690 | ||
669fef46 | 691 | jsm_dbg(CARR, &ch->ch_bd->pci_dev, "carrier: virt DCD rose\n"); |
1da177e4 LT |
692 | |
693 | if (waitqueue_active(&(ch->ch_flags_wait))) | |
694 | wake_up_interruptible(&ch->ch_flags_wait); | |
695 | } | |
696 | ||
697 | /* | |
698 | * Test for a PHYSICAL carrier transition to HIGH. | |
699 | */ | |
700 | if (((ch->ch_flags & CH_CD) == 0) && (phys_carrier == 1)) { | |
701 | ||
702 | /* | |
703 | * When carrier rises, wake any threads waiting | |
704 | * for carrier in the open routine. | |
705 | */ | |
706 | ||
669fef46 | 707 | jsm_dbg(CARR, &ch->ch_bd->pci_dev, |
1da177e4 LT |
708 | "carrier: physical DCD rose\n"); |
709 | ||
710 | if (waitqueue_active(&(ch->ch_flags_wait))) | |
711 | wake_up_interruptible(&ch->ch_flags_wait); | |
712 | } | |
713 | ||
714 | /* | |
715 | * Test for a PHYSICAL transition to low, so long as we aren't | |
716 | * currently ignoring physical transitions (which is what "virtual | |
717 | * carrier" indicates). | |
718 | * | |
719 | * The transition of the virtual carrier to low really doesn't | |
720 | * matter... it really only means "ignore carrier state", not | |
721 | * "make pretend that carrier is there". | |
722 | */ | |
723 | if ((virt_carrier == 0) && ((ch->ch_flags & CH_CD) != 0) | |
724 | && (phys_carrier == 0)) { | |
725 | /* | |
726 | * When carrier drops: | |
727 | * | |
728 | * Drop carrier on all open units. | |
729 | * | |
730 | * Flush queues, waking up any task waiting in the | |
731 | * line discipline. | |
732 | * | |
733 | * Send a hangup to the control terminal. | |
734 | * | |
735 | * Enable all select calls. | |
736 | */ | |
737 | if (waitqueue_active(&(ch->ch_flags_wait))) | |
738 | wake_up_interruptible(&ch->ch_flags_wait); | |
739 | } | |
740 | ||
741 | /* | |
742 | * Make sure that our cached values reflect the current reality. | |
743 | */ | |
744 | if (virt_carrier == 1) | |
745 | ch->ch_flags |= CH_FCAR; | |
746 | else | |
747 | ch->ch_flags &= ~CH_FCAR; | |
748 | ||
749 | if (phys_carrier == 1) | |
750 | ch->ch_flags |= CH_CD; | |
751 | else | |
752 | ch->ch_flags &= ~CH_CD; | |
753 | } | |
754 | ||
755 | ||
756 | void jsm_check_queue_flow_control(struct jsm_channel *ch) | |
757 | { | |
a58e00e7 | 758 | struct board_ops *bd_ops = ch->ch_bd->bd_ops; |
8e7d91c9 | 759 | int qleft; |
1da177e4 LT |
760 | |
761 | /* Store how much space we have left in the queue */ | |
762 | if ((qleft = ch->ch_r_tail - ch->ch_r_head - 1) < 0) | |
763 | qleft += RQUEUEMASK + 1; | |
764 | ||
765 | /* | |
766 | * Check to see if we should enforce flow control on our queue because | |
767 | * the ld (or user) isn't reading data out of our queue fast enuf. | |
768 | * | |
769 | * NOTE: This is done based on what the current flow control of the | |
770 | * port is set for. | |
771 | * | |
772 | * 1) HWFLOW (RTS) - Turn off the UART's Receive interrupt. | |
773 | * This will cause the UART's FIFO to back up, and force | |
774 | * the RTS signal to be dropped. | |
775 | * 2) SWFLOW (IXOFF) - Keep trying to send a stop character to | |
776 | * the other side, in hopes it will stop sending data to us. | |
777 | * 3) NONE - Nothing we can do. We will simply drop any extra data | |
778 | * that gets sent into us when the queue fills up. | |
779 | */ | |
780 | if (qleft < 256) { | |
781 | /* HWFLOW */ | |
782 | if (ch->ch_c_cflag & CRTSCTS) { | |
8191762a | 783 | if (!(ch->ch_flags & CH_RECEIVER_OFF)) { |
a58e00e7 | 784 | bd_ops->disable_receiver(ch); |
1da177e4 | 785 | ch->ch_flags |= (CH_RECEIVER_OFF); |
669fef46 JP |
786 | jsm_dbg(READ, &ch->ch_bd->pci_dev, |
787 | "Internal queue hit hilevel mark (%d)! Turning off interrupts\n", | |
1da177e4 LT |
788 | qleft); |
789 | } | |
790 | } | |
791 | /* SWFLOW */ | |
792 | else if (ch->ch_c_iflag & IXOFF) { | |
793 | if (ch->ch_stops_sent <= MAX_STOPS_SENT) { | |
a58e00e7 | 794 | bd_ops->send_stop_character(ch); |
1da177e4 | 795 | ch->ch_stops_sent++; |
669fef46 JP |
796 | jsm_dbg(READ, &ch->ch_bd->pci_dev, |
797 | "Sending stop char! Times sent: %x\n", | |
798 | ch->ch_stops_sent); | |
1da177e4 LT |
799 | } |
800 | } | |
801 | } | |
802 | ||
803 | /* | |
804 | * Check to see if we should unenforce flow control because | |
805 | * ld (or user) finally read enuf data out of our queue. | |
806 | * | |
807 | * NOTE: This is done based on what the current flow control of the | |
808 | * port is set for. | |
809 | * | |
810 | * 1) HWFLOW (RTS) - Turn back on the UART's Receive interrupt. | |
811 | * This will cause the UART's FIFO to raise RTS back up, | |
812 | * which will allow the other side to start sending data again. | |
813 | * 2) SWFLOW (IXOFF) - Send a start character to | |
814 | * the other side, so it will start sending data to us again. | |
815 | * 3) NONE - Do nothing. Since we didn't do anything to turn off the | |
816 | * other side, we don't need to do anything now. | |
817 | */ | |
818 | if (qleft > (RQUEUESIZE / 2)) { | |
819 | /* HWFLOW */ | |
820 | if (ch->ch_c_cflag & CRTSCTS) { | |
821 | if (ch->ch_flags & CH_RECEIVER_OFF) { | |
a58e00e7 | 822 | bd_ops->enable_receiver(ch); |
1da177e4 | 823 | ch->ch_flags &= ~(CH_RECEIVER_OFF); |
669fef46 JP |
824 | jsm_dbg(READ, &ch->ch_bd->pci_dev, |
825 | "Internal queue hit lowlevel mark (%d)! Turning on interrupts\n", | |
1da177e4 LT |
826 | qleft); |
827 | } | |
828 | } | |
829 | /* SWFLOW */ | |
830 | else if (ch->ch_c_iflag & IXOFF && ch->ch_stops_sent) { | |
831 | ch->ch_stops_sent = 0; | |
a58e00e7 | 832 | bd_ops->send_start_character(ch); |
669fef46 JP |
833 | jsm_dbg(READ, &ch->ch_bd->pci_dev, |
834 | "Sending start char!\n"); | |
1da177e4 LT |
835 | } |
836 | } | |
837 | } |