]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/uio/uio_pruss.c
Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-fs
[mirror_ubuntu-artful-kernel.git] / drivers / uio / uio_pruss.c
CommitLineData
f1a304e7
PG
1/*
2 * Programmable Real-Time Unit Sub System (PRUSS) UIO driver (uio_pruss)
3 *
4 * This driver exports PRUSS host event out interrupts and PRUSS, L3 RAM,
5 * and DDR RAM to user space for applications interacting with PRUSS firmware
6 *
7 * Copyright (C) 2010-11 Texas Instruments Incorporated - http://www.ti.com/
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18#include <linux/device.h>
19#include <linux/module.h>
20#include <linux/moduleparam.h>
21#include <linux/platform_device.h>
22#include <linux/uio_driver.h>
23#include <linux/platform_data/uio_pruss.h>
24#include <linux/io.h>
25#include <linux/clk.h>
26#include <linux/dma-mapping.h>
87672676 27#include <linux/sizes.h>
f1a304e7 28#include <linux/slab.h>
2eb2478d 29#include <linux/genalloc.h>
f1a304e7
PG
30
31#define DRV_NAME "pruss_uio"
32#define DRV_VERSION "1.0"
33
34static int sram_pool_sz = SZ_16K;
35module_param(sram_pool_sz, int, 0);
36MODULE_PARM_DESC(sram_pool_sz, "sram pool size to allocate ");
37
38static int extram_pool_sz = SZ_256K;
39module_param(extram_pool_sz, int, 0);
40MODULE_PARM_DESC(extram_pool_sz, "external ram pool size to allocate");
41
42/*
25985edc 43 * Host event IRQ numbers from PRUSS - PRUSS can generate up to 8 interrupt
f1a304e7
PG
44 * events to AINTC of ARM host processor - which can be used for IPC b/w PRUSS
45 * firmware and user space application, async notification from PRU firmware
46 * to user space application
47 * 3 PRU_EVTOUT0
48 * 4 PRU_EVTOUT1
49 * 5 PRU_EVTOUT2
50 * 6 PRU_EVTOUT3
51 * 7 PRU_EVTOUT4
52 * 8 PRU_EVTOUT5
53 * 9 PRU_EVTOUT6
54 * 10 PRU_EVTOUT7
55*/
56#define MAX_PRUSS_EVT 8
57
58#define PINTC_HIDISR 0x0038
59#define PINTC_HIPIR 0x0900
60#define HIPIR_NOPEND 0x80000000
61#define PINTC_HIER 0x1500
62
63struct uio_pruss_dev {
64 struct uio_info *info;
65 struct clk *pruss_clk;
66 dma_addr_t sram_paddr;
67 dma_addr_t ddr_paddr;
68 void __iomem *prussio_vaddr;
2eb2478d 69 unsigned long sram_vaddr;
f1a304e7
PG
70 void *ddr_vaddr;
71 unsigned int hostirq_start;
72 unsigned int pintc_base;
2eb2478d 73 struct gen_pool *sram_pool;
f1a304e7
PG
74};
75
76static irqreturn_t pruss_handler(int irq, struct uio_info *info)
77{
78 struct uio_pruss_dev *gdev = info->priv;
79 int intr_bit = (irq - gdev->hostirq_start + 2);
80 int val, intr_mask = (1 << intr_bit);
81 void __iomem *base = gdev->prussio_vaddr + gdev->pintc_base;
82 void __iomem *intren_reg = base + PINTC_HIER;
83 void __iomem *intrdis_reg = base + PINTC_HIDISR;
84 void __iomem *intrstat_reg = base + PINTC_HIPIR + (intr_bit << 2);
85
86 val = ioread32(intren_reg);
87 /* Is interrupt enabled and active ? */
88 if (!(val & intr_mask) && (ioread32(intrstat_reg) & HIPIR_NOPEND))
89 return IRQ_NONE;
90 /* Disable interrupt */
91 iowrite32(intr_bit, intrdis_reg);
92 return IRQ_HANDLED;
93}
94
4719ebfd 95static void pruss_cleanup(struct device *dev, struct uio_pruss_dev *gdev)
f1a304e7
PG
96{
97 int cnt;
98 struct uio_info *p = gdev->info;
99
100 for (cnt = 0; cnt < MAX_PRUSS_EVT; cnt++, p++) {
101 uio_unregister_device(p);
102 kfree(p->name);
103 }
104 iounmap(gdev->prussio_vaddr);
105 if (gdev->ddr_vaddr) {
4719ebfd 106 dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
f1a304e7
PG
107 gdev->ddr_paddr);
108 }
109 if (gdev->sram_vaddr)
2eb2478d
MP
110 gen_pool_free(gdev->sram_pool,
111 gdev->sram_vaddr,
112 sram_pool_sz);
f1a304e7 113 kfree(gdev->info);
e663c5db 114 clk_disable(gdev->pruss_clk);
f1a304e7
PG
115 clk_put(gdev->pruss_clk);
116 kfree(gdev);
117}
118
4719ebfd 119static int pruss_probe(struct platform_device *pdev)
f1a304e7
PG
120{
121 struct uio_info *p;
122 struct uio_pruss_dev *gdev;
123 struct resource *regs_prussio;
4719ebfd 124 struct device *dev = &pdev->dev;
f1a304e7 125 int ret = -ENODEV, cnt = 0, len;
4719ebfd 126 struct uio_pruss_pdata *pdata = dev_get_platdata(dev);
f1a304e7
PG
127
128 gdev = kzalloc(sizeof(struct uio_pruss_dev), GFP_KERNEL);
129 if (!gdev)
130 return -ENOMEM;
131
132 gdev->info = kzalloc(sizeof(*p) * MAX_PRUSS_EVT, GFP_KERNEL);
133 if (!gdev->info) {
134 kfree(gdev);
135 return -ENOMEM;
136 }
4719ebfd 137
f1a304e7 138 /* Power on PRU in case its not done as part of boot-loader */
4719ebfd 139 gdev->pruss_clk = clk_get(dev, "pruss");
f1a304e7 140 if (IS_ERR(gdev->pruss_clk)) {
4719ebfd 141 dev_err(dev, "Failed to get clock\n");
cb3771b0 142 ret = PTR_ERR(gdev->pruss_clk);
f1a304e7
PG
143 kfree(gdev->info);
144 kfree(gdev);
f1a304e7
PG
145 return ret;
146 } else {
e663c5db
AK
147 ret = clk_enable(gdev->pruss_clk);
148 if (ret) {
149 dev_err(dev, "Failed to enable clock\n");
150 clk_put(gdev->pruss_clk);
151 kfree(gdev->info);
152 kfree(gdev);
153 return ret;
154 }
f1a304e7
PG
155 }
156
4719ebfd 157 regs_prussio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
f1a304e7 158 if (!regs_prussio) {
4719ebfd 159 dev_err(dev, "No PRUSS I/O resource specified\n");
f1a304e7
PG
160 goto out_free;
161 }
162
163 if (!regs_prussio->start) {
4719ebfd 164 dev_err(dev, "Invalid memory resource\n");
f1a304e7
PG
165 goto out_free;
166 }
167
2eb2478d
MP
168 if (pdata->sram_pool) {
169 gdev->sram_pool = pdata->sram_pool;
170 gdev->sram_vaddr =
288342e9
NC
171 (unsigned long)gen_pool_dma_alloc(gdev->sram_pool,
172 sram_pool_sz, &gdev->sram_paddr);
2eb2478d 173 if (!gdev->sram_vaddr) {
4719ebfd 174 dev_err(dev, "Could not allocate SRAM pool\n");
2eb2478d
MP
175 goto out_free;
176 }
f1a304e7
PG
177 }
178
4719ebfd 179 gdev->ddr_vaddr = dma_alloc_coherent(dev, extram_pool_sz,
f1a304e7
PG
180 &(gdev->ddr_paddr), GFP_KERNEL | GFP_DMA);
181 if (!gdev->ddr_vaddr) {
4719ebfd 182 dev_err(dev, "Could not allocate external memory\n");
f1a304e7
PG
183 goto out_free;
184 }
185
186 len = resource_size(regs_prussio);
187 gdev->prussio_vaddr = ioremap(regs_prussio->start, len);
188 if (!gdev->prussio_vaddr) {
4719ebfd 189 dev_err(dev, "Can't remap PRUSS I/O address range\n");
f1a304e7
PG
190 goto out_free;
191 }
192
193 gdev->pintc_base = pdata->pintc_base;
4719ebfd 194 gdev->hostirq_start = platform_get_irq(pdev, 0);
f1a304e7
PG
195
196 for (cnt = 0, p = gdev->info; cnt < MAX_PRUSS_EVT; cnt++, p++) {
197 p->mem[0].addr = regs_prussio->start;
198 p->mem[0].size = resource_size(regs_prussio);
199 p->mem[0].memtype = UIO_MEM_PHYS;
200
201 p->mem[1].addr = gdev->sram_paddr;
202 p->mem[1].size = sram_pool_sz;
203 p->mem[1].memtype = UIO_MEM_PHYS;
204
205 p->mem[2].addr = gdev->ddr_paddr;
206 p->mem[2].size = extram_pool_sz;
207 p->mem[2].memtype = UIO_MEM_PHYS;
208
209 p->name = kasprintf(GFP_KERNEL, "pruss_evt%d", cnt);
210 p->version = DRV_VERSION;
211
212 /* Register PRUSS IRQ lines */
213 p->irq = gdev->hostirq_start + cnt;
214 p->handler = pruss_handler;
215 p->priv = gdev;
216
4719ebfd 217 ret = uio_register_device(dev, p);
f1a304e7
PG
218 if (ret < 0)
219 goto out_free;
220 }
221
4719ebfd 222 platform_set_drvdata(pdev, gdev);
f1a304e7
PG
223 return 0;
224
225out_free:
226 pruss_cleanup(dev, gdev);
227 return ret;
228}
229
9b96c312 230static int pruss_remove(struct platform_device *dev)
f1a304e7
PG
231{
232 struct uio_pruss_dev *gdev = platform_get_drvdata(dev);
233
4719ebfd 234 pruss_cleanup(&dev->dev, gdev);
f1a304e7
PG
235 return 0;
236}
237
238static struct platform_driver pruss_driver = {
239 .probe = pruss_probe,
5a59509b 240 .remove = pruss_remove,
f1a304e7
PG
241 .driver = {
242 .name = DRV_NAME,
f1a304e7
PG
243 },
244};
245
11e3123d 246module_platform_driver(pruss_driver);
f1a304e7
PG
247
248MODULE_LICENSE("GPL v2");
249MODULE_VERSION(DRV_VERSION);
250MODULE_AUTHOR("Amit Chatterjee <amit.chatterjee@ti.com>");
251MODULE_AUTHOR("Pratheesh Gangadhar <pratheesh@ti.com>");