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e443b333 AS |
1 | /* |
2 | * bits.h - register bits of the ChipIdea USB IP core | |
3 | * | |
4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | |
5 | * | |
6 | * Author: David Lopo | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __DRIVERS_USB_CHIPIDEA_BITS_H | |
14 | #define __DRIVERS_USB_CHIPIDEA_BITS_H | |
15 | ||
16 | /* HCCPARAMS */ | |
17 | #define HCCPARAMS_LEN BIT(17) | |
18 | ||
19 | /* DCCPARAMS */ | |
20 | #define DCCPARAMS_DEN (0x1F << 0) | |
21 | #define DCCPARAMS_DC BIT(7) | |
22 | ||
23 | /* TESTMODE */ | |
24 | #define TESTMODE_FORCE BIT(0) | |
25 | ||
26 | /* USBCMD */ | |
27 | #define USBCMD_RS BIT(0) | |
28 | #define USBCMD_RST BIT(1) | |
29 | #define USBCMD_SUTW BIT(13) | |
30 | #define USBCMD_ATDTW BIT(14) | |
31 | ||
32 | /* USBSTS & USBINTR */ | |
33 | #define USBi_UI BIT(0) | |
34 | #define USBi_UEI BIT(1) | |
35 | #define USBi_PCI BIT(2) | |
36 | #define USBi_URI BIT(6) | |
37 | #define USBi_SLI BIT(8) | |
38 | ||
39 | /* DEVICEADDR */ | |
40 | #define DEVICEADDR_USBADRA BIT(24) | |
41 | #define DEVICEADDR_USBADR (0x7FUL << 25) | |
42 | ||
43 | /* PORTSC */ | |
44 | #define PORTSC_FPR BIT(6) | |
45 | #define PORTSC_SUSP BIT(7) | |
46 | #define PORTSC_HSP BIT(9) | |
47 | #define PORTSC_PTC (0x0FUL << 16) | |
48 | ||
49 | /* DEVLC */ | |
50 | #define DEVLC_PSPD (0x03UL << 25) | |
51 | #define DEVLC_PSPD_HS (0x02UL << 25) | |
52 | ||
53 | /* USBMODE */ | |
54 | #define USBMODE_CM (0x03UL << 0) | |
55 | #define USBMODE_CM_IDLE (0x00UL << 0) | |
56 | #define USBMODE_CM_DEVICE (0x02UL << 0) | |
57 | #define USBMODE_CM_HOST (0x03UL << 0) | |
58 | #define USBMODE_SLOM BIT(3) | |
59 | #define USBMODE_SDIS BIT(4) | |
60 | ||
61 | /* ENDPTCTRL */ | |
62 | #define ENDPTCTRL_RXS BIT(0) | |
63 | #define ENDPTCTRL_RXT (0x03UL << 2) | |
64 | #define ENDPTCTRL_RXR BIT(6) /* reserved for port 0 */ | |
65 | #define ENDPTCTRL_RXE BIT(7) | |
66 | #define ENDPTCTRL_TXS BIT(16) | |
67 | #define ENDPTCTRL_TXT (0x03UL << 18) | |
68 | #define ENDPTCTRL_TXR BIT(22) /* reserved for port 0 */ | |
69 | #define ENDPTCTRL_TXE BIT(23) | |
70 | ||
71 | #endif /* __DRIVERS_USB_CHIPIDEA_BITS_H */ |