[mirror_ubuntu-focal-kernel.git] / drivers / usb / chipidea / host.c

// SPDX-License-Identifier: GPL-2.0
/*
 * host.c - ChipIdea USB host controller driver
 *
 * Copyright (c) 2012 Intel Corporation
 *
 * Author: Alexander Shishkin
 */

#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <linux/usb/chipidea.h>
#include <linux/regulator/consumer.h>
#include <linux/pinctrl/consumer.h>

#include "../host/ehci.h"

#include "ci.h"
#include "bits.h"
#include "host.h"

static struct hc_driver __read_mostly ci_ehci_hc_driver;
static int (*orig_bus_suspend)(struct usb_hcd *hcd);

struct ehci_ci_priv {
	struct regulator *reg_vbus;
};

static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
{
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
	struct device *dev = hcd->self.controller;
	struct ci_hdrc *ci = dev_get_drvdata(dev);
	int ret = 0;
	int port = HCS_N_PORTS(ehci->hcs_params);

	if (priv->reg_vbus) {
		if (port > 1) {
			dev_warn(dev,
				"Not support multi-port regulator control\n");
			return 0;
		}
		if (enable)
			ret = regulator_enable(priv->reg_vbus);
		else
			ret = regulator_disable(priv->reg_vbus);
		if (ret) {
			dev_err(dev,
				"Failed to %s vbus regulator, ret=%d\n",
				enable ? "enable" : "disable", ret);
			return ret;
		}
	}

	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
		/*
		 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
		 * As HSIC is always HS, this should be safe for others.
		 */
		hw_port_test_set(ci, 5);
		hw_port_test_set(ci, 0);
	}
	return 0;
};

static int ehci_ci_reset(struct usb_hcd *hcd)
{
	struct device *dev = hcd->self.controller;
	struct ci_hdrc *ci = dev_get_drvdata(dev);
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	int ret;

	ret = ehci_setup(hcd);
	if (ret)
		return ret;

	ehci->need_io_watchdog = 0;

	if (ci->platdata->notify_event) {
		ret = ci->platdata->notify_event(ci,
				CI_HDRC_CONTROLLER_RESET_EVENT);
		if (ret)
			return ret;
	}

	ci_platform_configure(ci);

	return ret;
}

static const struct ehci_driver_overrides ehci_ci_overrides = {
	.extra_priv_size = sizeof(struct ehci_ci_priv),
	.port_power	 = ehci_ci_portpower,
	.reset		 = ehci_ci_reset,
};

static irqreturn_t host_irq(struct ci_hdrc *ci)
{
	return usb_hcd_irq(ci->irq, ci->hcd);
}

static int host_start(struct ci_hdrc *ci)
{
	struct usb_hcd *hcd;
	struct ehci_hcd *ehci;
	struct ehci_ci_priv *priv;
	int ret;

	if (usb_disabled())
		return -ENODEV;

	hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
			       ci->dev, dev_name(ci->dev), NULL);
	if (!hcd)
		return -ENOMEM;

	dev_set_drvdata(ci->dev, ci);
	hcd->rsrc_start = ci->hw_bank.phys;
	hcd->rsrc_len = ci->hw_bank.size;
	hcd->regs = ci->hw_bank.abs;
	hcd->has_tt = 1;

	hcd->power_budget = ci->platdata->power_budget;
	hcd->tpl_support = ci->platdata->tpl_support;
	if (ci->phy || ci->usb_phy) {
		hcd->skip_phy_initialization = 1;
		if (ci->usb_phy)
			hcd->usb_phy = ci->usb_phy;
	}

	ehci = hcd_to_ehci(hcd);
	ehci->caps = ci->hw_bank.cap;
	ehci->has_hostpc = ci->hw_bank.lpm;
	ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
	ehci->imx28_write_fix = ci->imx28_write_fix;

	priv = (struct ehci_ci_priv *)ehci->priv;
	priv->reg_vbus = NULL;

	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
		if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
			ret = regulator_enable(ci->platdata->reg_vbus);
			if (ret) {
				dev_err(ci->dev,
				"Failed to enable vbus regulator, ret=%d\n",
									ret);
				goto put_hcd;
			}
		} else {
			priv->reg_vbus = ci->platdata->reg_vbus;
		}
	}

	if (ci->platdata->pins_host)
		pinctrl_select_state(ci->platdata->pctl,
				     ci->platdata->pins_host);

	ret = usb_add_hcd(hcd, 0, 0);
	if (ret) {
		goto disable_reg;
	} else {
		struct usb_otg *otg = &ci->otg;

		ci->hcd = hcd;

		if (ci_otg_is_fsm_mode(ci)) {
			otg->host = &hcd->self;
			hcd->self.otg_port = 1;
		}

		if (ci->platdata->notify_event &&
			(ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
			ci->platdata->notify_event
				(ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
	}

	return ret;

disable_reg:
	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
		regulator_disable(ci->platdata->reg_vbus);
put_hcd:
	usb_put_hcd(hcd);

	return ret;
}

static void host_stop(struct ci_hdrc *ci)
{
	struct usb_hcd *hcd = ci->hcd;

	if (hcd) {
		if (ci->platdata->notify_event)
			ci->platdata->notify_event(ci,
				CI_HDRC_CONTROLLER_STOPPED_EVENT);
		usb_remove_hcd(hcd);
		ci->role = CI_ROLE_END;
		synchronize_irq(ci->irq);
		usb_put_hcd(hcd);
		if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
				regulator_disable(ci->platdata->reg_vbus);
	}
	ci->hcd = NULL;
	ci->otg.host = NULL;

	if (ci->platdata->pins_host && ci->platdata->pins_default)
		pinctrl_select_state(ci->platdata->pctl,
				     ci->platdata->pins_default);
}


void ci_hdrc_host_destroy(struct ci_hdrc *ci)
{
	if (ci->role == CI_ROLE_HOST && ci->hcd)
		host_stop(ci);
}

/* The below code is based on tegra ehci driver */
static int ci_ehci_hub_control(
	struct usb_hcd	*hcd,
	u16		typeReq,
	u16		wValue,
	u16		wIndex,
	char		*buf,
	u16		wLength
)
{
	struct ehci_hcd	*ehci = hcd_to_ehci(hcd);
	u32 __iomem	*status_reg;
	u32		temp;
	unsigned long	flags;
	int		retval = 0;
	struct device *dev = hcd->self.controller;
	struct ci_hdrc *ci = dev_get_drvdata(dev);

	status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];

	spin_lock_irqsave(&ehci->lock, flags);

	if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
		temp = ehci_readl(ehci, status_reg);
		if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
			retval = -EPIPE;
			goto done;
		}

		temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
		temp |= PORT_WKDISC_E | PORT_WKOC_E;
		ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);

		/*
		 * If a transaction is in progress, there may be a delay in
		 * suspending the port. Poll until the port is suspended.
		 */
		if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
			PORT_SUSPEND, 5000))
			ehci_err(ehci, "timeout waiting for SUSPEND\n");

		if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
			if (ci->platdata->notify_event)
				ci->platdata->notify_event(ci,
					CI_HDRC_IMX_HSIC_SUSPEND_EVENT);

			temp = ehci_readl(ehci, status_reg);
			temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
			ehci_writel(ehci, temp, status_reg);
		}

		set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
		goto done;
	}

	/*
	 * After resume has finished, it needs do some post resume
	 * operation for some SoCs.
	 */
	else if (typeReq == ClearPortFeature &&
		wValue == USB_PORT_FEAT_C_SUSPEND) {
		/* Make sure the resume has finished, it should be finished */
		if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
			ehci_err(ehci, "timeout waiting for resume\n");
	}

	spin_unlock_irqrestore(&ehci->lock, flags);

	/* Handle the hub control events here */
	return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
done:
	spin_unlock_irqrestore(&ehci->lock, flags);
	return retval;
}
static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
{
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	struct device *dev = hcd->self.controller;
	struct ci_hdrc *ci = dev_get_drvdata(dev);
	int port;
	u32 tmp;

	int ret = orig_bus_suspend(hcd);

	if (ret)
		return ret;

	port = HCS_N_PORTS(ehci->hcs_params);
	while (port--) {
		u32 __iomem *reg = &ehci->regs->port_status[port];
		u32 portsc = ehci_readl(ehci, reg);

		if (portsc & PORT_CONNECT) {
			/*
			 * For chipidea, the resume signal will be ended
			 * automatically, so for remote wakeup case, the
			 * usbcmd.rs may not be set before the resume has
			 * ended if other resume paths consumes too much
			 * time (~24ms), in that case, the SOF will not
			 * send out within 3ms after resume ends, then the
			 * high speed device will enter full speed mode.
			 */

			tmp = ehci_readl(ehci, &ehci->regs->command);
			tmp |= CMD_RUN;
			ehci_writel(ehci, tmp, &ehci->regs->command);
			/*
			 * It needs a short delay between set RS bit and PHCD.
			 */
			usleep_range(150, 200);
			/*
			 * Need to clear WKCN and WKOC for imx HSIC,
			 * otherwise, there will be wakeup event.
			 */
			if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
				tmp = ehci_readl(ehci, reg);
				tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
				ehci_writel(ehci, tmp, reg);
			}

			break;
		}
	}

	return 0;
}

int ci_hdrc_host_init(struct ci_hdrc *ci)
{
	struct ci_role_driver *rdrv;

	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
		return -ENXIO;

	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
	if (!rdrv)
		return -ENOMEM;

	rdrv->start	= host_start;
	rdrv->stop	= host_stop;
	rdrv->irq	= host_irq;
	rdrv->name	= "host";
	ci->roles[CI_ROLE_HOST] = rdrv;

	return 0;
}

void ci_hdrc_host_driver_init(void)
{
	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
	ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;
}
Commit	Line	Data
5fd54ace	1	// SPDX-License-Identifier: GPL-2.0
eb70e5ab AS	2	/*
	3	* host.c - ChipIdea USB host controller driver
	4	*
	5	* Copyright (c) 2012 Intel Corporation
	6	*
	7	* Author: Alexander Shishkin
eb70e5ab AS	8	*/
	9
	10	#include <linux/kernel.h>
cdb2fac7	11	#include <linux/io.h>
eb70e5ab AS	12	#include <linux/usb.h>
	13	#include <linux/usb/hcd.h>
	14	#include <linux/usb/chipidea.h>
40ed51a4	15	#include <linux/regulator/consumer.h>
16caf1fa	16	#include <linux/pinctrl/consumer.h>
eb70e5ab	17
09f6ffde	18	#include "../host/ehci.h"
eb70e5ab AS	19
	20	#include "ci.h"
	21	#include "bits.h"
	22	#include "host.h"
	23
09f6ffde	24	static struct hc_driver __read_mostly ci_ehci_hc_driver;
78f0357e	25	static int (orig_bus_suspend)(struct usb_hcd hcd);
09f6ffde	26
c8679a2f MG	27	struct ehci_ci_priv {
	28	struct regulator *reg_vbus;
	29	};
	30
	31	static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
	32	{
	33	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	34	struct ehci_ci_priv priv = (struct ehci_ci_priv )ehci->priv;
	35	struct device *dev = hcd->self.controller;
1311d6e3	36	struct ci_hdrc *ci = dev_get_drvdata(dev);
c8679a2f MG	37	int ret = 0;
	38	int port = HCS_N_PORTS(ehci->hcs_params);
	39
65945917	40	if (priv->reg_vbus) {
c8679a2f MG	41	if (port > 1) {
	42	dev_warn(dev,
	43	"Not support multi-port regulator control\n");
	44	return 0;
	45	}
	46	if (enable)
	47	ret = regulator_enable(priv->reg_vbus);
	48	else
	49	ret = regulator_disable(priv->reg_vbus);
	50	if (ret) {
	51	dev_err(dev,
	52	"Failed to %s vbus regulator, ret=%d\n",
	53	enable ? "enable" : "disable", ret);
	54	return ret;
	55	}
	56	}
fc6b68ba RH	57
	58	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
	59	/*
	60	* Marvell 28nm HSIC PHY requires forcing the port to HS mode.
	61	* As HSIC is always HS, this should be safe for others.
	62	*/
	63	hw_port_test_set(ci, 5);
	64	hw_port_test_set(ci, 0);
	65	}
c8679a2f MG	66	return 0;
	67	};
	68
11a27098 PC	69	static int ehci_ci_reset(struct usb_hcd *hcd)
	70	{
	71	struct device *dev = hcd->self.controller;
	72	struct ci_hdrc *ci = dev_get_drvdata(dev);
c744a0db	73	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
11a27098 PC	74	int ret;
	75
	76	ret = ehci_setup(hcd);
	77	if (ret)
	78	return ret;
	79
c744a0db LS	80	ehci->need_io_watchdog = 0;
c744a0db LS	81
11893dae SB	82	if (ci->platdata->notify_event) {
	83	ret = ci->platdata->notify_event(ci,
	84	CI_HDRC_CONTROLLER_RESET_EVENT);
	85	if (ret)
	86	return ret;
	87	}
b90a17c5	88
11a27098 PC	89	ci_platform_configure(ci);
	90
	91	return ret;
	92	}
	93
c8679a2f MG	94	static const struct ehci_driver_overrides ehci_ci_overrides = {
	95	.extra_priv_size = sizeof(struct ehci_ci_priv),
	96	.port_power = ehci_ci_portpower,
11a27098	97	.reset = ehci_ci_reset,
c8679a2f MG	98	};
c8679a2f MG	99
8e22978c	100	static irqreturn_t host_irq(struct ci_hdrc *ci)
eb70e5ab AS	101	{
	102	return usb_hcd_irq(ci->irq, ci->hcd);
	103	}
	104
8e22978c	105	static int host_start(struct ci_hdrc *ci)
eb70e5ab AS	106	{
	107	struct usb_hcd *hcd;
	108	struct ehci_hcd *ehci;
c8679a2f	109	struct ehci_ci_priv *priv;
eb70e5ab AS	110	int ret;
	111
	112	if (usb_disabled())
	113	return -ENODEV;
	114
aeb78cda AB	115	hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
aeb78cda AB	116	ci->dev, dev_name(ci->dev), NULL);
eb70e5ab AS	117	if (!hcd)
	118	return -ENOMEM;
	119
24c498df	120	dev_set_drvdata(ci->dev, ci);
eb70e5ab AS	121	hcd->rsrc_start = ci->hw_bank.phys;
	122	hcd->rsrc_len = ci->hw_bank.size;
	123	hcd->regs = ci->hw_bank.abs;
	124	hcd->has_tt = 1;
	125
77c4400f	126	hcd->power_budget = ci->platdata->power_budget;
f6a9ff07	127	hcd->tpl_support = ci->platdata->tpl_support;
90f26cc6	128	if (ci->phy \|\| ci->usb_phy) {
4e88d4c0	129	hcd->skip_phy_initialization = 1;
90f26cc6 PC	130	if (ci->usb_phy)
	131	hcd->usb_phy = ci->usb_phy;
	132	}
bd841986	133
eb70e5ab AS	134	ehci = hcd_to_ehci(hcd);
	135	ehci->caps = ci->hw_bank.cap;
	136	ehci->has_hostpc = ci->hw_bank.lpm;
2cdcec4f	137	ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
ed8f8318	138	ehci->imx28_write_fix = ci->imx28_write_fix;
eb70e5ab	139
c8679a2f MG	140	priv = (struct ehci_ci_priv *)ehci->priv;
	141	priv->reg_vbus = NULL;
	142
65945917 LJ	143	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
	144	if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
	145	ret = regulator_enable(ci->platdata->reg_vbus);
	146	if (ret) {
	147	dev_err(ci->dev,
	148	"Failed to enable vbus regulator, ret=%d\n",
	149	ret);
	150	goto put_hcd;
	151	}
	152	} else {
	153	priv->reg_vbus = ci->platdata->reg_vbus;
	154	}
	155	}
40ed51a4	156
16caf1fa LP	157	if (ci->platdata->pins_host)
	158	pinctrl_select_state(ci->platdata->pctl,
	159	ci->platdata->pins_host);
	160
eb70e5ab	161	ret = usb_add_hcd(hcd, 0, 0);
0698b9b3	162	if (ret) {
65945917	163	goto disable_reg;
0698b9b3	164	} else {
ef44cb42	165	struct usb_otg *otg = &ci->otg;
0698b9b3	166
eb70e5ab	167	ci->hcd = hcd;
ef44cb42 AT	168
ef44cb42 AT	169	if (ci_otg_is_fsm_mode(ci)) {
0698b9b3 LJ	170	otg->host = &hcd->self;
	171	hcd->self.otg_port = 1;
	172	}
014abe34 PC	173
	174	if (ci->platdata->notify_event &&
	175	(ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
	176	ci->platdata->notify_event
	177	(ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
0698b9b3	178	}
eb70e5ab AS	179
eb70e5ab AS	180	return ret;
40ed51a4	181
65945917 LJ	182	disable_reg:
	183	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
	184	(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
	185	regulator_disable(ci->platdata->reg_vbus);
40ed51a4 PC	186	put_hcd:
	187	usb_put_hcd(hcd);
	188
	189	return ret;
eb70e5ab AS	190	}
eb70e5ab AS	191
8e22978c	192	static void host_stop(struct ci_hdrc *ci)
eb70e5ab AS	193	{
	194	struct usb_hcd *hcd = ci->hcd;
	195
41314fea	196	if (hcd) {
b90a17c5 SB	197	if (ci->platdata->notify_event)
	198	ci->platdata->notify_event(ci,
	199	CI_HDRC_CONTROLLER_STOPPED_EVENT);
41314fea	200	usb_remove_hcd(hcd);
991d5add SW	201	ci->role = CI_ROLE_END;
991d5add SW	202	synchronize_irq(ci->irq);
41314fea	203	usb_put_hcd(hcd);
65945917 LJ	204	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
	205	(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
	206	regulator_disable(ci->platdata->reg_vbus);
41314fea	207	}
43a40457 LJ	208	ci->hcd = NULL;
43a40457 LJ	209	ci->otg.host = NULL;
16caf1fa LP	210
	211	if (ci->platdata->pins_host && ci->platdata->pins_default)
	212	pinctrl_select_state(ci->platdata->pctl,
	213	ci->platdata->pins_default);
eb70e5ab AS	214	}
eb70e5ab AS	215
3f124d23 PC	216
	217	void ci_hdrc_host_destroy(struct ci_hdrc *ci)
	218	{
df101c53	219	if (ci->role == CI_ROLE_HOST && ci->hcd)
3f124d23 PC	220	host_stop(ci);
	221	}
	222
2c4593ec PC	223	/* The below code is based on tegra ehci driver */
	224	static int ci_ehci_hub_control(
	225	struct usb_hcd *hcd,
	226	u16 typeReq,
	227	u16 wValue,
	228	u16 wIndex,
	229	char *buf,
	230	u16 wLength
	231	)
	232	{
	233	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	234	u32 __iomem *status_reg;
	235	u32 temp;
	236	unsigned long flags;
	237	int retval = 0;
	238	struct device *dev = hcd->self.controller;
	239	struct ci_hdrc *ci = dev_get_drvdata(dev);
	240
	241	status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
	242
	243	spin_lock_irqsave(&ehci->lock, flags);
	244
	245	if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
	246	temp = ehci_readl(ehci, status_reg);
	247	if ((temp & PORT_PE) == 0 \|\| (temp & PORT_RESET) != 0) {
	248	retval = -EPIPE;
	249	goto done;
	250	}
	251
	252	temp &= ~(PORT_RWC_BITS \| PORT_WKCONN_E);
	253	temp \|= PORT_WKDISC_E \| PORT_WKOC_E;
	254	ehci_writel(ehci, temp \| PORT_SUSPEND, status_reg);
	255
	256	/*
	257	* If a transaction is in progress, there may be a delay in
	258	* suspending the port. Poll until the port is suspended.
	259	*/
	260	if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
	261	PORT_SUSPEND, 5000))
	262	ehci_err(ehci, "timeout waiting for SUSPEND\n");
	263
	264	if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
	265	if (ci->platdata->notify_event)
	266	ci->platdata->notify_event(ci,
	267	CI_HDRC_IMX_HSIC_SUSPEND_EVENT);
	268
	269	temp = ehci_readl(ehci, status_reg);
	270	temp &= ~(PORT_WKDISC_E \| PORT_WKCONN_E);
	271	ehci_writel(ehci, temp, status_reg);
	272	}
	273
	274	set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
	275	goto done;
	276	}
	277
	278	/*
	279	* After resume has finished, it needs do some post resume
	280	* operation for some SoCs.
	281	*/
	282	else if (typeReq == ClearPortFeature &&
	283	wValue == USB_PORT_FEAT_C_SUSPEND) {
	284	/* Make sure the resume has finished, it should be finished */
	285	if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
	286	ehci_err(ehci, "timeout waiting for resume\n");
287	}
288
289	spin_unlock_irqrestore(&ehci->lock, flags);
290
291	/* Handle the hub control events here */
292	return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
293	done:
294	spin_unlock_irqrestore(&ehci->lock, flags);
295	return retval;
296	}
78f0357e PC	297	static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
	298	{
	299	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
014abe34 PC	300	struct device *dev = hcd->self.controller;
014abe34 PC	301	struct ci_hdrc *ci = dev_get_drvdata(dev);
78f0357e PC	302	int port;
	303	u32 tmp;
	304
	305	int ret = orig_bus_suspend(hcd);
	306
	307	if (ret)
	308	return ret;
	309
	310	port = HCS_N_PORTS(ehci->hcs_params);
	311	while (port--) {
	312	u32 __iomem *reg = &ehci->regs->port_status[port];
	313	u32 portsc = ehci_readl(ehci, reg);
	314
	315	if (portsc & PORT_CONNECT) {
	316	/*
	317	* For chipidea, the resume signal will be ended
	318	* automatically, so for remote wakeup case, the
	319	* usbcmd.rs may not be set before the resume has
	320	* ended if other resume paths consumes too much
	321	* time (~24ms), in that case, the SOF will not
	322	* send out within 3ms after resume ends, then the
	323	* high speed device will enter full speed mode.
	324	*/
	325
	326	tmp = ehci_readl(ehci, &ehci->regs->command);
	327	tmp \|= CMD_RUN;
	328	ehci_writel(ehci, tmp, &ehci->regs->command);
	329	/*
	330	* It needs a short delay between set RS bit and PHCD.
	331	*/
	332	usleep_range(150, 200);
014abe34 PC	333	/*
	334	* Need to clear WKCN and WKOC for imx HSIC,
	335	* otherwise, there will be wakeup event.
	336	*/
	337	if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
	338	tmp = ehci_readl(ehci, reg);
	339	tmp &= ~(PORT_WKDISC_E \| PORT_WKCONN_E);
	340	ehci_writel(ehci, tmp, reg);
	341	}
	342
78f0357e PC	343	break;
	344	}
	345	}
	346
	347	return 0;
	348	}
	349
8e22978c	350	int ci_hdrc_host_init(struct ci_hdrc *ci)
eb70e5ab AS	351	{
	352	struct ci_role_driver *rdrv;
	353
	354	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
	355	return -ENXIO;
	356
	357	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
	358	if (!rdrv)
	359	return -ENOMEM;
	360
	361	rdrv->start = host_start;
	362	rdrv->stop = host_stop;
	363	rdrv->irq = host_irq;
	364	rdrv->name = "host";
	365	ci->roles[CI_ROLE_HOST] = rdrv;
	366
2f01a33b PC	367	return 0;
	368	}
	369
	370	void ci_hdrc_host_driver_init(void)
	371	{
c8679a2f	372	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
78f0357e PC	373	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
78f0357e PC	374	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
2c4593ec	375	ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;
eb70e5ab	376	}