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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0 |
eb70e5ab AS |
2 | /* |
3 | * host.c - ChipIdea USB host controller driver | |
4 | * | |
5 | * Copyright (c) 2012 Intel Corporation | |
6 | * | |
7 | * Author: Alexander Shishkin | |
eb70e5ab AS |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
cdb2fac7 | 11 | #include <linux/io.h> |
eb70e5ab AS |
12 | #include <linux/usb.h> |
13 | #include <linux/usb/hcd.h> | |
14 | #include <linux/usb/chipidea.h> | |
40ed51a4 | 15 | #include <linux/regulator/consumer.h> |
eb70e5ab | 16 | |
09f6ffde | 17 | #include "../host/ehci.h" |
eb70e5ab AS |
18 | |
19 | #include "ci.h" | |
20 | #include "bits.h" | |
21 | #include "host.h" | |
22 | ||
09f6ffde | 23 | static struct hc_driver __read_mostly ci_ehci_hc_driver; |
78f0357e | 24 | static int (*orig_bus_suspend)(struct usb_hcd *hcd); |
09f6ffde | 25 | |
c8679a2f MG |
26 | struct ehci_ci_priv { |
27 | struct regulator *reg_vbus; | |
28 | }; | |
29 | ||
30 | static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable) | |
31 | { | |
32 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
33 | struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv; | |
34 | struct device *dev = hcd->self.controller; | |
1311d6e3 | 35 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
c8679a2f MG |
36 | int ret = 0; |
37 | int port = HCS_N_PORTS(ehci->hcs_params); | |
38 | ||
65945917 | 39 | if (priv->reg_vbus) { |
c8679a2f MG |
40 | if (port > 1) { |
41 | dev_warn(dev, | |
42 | "Not support multi-port regulator control\n"); | |
43 | return 0; | |
44 | } | |
45 | if (enable) | |
46 | ret = regulator_enable(priv->reg_vbus); | |
47 | else | |
48 | ret = regulator_disable(priv->reg_vbus); | |
49 | if (ret) { | |
50 | dev_err(dev, | |
51 | "Failed to %s vbus regulator, ret=%d\n", | |
52 | enable ? "enable" : "disable", ret); | |
53 | return ret; | |
54 | } | |
55 | } | |
fc6b68ba RH |
56 | |
57 | if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { | |
58 | /* | |
59 | * Marvell 28nm HSIC PHY requires forcing the port to HS mode. | |
60 | * As HSIC is always HS, this should be safe for others. | |
61 | */ | |
62 | hw_port_test_set(ci, 5); | |
63 | hw_port_test_set(ci, 0); | |
64 | } | |
c8679a2f MG |
65 | return 0; |
66 | }; | |
67 | ||
11a27098 PC |
68 | static int ehci_ci_reset(struct usb_hcd *hcd) |
69 | { | |
70 | struct device *dev = hcd->self.controller; | |
71 | struct ci_hdrc *ci = dev_get_drvdata(dev); | |
c744a0db | 72 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
11a27098 PC |
73 | int ret; |
74 | ||
75 | ret = ehci_setup(hcd); | |
76 | if (ret) | |
77 | return ret; | |
78 | ||
c744a0db LS |
79 | ehci->need_io_watchdog = 0; |
80 | ||
11893dae SB |
81 | if (ci->platdata->notify_event) { |
82 | ret = ci->platdata->notify_event(ci, | |
83 | CI_HDRC_CONTROLLER_RESET_EVENT); | |
84 | if (ret) | |
85 | return ret; | |
86 | } | |
b90a17c5 | 87 | |
11a27098 PC |
88 | ci_platform_configure(ci); |
89 | ||
90 | return ret; | |
91 | } | |
92 | ||
c8679a2f MG |
93 | static const struct ehci_driver_overrides ehci_ci_overrides = { |
94 | .extra_priv_size = sizeof(struct ehci_ci_priv), | |
95 | .port_power = ehci_ci_portpower, | |
11a27098 | 96 | .reset = ehci_ci_reset, |
c8679a2f MG |
97 | }; |
98 | ||
8e22978c | 99 | static irqreturn_t host_irq(struct ci_hdrc *ci) |
eb70e5ab AS |
100 | { |
101 | return usb_hcd_irq(ci->irq, ci->hcd); | |
102 | } | |
103 | ||
8e22978c | 104 | static int host_start(struct ci_hdrc *ci) |
eb70e5ab AS |
105 | { |
106 | struct usb_hcd *hcd; | |
107 | struct ehci_hcd *ehci; | |
c8679a2f | 108 | struct ehci_ci_priv *priv; |
eb70e5ab AS |
109 | int ret; |
110 | ||
111 | if (usb_disabled()) | |
112 | return -ENODEV; | |
113 | ||
aeb78cda AB |
114 | hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent, |
115 | ci->dev, dev_name(ci->dev), NULL); | |
eb70e5ab AS |
116 | if (!hcd) |
117 | return -ENOMEM; | |
118 | ||
24c498df | 119 | dev_set_drvdata(ci->dev, ci); |
eb70e5ab AS |
120 | hcd->rsrc_start = ci->hw_bank.phys; |
121 | hcd->rsrc_len = ci->hw_bank.size; | |
122 | hcd->regs = ci->hw_bank.abs; | |
123 | hcd->has_tt = 1; | |
124 | ||
77c4400f | 125 | hcd->power_budget = ci->platdata->power_budget; |
f6a9ff07 | 126 | hcd->tpl_support = ci->platdata->tpl_support; |
1e5e2d3d AT |
127 | if (ci->phy) |
128 | hcd->phy = ci->phy; | |
129 | else | |
130 | hcd->usb_phy = ci->usb_phy; | |
bd841986 | 131 | |
eb70e5ab AS |
132 | ehci = hcd_to_ehci(hcd); |
133 | ehci->caps = ci->hw_bank.cap; | |
134 | ehci->has_hostpc = ci->hw_bank.lpm; | |
2cdcec4f | 135 | ehci->has_tdi_phy_lpm = ci->hw_bank.lpm; |
ed8f8318 | 136 | ehci->imx28_write_fix = ci->imx28_write_fix; |
eb70e5ab | 137 | |
c8679a2f MG |
138 | priv = (struct ehci_ci_priv *)ehci->priv; |
139 | priv->reg_vbus = NULL; | |
140 | ||
65945917 LJ |
141 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) { |
142 | if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) { | |
143 | ret = regulator_enable(ci->platdata->reg_vbus); | |
144 | if (ret) { | |
145 | dev_err(ci->dev, | |
146 | "Failed to enable vbus regulator, ret=%d\n", | |
147 | ret); | |
148 | goto put_hcd; | |
149 | } | |
150 | } else { | |
151 | priv->reg_vbus = ci->platdata->reg_vbus; | |
152 | } | |
153 | } | |
40ed51a4 | 154 | |
eb70e5ab | 155 | ret = usb_add_hcd(hcd, 0, 0); |
0698b9b3 | 156 | if (ret) { |
65945917 | 157 | goto disable_reg; |
0698b9b3 | 158 | } else { |
ef44cb42 | 159 | struct usb_otg *otg = &ci->otg; |
0698b9b3 | 160 | |
eb70e5ab | 161 | ci->hcd = hcd; |
ef44cb42 AT |
162 | |
163 | if (ci_otg_is_fsm_mode(ci)) { | |
0698b9b3 LJ |
164 | otg->host = &hcd->self; |
165 | hcd->self.otg_port = 1; | |
166 | } | |
167 | } | |
eb70e5ab AS |
168 | |
169 | return ret; | |
40ed51a4 | 170 | |
65945917 LJ |
171 | disable_reg: |
172 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && | |
173 | (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) | |
174 | regulator_disable(ci->platdata->reg_vbus); | |
40ed51a4 PC |
175 | put_hcd: |
176 | usb_put_hcd(hcd); | |
177 | ||
178 | return ret; | |
eb70e5ab AS |
179 | } |
180 | ||
8e22978c | 181 | static void host_stop(struct ci_hdrc *ci) |
eb70e5ab AS |
182 | { |
183 | struct usb_hcd *hcd = ci->hcd; | |
184 | ||
41314fea | 185 | if (hcd) { |
b90a17c5 SB |
186 | if (ci->platdata->notify_event) |
187 | ci->platdata->notify_event(ci, | |
188 | CI_HDRC_CONTROLLER_STOPPED_EVENT); | |
41314fea | 189 | usb_remove_hcd(hcd); |
991d5add SW |
190 | ci->role = CI_ROLE_END; |
191 | synchronize_irq(ci->irq); | |
41314fea | 192 | usb_put_hcd(hcd); |
65945917 LJ |
193 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && |
194 | (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) | |
195 | regulator_disable(ci->platdata->reg_vbus); | |
41314fea | 196 | } |
43a40457 LJ |
197 | ci->hcd = NULL; |
198 | ci->otg.host = NULL; | |
eb70e5ab AS |
199 | } |
200 | ||
3f124d23 PC |
201 | |
202 | void ci_hdrc_host_destroy(struct ci_hdrc *ci) | |
203 | { | |
df101c53 | 204 | if (ci->role == CI_ROLE_HOST && ci->hcd) |
3f124d23 PC |
205 | host_stop(ci); |
206 | } | |
207 | ||
78f0357e PC |
208 | static int ci_ehci_bus_suspend(struct usb_hcd *hcd) |
209 | { | |
210 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
211 | int port; | |
212 | u32 tmp; | |
213 | ||
214 | int ret = orig_bus_suspend(hcd); | |
215 | ||
216 | if (ret) | |
217 | return ret; | |
218 | ||
219 | port = HCS_N_PORTS(ehci->hcs_params); | |
220 | while (port--) { | |
221 | u32 __iomem *reg = &ehci->regs->port_status[port]; | |
222 | u32 portsc = ehci_readl(ehci, reg); | |
223 | ||
224 | if (portsc & PORT_CONNECT) { | |
225 | /* | |
226 | * For chipidea, the resume signal will be ended | |
227 | * automatically, so for remote wakeup case, the | |
228 | * usbcmd.rs may not be set before the resume has | |
229 | * ended if other resume paths consumes too much | |
230 | * time (~24ms), in that case, the SOF will not | |
231 | * send out within 3ms after resume ends, then the | |
232 | * high speed device will enter full speed mode. | |
233 | */ | |
234 | ||
235 | tmp = ehci_readl(ehci, &ehci->regs->command); | |
236 | tmp |= CMD_RUN; | |
237 | ehci_writel(ehci, tmp, &ehci->regs->command); | |
238 | /* | |
239 | * It needs a short delay between set RS bit and PHCD. | |
240 | */ | |
241 | usleep_range(150, 200); | |
242 | break; | |
243 | } | |
244 | } | |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
8e22978c | 249 | int ci_hdrc_host_init(struct ci_hdrc *ci) |
eb70e5ab AS |
250 | { |
251 | struct ci_role_driver *rdrv; | |
252 | ||
253 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC)) | |
254 | return -ENXIO; | |
255 | ||
256 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); | |
257 | if (!rdrv) | |
258 | return -ENOMEM; | |
259 | ||
260 | rdrv->start = host_start; | |
261 | rdrv->stop = host_stop; | |
262 | rdrv->irq = host_irq; | |
263 | rdrv->name = "host"; | |
264 | ci->roles[CI_ROLE_HOST] = rdrv; | |
265 | ||
2f01a33b PC |
266 | return 0; |
267 | } | |
268 | ||
269 | void ci_hdrc_host_driver_init(void) | |
270 | { | |
c8679a2f | 271 | ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides); |
78f0357e PC |
272 | orig_bus_suspend = ci_ehci_hc_driver.bus_suspend; |
273 | ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend; | |
eb70e5ab | 274 | } |