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eb70e5ab AS |
1 | /* |
2 | * host.c - ChipIdea USB host controller driver | |
3 | * | |
4 | * Copyright (c) 2012 Intel Corporation | |
5 | * | |
6 | * Author: Alexander Shishkin | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
cdb2fac7 | 23 | #include <linux/io.h> |
eb70e5ab AS |
24 | #include <linux/usb.h> |
25 | #include <linux/usb/hcd.h> | |
26 | #include <linux/usb/chipidea.h> | |
40ed51a4 | 27 | #include <linux/regulator/consumer.h> |
eb70e5ab | 28 | |
09f6ffde | 29 | #include "../host/ehci.h" |
eb70e5ab AS |
30 | |
31 | #include "ci.h" | |
32 | #include "bits.h" | |
33 | #include "host.h" | |
34 | ||
09f6ffde | 35 | static struct hc_driver __read_mostly ci_ehci_hc_driver; |
78f0357e | 36 | static int (*orig_bus_suspend)(struct usb_hcd *hcd); |
09f6ffde | 37 | |
c8679a2f MG |
38 | struct ehci_ci_priv { |
39 | struct regulator *reg_vbus; | |
fc6b68ba | 40 | struct ci_hdrc *ci; |
c8679a2f MG |
41 | }; |
42 | ||
43 | static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable) | |
44 | { | |
45 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
46 | struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv; | |
fc6b68ba | 47 | struct ci_hdrc *ci = priv->ci; |
c8679a2f | 48 | struct device *dev = hcd->self.controller; |
c8679a2f MG |
49 | int ret = 0; |
50 | int port = HCS_N_PORTS(ehci->hcs_params); | |
51 | ||
65945917 | 52 | if (priv->reg_vbus) { |
c8679a2f MG |
53 | if (port > 1) { |
54 | dev_warn(dev, | |
55 | "Not support multi-port regulator control\n"); | |
56 | return 0; | |
57 | } | |
58 | if (enable) | |
59 | ret = regulator_enable(priv->reg_vbus); | |
60 | else | |
61 | ret = regulator_disable(priv->reg_vbus); | |
62 | if (ret) { | |
63 | dev_err(dev, | |
64 | "Failed to %s vbus regulator, ret=%d\n", | |
65 | enable ? "enable" : "disable", ret); | |
66 | return ret; | |
67 | } | |
68 | } | |
fc6b68ba RH |
69 | |
70 | if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) { | |
71 | /* | |
72 | * Marvell 28nm HSIC PHY requires forcing the port to HS mode. | |
73 | * As HSIC is always HS, this should be safe for others. | |
74 | */ | |
75 | hw_port_test_set(ci, 5); | |
76 | hw_port_test_set(ci, 0); | |
77 | } | |
c8679a2f MG |
78 | return 0; |
79 | }; | |
80 | ||
81 | static const struct ehci_driver_overrides ehci_ci_overrides = { | |
82 | .extra_priv_size = sizeof(struct ehci_ci_priv), | |
83 | .port_power = ehci_ci_portpower, | |
84 | }; | |
85 | ||
8e22978c | 86 | static irqreturn_t host_irq(struct ci_hdrc *ci) |
eb70e5ab AS |
87 | { |
88 | return usb_hcd_irq(ci->irq, ci->hcd); | |
89 | } | |
90 | ||
8e22978c | 91 | static int host_start(struct ci_hdrc *ci) |
eb70e5ab AS |
92 | { |
93 | struct usb_hcd *hcd; | |
94 | struct ehci_hcd *ehci; | |
c8679a2f | 95 | struct ehci_ci_priv *priv; |
eb70e5ab AS |
96 | int ret; |
97 | ||
98 | if (usb_disabled()) | |
99 | return -ENODEV; | |
100 | ||
101 | hcd = usb_create_hcd(&ci_ehci_hc_driver, ci->dev, dev_name(ci->dev)); | |
102 | if (!hcd) | |
103 | return -ENOMEM; | |
104 | ||
24c498df | 105 | dev_set_drvdata(ci->dev, ci); |
eb70e5ab AS |
106 | hcd->rsrc_start = ci->hw_bank.phys; |
107 | hcd->rsrc_len = ci->hw_bank.size; | |
108 | hcd->regs = ci->hw_bank.abs; | |
109 | hcd->has_tt = 1; | |
110 | ||
77c4400f | 111 | hcd->power_budget = ci->platdata->power_budget; |
f6a9ff07 | 112 | hcd->tpl_support = ci->platdata->tpl_support; |
1e5e2d3d AT |
113 | if (ci->phy) |
114 | hcd->phy = ci->phy; | |
115 | else | |
116 | hcd->usb_phy = ci->usb_phy; | |
bd841986 | 117 | |
eb70e5ab AS |
118 | ehci = hcd_to_ehci(hcd); |
119 | ehci->caps = ci->hw_bank.cap; | |
120 | ehci->has_hostpc = ci->hw_bank.lpm; | |
2cdcec4f | 121 | ehci->has_tdi_phy_lpm = ci->hw_bank.lpm; |
ed8f8318 | 122 | ehci->imx28_write_fix = ci->imx28_write_fix; |
eb70e5ab | 123 | |
c8679a2f MG |
124 | priv = (struct ehci_ci_priv *)ehci->priv; |
125 | priv->reg_vbus = NULL; | |
fc6b68ba | 126 | priv->ci = ci; |
c8679a2f | 127 | |
65945917 LJ |
128 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) { |
129 | if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) { | |
130 | ret = regulator_enable(ci->platdata->reg_vbus); | |
131 | if (ret) { | |
132 | dev_err(ci->dev, | |
133 | "Failed to enable vbus regulator, ret=%d\n", | |
134 | ret); | |
135 | goto put_hcd; | |
136 | } | |
137 | } else { | |
138 | priv->reg_vbus = ci->platdata->reg_vbus; | |
139 | } | |
140 | } | |
40ed51a4 | 141 | |
eb70e5ab | 142 | ret = usb_add_hcd(hcd, 0, 0); |
0698b9b3 | 143 | if (ret) { |
65945917 | 144 | goto disable_reg; |
0698b9b3 | 145 | } else { |
ef44cb42 | 146 | struct usb_otg *otg = &ci->otg; |
0698b9b3 | 147 | |
eb70e5ab | 148 | ci->hcd = hcd; |
ef44cb42 AT |
149 | |
150 | if (ci_otg_is_fsm_mode(ci)) { | |
0698b9b3 LJ |
151 | otg->host = &hcd->self; |
152 | hcd->self.otg_port = 1; | |
153 | } | |
154 | } | |
eb70e5ab | 155 | |
8e22978c | 156 | if (ci->platdata->flags & CI_HDRC_DISABLE_STREAMING) |
929473ea FE |
157 | hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS); |
158 | ||
905276c4 DT |
159 | if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) |
160 | hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC); | |
161 | ||
eb70e5ab | 162 | return ret; |
40ed51a4 | 163 | |
65945917 LJ |
164 | disable_reg: |
165 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && | |
166 | (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) | |
167 | regulator_disable(ci->platdata->reg_vbus); | |
40ed51a4 PC |
168 | put_hcd: |
169 | usb_put_hcd(hcd); | |
170 | ||
171 | return ret; | |
eb70e5ab AS |
172 | } |
173 | ||
8e22978c | 174 | static void host_stop(struct ci_hdrc *ci) |
eb70e5ab AS |
175 | { |
176 | struct usb_hcd *hcd = ci->hcd; | |
177 | ||
41314fea RKAL |
178 | if (hcd) { |
179 | usb_remove_hcd(hcd); | |
180 | usb_put_hcd(hcd); | |
65945917 LJ |
181 | if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) && |
182 | (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON)) | |
183 | regulator_disable(ci->platdata->reg_vbus); | |
41314fea | 184 | } |
eb70e5ab AS |
185 | } |
186 | ||
3f124d23 PC |
187 | |
188 | void ci_hdrc_host_destroy(struct ci_hdrc *ci) | |
189 | { | |
df101c53 | 190 | if (ci->role == CI_ROLE_HOST && ci->hcd) |
3f124d23 PC |
191 | host_stop(ci); |
192 | } | |
193 | ||
78f0357e PC |
194 | static int ci_ehci_bus_suspend(struct usb_hcd *hcd) |
195 | { | |
196 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
197 | int port; | |
198 | u32 tmp; | |
199 | ||
200 | int ret = orig_bus_suspend(hcd); | |
201 | ||
202 | if (ret) | |
203 | return ret; | |
204 | ||
205 | port = HCS_N_PORTS(ehci->hcs_params); | |
206 | while (port--) { | |
207 | u32 __iomem *reg = &ehci->regs->port_status[port]; | |
208 | u32 portsc = ehci_readl(ehci, reg); | |
209 | ||
210 | if (portsc & PORT_CONNECT) { | |
211 | /* | |
212 | * For chipidea, the resume signal will be ended | |
213 | * automatically, so for remote wakeup case, the | |
214 | * usbcmd.rs may not be set before the resume has | |
215 | * ended if other resume paths consumes too much | |
216 | * time (~24ms), in that case, the SOF will not | |
217 | * send out within 3ms after resume ends, then the | |
218 | * high speed device will enter full speed mode. | |
219 | */ | |
220 | ||
221 | tmp = ehci_readl(ehci, &ehci->regs->command); | |
222 | tmp |= CMD_RUN; | |
223 | ehci_writel(ehci, tmp, &ehci->regs->command); | |
224 | /* | |
225 | * It needs a short delay between set RS bit and PHCD. | |
226 | */ | |
227 | usleep_range(150, 200); | |
228 | break; | |
229 | } | |
230 | } | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
8e22978c | 235 | int ci_hdrc_host_init(struct ci_hdrc *ci) |
eb70e5ab AS |
236 | { |
237 | struct ci_role_driver *rdrv; | |
238 | ||
239 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC)) | |
240 | return -ENXIO; | |
241 | ||
242 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); | |
243 | if (!rdrv) | |
244 | return -ENOMEM; | |
245 | ||
246 | rdrv->start = host_start; | |
247 | rdrv->stop = host_stop; | |
248 | rdrv->irq = host_irq; | |
249 | rdrv->name = "host"; | |
250 | ci->roles[CI_ROLE_HOST] = rdrv; | |
251 | ||
2f01a33b PC |
252 | return 0; |
253 | } | |
254 | ||
255 | void ci_hdrc_host_driver_init(void) | |
256 | { | |
c8679a2f | 257 | ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides); |
78f0357e PC |
258 | orig_bus_suspend = ci_ehci_hc_driver.bus_suspend; |
259 | ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend; | |
eb70e5ab | 260 | } |