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usb: chipidea: msm: Handle phy power states
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CommitLineData
eb70e5ab
AS
1/*
2 * host.c - ChipIdea USB host controller driver
3 *
4 * Copyright (c) 2012 Intel Corporation
5 *
6 * Author: Alexander Shishkin
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/kernel.h>
cdb2fac7 23#include <linux/io.h>
eb70e5ab
AS
24#include <linux/usb.h>
25#include <linux/usb/hcd.h>
26#include <linux/usb/chipidea.h>
40ed51a4 27#include <linux/regulator/consumer.h>
eb70e5ab 28
09f6ffde 29#include "../host/ehci.h"
eb70e5ab
AS
30
31#include "ci.h"
32#include "bits.h"
33#include "host.h"
34
09f6ffde 35static struct hc_driver __read_mostly ci_ehci_hc_driver;
78f0357e 36static int (*orig_bus_suspend)(struct usb_hcd *hcd);
09f6ffde 37
c8679a2f
MG
38struct ehci_ci_priv {
39 struct regulator *reg_vbus;
40};
41
42static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
43{
44 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
45 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
46 struct device *dev = hcd->self.controller;
1311d6e3 47 struct ci_hdrc *ci = dev_get_drvdata(dev);
c8679a2f
MG
48 int ret = 0;
49 int port = HCS_N_PORTS(ehci->hcs_params);
50
65945917 51 if (priv->reg_vbus) {
c8679a2f
MG
52 if (port > 1) {
53 dev_warn(dev,
54 "Not support multi-port regulator control\n");
55 return 0;
56 }
57 if (enable)
58 ret = regulator_enable(priv->reg_vbus);
59 else
60 ret = regulator_disable(priv->reg_vbus);
61 if (ret) {
62 dev_err(dev,
63 "Failed to %s vbus regulator, ret=%d\n",
64 enable ? "enable" : "disable", ret);
65 return ret;
66 }
67 }
fc6b68ba
RH
68
69 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
70 /*
71 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
72 * As HSIC is always HS, this should be safe for others.
73 */
74 hw_port_test_set(ci, 5);
75 hw_port_test_set(ci, 0);
76 }
c8679a2f
MG
77 return 0;
78};
79
11a27098
PC
80static int ehci_ci_reset(struct usb_hcd *hcd)
81{
82 struct device *dev = hcd->self.controller;
83 struct ci_hdrc *ci = dev_get_drvdata(dev);
c744a0db 84 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
11a27098
PC
85 int ret;
86
87 ret = ehci_setup(hcd);
88 if (ret)
89 return ret;
90
c744a0db
LS
91 ehci->need_io_watchdog = 0;
92
11893dae
SB
93 if (ci->platdata->notify_event) {
94 ret = ci->platdata->notify_event(ci,
95 CI_HDRC_CONTROLLER_RESET_EVENT);
96 if (ret)
97 return ret;
98 }
b90a17c5 99
11a27098
PC
100 ci_platform_configure(ci);
101
102 return ret;
103}
104
c8679a2f
MG
105static const struct ehci_driver_overrides ehci_ci_overrides = {
106 .extra_priv_size = sizeof(struct ehci_ci_priv),
107 .port_power = ehci_ci_portpower,
11a27098 108 .reset = ehci_ci_reset,
c8679a2f
MG
109};
110
8e22978c 111static irqreturn_t host_irq(struct ci_hdrc *ci)
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AS
112{
113 return usb_hcd_irq(ci->irq, ci->hcd);
114}
115
8e22978c 116static int host_start(struct ci_hdrc *ci)
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AS
117{
118 struct usb_hcd *hcd;
119 struct ehci_hcd *ehci;
c8679a2f 120 struct ehci_ci_priv *priv;
eb70e5ab
AS
121 int ret;
122
123 if (usb_disabled())
124 return -ENODEV;
125
126 hcd = usb_create_hcd(&ci_ehci_hc_driver, ci->dev, dev_name(ci->dev));
127 if (!hcd)
128 return -ENOMEM;
129
24c498df 130 dev_set_drvdata(ci->dev, ci);
eb70e5ab
AS
131 hcd->rsrc_start = ci->hw_bank.phys;
132 hcd->rsrc_len = ci->hw_bank.size;
133 hcd->regs = ci->hw_bank.abs;
134 hcd->has_tt = 1;
135
77c4400f 136 hcd->power_budget = ci->platdata->power_budget;
f6a9ff07 137 hcd->tpl_support = ci->platdata->tpl_support;
1e5e2d3d
AT
138 if (ci->phy)
139 hcd->phy = ci->phy;
140 else
141 hcd->usb_phy = ci->usb_phy;
bd841986 142
eb70e5ab
AS
143 ehci = hcd_to_ehci(hcd);
144 ehci->caps = ci->hw_bank.cap;
145 ehci->has_hostpc = ci->hw_bank.lpm;
2cdcec4f 146 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
ed8f8318 147 ehci->imx28_write_fix = ci->imx28_write_fix;
eb70e5ab 148
c8679a2f
MG
149 priv = (struct ehci_ci_priv *)ehci->priv;
150 priv->reg_vbus = NULL;
151
65945917
LJ
152 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
153 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
154 ret = regulator_enable(ci->platdata->reg_vbus);
155 if (ret) {
156 dev_err(ci->dev,
157 "Failed to enable vbus regulator, ret=%d\n",
158 ret);
159 goto put_hcd;
160 }
161 } else {
162 priv->reg_vbus = ci->platdata->reg_vbus;
163 }
164 }
40ed51a4 165
eb70e5ab 166 ret = usb_add_hcd(hcd, 0, 0);
0698b9b3 167 if (ret) {
65945917 168 goto disable_reg;
0698b9b3 169 } else {
ef44cb42 170 struct usb_otg *otg = &ci->otg;
0698b9b3 171
eb70e5ab 172 ci->hcd = hcd;
ef44cb42
AT
173
174 if (ci_otg_is_fsm_mode(ci)) {
0698b9b3
LJ
175 otg->host = &hcd->self;
176 hcd->self.otg_port = 1;
177 }
178 }
eb70e5ab
AS
179
180 return ret;
40ed51a4 181
65945917
LJ
182disable_reg:
183 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
184 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
185 regulator_disable(ci->platdata->reg_vbus);
40ed51a4
PC
186put_hcd:
187 usb_put_hcd(hcd);
188
189 return ret;
eb70e5ab
AS
190}
191
8e22978c 192static void host_stop(struct ci_hdrc *ci)
eb70e5ab
AS
193{
194 struct usb_hcd *hcd = ci->hcd;
195
41314fea 196 if (hcd) {
b90a17c5
SB
197 if (ci->platdata->notify_event)
198 ci->platdata->notify_event(ci,
199 CI_HDRC_CONTROLLER_STOPPED_EVENT);
41314fea 200 usb_remove_hcd(hcd);
991d5add
SW
201 ci->role = CI_ROLE_END;
202 synchronize_irq(ci->irq);
41314fea 203 usb_put_hcd(hcd);
65945917
LJ
204 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
205 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
206 regulator_disable(ci->platdata->reg_vbus);
41314fea 207 }
43a40457
LJ
208 ci->hcd = NULL;
209 ci->otg.host = NULL;
eb70e5ab
AS
210}
211
3f124d23
PC
212
213void ci_hdrc_host_destroy(struct ci_hdrc *ci)
214{
df101c53 215 if (ci->role == CI_ROLE_HOST && ci->hcd)
3f124d23
PC
216 host_stop(ci);
217}
218
78f0357e
PC
219static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
220{
221 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
222 int port;
223 u32 tmp;
224
225 int ret = orig_bus_suspend(hcd);
226
227 if (ret)
228 return ret;
229
230 port = HCS_N_PORTS(ehci->hcs_params);
231 while (port--) {
232 u32 __iomem *reg = &ehci->regs->port_status[port];
233 u32 portsc = ehci_readl(ehci, reg);
234
235 if (portsc & PORT_CONNECT) {
236 /*
237 * For chipidea, the resume signal will be ended
238 * automatically, so for remote wakeup case, the
239 * usbcmd.rs may not be set before the resume has
240 * ended if other resume paths consumes too much
241 * time (~24ms), in that case, the SOF will not
242 * send out within 3ms after resume ends, then the
243 * high speed device will enter full speed mode.
244 */
245
246 tmp = ehci_readl(ehci, &ehci->regs->command);
247 tmp |= CMD_RUN;
248 ehci_writel(ehci, tmp, &ehci->regs->command);
249 /*
250 * It needs a short delay between set RS bit and PHCD.
251 */
252 usleep_range(150, 200);
253 break;
254 }
255 }
256
257 return 0;
258}
259
8e22978c 260int ci_hdrc_host_init(struct ci_hdrc *ci)
eb70e5ab
AS
261{
262 struct ci_role_driver *rdrv;
263
264 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
265 return -ENXIO;
266
267 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
268 if (!rdrv)
269 return -ENOMEM;
270
271 rdrv->start = host_start;
272 rdrv->stop = host_stop;
273 rdrv->irq = host_irq;
274 rdrv->name = "host";
275 ci->roles[CI_ROLE_HOST] = rdrv;
276
2f01a33b
PC
277 return 0;
278}
279
280void ci_hdrc_host_driver_init(void)
281{
c8679a2f 282 ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
78f0357e
PC
283 orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
284 ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
eb70e5ab 285}