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Commit | Line | Data |
---|---|---|
aa69a809 | 1 | /* |
eb70e5ab | 2 | * udc.c - ChipIdea UDC driver |
aa69a809 DL |
3 | * |
4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | |
5 | * | |
6 | * Author: David Lopo | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
36825a2d | 13 | #include <linux/delay.h> |
aa69a809 DL |
14 | #include <linux/device.h> |
15 | #include <linux/dmapool.h> | |
ded017ee | 16 | #include <linux/err.h> |
5b08319f | 17 | #include <linux/irqreturn.h> |
aa69a809 | 18 | #include <linux/kernel.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c036019e | 20 | #include <linux/pm_runtime.h> |
aa69a809 DL |
21 | #include <linux/usb/ch9.h> |
22 | #include <linux/usb/gadget.h> | |
f01ef574 | 23 | #include <linux/usb/otg.h> |
e443b333 | 24 | #include <linux/usb/chipidea.h> |
aa69a809 | 25 | |
e443b333 AS |
26 | #include "ci.h" |
27 | #include "udc.h" | |
28 | #include "bits.h" | |
29 | #include "debug.h" | |
954aad8c | 30 | |
aa69a809 DL |
31 | /* control endpoint description */ |
32 | static const struct usb_endpoint_descriptor | |
ca9cfea0 | 33 | ctrl_endpt_out_desc = { |
aa69a809 DL |
34 | .bLength = USB_DT_ENDPOINT_SIZE, |
35 | .bDescriptorType = USB_DT_ENDPOINT, | |
36 | ||
ca9cfea0 PK |
37 | .bEndpointAddress = USB_DIR_OUT, |
38 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
39 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
40 | }; | |
41 | ||
42 | static const struct usb_endpoint_descriptor | |
43 | ctrl_endpt_in_desc = { | |
44 | .bLength = USB_DT_ENDPOINT_SIZE, | |
45 | .bDescriptorType = USB_DT_ENDPOINT, | |
46 | ||
47 | .bEndpointAddress = USB_DIR_IN, | |
aa69a809 DL |
48 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
49 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
50 | }; | |
51 | ||
aa69a809 DL |
52 | /** |
53 | * hw_ep_bit: calculates the bit number | |
54 | * @num: endpoint number | |
55 | * @dir: endpoint direction | |
56 | * | |
57 | * This function returns bit number | |
58 | */ | |
59 | static inline int hw_ep_bit(int num, int dir) | |
60 | { | |
61 | return num + (dir ? 16 : 0); | |
62 | } | |
63 | ||
26c696c6 | 64 | static inline int ep_to_bit(struct ci13xxx *ci, int n) |
dd39c358 | 65 | { |
26c696c6 | 66 | int fill = 16 - ci->hw_ep_max / 2; |
dd39c358 | 67 | |
26c696c6 | 68 | if (n >= ci->hw_ep_max / 2) |
dd39c358 MKB |
69 | n += fill; |
70 | ||
71 | return n; | |
72 | } | |
73 | ||
aa69a809 | 74 | /** |
c0a48e6c | 75 | * hw_device_state: enables/disables interrupts (execute without interruption) |
aa69a809 DL |
76 | * @dma: 0 => disable, !0 => enable and set dma engine |
77 | * | |
78 | * This function returns an error code | |
79 | */ | |
26c696c6 | 80 | static int hw_device_state(struct ci13xxx *ci, u32 dma) |
aa69a809 DL |
81 | { |
82 | if (dma) { | |
26c696c6 | 83 | hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); |
aa69a809 | 84 | /* interrupt, error, port change, reset, sleep/suspend */ |
26c696c6 | 85 | hw_write(ci, OP_USBINTR, ~0, |
aa69a809 | 86 | USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); |
aa69a809 | 87 | } else { |
26c696c6 | 88 | hw_write(ci, OP_USBINTR, ~0, 0); |
aa69a809 DL |
89 | } |
90 | return 0; | |
91 | } | |
92 | ||
93 | /** | |
94 | * hw_ep_flush: flush endpoint fifo (execute without interruption) | |
95 | * @num: endpoint number | |
96 | * @dir: endpoint direction | |
97 | * | |
98 | * This function returns an error code | |
99 | */ | |
26c696c6 | 100 | static int hw_ep_flush(struct ci13xxx *ci, int num, int dir) |
aa69a809 DL |
101 | { |
102 | int n = hw_ep_bit(num, dir); | |
103 | ||
104 | do { | |
105 | /* flush any pending transfer */ | |
26c696c6 RZ |
106 | hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n)); |
107 | while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) | |
aa69a809 | 108 | cpu_relax(); |
26c696c6 | 109 | } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); |
aa69a809 DL |
110 | |
111 | return 0; | |
112 | } | |
113 | ||
114 | /** | |
115 | * hw_ep_disable: disables endpoint (execute without interruption) | |
116 | * @num: endpoint number | |
117 | * @dir: endpoint direction | |
118 | * | |
119 | * This function returns an error code | |
120 | */ | |
26c696c6 | 121 | static int hw_ep_disable(struct ci13xxx *ci, int num, int dir) |
aa69a809 | 122 | { |
26c696c6 RZ |
123 | hw_ep_flush(ci, num, dir); |
124 | hw_write(ci, OP_ENDPTCTRL + num, | |
d3595d13 | 125 | dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); |
aa69a809 DL |
126 | return 0; |
127 | } | |
128 | ||
129 | /** | |
130 | * hw_ep_enable: enables endpoint (execute without interruption) | |
131 | * @num: endpoint number | |
132 | * @dir: endpoint direction | |
133 | * @type: endpoint type | |
134 | * | |
135 | * This function returns an error code | |
136 | */ | |
26c696c6 | 137 | static int hw_ep_enable(struct ci13xxx *ci, int num, int dir, int type) |
aa69a809 DL |
138 | { |
139 | u32 mask, data; | |
140 | ||
141 | if (dir) { | |
142 | mask = ENDPTCTRL_TXT; /* type */ | |
727b4ddb | 143 | data = type << __ffs(mask); |
aa69a809 DL |
144 | |
145 | mask |= ENDPTCTRL_TXS; /* unstall */ | |
146 | mask |= ENDPTCTRL_TXR; /* reset data toggle */ | |
147 | data |= ENDPTCTRL_TXR; | |
148 | mask |= ENDPTCTRL_TXE; /* enable */ | |
149 | data |= ENDPTCTRL_TXE; | |
150 | } else { | |
151 | mask = ENDPTCTRL_RXT; /* type */ | |
727b4ddb | 152 | data = type << __ffs(mask); |
aa69a809 DL |
153 | |
154 | mask |= ENDPTCTRL_RXS; /* unstall */ | |
155 | mask |= ENDPTCTRL_RXR; /* reset data toggle */ | |
156 | data |= ENDPTCTRL_RXR; | |
157 | mask |= ENDPTCTRL_RXE; /* enable */ | |
158 | data |= ENDPTCTRL_RXE; | |
159 | } | |
26c696c6 | 160 | hw_write(ci, OP_ENDPTCTRL + num, mask, data); |
aa69a809 DL |
161 | return 0; |
162 | } | |
163 | ||
164 | /** | |
165 | * hw_ep_get_halt: return endpoint halt status | |
166 | * @num: endpoint number | |
167 | * @dir: endpoint direction | |
168 | * | |
169 | * This function returns 1 if endpoint halted | |
170 | */ | |
26c696c6 | 171 | static int hw_ep_get_halt(struct ci13xxx *ci, int num, int dir) |
aa69a809 DL |
172 | { |
173 | u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; | |
174 | ||
26c696c6 | 175 | return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; |
aa69a809 DL |
176 | } |
177 | ||
aa69a809 DL |
178 | /** |
179 | * hw_test_and_clear_setup_status: test & clear setup status (execute without | |
180 | * interruption) | |
dd39c358 | 181 | * @n: endpoint number |
aa69a809 DL |
182 | * |
183 | * This function returns setup status | |
184 | */ | |
26c696c6 | 185 | static int hw_test_and_clear_setup_status(struct ci13xxx *ci, int n) |
aa69a809 | 186 | { |
26c696c6 RZ |
187 | n = ep_to_bit(ci, n); |
188 | return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n)); | |
aa69a809 DL |
189 | } |
190 | ||
191 | /** | |
192 | * hw_ep_prime: primes endpoint (execute without interruption) | |
193 | * @num: endpoint number | |
194 | * @dir: endpoint direction | |
195 | * @is_ctrl: true if control endpoint | |
196 | * | |
197 | * This function returns an error code | |
198 | */ | |
26c696c6 | 199 | static int hw_ep_prime(struct ci13xxx *ci, int num, int dir, int is_ctrl) |
aa69a809 DL |
200 | { |
201 | int n = hw_ep_bit(num, dir); | |
202 | ||
26c696c6 | 203 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
204 | return -EAGAIN; |
205 | ||
26c696c6 | 206 | hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n)); |
aa69a809 | 207 | |
26c696c6 | 208 | while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
aa69a809 | 209 | cpu_relax(); |
26c696c6 | 210 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
211 | return -EAGAIN; |
212 | ||
213 | /* status shoult be tested according with manual but it doesn't work */ | |
214 | return 0; | |
215 | } | |
216 | ||
217 | /** | |
218 | * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute | |
219 | * without interruption) | |
220 | * @num: endpoint number | |
221 | * @dir: endpoint direction | |
222 | * @value: true => stall, false => unstall | |
223 | * | |
224 | * This function returns an error code | |
225 | */ | |
26c696c6 | 226 | static int hw_ep_set_halt(struct ci13xxx *ci, int num, int dir, int value) |
aa69a809 DL |
227 | { |
228 | if (value != 0 && value != 1) | |
229 | return -EINVAL; | |
230 | ||
231 | do { | |
262c1632 | 232 | enum ci13xxx_regs reg = OP_ENDPTCTRL + num; |
aa69a809 DL |
233 | u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
234 | u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; | |
235 | ||
236 | /* data toggle - reserved for EP0 but it's in ESS */ | |
26c696c6 | 237 | hw_write(ci, reg, mask_xs|mask_xr, |
262c1632 | 238 | value ? mask_xs : mask_xr); |
26c696c6 | 239 | } while (value != hw_ep_get_halt(ci, num, dir)); |
aa69a809 DL |
240 | |
241 | return 0; | |
242 | } | |
243 | ||
aa69a809 DL |
244 | /** |
245 | * hw_is_port_high_speed: test if port is high speed | |
246 | * | |
247 | * This function returns true if high speed port | |
248 | */ | |
26c696c6 | 249 | static int hw_port_is_high_speed(struct ci13xxx *ci) |
aa69a809 | 250 | { |
26c696c6 RZ |
251 | return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : |
252 | hw_read(ci, OP_PORTSC, PORTSC_HSP); | |
aa69a809 DL |
253 | } |
254 | ||
aa69a809 DL |
255 | /** |
256 | * hw_read_intr_enable: returns interrupt enable register | |
257 | * | |
258 | * This function returns register data | |
259 | */ | |
26c696c6 | 260 | static u32 hw_read_intr_enable(struct ci13xxx *ci) |
aa69a809 | 261 | { |
26c696c6 | 262 | return hw_read(ci, OP_USBINTR, ~0); |
aa69a809 DL |
263 | } |
264 | ||
265 | /** | |
266 | * hw_read_intr_status: returns interrupt status register | |
267 | * | |
268 | * This function returns register data | |
269 | */ | |
26c696c6 | 270 | static u32 hw_read_intr_status(struct ci13xxx *ci) |
aa69a809 | 271 | { |
26c696c6 | 272 | return hw_read(ci, OP_USBSTS, ~0); |
aa69a809 DL |
273 | } |
274 | ||
aa69a809 DL |
275 | /** |
276 | * hw_test_and_clear_complete: test & clear complete status (execute without | |
277 | * interruption) | |
dd39c358 | 278 | * @n: endpoint number |
aa69a809 DL |
279 | * |
280 | * This function returns complete status | |
281 | */ | |
26c696c6 | 282 | static int hw_test_and_clear_complete(struct ci13xxx *ci, int n) |
aa69a809 | 283 | { |
26c696c6 RZ |
284 | n = ep_to_bit(ci, n); |
285 | return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); | |
aa69a809 DL |
286 | } |
287 | ||
288 | /** | |
289 | * hw_test_and_clear_intr_active: test & clear active interrupts (execute | |
290 | * without interruption) | |
291 | * | |
292 | * This function returns active interrutps | |
293 | */ | |
26c696c6 | 294 | static u32 hw_test_and_clear_intr_active(struct ci13xxx *ci) |
aa69a809 | 295 | { |
26c696c6 | 296 | u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); |
aa69a809 | 297 | |
26c696c6 | 298 | hw_write(ci, OP_USBSTS, ~0, reg); |
aa69a809 DL |
299 | return reg; |
300 | } | |
301 | ||
302 | /** | |
303 | * hw_test_and_clear_setup_guard: test & clear setup guard (execute without | |
304 | * interruption) | |
305 | * | |
306 | * This function returns guard value | |
307 | */ | |
26c696c6 | 308 | static int hw_test_and_clear_setup_guard(struct ci13xxx *ci) |
aa69a809 | 309 | { |
26c696c6 | 310 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); |
aa69a809 DL |
311 | } |
312 | ||
313 | /** | |
314 | * hw_test_and_set_setup_guard: test & set setup guard (execute without | |
315 | * interruption) | |
316 | * | |
317 | * This function returns guard value | |
318 | */ | |
26c696c6 | 319 | static int hw_test_and_set_setup_guard(struct ci13xxx *ci) |
aa69a809 | 320 | { |
26c696c6 | 321 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); |
aa69a809 DL |
322 | } |
323 | ||
324 | /** | |
325 | * hw_usb_set_address: configures USB address (execute without interruption) | |
326 | * @value: new USB address | |
327 | * | |
ef15e549 AS |
328 | * This function explicitly sets the address, without the "USBADRA" (advance) |
329 | * feature, which is not supported by older versions of the controller. | |
aa69a809 | 330 | */ |
26c696c6 | 331 | static void hw_usb_set_address(struct ci13xxx *ci, u8 value) |
aa69a809 | 332 | { |
26c696c6 | 333 | hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, |
727b4ddb | 334 | value << __ffs(DEVICEADDR_USBADR)); |
aa69a809 DL |
335 | } |
336 | ||
337 | /** | |
338 | * hw_usb_reset: restart device after a bus reset (execute without | |
339 | * interruption) | |
340 | * | |
341 | * This function returns an error code | |
342 | */ | |
26c696c6 | 343 | static int hw_usb_reset(struct ci13xxx *ci) |
aa69a809 | 344 | { |
26c696c6 | 345 | hw_usb_set_address(ci, 0); |
aa69a809 DL |
346 | |
347 | /* ESS flushes only at end?!? */ | |
26c696c6 | 348 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
aa69a809 DL |
349 | |
350 | /* clear setup token semaphores */ | |
26c696c6 | 351 | hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); |
aa69a809 DL |
352 | |
353 | /* clear complete status */ | |
26c696c6 | 354 | hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); |
aa69a809 DL |
355 | |
356 | /* wait until all bits cleared */ | |
26c696c6 | 357 | while (hw_read(ci, OP_ENDPTPRIME, ~0)) |
aa69a809 DL |
358 | udelay(10); /* not RTOS friendly */ |
359 | ||
360 | /* reset all endpoints ? */ | |
361 | ||
362 | /* reset internal status and wait for further instructions | |
363 | no need to verify the port reset status (ESS does it) */ | |
364 | ||
365 | return 0; | |
366 | } | |
367 | ||
aa69a809 DL |
368 | /****************************************************************************** |
369 | * UTIL block | |
370 | *****************************************************************************/ | |
cc9e6c49 | 371 | |
2dbc5c4c | 372 | static int add_td_to_list(struct ci13xxx_ep *hwep, struct ci13xxx_req *hwreq, |
cc9e6c49 MG |
373 | unsigned length) |
374 | { | |
2e270412 MG |
375 | int i; |
376 | u32 temp; | |
cc9e6c49 MG |
377 | struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), |
378 | GFP_ATOMIC); | |
379 | ||
380 | if (node == NULL) | |
381 | return -ENOMEM; | |
382 | ||
2dbc5c4c | 383 | node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC, |
cc9e6c49 MG |
384 | &node->dma); |
385 | if (node->ptr == NULL) { | |
386 | kfree(node); | |
387 | return -ENOMEM; | |
388 | } | |
389 | ||
2e270412 MG |
390 | memset(node->ptr, 0, sizeof(struct ci13xxx_td)); |
391 | node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); | |
392 | node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); | |
393 | node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); | |
394 | ||
2dbc5c4c | 395 | temp = (u32) (hwreq->req.dma + hwreq->req.actual); |
2e270412 MG |
396 | if (length) { |
397 | node->ptr->page[0] = cpu_to_le32(temp); | |
398 | for (i = 1; i < TD_PAGE_COUNT; i++) { | |
399 | u32 page = temp + i * CI13XXX_PAGE_SIZE; | |
400 | page &= ~TD_RESERVED_MASK; | |
401 | node->ptr->page[i] = cpu_to_le32(page); | |
402 | } | |
403 | } | |
404 | ||
2dbc5c4c | 405 | hwreq->req.actual += length; |
cc9e6c49 | 406 | |
2dbc5c4c | 407 | if (!list_empty(&hwreq->tds)) { |
cc9e6c49 | 408 | /* get the last entry */ |
2dbc5c4c | 409 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
410 | struct td_node, td); |
411 | lastnode->ptr->next = cpu_to_le32(node->dma); | |
412 | } | |
413 | ||
414 | INIT_LIST_HEAD(&node->td); | |
2dbc5c4c | 415 | list_add_tail(&node->td, &hwreq->tds); |
cc9e6c49 MG |
416 | |
417 | return 0; | |
418 | } | |
419 | ||
aa69a809 DL |
420 | /** |
421 | * _usb_addr: calculates endpoint address from direction & number | |
422 | * @ep: endpoint | |
423 | */ | |
424 | static inline u8 _usb_addr(struct ci13xxx_ep *ep) | |
425 | { | |
426 | return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; | |
427 | } | |
428 | ||
429 | /** | |
430 | * _hardware_queue: configures a request at hardware level | |
431 | * @gadget: gadget | |
2dbc5c4c | 432 | * @hwep: endpoint |
aa69a809 DL |
433 | * |
434 | * This function returns an error code | |
435 | */ | |
2dbc5c4c | 436 | static int _hardware_enqueue(struct ci13xxx_ep *hwep, struct ci13xxx_req *hwreq) |
aa69a809 | 437 | { |
2dbc5c4c | 438 | struct ci13xxx *ci = hwep->ci; |
0e6ca199 | 439 | int ret = 0; |
2dbc5c4c | 440 | unsigned rest = hwreq->req.length; |
2e270412 | 441 | int pages = TD_PAGE_COUNT; |
cc9e6c49 | 442 | struct td_node *firstnode, *lastnode; |
aa69a809 | 443 | |
aa69a809 | 444 | /* don't queue twice */ |
2dbc5c4c | 445 | if (hwreq->req.status == -EALREADY) |
aa69a809 DL |
446 | return -EALREADY; |
447 | ||
2dbc5c4c | 448 | hwreq->req.status = -EALREADY; |
aa69a809 | 449 | |
2dbc5c4c | 450 | ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); |
5e0aa49e AS |
451 | if (ret) |
452 | return ret; | |
453 | ||
2e270412 MG |
454 | /* |
455 | * The first buffer could be not page aligned. | |
456 | * In that case we have to span into one extra td. | |
457 | */ | |
2dbc5c4c | 458 | if (hwreq->req.dma % PAGE_SIZE) |
2e270412 | 459 | pages--; |
cc9e6c49 | 460 | |
2e270412 | 461 | if (rest == 0) |
2dbc5c4c | 462 | add_td_to_list(hwep, hwreq, 0); |
cc9e6c49 | 463 | |
2e270412 | 464 | while (rest > 0) { |
2dbc5c4c | 465 | unsigned count = min(hwreq->req.length - hwreq->req.actual, |
2e270412 | 466 | (unsigned)(pages * CI13XXX_PAGE_SIZE)); |
2dbc5c4c | 467 | add_td_to_list(hwep, hwreq, count); |
2e270412 | 468 | rest -= count; |
0e6ca199 | 469 | } |
aa69a809 | 470 | |
2dbc5c4c AS |
471 | if (hwreq->req.zero && hwreq->req.length |
472 | && (hwreq->req.length % hwep->ep.maxpacket == 0)) | |
473 | add_td_to_list(hwep, hwreq, 0); | |
cc9e6c49 | 474 | |
2dbc5c4c | 475 | firstnode = list_first_entry(&hwreq->tds, struct td_node, td); |
2e270412 | 476 | |
2dbc5c4c | 477 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
478 | struct td_node, td); |
479 | ||
480 | lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); | |
2dbc5c4c | 481 | if (!hwreq->req.no_interrupt) |
cc9e6c49 | 482 | lastnode->ptr->token |= cpu_to_le32(TD_IOC); |
a9c17430 MG |
483 | wmb(); |
484 | ||
2dbc5c4c AS |
485 | hwreq->req.actual = 0; |
486 | if (!list_empty(&hwep->qh.queue)) { | |
487 | struct ci13xxx_req *hwreqprev; | |
488 | int n = hw_ep_bit(hwep->num, hwep->dir); | |
0e6ca199 | 489 | int tmp_stat; |
cc9e6c49 MG |
490 | struct td_node *prevlastnode; |
491 | u32 next = firstnode->dma & TD_ADDR_MASK; | |
0e6ca199 | 492 | |
2dbc5c4c | 493 | hwreqprev = list_entry(hwep->qh.queue.prev, |
0e6ca199 | 494 | struct ci13xxx_req, queue); |
2dbc5c4c | 495 | prevlastnode = list_entry(hwreqprev->tds.prev, |
cc9e6c49 MG |
496 | struct td_node, td); |
497 | ||
498 | prevlastnode->ptr->next = cpu_to_le32(next); | |
0e6ca199 | 499 | wmb(); |
26c696c6 | 500 | if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
0e6ca199 PK |
501 | goto done; |
502 | do { | |
26c696c6 RZ |
503 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); |
504 | tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); | |
505 | } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); | |
506 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); | |
0e6ca199 PK |
507 | if (tmp_stat) |
508 | goto done; | |
509 | } | |
510 | ||
511 | /* QH configuration */ | |
2dbc5c4c AS |
512 | hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); |
513 | hwep->qh.ptr->td.token &= | |
080ff5f4 | 514 | cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); |
aa69a809 | 515 | |
2dbc5c4c AS |
516 | if (hwep->type == USB_ENDPOINT_XFER_ISOC) { |
517 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; | |
e4ce4ecd | 518 | |
2dbc5c4c | 519 | if (hwreq->req.length % hwep->ep.maxpacket) |
e4ce4ecd | 520 | mul++; |
2dbc5c4c | 521 | hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); |
e4ce4ecd MG |
522 | } |
523 | ||
aa69a809 DL |
524 | wmb(); /* synchronize before ep prime */ |
525 | ||
2dbc5c4c AS |
526 | ret = hw_ep_prime(ci, hwep->num, hwep->dir, |
527 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
0e6ca199 PK |
528 | done: |
529 | return ret; | |
aa69a809 DL |
530 | } |
531 | ||
2e270412 MG |
532 | /* |
533 | * free_pending_td: remove a pending request for the endpoint | |
2dbc5c4c | 534 | * @hwep: endpoint |
2e270412 | 535 | */ |
2dbc5c4c | 536 | static void free_pending_td(struct ci13xxx_ep *hwep) |
2e270412 | 537 | { |
2dbc5c4c | 538 | struct td_node *pending = hwep->pending_td; |
2e270412 | 539 | |
2dbc5c4c AS |
540 | dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); |
541 | hwep->pending_td = NULL; | |
2e270412 MG |
542 | kfree(pending); |
543 | } | |
544 | ||
aa69a809 DL |
545 | /** |
546 | * _hardware_dequeue: handles a request at hardware level | |
547 | * @gadget: gadget | |
2dbc5c4c | 548 | * @hwep: endpoint |
aa69a809 DL |
549 | * |
550 | * This function returns an error code | |
551 | */ | |
2dbc5c4c | 552 | static int _hardware_dequeue(struct ci13xxx_ep *hwep, struct ci13xxx_req *hwreq) |
aa69a809 | 553 | { |
cc9e6c49 | 554 | u32 tmptoken; |
2e270412 MG |
555 | struct td_node *node, *tmpnode; |
556 | unsigned remaining_length; | |
2dbc5c4c | 557 | unsigned actual = hwreq->req.length; |
9e506438 | 558 | |
2dbc5c4c | 559 | if (hwreq->req.status != -EALREADY) |
aa69a809 DL |
560 | return -EINVAL; |
561 | ||
2dbc5c4c | 562 | hwreq->req.status = 0; |
0e6ca199 | 563 | |
2dbc5c4c | 564 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
cc9e6c49 | 565 | tmptoken = le32_to_cpu(node->ptr->token); |
2e270412 | 566 | if ((TD_STATUS_ACTIVE & tmptoken) != 0) { |
2dbc5c4c | 567 | hwreq->req.status = -EALREADY; |
0e6ca199 | 568 | return -EBUSY; |
cc9e6c49 | 569 | } |
aa69a809 | 570 | |
2e270412 MG |
571 | remaining_length = (tmptoken & TD_TOTAL_BYTES); |
572 | remaining_length >>= __ffs(TD_TOTAL_BYTES); | |
573 | actual -= remaining_length; | |
574 | ||
2dbc5c4c AS |
575 | hwreq->req.status = tmptoken & TD_STATUS; |
576 | if ((TD_STATUS_HALTED & hwreq->req.status)) { | |
577 | hwreq->req.status = -EPIPE; | |
2e270412 | 578 | break; |
2dbc5c4c AS |
579 | } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { |
580 | hwreq->req.status = -EPROTO; | |
2e270412 | 581 | break; |
2dbc5c4c AS |
582 | } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { |
583 | hwreq->req.status = -EILSEQ; | |
2e270412 MG |
584 | break; |
585 | } | |
586 | ||
587 | if (remaining_length) { | |
2dbc5c4c AS |
588 | if (hwep->dir) { |
589 | hwreq->req.status = -EPROTO; | |
2e270412 MG |
590 | break; |
591 | } | |
592 | } | |
593 | /* | |
594 | * As the hardware could still address the freed td | |
595 | * which will run the udc unusable, the cleanup of the | |
596 | * td has to be delayed by one. | |
597 | */ | |
2dbc5c4c AS |
598 | if (hwep->pending_td) |
599 | free_pending_td(hwep); | |
2e270412 | 600 | |
2dbc5c4c | 601 | hwep->pending_td = node; |
2e270412 MG |
602 | list_del_init(&node->td); |
603 | } | |
aa69a809 | 604 | |
2dbc5c4c | 605 | usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); |
aa69a809 | 606 | |
2dbc5c4c | 607 | hwreq->req.actual += actual; |
aa69a809 | 608 | |
2dbc5c4c AS |
609 | if (hwreq->req.status) |
610 | return hwreq->req.status; | |
aa69a809 | 611 | |
2dbc5c4c | 612 | return hwreq->req.actual; |
aa69a809 DL |
613 | } |
614 | ||
615 | /** | |
616 | * _ep_nuke: dequeues all endpoint requests | |
2dbc5c4c | 617 | * @hwep: endpoint |
aa69a809 DL |
618 | * |
619 | * This function returns an error code | |
620 | * Caller must hold lock | |
621 | */ | |
2dbc5c4c AS |
622 | static int _ep_nuke(struct ci13xxx_ep *hwep) |
623 | __releases(hwep->lock) | |
624 | __acquires(hwep->lock) | |
aa69a809 | 625 | { |
2e270412 | 626 | struct td_node *node, *tmpnode; |
2dbc5c4c | 627 | if (hwep == NULL) |
aa69a809 DL |
628 | return -EINVAL; |
629 | ||
2dbc5c4c | 630 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 631 | |
2dbc5c4c | 632 | while (!list_empty(&hwep->qh.queue)) { |
aa69a809 DL |
633 | |
634 | /* pop oldest request */ | |
2dbc5c4c AS |
635 | struct ci13xxx_req *hwreq = list_entry(hwep->qh.queue.next, |
636 | struct ci13xxx_req, | |
637 | queue); | |
7ca2cd29 | 638 | |
2dbc5c4c AS |
639 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
640 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
641 | list_del_init(&node->td); |
642 | node->ptr = NULL; | |
643 | kfree(node); | |
7ca2cd29 MG |
644 | } |
645 | ||
2dbc5c4c AS |
646 | list_del_init(&hwreq->queue); |
647 | hwreq->req.status = -ESHUTDOWN; | |
aa69a809 | 648 | |
2dbc5c4c AS |
649 | if (hwreq->req.complete != NULL) { |
650 | spin_unlock(hwep->lock); | |
651 | hwreq->req.complete(&hwep->ep, &hwreq->req); | |
652 | spin_lock(hwep->lock); | |
aa69a809 DL |
653 | } |
654 | } | |
2e270412 | 655 | |
2dbc5c4c AS |
656 | if (hwep->pending_td) |
657 | free_pending_td(hwep); | |
2e270412 | 658 | |
aa69a809 DL |
659 | return 0; |
660 | } | |
661 | ||
662 | /** | |
663 | * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts | |
664 | * @gadget: gadget | |
665 | * | |
666 | * This function returns an error code | |
aa69a809 DL |
667 | */ |
668 | static int _gadget_stop_activity(struct usb_gadget *gadget) | |
aa69a809 DL |
669 | { |
670 | struct usb_ep *ep; | |
26c696c6 | 671 | struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget); |
e2b61c1d | 672 | unsigned long flags; |
aa69a809 | 673 | |
26c696c6 RZ |
674 | spin_lock_irqsave(&ci->lock, flags); |
675 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
676 | ci->remote_wakeup = 0; | |
677 | ci->suspended = 0; | |
678 | spin_unlock_irqrestore(&ci->lock, flags); | |
e2b61c1d | 679 | |
aa69a809 DL |
680 | /* flush all endpoints */ |
681 | gadget_for_each_ep(ep, gadget) { | |
682 | usb_ep_fifo_flush(ep); | |
683 | } | |
26c696c6 RZ |
684 | usb_ep_fifo_flush(&ci->ep0out->ep); |
685 | usb_ep_fifo_flush(&ci->ep0in->ep); | |
aa69a809 | 686 | |
26c696c6 RZ |
687 | if (ci->driver) |
688 | ci->driver->disconnect(gadget); | |
aa69a809 DL |
689 | |
690 | /* make sure to disable all endpoints */ | |
691 | gadget_for_each_ep(ep, gadget) { | |
692 | usb_ep_disable(ep); | |
693 | } | |
aa69a809 | 694 | |
26c696c6 RZ |
695 | if (ci->status != NULL) { |
696 | usb_ep_free_request(&ci->ep0in->ep, ci->status); | |
697 | ci->status = NULL; | |
aa69a809 DL |
698 | } |
699 | ||
aa69a809 DL |
700 | return 0; |
701 | } | |
702 | ||
703 | /****************************************************************************** | |
704 | * ISR block | |
705 | *****************************************************************************/ | |
706 | /** | |
707 | * isr_reset_handler: USB reset interrupt handler | |
26c696c6 | 708 | * @ci: UDC device |
aa69a809 DL |
709 | * |
710 | * This function resets USB engine after a bus reset occurred | |
711 | */ | |
26c696c6 RZ |
712 | static void isr_reset_handler(struct ci13xxx *ci) |
713 | __releases(ci->lock) | |
714 | __acquires(ci->lock) | |
aa69a809 | 715 | { |
aa69a809 DL |
716 | int retval; |
717 | ||
26c696c6 RZ |
718 | spin_unlock(&ci->lock); |
719 | retval = _gadget_stop_activity(&ci->gadget); | |
aa69a809 DL |
720 | if (retval) |
721 | goto done; | |
722 | ||
26c696c6 | 723 | retval = hw_usb_reset(ci); |
aa69a809 DL |
724 | if (retval) |
725 | goto done; | |
726 | ||
26c696c6 RZ |
727 | ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); |
728 | if (ci->status == NULL) | |
ac1aa6a2 | 729 | retval = -ENOMEM; |
ca9cfea0 | 730 | |
b9322252 | 731 | done: |
26c696c6 | 732 | spin_lock(&ci->lock); |
aa69a809 | 733 | |
aa69a809 | 734 | if (retval) |
26c696c6 | 735 | dev_err(ci->dev, "error: %i\n", retval); |
aa69a809 DL |
736 | } |
737 | ||
738 | /** | |
739 | * isr_get_status_complete: get_status request complete function | |
740 | * @ep: endpoint | |
741 | * @req: request handled | |
742 | * | |
743 | * Caller must release lock | |
744 | */ | |
745 | static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) | |
746 | { | |
0f089094 | 747 | if (ep == NULL || req == NULL) |
aa69a809 | 748 | return; |
aa69a809 DL |
749 | |
750 | kfree(req->buf); | |
751 | usb_ep_free_request(ep, req); | |
752 | } | |
753 | ||
dd064e9d MG |
754 | /** |
755 | * _ep_queue: queues (submits) an I/O request to an endpoint | |
756 | * | |
757 | * Caller must hold lock | |
758 | */ | |
759 | static int _ep_queue(struct usb_ep *ep, struct usb_request *req, | |
760 | gfp_t __maybe_unused gfp_flags) | |
761 | { | |
2dbc5c4c AS |
762 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
763 | struct ci13xxx_req *hwreq = container_of(req, struct ci13xxx_req, req); | |
764 | struct ci13xxx *ci = hwep->ci; | |
dd064e9d MG |
765 | int retval = 0; |
766 | ||
2dbc5c4c | 767 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
dd064e9d MG |
768 | return -EINVAL; |
769 | ||
2dbc5c4c | 770 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
dd064e9d | 771 | if (req->length) |
2dbc5c4c | 772 | hwep = (ci->ep0_dir == RX) ? |
dd064e9d | 773 | ci->ep0out : ci->ep0in; |
2dbc5c4c AS |
774 | if (!list_empty(&hwep->qh.queue)) { |
775 | _ep_nuke(hwep); | |
dd064e9d | 776 | retval = -EOVERFLOW; |
2dbc5c4c AS |
777 | dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", |
778 | _usb_addr(hwep)); | |
dd064e9d MG |
779 | } |
780 | } | |
781 | ||
2dbc5c4c AS |
782 | if (usb_endpoint_xfer_isoc(hwep->ep.desc) && |
783 | hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { | |
784 | dev_err(hwep->ci->dev, "request length too big for isochronous\n"); | |
e4ce4ecd MG |
785 | return -EMSGSIZE; |
786 | } | |
787 | ||
dd064e9d | 788 | /* first nuke then test link, e.g. previous status has not sent */ |
2dbc5c4c AS |
789 | if (!list_empty(&hwreq->queue)) { |
790 | dev_err(hwep->ci->dev, "request already in queue\n"); | |
dd064e9d MG |
791 | return -EBUSY; |
792 | } | |
793 | ||
dd064e9d | 794 | /* push request */ |
2dbc5c4c AS |
795 | hwreq->req.status = -EINPROGRESS; |
796 | hwreq->req.actual = 0; | |
dd064e9d | 797 | |
2dbc5c4c | 798 | retval = _hardware_enqueue(hwep, hwreq); |
dd064e9d MG |
799 | |
800 | if (retval == -EALREADY) | |
801 | retval = 0; | |
802 | if (!retval) | |
2dbc5c4c | 803 | list_add_tail(&hwreq->queue, &hwep->qh.queue); |
dd064e9d MG |
804 | |
805 | return retval; | |
806 | } | |
807 | ||
aa69a809 DL |
808 | /** |
809 | * isr_get_status_response: get_status request response | |
26c696c6 | 810 | * @ci: ci struct |
aa69a809 DL |
811 | * @setup: setup request packet |
812 | * | |
813 | * This function returns an error code | |
814 | */ | |
26c696c6 | 815 | static int isr_get_status_response(struct ci13xxx *ci, |
aa69a809 | 816 | struct usb_ctrlrequest *setup) |
2dbc5c4c AS |
817 | __releases(hwep->lock) |
818 | __acquires(hwep->lock) | |
aa69a809 | 819 | { |
2dbc5c4c | 820 | struct ci13xxx_ep *hwep = ci->ep0in; |
aa69a809 DL |
821 | struct usb_request *req = NULL; |
822 | gfp_t gfp_flags = GFP_ATOMIC; | |
823 | int dir, num, retval; | |
824 | ||
2dbc5c4c | 825 | if (hwep == NULL || setup == NULL) |
aa69a809 DL |
826 | return -EINVAL; |
827 | ||
2dbc5c4c AS |
828 | spin_unlock(hwep->lock); |
829 | req = usb_ep_alloc_request(&hwep->ep, gfp_flags); | |
830 | spin_lock(hwep->lock); | |
aa69a809 DL |
831 | if (req == NULL) |
832 | return -ENOMEM; | |
833 | ||
834 | req->complete = isr_get_status_complete; | |
835 | req->length = 2; | |
836 | req->buf = kzalloc(req->length, gfp_flags); | |
837 | if (req->buf == NULL) { | |
838 | retval = -ENOMEM; | |
839 | goto err_free_req; | |
840 | } | |
841 | ||
842 | if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { | |
e2b61c1d | 843 | /* Assume that device is bus powered for now. */ |
26c696c6 | 844 | *(u16 *)req->buf = ci->remote_wakeup << 1; |
aa69a809 DL |
845 | retval = 0; |
846 | } else if ((setup->bRequestType & USB_RECIP_MASK) \ | |
847 | == USB_RECIP_ENDPOINT) { | |
848 | dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? | |
849 | TX : RX; | |
850 | num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
26c696c6 | 851 | *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); |
aa69a809 DL |
852 | } |
853 | /* else do nothing; reserved for future use */ | |
854 | ||
2dbc5c4c | 855 | retval = _ep_queue(&hwep->ep, req, gfp_flags); |
aa69a809 DL |
856 | if (retval) |
857 | goto err_free_buf; | |
858 | ||
859 | return 0; | |
860 | ||
861 | err_free_buf: | |
862 | kfree(req->buf); | |
863 | err_free_req: | |
2dbc5c4c AS |
864 | spin_unlock(hwep->lock); |
865 | usb_ep_free_request(&hwep->ep, req); | |
866 | spin_lock(hwep->lock); | |
aa69a809 DL |
867 | return retval; |
868 | } | |
869 | ||
541cace8 PK |
870 | /** |
871 | * isr_setup_status_complete: setup_status request complete function | |
872 | * @ep: endpoint | |
873 | * @req: request handled | |
874 | * | |
875 | * Caller must release lock. Put the port in test mode if test mode | |
876 | * feature is selected. | |
877 | */ | |
878 | static void | |
879 | isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) | |
880 | { | |
26c696c6 | 881 | struct ci13xxx *ci = req->context; |
541cace8 PK |
882 | unsigned long flags; |
883 | ||
26c696c6 RZ |
884 | if (ci->setaddr) { |
885 | hw_usb_set_address(ci, ci->address); | |
886 | ci->setaddr = false; | |
ef15e549 AS |
887 | } |
888 | ||
26c696c6 RZ |
889 | spin_lock_irqsave(&ci->lock, flags); |
890 | if (ci->test_mode) | |
891 | hw_port_test_set(ci, ci->test_mode); | |
892 | spin_unlock_irqrestore(&ci->lock, flags); | |
541cace8 PK |
893 | } |
894 | ||
aa69a809 DL |
895 | /** |
896 | * isr_setup_status_phase: queues the status phase of a setup transation | |
26c696c6 | 897 | * @ci: ci struct |
aa69a809 DL |
898 | * |
899 | * This function returns an error code | |
900 | */ | |
26c696c6 | 901 | static int isr_setup_status_phase(struct ci13xxx *ci) |
aa69a809 DL |
902 | { |
903 | int retval; | |
2dbc5c4c | 904 | struct ci13xxx_ep *hwep; |
aa69a809 | 905 | |
2dbc5c4c | 906 | hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; |
26c696c6 RZ |
907 | ci->status->context = ci; |
908 | ci->status->complete = isr_setup_status_complete; | |
aa69a809 | 909 | |
2dbc5c4c | 910 | retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); |
aa69a809 DL |
911 | |
912 | return retval; | |
913 | } | |
914 | ||
915 | /** | |
916 | * isr_tr_complete_low: transaction complete low level handler | |
2dbc5c4c | 917 | * @hwep: endpoint |
aa69a809 DL |
918 | * |
919 | * This function returns an error code | |
920 | * Caller must hold lock | |
921 | */ | |
2dbc5c4c AS |
922 | static int isr_tr_complete_low(struct ci13xxx_ep *hwep) |
923 | __releases(hwep->lock) | |
924 | __acquires(hwep->lock) | |
aa69a809 | 925 | { |
2dbc5c4c AS |
926 | struct ci13xxx_req *hwreq, *hwreqtemp; |
927 | struct ci13xxx_ep *hweptemp = hwep; | |
db89960e | 928 | int retval = 0; |
aa69a809 | 929 | |
2dbc5c4c | 930 | list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, |
0e6ca199 | 931 | queue) { |
2dbc5c4c | 932 | retval = _hardware_dequeue(hwep, hwreq); |
0e6ca199 PK |
933 | if (retval < 0) |
934 | break; | |
2dbc5c4c AS |
935 | list_del_init(&hwreq->queue); |
936 | if (hwreq->req.complete != NULL) { | |
937 | spin_unlock(hwep->lock); | |
938 | if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && | |
939 | hwreq->req.length) | |
940 | hweptemp = hwep->ci->ep0in; | |
941 | hwreq->req.complete(&hweptemp->ep, &hwreq->req); | |
942 | spin_lock(hwep->lock); | |
0e6ca199 | 943 | } |
d9bb9c18 AL |
944 | } |
945 | ||
ef907482 | 946 | if (retval == -EBUSY) |
0e6ca199 | 947 | retval = 0; |
aa69a809 | 948 | |
aa69a809 DL |
949 | return retval; |
950 | } | |
951 | ||
952 | /** | |
953 | * isr_tr_complete_handler: transaction complete interrupt handler | |
26c696c6 | 954 | * @ci: UDC descriptor |
aa69a809 DL |
955 | * |
956 | * This function handles traffic events | |
957 | */ | |
26c696c6 RZ |
958 | static void isr_tr_complete_handler(struct ci13xxx *ci) |
959 | __releases(ci->lock) | |
960 | __acquires(ci->lock) | |
aa69a809 DL |
961 | { |
962 | unsigned i; | |
541cace8 | 963 | u8 tmode = 0; |
aa69a809 | 964 | |
26c696c6 | 965 | for (i = 0; i < ci->hw_ep_max; i++) { |
2dbc5c4c | 966 | struct ci13xxx_ep *hwep = &ci->ci13xxx_ep[i]; |
4c5212b7 | 967 | int type, num, dir, err = -EINVAL; |
aa69a809 DL |
968 | struct usb_ctrlrequest req; |
969 | ||
2dbc5c4c | 970 | if (hwep->ep.desc == NULL) |
aa69a809 DL |
971 | continue; /* not configured */ |
972 | ||
26c696c6 | 973 | if (hw_test_and_clear_complete(ci, i)) { |
2dbc5c4c AS |
974 | err = isr_tr_complete_low(hwep); |
975 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { | |
aa69a809 | 976 | if (err > 0) /* needs status phase */ |
26c696c6 | 977 | err = isr_setup_status_phase(ci); |
aa69a809 | 978 | if (err < 0) { |
26c696c6 | 979 | spin_unlock(&ci->lock); |
2dbc5c4c | 980 | if (usb_ep_set_halt(&hwep->ep)) |
26c696c6 | 981 | dev_err(ci->dev, |
0917ba84 | 982 | "error: ep_set_halt\n"); |
26c696c6 | 983 | spin_lock(&ci->lock); |
aa69a809 DL |
984 | } |
985 | } | |
986 | } | |
987 | ||
2dbc5c4c | 988 | if (hwep->type != USB_ENDPOINT_XFER_CONTROL || |
26c696c6 | 989 | !hw_test_and_clear_setup_status(ci, i)) |
aa69a809 DL |
990 | continue; |
991 | ||
992 | if (i != 0) { | |
26c696c6 | 993 | dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i); |
aa69a809 DL |
994 | continue; |
995 | } | |
996 | ||
ca9cfea0 PK |
997 | /* |
998 | * Flush data and handshake transactions of previous | |
999 | * setup packet. | |
1000 | */ | |
26c696c6 RZ |
1001 | _ep_nuke(ci->ep0out); |
1002 | _ep_nuke(ci->ep0in); | |
ca9cfea0 | 1003 | |
aa69a809 DL |
1004 | /* read_setup_packet */ |
1005 | do { | |
26c696c6 | 1006 | hw_test_and_set_setup_guard(ci); |
2dbc5c4c | 1007 | memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); |
26c696c6 | 1008 | } while (!hw_test_and_clear_setup_guard(ci)); |
aa69a809 DL |
1009 | |
1010 | type = req.bRequestType; | |
1011 | ||
26c696c6 | 1012 | ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; |
aa69a809 | 1013 | |
aa69a809 DL |
1014 | switch (req.bRequest) { |
1015 | case USB_REQ_CLEAR_FEATURE: | |
e2b61c1d PK |
1016 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && |
1017 | le16_to_cpu(req.wValue) == | |
1018 | USB_ENDPOINT_HALT) { | |
1019 | if (req.wLength != 0) | |
1020 | break; | |
1021 | num = le16_to_cpu(req.wIndex); | |
4c5212b7 | 1022 | dir = num & USB_ENDPOINT_DIR_MASK; |
e2b61c1d | 1023 | num &= USB_ENDPOINT_NUMBER_MASK; |
4c5212b7 | 1024 | if (dir) /* TX */ |
26c696c6 RZ |
1025 | num += ci->hw_ep_max/2; |
1026 | if (!ci->ci13xxx_ep[num].wedge) { | |
1027 | spin_unlock(&ci->lock); | |
e2b61c1d | 1028 | err = usb_ep_clear_halt( |
26c696c6 RZ |
1029 | &ci->ci13xxx_ep[num].ep); |
1030 | spin_lock(&ci->lock); | |
e2b61c1d PK |
1031 | if (err) |
1032 | break; | |
1033 | } | |
26c696c6 | 1034 | err = isr_setup_status_phase(ci); |
e2b61c1d PK |
1035 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && |
1036 | le16_to_cpu(req.wValue) == | |
1037 | USB_DEVICE_REMOTE_WAKEUP) { | |
1038 | if (req.wLength != 0) | |
aa69a809 | 1039 | break; |
26c696c6 RZ |
1040 | ci->remote_wakeup = 0; |
1041 | err = isr_setup_status_phase(ci); | |
e2b61c1d PK |
1042 | } else { |
1043 | goto delegate; | |
aa69a809 | 1044 | } |
aa69a809 DL |
1045 | break; |
1046 | case USB_REQ_GET_STATUS: | |
1047 | if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && | |
1048 | type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && | |
1049 | type != (USB_DIR_IN|USB_RECIP_INTERFACE)) | |
1050 | goto delegate; | |
1051 | if (le16_to_cpu(req.wLength) != 2 || | |
1052 | le16_to_cpu(req.wValue) != 0) | |
1053 | break; | |
26c696c6 | 1054 | err = isr_get_status_response(ci, &req); |
aa69a809 DL |
1055 | break; |
1056 | case USB_REQ_SET_ADDRESS: | |
1057 | if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) | |
1058 | goto delegate; | |
1059 | if (le16_to_cpu(req.wLength) != 0 || | |
1060 | le16_to_cpu(req.wIndex) != 0) | |
1061 | break; | |
26c696c6 RZ |
1062 | ci->address = (u8)le16_to_cpu(req.wValue); |
1063 | ci->setaddr = true; | |
1064 | err = isr_setup_status_phase(ci); | |
aa69a809 DL |
1065 | break; |
1066 | case USB_REQ_SET_FEATURE: | |
e2b61c1d PK |
1067 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && |
1068 | le16_to_cpu(req.wValue) == | |
1069 | USB_ENDPOINT_HALT) { | |
1070 | if (req.wLength != 0) | |
1071 | break; | |
1072 | num = le16_to_cpu(req.wIndex); | |
4c5212b7 | 1073 | dir = num & USB_ENDPOINT_DIR_MASK; |
e2b61c1d | 1074 | num &= USB_ENDPOINT_NUMBER_MASK; |
4c5212b7 | 1075 | if (dir) /* TX */ |
26c696c6 | 1076 | num += ci->hw_ep_max/2; |
aa69a809 | 1077 | |
26c696c6 RZ |
1078 | spin_unlock(&ci->lock); |
1079 | err = usb_ep_set_halt(&ci->ci13xxx_ep[num].ep); | |
1080 | spin_lock(&ci->lock); | |
e2b61c1d | 1081 | if (!err) |
26c696c6 | 1082 | isr_setup_status_phase(ci); |
541cace8 | 1083 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { |
e2b61c1d PK |
1084 | if (req.wLength != 0) |
1085 | break; | |
541cace8 PK |
1086 | switch (le16_to_cpu(req.wValue)) { |
1087 | case USB_DEVICE_REMOTE_WAKEUP: | |
26c696c6 RZ |
1088 | ci->remote_wakeup = 1; |
1089 | err = isr_setup_status_phase(ci); | |
541cace8 PK |
1090 | break; |
1091 | case USB_DEVICE_TEST_MODE: | |
1092 | tmode = le16_to_cpu(req.wIndex) >> 8; | |
1093 | switch (tmode) { | |
1094 | case TEST_J: | |
1095 | case TEST_K: | |
1096 | case TEST_SE0_NAK: | |
1097 | case TEST_PACKET: | |
1098 | case TEST_FORCE_EN: | |
26c696c6 | 1099 | ci->test_mode = tmode; |
541cace8 | 1100 | err = isr_setup_status_phase( |
26c696c6 | 1101 | ci); |
541cace8 PK |
1102 | break; |
1103 | default: | |
1104 | break; | |
1105 | } | |
1106 | default: | |
1107 | goto delegate; | |
1108 | } | |
e2b61c1d PK |
1109 | } else { |
1110 | goto delegate; | |
1111 | } | |
aa69a809 DL |
1112 | break; |
1113 | default: | |
1114 | delegate: | |
1115 | if (req.wLength == 0) /* no data phase */ | |
26c696c6 | 1116 | ci->ep0_dir = TX; |
aa69a809 | 1117 | |
26c696c6 RZ |
1118 | spin_unlock(&ci->lock); |
1119 | err = ci->driver->setup(&ci->gadget, &req); | |
1120 | spin_lock(&ci->lock); | |
aa69a809 DL |
1121 | break; |
1122 | } | |
1123 | ||
1124 | if (err < 0) { | |
26c696c6 | 1125 | spin_unlock(&ci->lock); |
2dbc5c4c | 1126 | if (usb_ep_set_halt(&hwep->ep)) |
26c696c6 RZ |
1127 | dev_err(ci->dev, "error: ep_set_halt\n"); |
1128 | spin_lock(&ci->lock); | |
aa69a809 DL |
1129 | } |
1130 | } | |
1131 | } | |
1132 | ||
1133 | /****************************************************************************** | |
1134 | * ENDPT block | |
1135 | *****************************************************************************/ | |
1136 | /** | |
1137 | * ep_enable: configure endpoint, making it usable | |
1138 | * | |
1139 | * Check usb_ep_enable() at "usb_gadget.h" for details | |
1140 | */ | |
1141 | static int ep_enable(struct usb_ep *ep, | |
1142 | const struct usb_endpoint_descriptor *desc) | |
1143 | { | |
2dbc5c4c | 1144 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
ca9cfea0 | 1145 | int retval = 0; |
aa69a809 | 1146 | unsigned long flags; |
1cd12a9c | 1147 | u32 cap = 0; |
aa69a809 | 1148 | |
aa69a809 DL |
1149 | if (ep == NULL || desc == NULL) |
1150 | return -EINVAL; | |
1151 | ||
2dbc5c4c | 1152 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1153 | |
1154 | /* only internal SW should enable ctrl endpts */ | |
1155 | ||
2dbc5c4c | 1156 | hwep->ep.desc = desc; |
aa69a809 | 1157 | |
2dbc5c4c AS |
1158 | if (!list_empty(&hwep->qh.queue)) |
1159 | dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); | |
aa69a809 | 1160 | |
2dbc5c4c AS |
1161 | hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; |
1162 | hwep->num = usb_endpoint_num(desc); | |
1163 | hwep->type = usb_endpoint_type(desc); | |
aa69a809 | 1164 | |
2dbc5c4c AS |
1165 | hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; |
1166 | hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); | |
aa69a809 | 1167 | |
2dbc5c4c | 1168 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1cd12a9c | 1169 | cap |= QH_IOS; |
2dbc5c4c | 1170 | if (hwep->num) |
776ffc16 | 1171 | cap |= QH_ZLT; |
2dbc5c4c | 1172 | cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; |
1cd12a9c | 1173 | |
2dbc5c4c | 1174 | hwep->qh.ptr->cap = cpu_to_le32(cap); |
1cd12a9c | 1175 | |
2dbc5c4c | 1176 | hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ |
aa69a809 | 1177 | |
ac1aa6a2 A |
1178 | /* |
1179 | * Enable endpoints in the HW other than ep0 as ep0 | |
1180 | * is always enabled | |
1181 | */ | |
2dbc5c4c AS |
1182 | if (hwep->num) |
1183 | retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, | |
1184 | hwep->type); | |
aa69a809 | 1185 | |
2dbc5c4c | 1186 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1187 | return retval; |
1188 | } | |
1189 | ||
1190 | /** | |
1191 | * ep_disable: endpoint is no longer usable | |
1192 | * | |
1193 | * Check usb_ep_disable() at "usb_gadget.h" for details | |
1194 | */ | |
1195 | static int ep_disable(struct usb_ep *ep) | |
1196 | { | |
2dbc5c4c | 1197 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
aa69a809 DL |
1198 | int direction, retval = 0; |
1199 | unsigned long flags; | |
1200 | ||
aa69a809 DL |
1201 | if (ep == NULL) |
1202 | return -EINVAL; | |
2dbc5c4c | 1203 | else if (hwep->ep.desc == NULL) |
aa69a809 DL |
1204 | return -EBUSY; |
1205 | ||
2dbc5c4c | 1206 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1207 | |
1208 | /* only internal SW should disable ctrl endpts */ | |
1209 | ||
2dbc5c4c | 1210 | direction = hwep->dir; |
aa69a809 | 1211 | do { |
2dbc5c4c AS |
1212 | retval |= _ep_nuke(hwep); |
1213 | retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); | |
aa69a809 | 1214 | |
2dbc5c4c AS |
1215 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1216 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1217 | |
2dbc5c4c | 1218 | } while (hwep->dir != direction); |
aa69a809 | 1219 | |
2dbc5c4c | 1220 | hwep->ep.desc = NULL; |
aa69a809 | 1221 | |
2dbc5c4c | 1222 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1223 | return retval; |
1224 | } | |
1225 | ||
1226 | /** | |
1227 | * ep_alloc_request: allocate a request object to use with this endpoint | |
1228 | * | |
1229 | * Check usb_ep_alloc_request() at "usb_gadget.h" for details | |
1230 | */ | |
1231 | static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) | |
1232 | { | |
2dbc5c4c | 1233 | struct ci13xxx_req *hwreq = NULL; |
aa69a809 | 1234 | |
0f089094 | 1235 | if (ep == NULL) |
aa69a809 | 1236 | return NULL; |
aa69a809 | 1237 | |
2dbc5c4c AS |
1238 | hwreq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags); |
1239 | if (hwreq != NULL) { | |
1240 | INIT_LIST_HEAD(&hwreq->queue); | |
1241 | INIT_LIST_HEAD(&hwreq->tds); | |
aa69a809 DL |
1242 | } |
1243 | ||
2dbc5c4c | 1244 | return (hwreq == NULL) ? NULL : &hwreq->req; |
aa69a809 DL |
1245 | } |
1246 | ||
1247 | /** | |
1248 | * ep_free_request: frees a request object | |
1249 | * | |
1250 | * Check usb_ep_free_request() at "usb_gadget.h" for details | |
1251 | */ | |
1252 | static void ep_free_request(struct usb_ep *ep, struct usb_request *req) | |
1253 | { | |
2dbc5c4c AS |
1254 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
1255 | struct ci13xxx_req *hwreq = container_of(req, struct ci13xxx_req, req); | |
2e270412 | 1256 | struct td_node *node, *tmpnode; |
aa69a809 DL |
1257 | unsigned long flags; |
1258 | ||
aa69a809 | 1259 | if (ep == NULL || req == NULL) { |
aa69a809 | 1260 | return; |
2dbc5c4c AS |
1261 | } else if (!list_empty(&hwreq->queue)) { |
1262 | dev_err(hwep->ci->dev, "freeing queued request\n"); | |
aa69a809 DL |
1263 | return; |
1264 | } | |
1265 | ||
2dbc5c4c | 1266 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1267 | |
2dbc5c4c AS |
1268 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1269 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
1270 | list_del_init(&node->td); |
1271 | node->ptr = NULL; | |
1272 | kfree(node); | |
1273 | } | |
cc9e6c49 | 1274 | |
2dbc5c4c | 1275 | kfree(hwreq); |
aa69a809 | 1276 | |
2dbc5c4c | 1277 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1278 | } |
1279 | ||
1280 | /** | |
1281 | * ep_queue: queues (submits) an I/O request to an endpoint | |
1282 | * | |
1283 | * Check usb_ep_queue()* at usb_gadget.h" for details | |
1284 | */ | |
1285 | static int ep_queue(struct usb_ep *ep, struct usb_request *req, | |
1286 | gfp_t __maybe_unused gfp_flags) | |
1287 | { | |
2dbc5c4c | 1288 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
aa69a809 DL |
1289 | int retval = 0; |
1290 | unsigned long flags; | |
1291 | ||
2dbc5c4c | 1292 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1293 | return -EINVAL; |
1294 | ||
2dbc5c4c | 1295 | spin_lock_irqsave(hwep->lock, flags); |
dd064e9d | 1296 | retval = _ep_queue(ep, req, gfp_flags); |
2dbc5c4c | 1297 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1298 | return retval; |
1299 | } | |
1300 | ||
1301 | /** | |
1302 | * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint | |
1303 | * | |
1304 | * Check usb_ep_dequeue() at "usb_gadget.h" for details | |
1305 | */ | |
1306 | static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) | |
1307 | { | |
2dbc5c4c AS |
1308 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
1309 | struct ci13xxx_req *hwreq = container_of(req, struct ci13xxx_req, req); | |
aa69a809 DL |
1310 | unsigned long flags; |
1311 | ||
2dbc5c4c AS |
1312 | if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || |
1313 | hwep->ep.desc == NULL || list_empty(&hwreq->queue) || | |
1314 | list_empty(&hwep->qh.queue)) | |
aa69a809 DL |
1315 | return -EINVAL; |
1316 | ||
2dbc5c4c | 1317 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1318 | |
2dbc5c4c | 1319 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 DL |
1320 | |
1321 | /* pop request */ | |
2dbc5c4c | 1322 | list_del_init(&hwreq->queue); |
5e0aa49e | 1323 | |
2dbc5c4c | 1324 | usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); |
5e0aa49e | 1325 | |
aa69a809 DL |
1326 | req->status = -ECONNRESET; |
1327 | ||
2dbc5c4c AS |
1328 | if (hwreq->req.complete != NULL) { |
1329 | spin_unlock(hwep->lock); | |
1330 | hwreq->req.complete(&hwep->ep, &hwreq->req); | |
1331 | spin_lock(hwep->lock); | |
aa69a809 DL |
1332 | } |
1333 | ||
2dbc5c4c | 1334 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1335 | return 0; |
1336 | } | |
1337 | ||
1338 | /** | |
1339 | * ep_set_halt: sets the endpoint halt feature | |
1340 | * | |
1341 | * Check usb_ep_set_halt() at "usb_gadget.h" for details | |
1342 | */ | |
1343 | static int ep_set_halt(struct usb_ep *ep, int value) | |
1344 | { | |
2dbc5c4c | 1345 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
aa69a809 DL |
1346 | int direction, retval = 0; |
1347 | unsigned long flags; | |
1348 | ||
2dbc5c4c | 1349 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1350 | return -EINVAL; |
1351 | ||
2dbc5c4c | 1352 | if (usb_endpoint_xfer_isoc(hwep->ep.desc)) |
e4ce4ecd MG |
1353 | return -EOPNOTSUPP; |
1354 | ||
2dbc5c4c | 1355 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1356 | |
1357 | #ifndef STALL_IN | |
1358 | /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */ | |
2dbc5c4c AS |
1359 | if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX && |
1360 | !list_empty(&hwep->qh.queue)) { | |
1361 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1362 | return -EAGAIN; |
1363 | } | |
1364 | #endif | |
1365 | ||
2dbc5c4c | 1366 | direction = hwep->dir; |
aa69a809 | 1367 | do { |
2dbc5c4c | 1368 | retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); |
aa69a809 DL |
1369 | |
1370 | if (!value) | |
2dbc5c4c | 1371 | hwep->wedge = 0; |
aa69a809 | 1372 | |
2dbc5c4c AS |
1373 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1374 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1375 | |
2dbc5c4c | 1376 | } while (hwep->dir != direction); |
aa69a809 | 1377 | |
2dbc5c4c | 1378 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1379 | return retval; |
1380 | } | |
1381 | ||
1382 | /** | |
1383 | * ep_set_wedge: sets the halt feature and ignores clear requests | |
1384 | * | |
1385 | * Check usb_ep_set_wedge() at "usb_gadget.h" for details | |
1386 | */ | |
1387 | static int ep_set_wedge(struct usb_ep *ep) | |
1388 | { | |
2dbc5c4c | 1389 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
aa69a809 DL |
1390 | unsigned long flags; |
1391 | ||
2dbc5c4c | 1392 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1393 | return -EINVAL; |
1394 | ||
2dbc5c4c AS |
1395 | spin_lock_irqsave(hwep->lock, flags); |
1396 | hwep->wedge = 1; | |
1397 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1398 | |
1399 | return usb_ep_set_halt(ep); | |
1400 | } | |
1401 | ||
1402 | /** | |
1403 | * ep_fifo_flush: flushes contents of a fifo | |
1404 | * | |
1405 | * Check usb_ep_fifo_flush() at "usb_gadget.h" for details | |
1406 | */ | |
1407 | static void ep_fifo_flush(struct usb_ep *ep) | |
1408 | { | |
2dbc5c4c | 1409 | struct ci13xxx_ep *hwep = container_of(ep, struct ci13xxx_ep, ep); |
aa69a809 DL |
1410 | unsigned long flags; |
1411 | ||
aa69a809 | 1412 | if (ep == NULL) { |
2dbc5c4c | 1413 | dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); |
aa69a809 DL |
1414 | return; |
1415 | } | |
1416 | ||
2dbc5c4c | 1417 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1418 | |
2dbc5c4c | 1419 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1420 | |
2dbc5c4c | 1421 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1422 | } |
1423 | ||
1424 | /** | |
1425 | * Endpoint-specific part of the API to the USB controller hardware | |
1426 | * Check "usb_gadget.h" for details | |
1427 | */ | |
1428 | static const struct usb_ep_ops usb_ep_ops = { | |
1429 | .enable = ep_enable, | |
1430 | .disable = ep_disable, | |
1431 | .alloc_request = ep_alloc_request, | |
1432 | .free_request = ep_free_request, | |
1433 | .queue = ep_queue, | |
1434 | .dequeue = ep_dequeue, | |
1435 | .set_halt = ep_set_halt, | |
1436 | .set_wedge = ep_set_wedge, | |
1437 | .fifo_flush = ep_fifo_flush, | |
1438 | }; | |
1439 | ||
1440 | /****************************************************************************** | |
1441 | * GADGET block | |
1442 | *****************************************************************************/ | |
f01ef574 PK |
1443 | static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active) |
1444 | { | |
26c696c6 | 1445 | struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget); |
f01ef574 PK |
1446 | unsigned long flags; |
1447 | int gadget_ready = 0; | |
1448 | ||
26c696c6 | 1449 | if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS)) |
f01ef574 PK |
1450 | return -EOPNOTSUPP; |
1451 | ||
26c696c6 RZ |
1452 | spin_lock_irqsave(&ci->lock, flags); |
1453 | ci->vbus_active = is_active; | |
1454 | if (ci->driver) | |
f01ef574 | 1455 | gadget_ready = 1; |
26c696c6 | 1456 | spin_unlock_irqrestore(&ci->lock, flags); |
f01ef574 PK |
1457 | |
1458 | if (gadget_ready) { | |
1459 | if (is_active) { | |
c036019e | 1460 | pm_runtime_get_sync(&_gadget->dev); |
26c696c6 RZ |
1461 | hw_device_reset(ci, USBMODE_CM_DC); |
1462 | hw_device_state(ci, ci->ep0out->qh.dma); | |
f01ef574 | 1463 | } else { |
26c696c6 RZ |
1464 | hw_device_state(ci, 0); |
1465 | if (ci->platdata->notify_event) | |
1466 | ci->platdata->notify_event(ci, | |
f01ef574 | 1467 | CI13XXX_CONTROLLER_STOPPED_EVENT); |
26c696c6 | 1468 | _gadget_stop_activity(&ci->gadget); |
c036019e | 1469 | pm_runtime_put_sync(&_gadget->dev); |
f01ef574 PK |
1470 | } |
1471 | } | |
1472 | ||
1473 | return 0; | |
1474 | } | |
1475 | ||
e2b61c1d PK |
1476 | static int ci13xxx_wakeup(struct usb_gadget *_gadget) |
1477 | { | |
26c696c6 | 1478 | struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget); |
e2b61c1d PK |
1479 | unsigned long flags; |
1480 | int ret = 0; | |
1481 | ||
26c696c6 RZ |
1482 | spin_lock_irqsave(&ci->lock, flags); |
1483 | if (!ci->remote_wakeup) { | |
e2b61c1d | 1484 | ret = -EOPNOTSUPP; |
e2b61c1d PK |
1485 | goto out; |
1486 | } | |
26c696c6 | 1487 | if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { |
e2b61c1d | 1488 | ret = -EINVAL; |
e2b61c1d PK |
1489 | goto out; |
1490 | } | |
26c696c6 | 1491 | hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); |
e2b61c1d | 1492 | out: |
26c696c6 | 1493 | spin_unlock_irqrestore(&ci->lock, flags); |
e2b61c1d PK |
1494 | return ret; |
1495 | } | |
1496 | ||
2dbc5c4c | 1497 | static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned ma) |
d860852e | 1498 | { |
26c696c6 | 1499 | struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget); |
d860852e | 1500 | |
26c696c6 | 1501 | if (ci->transceiver) |
2dbc5c4c | 1502 | return usb_phy_set_power(ci->transceiver, ma); |
d860852e PK |
1503 | return -ENOTSUPP; |
1504 | } | |
1505 | ||
c0a48e6c MG |
1506 | /* Change Data+ pullup status |
1507 | * this func is used by usb_gadget_connect/disconnet | |
1508 | */ | |
1509 | static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_on) | |
1510 | { | |
1511 | struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget); | |
1512 | ||
1513 | if (is_on) | |
1514 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); | |
1515 | else | |
1516 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); | |
1517 | ||
1518 | return 0; | |
1519 | } | |
1520 | ||
1f339d84 AS |
1521 | static int ci13xxx_start(struct usb_gadget *gadget, |
1522 | struct usb_gadget_driver *driver); | |
1523 | static int ci13xxx_stop(struct usb_gadget *gadget, | |
1524 | struct usb_gadget_driver *driver); | |
aa69a809 DL |
1525 | /** |
1526 | * Device operations part of the API to the USB controller hardware, | |
1527 | * which don't involve endpoints (or i/o) | |
1528 | * Check "usb_gadget.h" for details | |
1529 | */ | |
f01ef574 PK |
1530 | static const struct usb_gadget_ops usb_gadget_ops = { |
1531 | .vbus_session = ci13xxx_vbus_session, | |
e2b61c1d | 1532 | .wakeup = ci13xxx_wakeup, |
c0a48e6c | 1533 | .pullup = ci13xxx_pullup, |
d860852e | 1534 | .vbus_draw = ci13xxx_vbus_draw, |
1f339d84 AS |
1535 | .udc_start = ci13xxx_start, |
1536 | .udc_stop = ci13xxx_stop, | |
f01ef574 | 1537 | }; |
aa69a809 | 1538 | |
26c696c6 | 1539 | static int init_eps(struct ci13xxx *ci) |
aa69a809 | 1540 | { |
790c2d52 | 1541 | int retval = 0, i, j; |
aa69a809 | 1542 | |
26c696c6 | 1543 | for (i = 0; i < ci->hw_ep_max/2; i++) |
ca9cfea0 | 1544 | for (j = RX; j <= TX; j++) { |
26c696c6 | 1545 | int k = i + j * ci->hw_ep_max/2; |
2dbc5c4c | 1546 | struct ci13xxx_ep *hwep = &ci->ci13xxx_ep[k]; |
aa69a809 | 1547 | |
2dbc5c4c | 1548 | scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, |
ca9cfea0 | 1549 | (j == TX) ? "in" : "out"); |
aa69a809 | 1550 | |
2dbc5c4c AS |
1551 | hwep->ci = ci; |
1552 | hwep->lock = &ci->lock; | |
1553 | hwep->td_pool = ci->td_pool; | |
aa69a809 | 1554 | |
2dbc5c4c AS |
1555 | hwep->ep.name = hwep->name; |
1556 | hwep->ep.ops = &usb_ep_ops; | |
7f67c38b MG |
1557 | /* |
1558 | * for ep0: maxP defined in desc, for other | |
1559 | * eps, maxP is set by epautoconfig() called | |
1560 | * by gadget layer | |
1561 | */ | |
2dbc5c4c | 1562 | hwep->ep.maxpacket = (unsigned short)~0; |
aa69a809 | 1563 | |
2dbc5c4c AS |
1564 | INIT_LIST_HEAD(&hwep->qh.queue); |
1565 | hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, | |
1566 | &hwep->qh.dma); | |
1567 | if (hwep->qh.ptr == NULL) | |
aa69a809 DL |
1568 | retval = -ENOMEM; |
1569 | else | |
2dbc5c4c | 1570 | memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); |
ca9cfea0 | 1571 | |
d36ade60 AS |
1572 | /* |
1573 | * set up shorthands for ep0 out and in endpoints, | |
1574 | * don't add to gadget's ep_list | |
1575 | */ | |
1576 | if (i == 0) { | |
1577 | if (j == RX) | |
2dbc5c4c | 1578 | ci->ep0out = hwep; |
d36ade60 | 1579 | else |
2dbc5c4c | 1580 | ci->ep0in = hwep; |
d36ade60 | 1581 | |
2dbc5c4c | 1582 | hwep->ep.maxpacket = CTRL_PAYLOAD_MAX; |
ca9cfea0 | 1583 | continue; |
d36ade60 | 1584 | } |
ca9cfea0 | 1585 | |
2dbc5c4c | 1586 | list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); |
ca9cfea0 | 1587 | } |
790c2d52 AS |
1588 | |
1589 | return retval; | |
1590 | } | |
1591 | ||
ad6b1b97 MKB |
1592 | static void destroy_eps(struct ci13xxx *ci) |
1593 | { | |
1594 | int i; | |
1595 | ||
1596 | for (i = 0; i < ci->hw_ep_max; i++) { | |
2dbc5c4c | 1597 | struct ci13xxx_ep *hwep = &ci->ci13xxx_ep[i]; |
ad6b1b97 | 1598 | |
2dbc5c4c | 1599 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
ad6b1b97 MKB |
1600 | } |
1601 | } | |
1602 | ||
790c2d52 AS |
1603 | /** |
1604 | * ci13xxx_start: register a gadget driver | |
1f339d84 | 1605 | * @gadget: our gadget |
790c2d52 | 1606 | * @driver: the driver being registered |
790c2d52 | 1607 | * |
790c2d52 AS |
1608 | * Interrupts are enabled here. |
1609 | */ | |
1f339d84 AS |
1610 | static int ci13xxx_start(struct usb_gadget *gadget, |
1611 | struct usb_gadget_driver *driver) | |
790c2d52 | 1612 | { |
26c696c6 | 1613 | struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget); |
790c2d52 | 1614 | unsigned long flags; |
790c2d52 AS |
1615 | int retval = -ENOMEM; |
1616 | ||
1f339d84 | 1617 | if (driver->disconnect == NULL) |
790c2d52 | 1618 | return -EINVAL; |
790c2d52 | 1619 | |
790c2d52 | 1620 | |
26c696c6 RZ |
1621 | ci->ep0out->ep.desc = &ctrl_endpt_out_desc; |
1622 | retval = usb_ep_enable(&ci->ep0out->ep); | |
ac1aa6a2 A |
1623 | if (retval) |
1624 | return retval; | |
877c1f54 | 1625 | |
26c696c6 RZ |
1626 | ci->ep0in->ep.desc = &ctrl_endpt_in_desc; |
1627 | retval = usb_ep_enable(&ci->ep0in->ep); | |
ac1aa6a2 A |
1628 | if (retval) |
1629 | return retval; | |
26c696c6 RZ |
1630 | spin_lock_irqsave(&ci->lock, flags); |
1631 | ||
1632 | ci->driver = driver; | |
1633 | pm_runtime_get_sync(&ci->gadget.dev); | |
1634 | if (ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) { | |
1635 | if (ci->vbus_active) { | |
571bb7ab | 1636 | if (ci->platdata->flags & CI13XXX_REGS_SHARED) |
26c696c6 | 1637 | hw_device_reset(ci, USBMODE_CM_DC); |
f01ef574 | 1638 | } else { |
26c696c6 | 1639 | pm_runtime_put_sync(&ci->gadget.dev); |
f01ef574 PK |
1640 | goto done; |
1641 | } | |
1642 | } | |
1643 | ||
26c696c6 | 1644 | retval = hw_device_state(ci, ci->ep0out->qh.dma); |
c036019e | 1645 | if (retval) |
26c696c6 | 1646 | pm_runtime_put_sync(&ci->gadget.dev); |
aa69a809 DL |
1647 | |
1648 | done: | |
26c696c6 | 1649 | spin_unlock_irqrestore(&ci->lock, flags); |
aa69a809 DL |
1650 | return retval; |
1651 | } | |
aa69a809 DL |
1652 | |
1653 | /** | |
0f91349b | 1654 | * ci13xxx_stop: unregister a gadget driver |
aa69a809 | 1655 | */ |
1f339d84 AS |
1656 | static int ci13xxx_stop(struct usb_gadget *gadget, |
1657 | struct usb_gadget_driver *driver) | |
aa69a809 | 1658 | { |
26c696c6 | 1659 | struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget); |
1f339d84 | 1660 | unsigned long flags; |
aa69a809 | 1661 | |
26c696c6 | 1662 | spin_lock_irqsave(&ci->lock, flags); |
aa69a809 | 1663 | |
26c696c6 RZ |
1664 | if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) || |
1665 | ci->vbus_active) { | |
1666 | hw_device_state(ci, 0); | |
1667 | if (ci->platdata->notify_event) | |
1668 | ci->platdata->notify_event(ci, | |
f01ef574 | 1669 | CI13XXX_CONTROLLER_STOPPED_EVENT); |
26c696c6 RZ |
1670 | ci->driver = NULL; |
1671 | spin_unlock_irqrestore(&ci->lock, flags); | |
1672 | _gadget_stop_activity(&ci->gadget); | |
1673 | spin_lock_irqsave(&ci->lock, flags); | |
1674 | pm_runtime_put(&ci->gadget.dev); | |
f01ef574 | 1675 | } |
aa69a809 | 1676 | |
26c696c6 | 1677 | spin_unlock_irqrestore(&ci->lock, flags); |
aa69a809 | 1678 | |
aa69a809 DL |
1679 | return 0; |
1680 | } | |
aa69a809 DL |
1681 | |
1682 | /****************************************************************************** | |
1683 | * BUS block | |
1684 | *****************************************************************************/ | |
1685 | /** | |
26c696c6 | 1686 | * udc_irq: ci interrupt handler |
aa69a809 DL |
1687 | * |
1688 | * This function returns IRQ_HANDLED if the IRQ has been handled | |
1689 | * It locks access to registers | |
1690 | */ | |
26c696c6 | 1691 | static irqreturn_t udc_irq(struct ci13xxx *ci) |
aa69a809 | 1692 | { |
aa69a809 DL |
1693 | irqreturn_t retval; |
1694 | u32 intr; | |
1695 | ||
26c696c6 | 1696 | if (ci == NULL) |
aa69a809 | 1697 | return IRQ_HANDLED; |
aa69a809 | 1698 | |
26c696c6 | 1699 | spin_lock(&ci->lock); |
f01ef574 | 1700 | |
26c696c6 RZ |
1701 | if (ci->platdata->flags & CI13XXX_REGS_SHARED) { |
1702 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != | |
758fc986 | 1703 | USBMODE_CM_DC) { |
26c696c6 | 1704 | spin_unlock(&ci->lock); |
f01ef574 PK |
1705 | return IRQ_NONE; |
1706 | } | |
1707 | } | |
26c696c6 | 1708 | intr = hw_test_and_clear_intr_active(ci); |
aa69a809 | 1709 | |
e443b333 | 1710 | if (intr) { |
aa69a809 | 1711 | /* order defines priority - do NOT change it */ |
e443b333 | 1712 | if (USBi_URI & intr) |
26c696c6 | 1713 | isr_reset_handler(ci); |
e443b333 | 1714 | |
aa69a809 | 1715 | if (USBi_PCI & intr) { |
26c696c6 | 1716 | ci->gadget.speed = hw_port_is_high_speed(ci) ? |
aa69a809 | 1717 | USB_SPEED_HIGH : USB_SPEED_FULL; |
26c696c6 RZ |
1718 | if (ci->suspended && ci->driver->resume) { |
1719 | spin_unlock(&ci->lock); | |
1720 | ci->driver->resume(&ci->gadget); | |
1721 | spin_lock(&ci->lock); | |
1722 | ci->suspended = 0; | |
e2b61c1d | 1723 | } |
aa69a809 | 1724 | } |
e443b333 AS |
1725 | |
1726 | if (USBi_UI & intr) | |
26c696c6 | 1727 | isr_tr_complete_handler(ci); |
e443b333 | 1728 | |
e2b61c1d | 1729 | if (USBi_SLI & intr) { |
26c696c6 RZ |
1730 | if (ci->gadget.speed != USB_SPEED_UNKNOWN && |
1731 | ci->driver->suspend) { | |
1732 | ci->suspended = 1; | |
1733 | spin_unlock(&ci->lock); | |
1734 | ci->driver->suspend(&ci->gadget); | |
1735 | spin_lock(&ci->lock); | |
e2b61c1d | 1736 | } |
e2b61c1d | 1737 | } |
aa69a809 DL |
1738 | retval = IRQ_HANDLED; |
1739 | } else { | |
aa69a809 DL |
1740 | retval = IRQ_NONE; |
1741 | } | |
26c696c6 | 1742 | spin_unlock(&ci->lock); |
aa69a809 DL |
1743 | |
1744 | return retval; | |
1745 | } | |
1746 | ||
aa69a809 | 1747 | /** |
5f36e231 | 1748 | * udc_start: initialize gadget role |
26c696c6 | 1749 | * @ci: chipidea controller |
aa69a809 | 1750 | */ |
26c696c6 | 1751 | static int udc_start(struct ci13xxx *ci) |
aa69a809 | 1752 | { |
26c696c6 | 1753 | struct device *dev = ci->dev; |
aa69a809 DL |
1754 | int retval = 0; |
1755 | ||
26c696c6 | 1756 | spin_lock_init(&ci->lock); |
aa69a809 | 1757 | |
26c696c6 RZ |
1758 | ci->gadget.ops = &usb_gadget_ops; |
1759 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
1760 | ci->gadget.max_speed = USB_SPEED_HIGH; | |
1761 | ci->gadget.is_otg = 0; | |
1762 | ci->gadget.name = ci->platdata->name; | |
aa69a809 | 1763 | |
26c696c6 | 1764 | INIT_LIST_HEAD(&ci->gadget.ep_list); |
aa69a809 | 1765 | |
790c2d52 | 1766 | /* alloc resources */ |
26c696c6 | 1767 | ci->qh_pool = dma_pool_create("ci13xxx_qh", dev, |
790c2d52 AS |
1768 | sizeof(struct ci13xxx_qh), |
1769 | 64, CI13XXX_PAGE_SIZE); | |
26c696c6 | 1770 | if (ci->qh_pool == NULL) |
5f36e231 | 1771 | return -ENOMEM; |
790c2d52 | 1772 | |
26c696c6 | 1773 | ci->td_pool = dma_pool_create("ci13xxx_td", dev, |
790c2d52 AS |
1774 | sizeof(struct ci13xxx_td), |
1775 | 64, CI13XXX_PAGE_SIZE); | |
26c696c6 | 1776 | if (ci->td_pool == NULL) { |
790c2d52 AS |
1777 | retval = -ENOMEM; |
1778 | goto free_qh_pool; | |
1779 | } | |
1780 | ||
26c696c6 | 1781 | retval = init_eps(ci); |
790c2d52 AS |
1782 | if (retval) |
1783 | goto free_pools; | |
1784 | ||
26c696c6 | 1785 | ci->gadget.ep0 = &ci->ep0in->ep; |
f01ef574 | 1786 | |
d343f4e8 | 1787 | if (ci->global_phy) { |
a2c3d690 | 1788 | ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2); |
d343f4e8 AS |
1789 | if (IS_ERR(ci->transceiver)) |
1790 | ci->transceiver = NULL; | |
1791 | } | |
f01ef574 | 1792 | |
26c696c6 RZ |
1793 | if (ci->platdata->flags & CI13XXX_REQUIRE_TRANSCEIVER) { |
1794 | if (ci->transceiver == NULL) { | |
f01ef574 | 1795 | retval = -ENODEV; |
ad6b1b97 | 1796 | goto destroy_eps; |
f01ef574 PK |
1797 | } |
1798 | } | |
1799 | ||
26c696c6 RZ |
1800 | if (!(ci->platdata->flags & CI13XXX_REGS_SHARED)) { |
1801 | retval = hw_device_reset(ci, USBMODE_CM_DC); | |
f01ef574 PK |
1802 | if (retval) |
1803 | goto put_transceiver; | |
1804 | } | |
1805 | ||
d343f4e8 | 1806 | if (ci->transceiver) { |
26c696c6 RZ |
1807 | retval = otg_set_peripheral(ci->transceiver->otg, |
1808 | &ci->gadget); | |
f01ef574 | 1809 | if (retval) |
64dc9e2e | 1810 | goto put_transceiver; |
aa69a809 | 1811 | } |
0f91349b | 1812 | |
26c696c6 | 1813 | retval = usb_add_gadget_udc(dev, &ci->gadget); |
0f91349b SAS |
1814 | if (retval) |
1815 | goto remove_trans; | |
1816 | ||
26c696c6 RZ |
1817 | pm_runtime_no_callbacks(&ci->gadget.dev); |
1818 | pm_runtime_enable(&ci->gadget.dev); | |
aa69a809 | 1819 | |
aa69a809 DL |
1820 | return retval; |
1821 | ||
0f91349b | 1822 | remove_trans: |
d343f4e8 | 1823 | if (ci->transceiver) { |
c9d1f947 | 1824 | otg_set_peripheral(ci->transceiver->otg, NULL); |
a2c3d690 RZ |
1825 | if (ci->global_phy) |
1826 | usb_put_phy(ci->transceiver); | |
0f91349b SAS |
1827 | } |
1828 | ||
0917ba84 | 1829 | dev_err(dev, "error = %i\n", retval); |
f01ef574 | 1830 | put_transceiver: |
d343f4e8 | 1831 | if (ci->transceiver && ci->global_phy) |
26c696c6 | 1832 | usb_put_phy(ci->transceiver); |
ad6b1b97 MKB |
1833 | destroy_eps: |
1834 | destroy_eps(ci); | |
790c2d52 | 1835 | free_pools: |
26c696c6 | 1836 | dma_pool_destroy(ci->td_pool); |
790c2d52 | 1837 | free_qh_pool: |
26c696c6 | 1838 | dma_pool_destroy(ci->qh_pool); |
aa69a809 DL |
1839 | return retval; |
1840 | } | |
1841 | ||
1842 | /** | |
1843 | * udc_remove: parent remove must call this to remove UDC | |
1844 | * | |
1845 | * No interrupts active, the IRQ has been released | |
1846 | */ | |
26c696c6 | 1847 | static void udc_stop(struct ci13xxx *ci) |
aa69a809 | 1848 | { |
26c696c6 | 1849 | if (ci == NULL) |
aa69a809 | 1850 | return; |
0f089094 | 1851 | |
26c696c6 | 1852 | usb_del_gadget_udc(&ci->gadget); |
aa69a809 | 1853 | |
ad6b1b97 | 1854 | destroy_eps(ci); |
790c2d52 | 1855 | |
26c696c6 RZ |
1856 | dma_pool_destroy(ci->td_pool); |
1857 | dma_pool_destroy(ci->qh_pool); | |
790c2d52 | 1858 | |
d343f4e8 | 1859 | if (ci->transceiver) { |
26c696c6 | 1860 | otg_set_peripheral(ci->transceiver->otg, NULL); |
a2c3d690 RZ |
1861 | if (ci->global_phy) |
1862 | usb_put_phy(ci->transceiver); | |
f01ef574 | 1863 | } |
5f36e231 | 1864 | /* my kobject is dynamic, I swear! */ |
26c696c6 | 1865 | memset(&ci->gadget, 0, sizeof(ci->gadget)); |
5f36e231 AS |
1866 | } |
1867 | ||
1868 | /** | |
1869 | * ci_hdrc_gadget_init - initialize device related bits | |
1870 | * ci: the controller | |
1871 | * | |
1872 | * This function enables the gadget role, if the device is "device capable". | |
1873 | */ | |
1874 | int ci_hdrc_gadget_init(struct ci13xxx *ci) | |
1875 | { | |
1876 | struct ci_role_driver *rdrv; | |
1877 | ||
1878 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) | |
1879 | return -ENXIO; | |
1880 | ||
1881 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); | |
1882 | if (!rdrv) | |
1883 | return -ENOMEM; | |
1884 | ||
1885 | rdrv->start = udc_start; | |
1886 | rdrv->stop = udc_stop; | |
1887 | rdrv->irq = udc_irq; | |
1888 | rdrv->name = "gadget"; | |
1889 | ci->roles[CI_ROLE_GADGET] = rdrv; | |
aa69a809 | 1890 | |
5f36e231 | 1891 | return 0; |
aa69a809 | 1892 | } |