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Commit | Line | Data |
---|---|---|
aa69a809 | 1 | /* |
eb70e5ab | 2 | * udc.c - ChipIdea UDC driver |
aa69a809 DL |
3 | * |
4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | |
5 | * | |
6 | * Author: David Lopo | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
36825a2d | 13 | #include <linux/delay.h> |
aa69a809 DL |
14 | #include <linux/device.h> |
15 | #include <linux/dmapool.h> | |
ded017ee | 16 | #include <linux/err.h> |
5b08319f | 17 | #include <linux/irqreturn.h> |
aa69a809 | 18 | #include <linux/kernel.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c036019e | 20 | #include <linux/pm_runtime.h> |
aa69a809 DL |
21 | #include <linux/usb/ch9.h> |
22 | #include <linux/usb/gadget.h> | |
95f5555f | 23 | #include <linux/usb/otg-fsm.h> |
e443b333 | 24 | #include <linux/usb/chipidea.h> |
aa69a809 | 25 | |
e443b333 AS |
26 | #include "ci.h" |
27 | #include "udc.h" | |
28 | #include "bits.h" | |
29 | #include "debug.h" | |
3f124d23 | 30 | #include "otg.h" |
4dcf720c | 31 | #include "otg_fsm.h" |
954aad8c | 32 | |
aa69a809 DL |
33 | /* control endpoint description */ |
34 | static const struct usb_endpoint_descriptor | |
ca9cfea0 | 35 | ctrl_endpt_out_desc = { |
aa69a809 DL |
36 | .bLength = USB_DT_ENDPOINT_SIZE, |
37 | .bDescriptorType = USB_DT_ENDPOINT, | |
38 | ||
ca9cfea0 PK |
39 | .bEndpointAddress = USB_DIR_OUT, |
40 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
41 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
42 | }; | |
43 | ||
44 | static const struct usb_endpoint_descriptor | |
45 | ctrl_endpt_in_desc = { | |
46 | .bLength = USB_DT_ENDPOINT_SIZE, | |
47 | .bDescriptorType = USB_DT_ENDPOINT, | |
48 | ||
49 | .bEndpointAddress = USB_DIR_IN, | |
aa69a809 DL |
50 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
51 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
52 | }; | |
53 | ||
aa69a809 DL |
54 | /** |
55 | * hw_ep_bit: calculates the bit number | |
56 | * @num: endpoint number | |
57 | * @dir: endpoint direction | |
58 | * | |
59 | * This function returns bit number | |
60 | */ | |
61 | static inline int hw_ep_bit(int num, int dir) | |
62 | { | |
63 | return num + (dir ? 16 : 0); | |
64 | } | |
65 | ||
8e22978c | 66 | static inline int ep_to_bit(struct ci_hdrc *ci, int n) |
dd39c358 | 67 | { |
26c696c6 | 68 | int fill = 16 - ci->hw_ep_max / 2; |
dd39c358 | 69 | |
26c696c6 | 70 | if (n >= ci->hw_ep_max / 2) |
dd39c358 MKB |
71 | n += fill; |
72 | ||
73 | return n; | |
74 | } | |
75 | ||
aa69a809 | 76 | /** |
c0a48e6c | 77 | * hw_device_state: enables/disables interrupts (execute without interruption) |
aa69a809 DL |
78 | * @dma: 0 => disable, !0 => enable and set dma engine |
79 | * | |
80 | * This function returns an error code | |
81 | */ | |
8e22978c | 82 | static int hw_device_state(struct ci_hdrc *ci, u32 dma) |
aa69a809 DL |
83 | { |
84 | if (dma) { | |
26c696c6 | 85 | hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); |
aa69a809 | 86 | /* interrupt, error, port change, reset, sleep/suspend */ |
26c696c6 | 87 | hw_write(ci, OP_USBINTR, ~0, |
aa69a809 | 88 | USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); |
a107f8c5 | 89 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); |
aa69a809 | 90 | } else { |
26c696c6 | 91 | hw_write(ci, OP_USBINTR, ~0, 0); |
a107f8c5 | 92 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); |
aa69a809 DL |
93 | } |
94 | return 0; | |
95 | } | |
96 | ||
97 | /** | |
98 | * hw_ep_flush: flush endpoint fifo (execute without interruption) | |
99 | * @num: endpoint number | |
100 | * @dir: endpoint direction | |
101 | * | |
102 | * This function returns an error code | |
103 | */ | |
8e22978c | 104 | static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
105 | { |
106 | int n = hw_ep_bit(num, dir); | |
107 | ||
108 | do { | |
109 | /* flush any pending transfer */ | |
5bf5dbed | 110 | hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); |
26c696c6 | 111 | while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) |
aa69a809 | 112 | cpu_relax(); |
26c696c6 | 113 | } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); |
aa69a809 DL |
114 | |
115 | return 0; | |
116 | } | |
117 | ||
118 | /** | |
119 | * hw_ep_disable: disables endpoint (execute without interruption) | |
120 | * @num: endpoint number | |
121 | * @dir: endpoint direction | |
122 | * | |
123 | * This function returns an error code | |
124 | */ | |
8e22978c | 125 | static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) |
aa69a809 | 126 | { |
26c696c6 RZ |
127 | hw_ep_flush(ci, num, dir); |
128 | hw_write(ci, OP_ENDPTCTRL + num, | |
d3595d13 | 129 | dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); |
aa69a809 DL |
130 | return 0; |
131 | } | |
132 | ||
133 | /** | |
134 | * hw_ep_enable: enables endpoint (execute without interruption) | |
135 | * @num: endpoint number | |
136 | * @dir: endpoint direction | |
137 | * @type: endpoint type | |
138 | * | |
139 | * This function returns an error code | |
140 | */ | |
8e22978c | 141 | static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) |
aa69a809 DL |
142 | { |
143 | u32 mask, data; | |
144 | ||
145 | if (dir) { | |
146 | mask = ENDPTCTRL_TXT; /* type */ | |
727b4ddb | 147 | data = type << __ffs(mask); |
aa69a809 DL |
148 | |
149 | mask |= ENDPTCTRL_TXS; /* unstall */ | |
150 | mask |= ENDPTCTRL_TXR; /* reset data toggle */ | |
151 | data |= ENDPTCTRL_TXR; | |
152 | mask |= ENDPTCTRL_TXE; /* enable */ | |
153 | data |= ENDPTCTRL_TXE; | |
154 | } else { | |
155 | mask = ENDPTCTRL_RXT; /* type */ | |
727b4ddb | 156 | data = type << __ffs(mask); |
aa69a809 DL |
157 | |
158 | mask |= ENDPTCTRL_RXS; /* unstall */ | |
159 | mask |= ENDPTCTRL_RXR; /* reset data toggle */ | |
160 | data |= ENDPTCTRL_RXR; | |
161 | mask |= ENDPTCTRL_RXE; /* enable */ | |
162 | data |= ENDPTCTRL_RXE; | |
163 | } | |
26c696c6 | 164 | hw_write(ci, OP_ENDPTCTRL + num, mask, data); |
aa69a809 DL |
165 | return 0; |
166 | } | |
167 | ||
168 | /** | |
169 | * hw_ep_get_halt: return endpoint halt status | |
170 | * @num: endpoint number | |
171 | * @dir: endpoint direction | |
172 | * | |
173 | * This function returns 1 if endpoint halted | |
174 | */ | |
8e22978c | 175 | static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
176 | { |
177 | u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; | |
178 | ||
26c696c6 | 179 | return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; |
aa69a809 DL |
180 | } |
181 | ||
aa69a809 DL |
182 | /** |
183 | * hw_ep_prime: primes endpoint (execute without interruption) | |
184 | * @num: endpoint number | |
185 | * @dir: endpoint direction | |
186 | * @is_ctrl: true if control endpoint | |
187 | * | |
188 | * This function returns an error code | |
189 | */ | |
8e22978c | 190 | static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) |
aa69a809 DL |
191 | { |
192 | int n = hw_ep_bit(num, dir); | |
193 | ||
26c696c6 | 194 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
195 | return -EAGAIN; |
196 | ||
5bf5dbed | 197 | hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); |
aa69a809 | 198 | |
26c696c6 | 199 | while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
aa69a809 | 200 | cpu_relax(); |
26c696c6 | 201 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
202 | return -EAGAIN; |
203 | ||
204 | /* status shoult be tested according with manual but it doesn't work */ | |
205 | return 0; | |
206 | } | |
207 | ||
208 | /** | |
209 | * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute | |
210 | * without interruption) | |
211 | * @num: endpoint number | |
212 | * @dir: endpoint direction | |
213 | * @value: true => stall, false => unstall | |
214 | * | |
215 | * This function returns an error code | |
216 | */ | |
8e22978c | 217 | static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) |
aa69a809 DL |
218 | { |
219 | if (value != 0 && value != 1) | |
220 | return -EINVAL; | |
221 | ||
222 | do { | |
8e22978c | 223 | enum ci_hw_regs reg = OP_ENDPTCTRL + num; |
aa69a809 DL |
224 | u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
225 | u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; | |
226 | ||
227 | /* data toggle - reserved for EP0 but it's in ESS */ | |
26c696c6 | 228 | hw_write(ci, reg, mask_xs|mask_xr, |
262c1632 | 229 | value ? mask_xs : mask_xr); |
26c696c6 | 230 | } while (value != hw_ep_get_halt(ci, num, dir)); |
aa69a809 DL |
231 | |
232 | return 0; | |
233 | } | |
234 | ||
aa69a809 DL |
235 | /** |
236 | * hw_is_port_high_speed: test if port is high speed | |
237 | * | |
238 | * This function returns true if high speed port | |
239 | */ | |
8e22978c | 240 | static int hw_port_is_high_speed(struct ci_hdrc *ci) |
aa69a809 | 241 | { |
26c696c6 RZ |
242 | return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : |
243 | hw_read(ci, OP_PORTSC, PORTSC_HSP); | |
aa69a809 DL |
244 | } |
245 | ||
aa69a809 DL |
246 | /** |
247 | * hw_test_and_clear_complete: test & clear complete status (execute without | |
248 | * interruption) | |
dd39c358 | 249 | * @n: endpoint number |
aa69a809 DL |
250 | * |
251 | * This function returns complete status | |
252 | */ | |
8e22978c | 253 | static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) |
aa69a809 | 254 | { |
26c696c6 RZ |
255 | n = ep_to_bit(ci, n); |
256 | return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); | |
aa69a809 DL |
257 | } |
258 | ||
259 | /** | |
260 | * hw_test_and_clear_intr_active: test & clear active interrupts (execute | |
261 | * without interruption) | |
262 | * | |
263 | * This function returns active interrutps | |
264 | */ | |
8e22978c | 265 | static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) |
aa69a809 | 266 | { |
26c696c6 | 267 | u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); |
aa69a809 | 268 | |
26c696c6 | 269 | hw_write(ci, OP_USBSTS, ~0, reg); |
aa69a809 DL |
270 | return reg; |
271 | } | |
272 | ||
273 | /** | |
274 | * hw_test_and_clear_setup_guard: test & clear setup guard (execute without | |
275 | * interruption) | |
276 | * | |
277 | * This function returns guard value | |
278 | */ | |
8e22978c | 279 | static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 280 | { |
26c696c6 | 281 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); |
aa69a809 DL |
282 | } |
283 | ||
284 | /** | |
285 | * hw_test_and_set_setup_guard: test & set setup guard (execute without | |
286 | * interruption) | |
287 | * | |
288 | * This function returns guard value | |
289 | */ | |
8e22978c | 290 | static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 291 | { |
26c696c6 | 292 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); |
aa69a809 DL |
293 | } |
294 | ||
295 | /** | |
296 | * hw_usb_set_address: configures USB address (execute without interruption) | |
297 | * @value: new USB address | |
298 | * | |
ef15e549 AS |
299 | * This function explicitly sets the address, without the "USBADRA" (advance) |
300 | * feature, which is not supported by older versions of the controller. | |
aa69a809 | 301 | */ |
8e22978c | 302 | static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) |
aa69a809 | 303 | { |
26c696c6 | 304 | hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, |
727b4ddb | 305 | value << __ffs(DEVICEADDR_USBADR)); |
aa69a809 DL |
306 | } |
307 | ||
308 | /** | |
309 | * hw_usb_reset: restart device after a bus reset (execute without | |
310 | * interruption) | |
311 | * | |
312 | * This function returns an error code | |
313 | */ | |
8e22978c | 314 | static int hw_usb_reset(struct ci_hdrc *ci) |
aa69a809 | 315 | { |
26c696c6 | 316 | hw_usb_set_address(ci, 0); |
aa69a809 DL |
317 | |
318 | /* ESS flushes only at end?!? */ | |
26c696c6 | 319 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
aa69a809 DL |
320 | |
321 | /* clear setup token semaphores */ | |
26c696c6 | 322 | hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); |
aa69a809 DL |
323 | |
324 | /* clear complete status */ | |
26c696c6 | 325 | hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); |
aa69a809 DL |
326 | |
327 | /* wait until all bits cleared */ | |
26c696c6 | 328 | while (hw_read(ci, OP_ENDPTPRIME, ~0)) |
aa69a809 DL |
329 | udelay(10); /* not RTOS friendly */ |
330 | ||
331 | /* reset all endpoints ? */ | |
332 | ||
333 | /* reset internal status and wait for further instructions | |
334 | no need to verify the port reset status (ESS does it) */ | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
aa69a809 DL |
339 | /****************************************************************************** |
340 | * UTIL block | |
341 | *****************************************************************************/ | |
cc9e6c49 | 342 | |
8e22978c | 343 | static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, |
cc9e6c49 MG |
344 | unsigned length) |
345 | { | |
2e270412 MG |
346 | int i; |
347 | u32 temp; | |
cc9e6c49 MG |
348 | struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), |
349 | GFP_ATOMIC); | |
350 | ||
351 | if (node == NULL) | |
352 | return -ENOMEM; | |
353 | ||
2dbc5c4c | 354 | node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC, |
cc9e6c49 MG |
355 | &node->dma); |
356 | if (node->ptr == NULL) { | |
357 | kfree(node); | |
358 | return -ENOMEM; | |
359 | } | |
360 | ||
8e22978c | 361 | memset(node->ptr, 0, sizeof(struct ci_hw_td)); |
2e270412 MG |
362 | node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); |
363 | node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); | |
364 | node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); | |
2fc5a7da PC |
365 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { |
366 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; | |
367 | ||
368 | if (hwreq->req.length == 0 | |
369 | || hwreq->req.length % hwep->ep.maxpacket) | |
370 | mul++; | |
371 | node->ptr->token |= mul << __ffs(TD_MULTO); | |
372 | } | |
2e270412 | 373 | |
2dbc5c4c | 374 | temp = (u32) (hwreq->req.dma + hwreq->req.actual); |
2e270412 MG |
375 | if (length) { |
376 | node->ptr->page[0] = cpu_to_le32(temp); | |
377 | for (i = 1; i < TD_PAGE_COUNT; i++) { | |
8e22978c | 378 | u32 page = temp + i * CI_HDRC_PAGE_SIZE; |
2e270412 MG |
379 | page &= ~TD_RESERVED_MASK; |
380 | node->ptr->page[i] = cpu_to_le32(page); | |
381 | } | |
382 | } | |
383 | ||
2dbc5c4c | 384 | hwreq->req.actual += length; |
cc9e6c49 | 385 | |
2dbc5c4c | 386 | if (!list_empty(&hwreq->tds)) { |
cc9e6c49 | 387 | /* get the last entry */ |
2dbc5c4c | 388 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
389 | struct td_node, td); |
390 | lastnode->ptr->next = cpu_to_le32(node->dma); | |
391 | } | |
392 | ||
393 | INIT_LIST_HEAD(&node->td); | |
2dbc5c4c | 394 | list_add_tail(&node->td, &hwreq->tds); |
cc9e6c49 MG |
395 | |
396 | return 0; | |
397 | } | |
398 | ||
aa69a809 DL |
399 | /** |
400 | * _usb_addr: calculates endpoint address from direction & number | |
401 | * @ep: endpoint | |
402 | */ | |
8e22978c | 403 | static inline u8 _usb_addr(struct ci_hw_ep *ep) |
aa69a809 DL |
404 | { |
405 | return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; | |
406 | } | |
407 | ||
408 | /** | |
409 | * _hardware_queue: configures a request at hardware level | |
410 | * @gadget: gadget | |
2dbc5c4c | 411 | * @hwep: endpoint |
aa69a809 DL |
412 | * |
413 | * This function returns an error code | |
414 | */ | |
8e22978c | 415 | static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 416 | { |
8e22978c | 417 | struct ci_hdrc *ci = hwep->ci; |
0e6ca199 | 418 | int ret = 0; |
2dbc5c4c | 419 | unsigned rest = hwreq->req.length; |
2e270412 | 420 | int pages = TD_PAGE_COUNT; |
cc9e6c49 | 421 | struct td_node *firstnode, *lastnode; |
aa69a809 | 422 | |
aa69a809 | 423 | /* don't queue twice */ |
2dbc5c4c | 424 | if (hwreq->req.status == -EALREADY) |
aa69a809 DL |
425 | return -EALREADY; |
426 | ||
2dbc5c4c | 427 | hwreq->req.status = -EALREADY; |
aa69a809 | 428 | |
2dbc5c4c | 429 | ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); |
5e0aa49e AS |
430 | if (ret) |
431 | return ret; | |
432 | ||
2e270412 MG |
433 | /* |
434 | * The first buffer could be not page aligned. | |
435 | * In that case we have to span into one extra td. | |
436 | */ | |
2dbc5c4c | 437 | if (hwreq->req.dma % PAGE_SIZE) |
2e270412 | 438 | pages--; |
cc9e6c49 | 439 | |
2e270412 | 440 | if (rest == 0) |
2dbc5c4c | 441 | add_td_to_list(hwep, hwreq, 0); |
cc9e6c49 | 442 | |
2e270412 | 443 | while (rest > 0) { |
2dbc5c4c | 444 | unsigned count = min(hwreq->req.length - hwreq->req.actual, |
8e22978c | 445 | (unsigned)(pages * CI_HDRC_PAGE_SIZE)); |
2dbc5c4c | 446 | add_td_to_list(hwep, hwreq, count); |
2e270412 | 447 | rest -= count; |
0e6ca199 | 448 | } |
aa69a809 | 449 | |
2dbc5c4c AS |
450 | if (hwreq->req.zero && hwreq->req.length |
451 | && (hwreq->req.length % hwep->ep.maxpacket == 0)) | |
452 | add_td_to_list(hwep, hwreq, 0); | |
cc9e6c49 | 453 | |
2dbc5c4c | 454 | firstnode = list_first_entry(&hwreq->tds, struct td_node, td); |
2e270412 | 455 | |
2dbc5c4c | 456 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
457 | struct td_node, td); |
458 | ||
459 | lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); | |
2dbc5c4c | 460 | if (!hwreq->req.no_interrupt) |
cc9e6c49 | 461 | lastnode->ptr->token |= cpu_to_le32(TD_IOC); |
a9c17430 MG |
462 | wmb(); |
463 | ||
2dbc5c4c AS |
464 | hwreq->req.actual = 0; |
465 | if (!list_empty(&hwep->qh.queue)) { | |
8e22978c | 466 | struct ci_hw_req *hwreqprev; |
2dbc5c4c | 467 | int n = hw_ep_bit(hwep->num, hwep->dir); |
0e6ca199 | 468 | int tmp_stat; |
cc9e6c49 MG |
469 | struct td_node *prevlastnode; |
470 | u32 next = firstnode->dma & TD_ADDR_MASK; | |
0e6ca199 | 471 | |
2dbc5c4c | 472 | hwreqprev = list_entry(hwep->qh.queue.prev, |
8e22978c | 473 | struct ci_hw_req, queue); |
2dbc5c4c | 474 | prevlastnode = list_entry(hwreqprev->tds.prev, |
cc9e6c49 MG |
475 | struct td_node, td); |
476 | ||
477 | prevlastnode->ptr->next = cpu_to_le32(next); | |
0e6ca199 | 478 | wmb(); |
26c696c6 | 479 | if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
0e6ca199 PK |
480 | goto done; |
481 | do { | |
26c696c6 RZ |
482 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); |
483 | tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); | |
484 | } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); | |
485 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); | |
0e6ca199 PK |
486 | if (tmp_stat) |
487 | goto done; | |
488 | } | |
489 | ||
490 | /* QH configuration */ | |
2dbc5c4c AS |
491 | hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); |
492 | hwep->qh.ptr->td.token &= | |
080ff5f4 | 493 | cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); |
aa69a809 | 494 | |
2fc5a7da | 495 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { |
2dbc5c4c | 496 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; |
e4ce4ecd | 497 | |
2fc5a7da PC |
498 | if (hwreq->req.length == 0 |
499 | || hwreq->req.length % hwep->ep.maxpacket) | |
e4ce4ecd | 500 | mul++; |
2dbc5c4c | 501 | hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); |
e4ce4ecd MG |
502 | } |
503 | ||
aa69a809 DL |
504 | wmb(); /* synchronize before ep prime */ |
505 | ||
2dbc5c4c AS |
506 | ret = hw_ep_prime(ci, hwep->num, hwep->dir, |
507 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
0e6ca199 PK |
508 | done: |
509 | return ret; | |
aa69a809 DL |
510 | } |
511 | ||
2e270412 MG |
512 | /* |
513 | * free_pending_td: remove a pending request for the endpoint | |
2dbc5c4c | 514 | * @hwep: endpoint |
2e270412 | 515 | */ |
8e22978c | 516 | static void free_pending_td(struct ci_hw_ep *hwep) |
2e270412 | 517 | { |
2dbc5c4c | 518 | struct td_node *pending = hwep->pending_td; |
2e270412 | 519 | |
2dbc5c4c AS |
520 | dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); |
521 | hwep->pending_td = NULL; | |
2e270412 MG |
522 | kfree(pending); |
523 | } | |
524 | ||
aa69a809 DL |
525 | /** |
526 | * _hardware_dequeue: handles a request at hardware level | |
527 | * @gadget: gadget | |
2dbc5c4c | 528 | * @hwep: endpoint |
aa69a809 DL |
529 | * |
530 | * This function returns an error code | |
531 | */ | |
8e22978c | 532 | static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 533 | { |
cc9e6c49 | 534 | u32 tmptoken; |
2e270412 MG |
535 | struct td_node *node, *tmpnode; |
536 | unsigned remaining_length; | |
2dbc5c4c | 537 | unsigned actual = hwreq->req.length; |
9e506438 | 538 | |
2dbc5c4c | 539 | if (hwreq->req.status != -EALREADY) |
aa69a809 DL |
540 | return -EINVAL; |
541 | ||
2dbc5c4c | 542 | hwreq->req.status = 0; |
0e6ca199 | 543 | |
2dbc5c4c | 544 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
cc9e6c49 | 545 | tmptoken = le32_to_cpu(node->ptr->token); |
2e270412 | 546 | if ((TD_STATUS_ACTIVE & tmptoken) != 0) { |
2dbc5c4c | 547 | hwreq->req.status = -EALREADY; |
0e6ca199 | 548 | return -EBUSY; |
cc9e6c49 | 549 | } |
aa69a809 | 550 | |
2e270412 MG |
551 | remaining_length = (tmptoken & TD_TOTAL_BYTES); |
552 | remaining_length >>= __ffs(TD_TOTAL_BYTES); | |
553 | actual -= remaining_length; | |
554 | ||
2dbc5c4c AS |
555 | hwreq->req.status = tmptoken & TD_STATUS; |
556 | if ((TD_STATUS_HALTED & hwreq->req.status)) { | |
557 | hwreq->req.status = -EPIPE; | |
2e270412 | 558 | break; |
2dbc5c4c AS |
559 | } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { |
560 | hwreq->req.status = -EPROTO; | |
2e270412 | 561 | break; |
2dbc5c4c AS |
562 | } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { |
563 | hwreq->req.status = -EILSEQ; | |
2e270412 MG |
564 | break; |
565 | } | |
566 | ||
567 | if (remaining_length) { | |
2dbc5c4c AS |
568 | if (hwep->dir) { |
569 | hwreq->req.status = -EPROTO; | |
2e270412 MG |
570 | break; |
571 | } | |
572 | } | |
573 | /* | |
574 | * As the hardware could still address the freed td | |
575 | * which will run the udc unusable, the cleanup of the | |
576 | * td has to be delayed by one. | |
577 | */ | |
2dbc5c4c AS |
578 | if (hwep->pending_td) |
579 | free_pending_td(hwep); | |
2e270412 | 580 | |
2dbc5c4c | 581 | hwep->pending_td = node; |
2e270412 MG |
582 | list_del_init(&node->td); |
583 | } | |
aa69a809 | 584 | |
2dbc5c4c | 585 | usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); |
aa69a809 | 586 | |
2dbc5c4c | 587 | hwreq->req.actual += actual; |
aa69a809 | 588 | |
2dbc5c4c AS |
589 | if (hwreq->req.status) |
590 | return hwreq->req.status; | |
aa69a809 | 591 | |
2dbc5c4c | 592 | return hwreq->req.actual; |
aa69a809 DL |
593 | } |
594 | ||
595 | /** | |
596 | * _ep_nuke: dequeues all endpoint requests | |
2dbc5c4c | 597 | * @hwep: endpoint |
aa69a809 DL |
598 | * |
599 | * This function returns an error code | |
600 | * Caller must hold lock | |
601 | */ | |
8e22978c | 602 | static int _ep_nuke(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
603 | __releases(hwep->lock) |
604 | __acquires(hwep->lock) | |
aa69a809 | 605 | { |
2e270412 | 606 | struct td_node *node, *tmpnode; |
2dbc5c4c | 607 | if (hwep == NULL) |
aa69a809 DL |
608 | return -EINVAL; |
609 | ||
2dbc5c4c | 610 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 611 | |
2dbc5c4c | 612 | while (!list_empty(&hwep->qh.queue)) { |
aa69a809 DL |
613 | |
614 | /* pop oldest request */ | |
8e22978c AS |
615 | struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, |
616 | struct ci_hw_req, queue); | |
7ca2cd29 | 617 | |
2dbc5c4c AS |
618 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
619 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
620 | list_del_init(&node->td); |
621 | node->ptr = NULL; | |
622 | kfree(node); | |
7ca2cd29 MG |
623 | } |
624 | ||
2dbc5c4c AS |
625 | list_del_init(&hwreq->queue); |
626 | hwreq->req.status = -ESHUTDOWN; | |
aa69a809 | 627 | |
2dbc5c4c AS |
628 | if (hwreq->req.complete != NULL) { |
629 | spin_unlock(hwep->lock); | |
304f7e5e | 630 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
2dbc5c4c | 631 | spin_lock(hwep->lock); |
aa69a809 DL |
632 | } |
633 | } | |
2e270412 | 634 | |
2dbc5c4c AS |
635 | if (hwep->pending_td) |
636 | free_pending_td(hwep); | |
2e270412 | 637 | |
aa69a809 DL |
638 | return 0; |
639 | } | |
640 | ||
641 | /** | |
642 | * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts | |
643 | * @gadget: gadget | |
644 | * | |
645 | * This function returns an error code | |
aa69a809 DL |
646 | */ |
647 | static int _gadget_stop_activity(struct usb_gadget *gadget) | |
aa69a809 DL |
648 | { |
649 | struct usb_ep *ep; | |
8e22978c | 650 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
e2b61c1d | 651 | unsigned long flags; |
aa69a809 | 652 | |
26c696c6 RZ |
653 | spin_lock_irqsave(&ci->lock, flags); |
654 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
655 | ci->remote_wakeup = 0; | |
656 | ci->suspended = 0; | |
657 | spin_unlock_irqrestore(&ci->lock, flags); | |
e2b61c1d | 658 | |
aa69a809 DL |
659 | /* flush all endpoints */ |
660 | gadget_for_each_ep(ep, gadget) { | |
661 | usb_ep_fifo_flush(ep); | |
662 | } | |
26c696c6 RZ |
663 | usb_ep_fifo_flush(&ci->ep0out->ep); |
664 | usb_ep_fifo_flush(&ci->ep0in->ep); | |
aa69a809 | 665 | |
aa69a809 DL |
666 | /* make sure to disable all endpoints */ |
667 | gadget_for_each_ep(ep, gadget) { | |
668 | usb_ep_disable(ep); | |
669 | } | |
aa69a809 | 670 | |
26c696c6 RZ |
671 | if (ci->status != NULL) { |
672 | usb_ep_free_request(&ci->ep0in->ep, ci->status); | |
673 | ci->status = NULL; | |
aa69a809 DL |
674 | } |
675 | ||
aa69a809 DL |
676 | return 0; |
677 | } | |
678 | ||
679 | /****************************************************************************** | |
680 | * ISR block | |
681 | *****************************************************************************/ | |
682 | /** | |
683 | * isr_reset_handler: USB reset interrupt handler | |
26c696c6 | 684 | * @ci: UDC device |
aa69a809 DL |
685 | * |
686 | * This function resets USB engine after a bus reset occurred | |
687 | */ | |
8e22978c | 688 | static void isr_reset_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
689 | __releases(ci->lock) |
690 | __acquires(ci->lock) | |
aa69a809 | 691 | { |
aa69a809 DL |
692 | int retval; |
693 | ||
a3aee368 | 694 | spin_unlock(&ci->lock); |
afbe4775 PC |
695 | if (ci->gadget.speed != USB_SPEED_UNKNOWN) |
696 | usb_gadget_udc_reset(&ci->gadget, ci->driver); | |
92b336d7 | 697 | |
26c696c6 | 698 | retval = _gadget_stop_activity(&ci->gadget); |
aa69a809 DL |
699 | if (retval) |
700 | goto done; | |
701 | ||
26c696c6 | 702 | retval = hw_usb_reset(ci); |
aa69a809 DL |
703 | if (retval) |
704 | goto done; | |
705 | ||
26c696c6 RZ |
706 | ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); |
707 | if (ci->status == NULL) | |
ac1aa6a2 | 708 | retval = -ENOMEM; |
ca9cfea0 | 709 | |
b9322252 | 710 | done: |
26c696c6 | 711 | spin_lock(&ci->lock); |
aa69a809 | 712 | |
aa69a809 | 713 | if (retval) |
26c696c6 | 714 | dev_err(ci->dev, "error: %i\n", retval); |
aa69a809 DL |
715 | } |
716 | ||
717 | /** | |
718 | * isr_get_status_complete: get_status request complete function | |
719 | * @ep: endpoint | |
720 | * @req: request handled | |
721 | * | |
722 | * Caller must release lock | |
723 | */ | |
724 | static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) | |
725 | { | |
0f089094 | 726 | if (ep == NULL || req == NULL) |
aa69a809 | 727 | return; |
aa69a809 DL |
728 | |
729 | kfree(req->buf); | |
730 | usb_ep_free_request(ep, req); | |
731 | } | |
732 | ||
dd064e9d MG |
733 | /** |
734 | * _ep_queue: queues (submits) an I/O request to an endpoint | |
735 | * | |
736 | * Caller must hold lock | |
737 | */ | |
738 | static int _ep_queue(struct usb_ep *ep, struct usb_request *req, | |
739 | gfp_t __maybe_unused gfp_flags) | |
740 | { | |
8e22978c AS |
741 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
742 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
743 | struct ci_hdrc *ci = hwep->ci; | |
dd064e9d MG |
744 | int retval = 0; |
745 | ||
2dbc5c4c | 746 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
dd064e9d MG |
747 | return -EINVAL; |
748 | ||
2dbc5c4c | 749 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
dd064e9d | 750 | if (req->length) |
2dbc5c4c | 751 | hwep = (ci->ep0_dir == RX) ? |
dd064e9d | 752 | ci->ep0out : ci->ep0in; |
2dbc5c4c AS |
753 | if (!list_empty(&hwep->qh.queue)) { |
754 | _ep_nuke(hwep); | |
dd064e9d | 755 | retval = -EOVERFLOW; |
2dbc5c4c AS |
756 | dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", |
757 | _usb_addr(hwep)); | |
dd064e9d MG |
758 | } |
759 | } | |
760 | ||
2dbc5c4c AS |
761 | if (usb_endpoint_xfer_isoc(hwep->ep.desc) && |
762 | hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { | |
763 | dev_err(hwep->ci->dev, "request length too big for isochronous\n"); | |
e4ce4ecd MG |
764 | return -EMSGSIZE; |
765 | } | |
766 | ||
dd064e9d | 767 | /* first nuke then test link, e.g. previous status has not sent */ |
2dbc5c4c AS |
768 | if (!list_empty(&hwreq->queue)) { |
769 | dev_err(hwep->ci->dev, "request already in queue\n"); | |
dd064e9d MG |
770 | return -EBUSY; |
771 | } | |
772 | ||
dd064e9d | 773 | /* push request */ |
2dbc5c4c AS |
774 | hwreq->req.status = -EINPROGRESS; |
775 | hwreq->req.actual = 0; | |
dd064e9d | 776 | |
2dbc5c4c | 777 | retval = _hardware_enqueue(hwep, hwreq); |
dd064e9d MG |
778 | |
779 | if (retval == -EALREADY) | |
780 | retval = 0; | |
781 | if (!retval) | |
2dbc5c4c | 782 | list_add_tail(&hwreq->queue, &hwep->qh.queue); |
dd064e9d MG |
783 | |
784 | return retval; | |
785 | } | |
786 | ||
aa69a809 DL |
787 | /** |
788 | * isr_get_status_response: get_status request response | |
26c696c6 | 789 | * @ci: ci struct |
aa69a809 DL |
790 | * @setup: setup request packet |
791 | * | |
792 | * This function returns an error code | |
793 | */ | |
8e22978c | 794 | static int isr_get_status_response(struct ci_hdrc *ci, |
aa69a809 | 795 | struct usb_ctrlrequest *setup) |
2dbc5c4c AS |
796 | __releases(hwep->lock) |
797 | __acquires(hwep->lock) | |
aa69a809 | 798 | { |
8e22978c | 799 | struct ci_hw_ep *hwep = ci->ep0in; |
aa69a809 DL |
800 | struct usb_request *req = NULL; |
801 | gfp_t gfp_flags = GFP_ATOMIC; | |
802 | int dir, num, retval; | |
803 | ||
2dbc5c4c | 804 | if (hwep == NULL || setup == NULL) |
aa69a809 DL |
805 | return -EINVAL; |
806 | ||
2dbc5c4c AS |
807 | spin_unlock(hwep->lock); |
808 | req = usb_ep_alloc_request(&hwep->ep, gfp_flags); | |
809 | spin_lock(hwep->lock); | |
aa69a809 DL |
810 | if (req == NULL) |
811 | return -ENOMEM; | |
812 | ||
813 | req->complete = isr_get_status_complete; | |
814 | req->length = 2; | |
815 | req->buf = kzalloc(req->length, gfp_flags); | |
816 | if (req->buf == NULL) { | |
817 | retval = -ENOMEM; | |
818 | goto err_free_req; | |
819 | } | |
820 | ||
821 | if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { | |
e2b61c1d | 822 | /* Assume that device is bus powered for now. */ |
26c696c6 | 823 | *(u16 *)req->buf = ci->remote_wakeup << 1; |
aa69a809 DL |
824 | } else if ((setup->bRequestType & USB_RECIP_MASK) \ |
825 | == USB_RECIP_ENDPOINT) { | |
826 | dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? | |
827 | TX : RX; | |
828 | num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
26c696c6 | 829 | *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); |
aa69a809 DL |
830 | } |
831 | /* else do nothing; reserved for future use */ | |
832 | ||
2dbc5c4c | 833 | retval = _ep_queue(&hwep->ep, req, gfp_flags); |
aa69a809 DL |
834 | if (retval) |
835 | goto err_free_buf; | |
836 | ||
837 | return 0; | |
838 | ||
839 | err_free_buf: | |
840 | kfree(req->buf); | |
841 | err_free_req: | |
2dbc5c4c AS |
842 | spin_unlock(hwep->lock); |
843 | usb_ep_free_request(&hwep->ep, req); | |
844 | spin_lock(hwep->lock); | |
aa69a809 DL |
845 | return retval; |
846 | } | |
847 | ||
541cace8 PK |
848 | /** |
849 | * isr_setup_status_complete: setup_status request complete function | |
850 | * @ep: endpoint | |
851 | * @req: request handled | |
852 | * | |
853 | * Caller must release lock. Put the port in test mode if test mode | |
854 | * feature is selected. | |
855 | */ | |
856 | static void | |
857 | isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) | |
858 | { | |
8e22978c | 859 | struct ci_hdrc *ci = req->context; |
541cace8 PK |
860 | unsigned long flags; |
861 | ||
26c696c6 RZ |
862 | if (ci->setaddr) { |
863 | hw_usb_set_address(ci, ci->address); | |
864 | ci->setaddr = false; | |
10775eb1 PC |
865 | if (ci->address) |
866 | usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS); | |
ef15e549 AS |
867 | } |
868 | ||
26c696c6 RZ |
869 | spin_lock_irqsave(&ci->lock, flags); |
870 | if (ci->test_mode) | |
871 | hw_port_test_set(ci, ci->test_mode); | |
872 | spin_unlock_irqrestore(&ci->lock, flags); | |
541cace8 PK |
873 | } |
874 | ||
aa69a809 DL |
875 | /** |
876 | * isr_setup_status_phase: queues the status phase of a setup transation | |
26c696c6 | 877 | * @ci: ci struct |
aa69a809 DL |
878 | * |
879 | * This function returns an error code | |
880 | */ | |
8e22978c | 881 | static int isr_setup_status_phase(struct ci_hdrc *ci) |
aa69a809 DL |
882 | { |
883 | int retval; | |
8e22978c | 884 | struct ci_hw_ep *hwep; |
aa69a809 | 885 | |
2dbc5c4c | 886 | hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; |
26c696c6 RZ |
887 | ci->status->context = ci; |
888 | ci->status->complete = isr_setup_status_complete; | |
aa69a809 | 889 | |
2dbc5c4c | 890 | retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); |
aa69a809 DL |
891 | |
892 | return retval; | |
893 | } | |
894 | ||
895 | /** | |
896 | * isr_tr_complete_low: transaction complete low level handler | |
2dbc5c4c | 897 | * @hwep: endpoint |
aa69a809 DL |
898 | * |
899 | * This function returns an error code | |
900 | * Caller must hold lock | |
901 | */ | |
8e22978c | 902 | static int isr_tr_complete_low(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
903 | __releases(hwep->lock) |
904 | __acquires(hwep->lock) | |
aa69a809 | 905 | { |
8e22978c AS |
906 | struct ci_hw_req *hwreq, *hwreqtemp; |
907 | struct ci_hw_ep *hweptemp = hwep; | |
db89960e | 908 | int retval = 0; |
aa69a809 | 909 | |
2dbc5c4c | 910 | list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, |
0e6ca199 | 911 | queue) { |
2dbc5c4c | 912 | retval = _hardware_dequeue(hwep, hwreq); |
0e6ca199 PK |
913 | if (retval < 0) |
914 | break; | |
2dbc5c4c AS |
915 | list_del_init(&hwreq->queue); |
916 | if (hwreq->req.complete != NULL) { | |
917 | spin_unlock(hwep->lock); | |
918 | if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && | |
919 | hwreq->req.length) | |
920 | hweptemp = hwep->ci->ep0in; | |
304f7e5e | 921 | usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req); |
2dbc5c4c | 922 | spin_lock(hwep->lock); |
0e6ca199 | 923 | } |
d9bb9c18 AL |
924 | } |
925 | ||
ef907482 | 926 | if (retval == -EBUSY) |
0e6ca199 | 927 | retval = 0; |
aa69a809 | 928 | |
aa69a809 DL |
929 | return retval; |
930 | } | |
931 | ||
d7b00e31 PC |
932 | /** |
933 | * isr_setup_packet_handler: setup packet handler | |
934 | * @ci: UDC descriptor | |
935 | * | |
936 | * This function handles setup packet | |
937 | */ | |
938 | static void isr_setup_packet_handler(struct ci_hdrc *ci) | |
939 | __releases(ci->lock) | |
940 | __acquires(ci->lock) | |
941 | { | |
942 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[0]; | |
943 | struct usb_ctrlrequest req; | |
944 | int type, num, dir, err = -EINVAL; | |
945 | u8 tmode = 0; | |
946 | ||
947 | /* | |
948 | * Flush data and handshake transactions of previous | |
949 | * setup packet. | |
950 | */ | |
951 | _ep_nuke(ci->ep0out); | |
952 | _ep_nuke(ci->ep0in); | |
953 | ||
954 | /* read_setup_packet */ | |
955 | do { | |
956 | hw_test_and_set_setup_guard(ci); | |
957 | memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); | |
958 | } while (!hw_test_and_clear_setup_guard(ci)); | |
959 | ||
960 | type = req.bRequestType; | |
961 | ||
962 | ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; | |
963 | ||
964 | switch (req.bRequest) { | |
965 | case USB_REQ_CLEAR_FEATURE: | |
966 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
967 | le16_to_cpu(req.wValue) == | |
968 | USB_ENDPOINT_HALT) { | |
969 | if (req.wLength != 0) | |
970 | break; | |
971 | num = le16_to_cpu(req.wIndex); | |
972 | dir = num & USB_ENDPOINT_DIR_MASK; | |
973 | num &= USB_ENDPOINT_NUMBER_MASK; | |
974 | if (dir) /* TX */ | |
975 | num += ci->hw_ep_max / 2; | |
976 | if (!ci->ci_hw_ep[num].wedge) { | |
977 | spin_unlock(&ci->lock); | |
978 | err = usb_ep_clear_halt( | |
979 | &ci->ci_hw_ep[num].ep); | |
980 | spin_lock(&ci->lock); | |
981 | if (err) | |
982 | break; | |
983 | } | |
984 | err = isr_setup_status_phase(ci); | |
985 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && | |
986 | le16_to_cpu(req.wValue) == | |
987 | USB_DEVICE_REMOTE_WAKEUP) { | |
988 | if (req.wLength != 0) | |
989 | break; | |
990 | ci->remote_wakeup = 0; | |
991 | err = isr_setup_status_phase(ci); | |
992 | } else { | |
993 | goto delegate; | |
994 | } | |
995 | break; | |
996 | case USB_REQ_GET_STATUS: | |
997 | if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && | |
998 | type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && | |
999 | type != (USB_DIR_IN|USB_RECIP_INTERFACE)) | |
1000 | goto delegate; | |
1001 | if (le16_to_cpu(req.wLength) != 2 || | |
1002 | le16_to_cpu(req.wValue) != 0) | |
1003 | break; | |
1004 | err = isr_get_status_response(ci, &req); | |
1005 | break; | |
1006 | case USB_REQ_SET_ADDRESS: | |
1007 | if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) | |
1008 | goto delegate; | |
1009 | if (le16_to_cpu(req.wLength) != 0 || | |
1010 | le16_to_cpu(req.wIndex) != 0) | |
1011 | break; | |
1012 | ci->address = (u8)le16_to_cpu(req.wValue); | |
1013 | ci->setaddr = true; | |
1014 | err = isr_setup_status_phase(ci); | |
1015 | break; | |
1016 | case USB_REQ_SET_FEATURE: | |
1017 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
1018 | le16_to_cpu(req.wValue) == | |
1019 | USB_ENDPOINT_HALT) { | |
1020 | if (req.wLength != 0) | |
1021 | break; | |
1022 | num = le16_to_cpu(req.wIndex); | |
1023 | dir = num & USB_ENDPOINT_DIR_MASK; | |
1024 | num &= USB_ENDPOINT_NUMBER_MASK; | |
1025 | if (dir) /* TX */ | |
1026 | num += ci->hw_ep_max / 2; | |
1027 | ||
1028 | spin_unlock(&ci->lock); | |
1029 | err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep); | |
1030 | spin_lock(&ci->lock); | |
1031 | if (!err) | |
1032 | isr_setup_status_phase(ci); | |
1033 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { | |
1034 | if (req.wLength != 0) | |
1035 | break; | |
1036 | switch (le16_to_cpu(req.wValue)) { | |
1037 | case USB_DEVICE_REMOTE_WAKEUP: | |
1038 | ci->remote_wakeup = 1; | |
1039 | err = isr_setup_status_phase(ci); | |
1040 | break; | |
1041 | case USB_DEVICE_TEST_MODE: | |
1042 | tmode = le16_to_cpu(req.wIndex) >> 8; | |
1043 | switch (tmode) { | |
1044 | case TEST_J: | |
1045 | case TEST_K: | |
1046 | case TEST_SE0_NAK: | |
1047 | case TEST_PACKET: | |
1048 | case TEST_FORCE_EN: | |
1049 | ci->test_mode = tmode; | |
1050 | err = isr_setup_status_phase( | |
1051 | ci); | |
1052 | break; | |
1053 | default: | |
1054 | break; | |
1055 | } | |
95f5555f LJ |
1056 | break; |
1057 | case USB_DEVICE_B_HNP_ENABLE: | |
1058 | if (ci_otg_is_fsm_mode(ci)) { | |
1059 | ci->gadget.b_hnp_enable = 1; | |
1060 | err = isr_setup_status_phase( | |
1061 | ci); | |
1062 | } | |
1063 | break; | |
d7b00e31 PC |
1064 | default: |
1065 | goto delegate; | |
1066 | } | |
1067 | } else { | |
1068 | goto delegate; | |
1069 | } | |
1070 | break; | |
1071 | default: | |
1072 | delegate: | |
1073 | if (req.wLength == 0) /* no data phase */ | |
1074 | ci->ep0_dir = TX; | |
1075 | ||
1076 | spin_unlock(&ci->lock); | |
1077 | err = ci->driver->setup(&ci->gadget, &req); | |
1078 | spin_lock(&ci->lock); | |
1079 | break; | |
1080 | } | |
1081 | ||
1082 | if (err < 0) { | |
1083 | spin_unlock(&ci->lock); | |
1084 | if (usb_ep_set_halt(&hwep->ep)) | |
1085 | dev_err(ci->dev, "error: ep_set_halt\n"); | |
1086 | spin_lock(&ci->lock); | |
1087 | } | |
1088 | } | |
1089 | ||
aa69a809 DL |
1090 | /** |
1091 | * isr_tr_complete_handler: transaction complete interrupt handler | |
26c696c6 | 1092 | * @ci: UDC descriptor |
aa69a809 DL |
1093 | * |
1094 | * This function handles traffic events | |
1095 | */ | |
8e22978c | 1096 | static void isr_tr_complete_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
1097 | __releases(ci->lock) |
1098 | __acquires(ci->lock) | |
aa69a809 DL |
1099 | { |
1100 | unsigned i; | |
d7b00e31 | 1101 | int err; |
aa69a809 | 1102 | |
26c696c6 | 1103 | for (i = 0; i < ci->hw_ep_max; i++) { |
8e22978c | 1104 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
aa69a809 | 1105 | |
2dbc5c4c | 1106 | if (hwep->ep.desc == NULL) |
aa69a809 DL |
1107 | continue; /* not configured */ |
1108 | ||
26c696c6 | 1109 | if (hw_test_and_clear_complete(ci, i)) { |
2dbc5c4c AS |
1110 | err = isr_tr_complete_low(hwep); |
1111 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { | |
aa69a809 | 1112 | if (err > 0) /* needs status phase */ |
26c696c6 | 1113 | err = isr_setup_status_phase(ci); |
aa69a809 | 1114 | if (err < 0) { |
26c696c6 | 1115 | spin_unlock(&ci->lock); |
2dbc5c4c | 1116 | if (usb_ep_set_halt(&hwep->ep)) |
26c696c6 | 1117 | dev_err(ci->dev, |
0917ba84 | 1118 | "error: ep_set_halt\n"); |
26c696c6 | 1119 | spin_lock(&ci->lock); |
aa69a809 DL |
1120 | } |
1121 | } | |
1122 | } | |
1123 | ||
64fc06c4 | 1124 | /* Only handle setup packet below */ |
d7b00e31 PC |
1125 | if (i == 0 && |
1126 | hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0))) | |
1127 | isr_setup_packet_handler(ci); | |
aa69a809 DL |
1128 | } |
1129 | } | |
1130 | ||
1131 | /****************************************************************************** | |
1132 | * ENDPT block | |
1133 | *****************************************************************************/ | |
1134 | /** | |
1135 | * ep_enable: configure endpoint, making it usable | |
1136 | * | |
1137 | * Check usb_ep_enable() at "usb_gadget.h" for details | |
1138 | */ | |
1139 | static int ep_enable(struct usb_ep *ep, | |
1140 | const struct usb_endpoint_descriptor *desc) | |
1141 | { | |
8e22978c | 1142 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
ca9cfea0 | 1143 | int retval = 0; |
aa69a809 | 1144 | unsigned long flags; |
1cd12a9c | 1145 | u32 cap = 0; |
aa69a809 | 1146 | |
aa69a809 DL |
1147 | if (ep == NULL || desc == NULL) |
1148 | return -EINVAL; | |
1149 | ||
2dbc5c4c | 1150 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1151 | |
1152 | /* only internal SW should enable ctrl endpts */ | |
1153 | ||
2dbc5c4c | 1154 | hwep->ep.desc = desc; |
aa69a809 | 1155 | |
2dbc5c4c AS |
1156 | if (!list_empty(&hwep->qh.queue)) |
1157 | dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); | |
aa69a809 | 1158 | |
2dbc5c4c AS |
1159 | hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; |
1160 | hwep->num = usb_endpoint_num(desc); | |
1161 | hwep->type = usb_endpoint_type(desc); | |
aa69a809 | 1162 | |
2dbc5c4c AS |
1163 | hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; |
1164 | hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); | |
aa69a809 | 1165 | |
2dbc5c4c | 1166 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1cd12a9c | 1167 | cap |= QH_IOS; |
953c6646 AR |
1168 | |
1169 | cap |= QH_ZLT; | |
2dbc5c4c | 1170 | cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; |
2fc5a7da PC |
1171 | /* |
1172 | * For ISO-TX, we set mult at QH as the largest value, and use | |
1173 | * MultO at TD as real mult value. | |
1174 | */ | |
1175 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) | |
1176 | cap |= 3 << __ffs(QH_MULT); | |
1cd12a9c | 1177 | |
2dbc5c4c | 1178 | hwep->qh.ptr->cap = cpu_to_le32(cap); |
1cd12a9c | 1179 | |
2dbc5c4c | 1180 | hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ |
aa69a809 | 1181 | |
64fc06c4 PC |
1182 | if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
1183 | dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n"); | |
1184 | retval = -EINVAL; | |
1185 | } | |
1186 | ||
ac1aa6a2 A |
1187 | /* |
1188 | * Enable endpoints in the HW other than ep0 as ep0 | |
1189 | * is always enabled | |
1190 | */ | |
2dbc5c4c AS |
1191 | if (hwep->num) |
1192 | retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, | |
1193 | hwep->type); | |
aa69a809 | 1194 | |
2dbc5c4c | 1195 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1196 | return retval; |
1197 | } | |
1198 | ||
1199 | /** | |
1200 | * ep_disable: endpoint is no longer usable | |
1201 | * | |
1202 | * Check usb_ep_disable() at "usb_gadget.h" for details | |
1203 | */ | |
1204 | static int ep_disable(struct usb_ep *ep) | |
1205 | { | |
8e22978c | 1206 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1207 | int direction, retval = 0; |
1208 | unsigned long flags; | |
1209 | ||
aa69a809 DL |
1210 | if (ep == NULL) |
1211 | return -EINVAL; | |
2dbc5c4c | 1212 | else if (hwep->ep.desc == NULL) |
aa69a809 DL |
1213 | return -EBUSY; |
1214 | ||
2dbc5c4c | 1215 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1216 | |
1217 | /* only internal SW should disable ctrl endpts */ | |
1218 | ||
2dbc5c4c | 1219 | direction = hwep->dir; |
aa69a809 | 1220 | do { |
2dbc5c4c AS |
1221 | retval |= _ep_nuke(hwep); |
1222 | retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); | |
aa69a809 | 1223 | |
2dbc5c4c AS |
1224 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1225 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1226 | |
2dbc5c4c | 1227 | } while (hwep->dir != direction); |
aa69a809 | 1228 | |
2dbc5c4c | 1229 | hwep->ep.desc = NULL; |
aa69a809 | 1230 | |
2dbc5c4c | 1231 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1232 | return retval; |
1233 | } | |
1234 | ||
1235 | /** | |
1236 | * ep_alloc_request: allocate a request object to use with this endpoint | |
1237 | * | |
1238 | * Check usb_ep_alloc_request() at "usb_gadget.h" for details | |
1239 | */ | |
1240 | static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) | |
1241 | { | |
8e22978c | 1242 | struct ci_hw_req *hwreq = NULL; |
aa69a809 | 1243 | |
0f089094 | 1244 | if (ep == NULL) |
aa69a809 | 1245 | return NULL; |
aa69a809 | 1246 | |
8e22978c | 1247 | hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); |
2dbc5c4c AS |
1248 | if (hwreq != NULL) { |
1249 | INIT_LIST_HEAD(&hwreq->queue); | |
1250 | INIT_LIST_HEAD(&hwreq->tds); | |
aa69a809 DL |
1251 | } |
1252 | ||
2dbc5c4c | 1253 | return (hwreq == NULL) ? NULL : &hwreq->req; |
aa69a809 DL |
1254 | } |
1255 | ||
1256 | /** | |
1257 | * ep_free_request: frees a request object | |
1258 | * | |
1259 | * Check usb_ep_free_request() at "usb_gadget.h" for details | |
1260 | */ | |
1261 | static void ep_free_request(struct usb_ep *ep, struct usb_request *req) | |
1262 | { | |
8e22978c AS |
1263 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1264 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
2e270412 | 1265 | struct td_node *node, *tmpnode; |
aa69a809 DL |
1266 | unsigned long flags; |
1267 | ||
aa69a809 | 1268 | if (ep == NULL || req == NULL) { |
aa69a809 | 1269 | return; |
2dbc5c4c AS |
1270 | } else if (!list_empty(&hwreq->queue)) { |
1271 | dev_err(hwep->ci->dev, "freeing queued request\n"); | |
aa69a809 DL |
1272 | return; |
1273 | } | |
1274 | ||
2dbc5c4c | 1275 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1276 | |
2dbc5c4c AS |
1277 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1278 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
1279 | list_del_init(&node->td); |
1280 | node->ptr = NULL; | |
1281 | kfree(node); | |
1282 | } | |
cc9e6c49 | 1283 | |
2dbc5c4c | 1284 | kfree(hwreq); |
aa69a809 | 1285 | |
2dbc5c4c | 1286 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1287 | } |
1288 | ||
1289 | /** | |
1290 | * ep_queue: queues (submits) an I/O request to an endpoint | |
1291 | * | |
1292 | * Check usb_ep_queue()* at usb_gadget.h" for details | |
1293 | */ | |
1294 | static int ep_queue(struct usb_ep *ep, struct usb_request *req, | |
1295 | gfp_t __maybe_unused gfp_flags) | |
1296 | { | |
8e22978c | 1297 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1298 | int retval = 0; |
1299 | unsigned long flags; | |
1300 | ||
2dbc5c4c | 1301 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1302 | return -EINVAL; |
1303 | ||
2dbc5c4c | 1304 | spin_lock_irqsave(hwep->lock, flags); |
dd064e9d | 1305 | retval = _ep_queue(ep, req, gfp_flags); |
2dbc5c4c | 1306 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1307 | return retval; |
1308 | } | |
1309 | ||
1310 | /** | |
1311 | * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint | |
1312 | * | |
1313 | * Check usb_ep_dequeue() at "usb_gadget.h" for details | |
1314 | */ | |
1315 | static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) | |
1316 | { | |
8e22978c AS |
1317 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1318 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
aa69a809 | 1319 | unsigned long flags; |
e4adcff0 | 1320 | struct td_node *node, *tmpnode; |
aa69a809 | 1321 | |
2dbc5c4c AS |
1322 | if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || |
1323 | hwep->ep.desc == NULL || list_empty(&hwreq->queue) || | |
1324 | list_empty(&hwep->qh.queue)) | |
aa69a809 DL |
1325 | return -EINVAL; |
1326 | ||
2dbc5c4c | 1327 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1328 | |
2dbc5c4c | 1329 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1330 | |
e4adcff0 PC |
1331 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1332 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
1333 | list_del(&node->td); | |
1334 | kfree(node); | |
1335 | } | |
1336 | ||
aa69a809 | 1337 | /* pop request */ |
2dbc5c4c | 1338 | list_del_init(&hwreq->queue); |
5e0aa49e | 1339 | |
2dbc5c4c | 1340 | usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); |
5e0aa49e | 1341 | |
aa69a809 DL |
1342 | req->status = -ECONNRESET; |
1343 | ||
2dbc5c4c AS |
1344 | if (hwreq->req.complete != NULL) { |
1345 | spin_unlock(hwep->lock); | |
304f7e5e | 1346 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
2dbc5c4c | 1347 | spin_lock(hwep->lock); |
aa69a809 DL |
1348 | } |
1349 | ||
2dbc5c4c | 1350 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1351 | return 0; |
1352 | } | |
1353 | ||
1354 | /** | |
1355 | * ep_set_halt: sets the endpoint halt feature | |
1356 | * | |
1357 | * Check usb_ep_set_halt() at "usb_gadget.h" for details | |
1358 | */ | |
1359 | static int ep_set_halt(struct usb_ep *ep, int value) | |
1360 | { | |
8e22978c | 1361 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1362 | int direction, retval = 0; |
1363 | unsigned long flags; | |
1364 | ||
2dbc5c4c | 1365 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1366 | return -EINVAL; |
1367 | ||
2dbc5c4c | 1368 | if (usb_endpoint_xfer_isoc(hwep->ep.desc)) |
e4ce4ecd MG |
1369 | return -EOPNOTSUPP; |
1370 | ||
2dbc5c4c | 1371 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1372 | |
1373 | #ifndef STALL_IN | |
1374 | /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */ | |
2dbc5c4c AS |
1375 | if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX && |
1376 | !list_empty(&hwep->qh.queue)) { | |
1377 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1378 | return -EAGAIN; |
1379 | } | |
1380 | #endif | |
1381 | ||
2dbc5c4c | 1382 | direction = hwep->dir; |
aa69a809 | 1383 | do { |
2dbc5c4c | 1384 | retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); |
aa69a809 DL |
1385 | |
1386 | if (!value) | |
2dbc5c4c | 1387 | hwep->wedge = 0; |
aa69a809 | 1388 | |
2dbc5c4c AS |
1389 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1390 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1391 | |
2dbc5c4c | 1392 | } while (hwep->dir != direction); |
aa69a809 | 1393 | |
2dbc5c4c | 1394 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1395 | return retval; |
1396 | } | |
1397 | ||
1398 | /** | |
1399 | * ep_set_wedge: sets the halt feature and ignores clear requests | |
1400 | * | |
1401 | * Check usb_ep_set_wedge() at "usb_gadget.h" for details | |
1402 | */ | |
1403 | static int ep_set_wedge(struct usb_ep *ep) | |
1404 | { | |
8e22978c | 1405 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1406 | unsigned long flags; |
1407 | ||
2dbc5c4c | 1408 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1409 | return -EINVAL; |
1410 | ||
2dbc5c4c AS |
1411 | spin_lock_irqsave(hwep->lock, flags); |
1412 | hwep->wedge = 1; | |
1413 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1414 | |
1415 | return usb_ep_set_halt(ep); | |
1416 | } | |
1417 | ||
1418 | /** | |
1419 | * ep_fifo_flush: flushes contents of a fifo | |
1420 | * | |
1421 | * Check usb_ep_fifo_flush() at "usb_gadget.h" for details | |
1422 | */ | |
1423 | static void ep_fifo_flush(struct usb_ep *ep) | |
1424 | { | |
8e22978c | 1425 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1426 | unsigned long flags; |
1427 | ||
aa69a809 | 1428 | if (ep == NULL) { |
2dbc5c4c | 1429 | dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); |
aa69a809 DL |
1430 | return; |
1431 | } | |
1432 | ||
2dbc5c4c | 1433 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1434 | |
2dbc5c4c | 1435 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1436 | |
2dbc5c4c | 1437 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1438 | } |
1439 | ||
1440 | /** | |
1441 | * Endpoint-specific part of the API to the USB controller hardware | |
1442 | * Check "usb_gadget.h" for details | |
1443 | */ | |
1444 | static const struct usb_ep_ops usb_ep_ops = { | |
1445 | .enable = ep_enable, | |
1446 | .disable = ep_disable, | |
1447 | .alloc_request = ep_alloc_request, | |
1448 | .free_request = ep_free_request, | |
1449 | .queue = ep_queue, | |
1450 | .dequeue = ep_dequeue, | |
1451 | .set_halt = ep_set_halt, | |
1452 | .set_wedge = ep_set_wedge, | |
1453 | .fifo_flush = ep_fifo_flush, | |
1454 | }; | |
1455 | ||
1456 | /****************************************************************************** | |
1457 | * GADGET block | |
1458 | *****************************************************************************/ | |
8e22978c | 1459 | static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) |
f01ef574 | 1460 | { |
8e22978c | 1461 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
f01ef574 PK |
1462 | unsigned long flags; |
1463 | int gadget_ready = 0; | |
1464 | ||
26c696c6 RZ |
1465 | spin_lock_irqsave(&ci->lock, flags); |
1466 | ci->vbus_active = is_active; | |
1467 | if (ci->driver) | |
f01ef574 | 1468 | gadget_ready = 1; |
26c696c6 | 1469 | spin_unlock_irqrestore(&ci->lock, flags); |
f01ef574 PK |
1470 | |
1471 | if (gadget_ready) { | |
1472 | if (is_active) { | |
c036019e | 1473 | pm_runtime_get_sync(&_gadget->dev); |
5b157300 | 1474 | hw_device_reset(ci); |
26c696c6 | 1475 | hw_device_state(ci, ci->ep0out->qh.dma); |
10775eb1 | 1476 | usb_gadget_set_state(_gadget, USB_STATE_POWERED); |
f01ef574 | 1477 | } else { |
92b336d7 PC |
1478 | if (ci->driver) |
1479 | ci->driver->disconnect(&ci->gadget); | |
26c696c6 RZ |
1480 | hw_device_state(ci, 0); |
1481 | if (ci->platdata->notify_event) | |
1482 | ci->platdata->notify_event(ci, | |
8e22978c | 1483 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 | 1484 | _gadget_stop_activity(&ci->gadget); |
c036019e | 1485 | pm_runtime_put_sync(&_gadget->dev); |
10775eb1 | 1486 | usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED); |
f01ef574 PK |
1487 | } |
1488 | } | |
1489 | ||
1490 | return 0; | |
1491 | } | |
1492 | ||
8e22978c | 1493 | static int ci_udc_wakeup(struct usb_gadget *_gadget) |
e2b61c1d | 1494 | { |
8e22978c | 1495 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
e2b61c1d PK |
1496 | unsigned long flags; |
1497 | int ret = 0; | |
1498 | ||
26c696c6 RZ |
1499 | spin_lock_irqsave(&ci->lock, flags); |
1500 | if (!ci->remote_wakeup) { | |
e2b61c1d | 1501 | ret = -EOPNOTSUPP; |
e2b61c1d PK |
1502 | goto out; |
1503 | } | |
26c696c6 | 1504 | if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { |
e2b61c1d | 1505 | ret = -EINVAL; |
e2b61c1d PK |
1506 | goto out; |
1507 | } | |
26c696c6 | 1508 | hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); |
e2b61c1d | 1509 | out: |
26c696c6 | 1510 | spin_unlock_irqrestore(&ci->lock, flags); |
e2b61c1d PK |
1511 | return ret; |
1512 | } | |
1513 | ||
8e22978c | 1514 | static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) |
d860852e | 1515 | { |
8e22978c | 1516 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
d860852e | 1517 | |
ef44cb42 AT |
1518 | if (ci->usb_phy) |
1519 | return usb_phy_set_power(ci->usb_phy, ma); | |
d860852e PK |
1520 | return -ENOTSUPP; |
1521 | } | |
1522 | ||
c0a48e6c MG |
1523 | /* Change Data+ pullup status |
1524 | * this func is used by usb_gadget_connect/disconnet | |
1525 | */ | |
8e22978c | 1526 | static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) |
c0a48e6c | 1527 | { |
8e22978c | 1528 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
c0a48e6c | 1529 | |
4a64783b PC |
1530 | if (!ci->vbus_active) |
1531 | return -EOPNOTSUPP; | |
1532 | ||
c0a48e6c MG |
1533 | if (is_on) |
1534 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); | |
1535 | else | |
1536 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); | |
1537 | ||
1538 | return 0; | |
1539 | } | |
1540 | ||
8e22978c | 1541 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1542 | struct usb_gadget_driver *driver); |
22835b80 | 1543 | static int ci_udc_stop(struct usb_gadget *gadget); |
aa69a809 DL |
1544 | /** |
1545 | * Device operations part of the API to the USB controller hardware, | |
1546 | * which don't involve endpoints (or i/o) | |
1547 | * Check "usb_gadget.h" for details | |
1548 | */ | |
f01ef574 | 1549 | static const struct usb_gadget_ops usb_gadget_ops = { |
8e22978c AS |
1550 | .vbus_session = ci_udc_vbus_session, |
1551 | .wakeup = ci_udc_wakeup, | |
1552 | .pullup = ci_udc_pullup, | |
1553 | .vbus_draw = ci_udc_vbus_draw, | |
1554 | .udc_start = ci_udc_start, | |
1555 | .udc_stop = ci_udc_stop, | |
f01ef574 | 1556 | }; |
aa69a809 | 1557 | |
8e22978c | 1558 | static int init_eps(struct ci_hdrc *ci) |
aa69a809 | 1559 | { |
790c2d52 | 1560 | int retval = 0, i, j; |
aa69a809 | 1561 | |
26c696c6 | 1562 | for (i = 0; i < ci->hw_ep_max/2; i++) |
ca9cfea0 | 1563 | for (j = RX; j <= TX; j++) { |
26c696c6 | 1564 | int k = i + j * ci->hw_ep_max/2; |
8e22978c | 1565 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; |
aa69a809 | 1566 | |
2dbc5c4c | 1567 | scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, |
ca9cfea0 | 1568 | (j == TX) ? "in" : "out"); |
aa69a809 | 1569 | |
2dbc5c4c AS |
1570 | hwep->ci = ci; |
1571 | hwep->lock = &ci->lock; | |
1572 | hwep->td_pool = ci->td_pool; | |
aa69a809 | 1573 | |
2dbc5c4c AS |
1574 | hwep->ep.name = hwep->name; |
1575 | hwep->ep.ops = &usb_ep_ops; | |
7f67c38b MG |
1576 | /* |
1577 | * for ep0: maxP defined in desc, for other | |
1578 | * eps, maxP is set by epautoconfig() called | |
1579 | * by gadget layer | |
1580 | */ | |
e117e742 | 1581 | usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); |
aa69a809 | 1582 | |
2dbc5c4c AS |
1583 | INIT_LIST_HEAD(&hwep->qh.queue); |
1584 | hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, | |
1585 | &hwep->qh.dma); | |
1586 | if (hwep->qh.ptr == NULL) | |
aa69a809 DL |
1587 | retval = -ENOMEM; |
1588 | else | |
2dbc5c4c | 1589 | memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); |
ca9cfea0 | 1590 | |
d36ade60 AS |
1591 | /* |
1592 | * set up shorthands for ep0 out and in endpoints, | |
1593 | * don't add to gadget's ep_list | |
1594 | */ | |
1595 | if (i == 0) { | |
1596 | if (j == RX) | |
2dbc5c4c | 1597 | ci->ep0out = hwep; |
d36ade60 | 1598 | else |
2dbc5c4c | 1599 | ci->ep0in = hwep; |
d36ade60 | 1600 | |
e117e742 | 1601 | usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); |
ca9cfea0 | 1602 | continue; |
d36ade60 | 1603 | } |
ca9cfea0 | 1604 | |
2dbc5c4c | 1605 | list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); |
ca9cfea0 | 1606 | } |
790c2d52 AS |
1607 | |
1608 | return retval; | |
1609 | } | |
1610 | ||
8e22978c | 1611 | static void destroy_eps(struct ci_hdrc *ci) |
ad6b1b97 MKB |
1612 | { |
1613 | int i; | |
1614 | ||
1615 | for (i = 0; i < ci->hw_ep_max; i++) { | |
8e22978c | 1616 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
ad6b1b97 | 1617 | |
4a29567b PC |
1618 | if (hwep->pending_td) |
1619 | free_pending_td(hwep); | |
2dbc5c4c | 1620 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
ad6b1b97 MKB |
1621 | } |
1622 | } | |
1623 | ||
790c2d52 | 1624 | /** |
8e22978c | 1625 | * ci_udc_start: register a gadget driver |
1f339d84 | 1626 | * @gadget: our gadget |
790c2d52 | 1627 | * @driver: the driver being registered |
790c2d52 | 1628 | * |
790c2d52 AS |
1629 | * Interrupts are enabled here. |
1630 | */ | |
8e22978c | 1631 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1632 | struct usb_gadget_driver *driver) |
790c2d52 | 1633 | { |
8e22978c | 1634 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
790c2d52 | 1635 | unsigned long flags; |
790c2d52 AS |
1636 | int retval = -ENOMEM; |
1637 | ||
1f339d84 | 1638 | if (driver->disconnect == NULL) |
790c2d52 | 1639 | return -EINVAL; |
790c2d52 | 1640 | |
790c2d52 | 1641 | |
26c696c6 RZ |
1642 | ci->ep0out->ep.desc = &ctrl_endpt_out_desc; |
1643 | retval = usb_ep_enable(&ci->ep0out->ep); | |
ac1aa6a2 A |
1644 | if (retval) |
1645 | return retval; | |
877c1f54 | 1646 | |
26c696c6 RZ |
1647 | ci->ep0in->ep.desc = &ctrl_endpt_in_desc; |
1648 | retval = usb_ep_enable(&ci->ep0in->ep); | |
ac1aa6a2 A |
1649 | if (retval) |
1650 | return retval; | |
26c696c6 RZ |
1651 | |
1652 | ci->driver = driver; | |
4dcf720c LJ |
1653 | |
1654 | /* Start otg fsm for B-device */ | |
1655 | if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) { | |
1656 | ci_hdrc_otg_fsm_start(ci); | |
1657 | return retval; | |
1658 | } | |
1659 | ||
26c696c6 | 1660 | pm_runtime_get_sync(&ci->gadget.dev); |
d268e9bc | 1661 | if (ci->vbus_active) { |
65b2fb32 | 1662 | spin_lock_irqsave(&ci->lock, flags); |
5b157300 | 1663 | hw_device_reset(ci); |
d268e9bc PC |
1664 | } else { |
1665 | pm_runtime_put_sync(&ci->gadget.dev); | |
65b2fb32 | 1666 | return retval; |
f01ef574 PK |
1667 | } |
1668 | ||
26c696c6 | 1669 | retval = hw_device_state(ci, ci->ep0out->qh.dma); |
65b2fb32 | 1670 | spin_unlock_irqrestore(&ci->lock, flags); |
c036019e | 1671 | if (retval) |
26c696c6 | 1672 | pm_runtime_put_sync(&ci->gadget.dev); |
aa69a809 | 1673 | |
aa69a809 DL |
1674 | return retval; |
1675 | } | |
aa69a809 DL |
1676 | |
1677 | /** | |
8e22978c | 1678 | * ci_udc_stop: unregister a gadget driver |
aa69a809 | 1679 | */ |
22835b80 | 1680 | static int ci_udc_stop(struct usb_gadget *gadget) |
aa69a809 | 1681 | { |
8e22978c | 1682 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
1f339d84 | 1683 | unsigned long flags; |
aa69a809 | 1684 | |
26c696c6 | 1685 | spin_lock_irqsave(&ci->lock, flags); |
aa69a809 | 1686 | |
d268e9bc | 1687 | if (ci->vbus_active) { |
26c696c6 RZ |
1688 | hw_device_state(ci, 0); |
1689 | if (ci->platdata->notify_event) | |
1690 | ci->platdata->notify_event(ci, | |
8e22978c | 1691 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 RZ |
1692 | spin_unlock_irqrestore(&ci->lock, flags); |
1693 | _gadget_stop_activity(&ci->gadget); | |
1694 | spin_lock_irqsave(&ci->lock, flags); | |
1695 | pm_runtime_put(&ci->gadget.dev); | |
f01ef574 | 1696 | } |
aa69a809 | 1697 | |
f84839da | 1698 | ci->driver = NULL; |
26c696c6 | 1699 | spin_unlock_irqrestore(&ci->lock, flags); |
aa69a809 | 1700 | |
aa69a809 DL |
1701 | return 0; |
1702 | } | |
aa69a809 DL |
1703 | |
1704 | /****************************************************************************** | |
1705 | * BUS block | |
1706 | *****************************************************************************/ | |
1707 | /** | |
26c696c6 | 1708 | * udc_irq: ci interrupt handler |
aa69a809 DL |
1709 | * |
1710 | * This function returns IRQ_HANDLED if the IRQ has been handled | |
1711 | * It locks access to registers | |
1712 | */ | |
8e22978c | 1713 | static irqreturn_t udc_irq(struct ci_hdrc *ci) |
aa69a809 | 1714 | { |
aa69a809 DL |
1715 | irqreturn_t retval; |
1716 | u32 intr; | |
1717 | ||
26c696c6 | 1718 | if (ci == NULL) |
aa69a809 | 1719 | return IRQ_HANDLED; |
aa69a809 | 1720 | |
26c696c6 | 1721 | spin_lock(&ci->lock); |
f01ef574 | 1722 | |
8e22978c | 1723 | if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { |
26c696c6 | 1724 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != |
758fc986 | 1725 | USBMODE_CM_DC) { |
26c696c6 | 1726 | spin_unlock(&ci->lock); |
f01ef574 PK |
1727 | return IRQ_NONE; |
1728 | } | |
1729 | } | |
26c696c6 | 1730 | intr = hw_test_and_clear_intr_active(ci); |
aa69a809 | 1731 | |
e443b333 | 1732 | if (intr) { |
aa69a809 | 1733 | /* order defines priority - do NOT change it */ |
e443b333 | 1734 | if (USBi_URI & intr) |
26c696c6 | 1735 | isr_reset_handler(ci); |
e443b333 | 1736 | |
aa69a809 | 1737 | if (USBi_PCI & intr) { |
26c696c6 | 1738 | ci->gadget.speed = hw_port_is_high_speed(ci) ? |
aa69a809 | 1739 | USB_SPEED_HIGH : USB_SPEED_FULL; |
26c696c6 RZ |
1740 | if (ci->suspended && ci->driver->resume) { |
1741 | spin_unlock(&ci->lock); | |
1742 | ci->driver->resume(&ci->gadget); | |
1743 | spin_lock(&ci->lock); | |
1744 | ci->suspended = 0; | |
e2b61c1d | 1745 | } |
aa69a809 | 1746 | } |
e443b333 AS |
1747 | |
1748 | if (USBi_UI & intr) | |
26c696c6 | 1749 | isr_tr_complete_handler(ci); |
e443b333 | 1750 | |
e2b61c1d | 1751 | if (USBi_SLI & intr) { |
26c696c6 RZ |
1752 | if (ci->gadget.speed != USB_SPEED_UNKNOWN && |
1753 | ci->driver->suspend) { | |
1754 | ci->suspended = 1; | |
1755 | spin_unlock(&ci->lock); | |
1756 | ci->driver->suspend(&ci->gadget); | |
10775eb1 PC |
1757 | usb_gadget_set_state(&ci->gadget, |
1758 | USB_STATE_SUSPENDED); | |
26c696c6 | 1759 | spin_lock(&ci->lock); |
e2b61c1d | 1760 | } |
e2b61c1d | 1761 | } |
aa69a809 DL |
1762 | retval = IRQ_HANDLED; |
1763 | } else { | |
aa69a809 DL |
1764 | retval = IRQ_NONE; |
1765 | } | |
26c696c6 | 1766 | spin_unlock(&ci->lock); |
aa69a809 DL |
1767 | |
1768 | return retval; | |
1769 | } | |
1770 | ||
aa69a809 | 1771 | /** |
5f36e231 | 1772 | * udc_start: initialize gadget role |
26c696c6 | 1773 | * @ci: chipidea controller |
aa69a809 | 1774 | */ |
8e22978c | 1775 | static int udc_start(struct ci_hdrc *ci) |
aa69a809 | 1776 | { |
26c696c6 | 1777 | struct device *dev = ci->dev; |
aa69a809 DL |
1778 | int retval = 0; |
1779 | ||
26c696c6 | 1780 | spin_lock_init(&ci->lock); |
aa69a809 | 1781 | |
26c696c6 RZ |
1782 | ci->gadget.ops = &usb_gadget_ops; |
1783 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
1784 | ci->gadget.max_speed = USB_SPEED_HIGH; | |
95f5555f | 1785 | ci->gadget.is_otg = ci->is_otg ? 1 : 0; |
26c696c6 | 1786 | ci->gadget.name = ci->platdata->name; |
aa69a809 | 1787 | |
26c696c6 | 1788 | INIT_LIST_HEAD(&ci->gadget.ep_list); |
aa69a809 | 1789 | |
790c2d52 | 1790 | /* alloc resources */ |
8e22978c AS |
1791 | ci->qh_pool = dma_pool_create("ci_hw_qh", dev, |
1792 | sizeof(struct ci_hw_qh), | |
1793 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1794 | if (ci->qh_pool == NULL) |
5f36e231 | 1795 | return -ENOMEM; |
790c2d52 | 1796 | |
8e22978c AS |
1797 | ci->td_pool = dma_pool_create("ci_hw_td", dev, |
1798 | sizeof(struct ci_hw_td), | |
1799 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1800 | if (ci->td_pool == NULL) { |
790c2d52 AS |
1801 | retval = -ENOMEM; |
1802 | goto free_qh_pool; | |
1803 | } | |
1804 | ||
26c696c6 | 1805 | retval = init_eps(ci); |
790c2d52 AS |
1806 | if (retval) |
1807 | goto free_pools; | |
1808 | ||
26c696c6 | 1809 | ci->gadget.ep0 = &ci->ep0in->ep; |
f01ef574 | 1810 | |
26c696c6 | 1811 | retval = usb_add_gadget_udc(dev, &ci->gadget); |
0f91349b | 1812 | if (retval) |
74475ede | 1813 | goto destroy_eps; |
0f91349b | 1814 | |
26c696c6 RZ |
1815 | pm_runtime_no_callbacks(&ci->gadget.dev); |
1816 | pm_runtime_enable(&ci->gadget.dev); | |
aa69a809 | 1817 | |
aa69a809 DL |
1818 | return retval; |
1819 | ||
ad6b1b97 MKB |
1820 | destroy_eps: |
1821 | destroy_eps(ci); | |
790c2d52 | 1822 | free_pools: |
26c696c6 | 1823 | dma_pool_destroy(ci->td_pool); |
790c2d52 | 1824 | free_qh_pool: |
26c696c6 | 1825 | dma_pool_destroy(ci->qh_pool); |
aa69a809 DL |
1826 | return retval; |
1827 | } | |
1828 | ||
1829 | /** | |
3f124d23 | 1830 | * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC |
aa69a809 DL |
1831 | * |
1832 | * No interrupts active, the IRQ has been released | |
1833 | */ | |
3f124d23 | 1834 | void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) |
aa69a809 | 1835 | { |
3f124d23 | 1836 | if (!ci->roles[CI_ROLE_GADGET]) |
aa69a809 | 1837 | return; |
0f089094 | 1838 | |
26c696c6 | 1839 | usb_del_gadget_udc(&ci->gadget); |
aa69a809 | 1840 | |
ad6b1b97 | 1841 | destroy_eps(ci); |
790c2d52 | 1842 | |
26c696c6 RZ |
1843 | dma_pool_destroy(ci->td_pool); |
1844 | dma_pool_destroy(ci->qh_pool); | |
3f124d23 PC |
1845 | } |
1846 | ||
1847 | static int udc_id_switch_for_device(struct ci_hdrc *ci) | |
1848 | { | |
0c33bf78 LJ |
1849 | if (ci->is_otg) |
1850 | /* Clear and enable BSV irq */ | |
1851 | hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE, | |
1852 | OTGSC_BSVIS | OTGSC_BSVIE); | |
3f124d23 PC |
1853 | |
1854 | return 0; | |
1855 | } | |
1856 | ||
1857 | static void udc_id_switch_for_host(struct ci_hdrc *ci) | |
1858 | { | |
0c33bf78 LJ |
1859 | /* |
1860 | * host doesn't care B_SESSION_VALID event | |
1861 | * so clear and disbale BSV irq | |
1862 | */ | |
1863 | if (ci->is_otg) | |
1864 | hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS); | |
5f36e231 AS |
1865 | } |
1866 | ||
1867 | /** | |
1868 | * ci_hdrc_gadget_init - initialize device related bits | |
1869 | * ci: the controller | |
1870 | * | |
3f124d23 | 1871 | * This function initializes the gadget, if the device is "device capable". |
5f36e231 | 1872 | */ |
8e22978c | 1873 | int ci_hdrc_gadget_init(struct ci_hdrc *ci) |
5f36e231 AS |
1874 | { |
1875 | struct ci_role_driver *rdrv; | |
1876 | ||
1877 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) | |
1878 | return -ENXIO; | |
1879 | ||
1880 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); | |
1881 | if (!rdrv) | |
1882 | return -ENOMEM; | |
1883 | ||
3f124d23 PC |
1884 | rdrv->start = udc_id_switch_for_device; |
1885 | rdrv->stop = udc_id_switch_for_host; | |
5f36e231 AS |
1886 | rdrv->irq = udc_irq; |
1887 | rdrv->name = "gadget"; | |
1888 | ci->roles[CI_ROLE_GADGET] = rdrv; | |
aa69a809 | 1889 | |
3f124d23 | 1890 | return udc_start(ci); |
aa69a809 | 1891 | } |