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usb: gadget: udc: core: fix unregistering message
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aa69a809 1/*
eb70e5ab 2 * udc.c - ChipIdea UDC driver
aa69a809
DL
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
36825a2d 13#include <linux/delay.h>
aa69a809
DL
14#include <linux/device.h>
15#include <linux/dmapool.h>
ded017ee 16#include <linux/err.h>
5b08319f 17#include <linux/irqreturn.h>
aa69a809 18#include <linux/kernel.h>
5a0e3ad6 19#include <linux/slab.h>
c036019e 20#include <linux/pm_runtime.h>
aa69a809
DL
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
95f5555f 23#include <linux/usb/otg-fsm.h>
e443b333 24#include <linux/usb/chipidea.h>
aa69a809 25
e443b333
AS
26#include "ci.h"
27#include "udc.h"
28#include "bits.h"
29#include "debug.h"
3f124d23 30#include "otg.h"
4dcf720c 31#include "otg_fsm.h"
954aad8c 32
aa69a809
DL
33/* control endpoint description */
34static const struct usb_endpoint_descriptor
ca9cfea0 35ctrl_endpt_out_desc = {
aa69a809
DL
36 .bLength = USB_DT_ENDPOINT_SIZE,
37 .bDescriptorType = USB_DT_ENDPOINT,
38
ca9cfea0
PK
39 .bEndpointAddress = USB_DIR_OUT,
40 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
41 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
42};
43
44static const struct usb_endpoint_descriptor
45ctrl_endpt_in_desc = {
46 .bLength = USB_DT_ENDPOINT_SIZE,
47 .bDescriptorType = USB_DT_ENDPOINT,
48
49 .bEndpointAddress = USB_DIR_IN,
aa69a809
DL
50 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
51 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
52};
53
aa69a809
DL
54/**
55 * hw_ep_bit: calculates the bit number
56 * @num: endpoint number
57 * @dir: endpoint direction
58 *
59 * This function returns bit number
60 */
61static inline int hw_ep_bit(int num, int dir)
62{
63 return num + (dir ? 16 : 0);
64}
65
8e22978c 66static inline int ep_to_bit(struct ci_hdrc *ci, int n)
dd39c358 67{
26c696c6 68 int fill = 16 - ci->hw_ep_max / 2;
dd39c358 69
26c696c6 70 if (n >= ci->hw_ep_max / 2)
dd39c358
MKB
71 n += fill;
72
73 return n;
74}
75
aa69a809 76/**
c0a48e6c 77 * hw_device_state: enables/disables interrupts (execute without interruption)
aa69a809
DL
78 * @dma: 0 => disable, !0 => enable and set dma engine
79 *
80 * This function returns an error code
81 */
8e22978c 82static int hw_device_state(struct ci_hdrc *ci, u32 dma)
aa69a809
DL
83{
84 if (dma) {
26c696c6 85 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
aa69a809 86 /* interrupt, error, port change, reset, sleep/suspend */
26c696c6 87 hw_write(ci, OP_USBINTR, ~0,
aa69a809 88 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
a107f8c5 89 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
aa69a809 90 } else {
26c696c6 91 hw_write(ci, OP_USBINTR, ~0, 0);
a107f8c5 92 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
aa69a809
DL
93 }
94 return 0;
95}
96
97/**
98 * hw_ep_flush: flush endpoint fifo (execute without interruption)
99 * @num: endpoint number
100 * @dir: endpoint direction
101 *
102 * This function returns an error code
103 */
8e22978c 104static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
105{
106 int n = hw_ep_bit(num, dir);
107
108 do {
109 /* flush any pending transfer */
5bf5dbed 110 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
26c696c6 111 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
aa69a809 112 cpu_relax();
26c696c6 113 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
aa69a809
DL
114
115 return 0;
116}
117
118/**
119 * hw_ep_disable: disables endpoint (execute without interruption)
120 * @num: endpoint number
121 * @dir: endpoint direction
122 *
123 * This function returns an error code
124 */
8e22978c 125static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
aa69a809 126{
26c696c6
RZ
127 hw_ep_flush(ci, num, dir);
128 hw_write(ci, OP_ENDPTCTRL + num,
d3595d13 129 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
aa69a809
DL
130 return 0;
131}
132
133/**
134 * hw_ep_enable: enables endpoint (execute without interruption)
135 * @num: endpoint number
136 * @dir: endpoint direction
137 * @type: endpoint type
138 *
139 * This function returns an error code
140 */
8e22978c 141static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
aa69a809
DL
142{
143 u32 mask, data;
144
145 if (dir) {
146 mask = ENDPTCTRL_TXT; /* type */
727b4ddb 147 data = type << __ffs(mask);
aa69a809
DL
148
149 mask |= ENDPTCTRL_TXS; /* unstall */
150 mask |= ENDPTCTRL_TXR; /* reset data toggle */
151 data |= ENDPTCTRL_TXR;
152 mask |= ENDPTCTRL_TXE; /* enable */
153 data |= ENDPTCTRL_TXE;
154 } else {
155 mask = ENDPTCTRL_RXT; /* type */
727b4ddb 156 data = type << __ffs(mask);
aa69a809
DL
157
158 mask |= ENDPTCTRL_RXS; /* unstall */
159 mask |= ENDPTCTRL_RXR; /* reset data toggle */
160 data |= ENDPTCTRL_RXR;
161 mask |= ENDPTCTRL_RXE; /* enable */
162 data |= ENDPTCTRL_RXE;
163 }
26c696c6 164 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
aa69a809
DL
165 return 0;
166}
167
168/**
169 * hw_ep_get_halt: return endpoint halt status
170 * @num: endpoint number
171 * @dir: endpoint direction
172 *
173 * This function returns 1 if endpoint halted
174 */
8e22978c 175static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
176{
177 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
178
26c696c6 179 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
aa69a809
DL
180}
181
aa69a809
DL
182/**
183 * hw_ep_prime: primes endpoint (execute without interruption)
184 * @num: endpoint number
185 * @dir: endpoint direction
186 * @is_ctrl: true if control endpoint
187 *
188 * This function returns an error code
189 */
8e22978c 190static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
aa69a809
DL
191{
192 int n = hw_ep_bit(num, dir);
193
26c696c6 194 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
195 return -EAGAIN;
196
5bf5dbed 197 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
aa69a809 198
26c696c6 199 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
aa69a809 200 cpu_relax();
26c696c6 201 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
202 return -EAGAIN;
203
204 /* status shoult be tested according with manual but it doesn't work */
205 return 0;
206}
207
208/**
209 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
210 * without interruption)
211 * @num: endpoint number
212 * @dir: endpoint direction
213 * @value: true => stall, false => unstall
214 *
215 * This function returns an error code
216 */
8e22978c 217static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
aa69a809
DL
218{
219 if (value != 0 && value != 1)
220 return -EINVAL;
221
222 do {
8e22978c 223 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
aa69a809
DL
224 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
225 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
226
227 /* data toggle - reserved for EP0 but it's in ESS */
26c696c6 228 hw_write(ci, reg, mask_xs|mask_xr,
262c1632 229 value ? mask_xs : mask_xr);
26c696c6 230 } while (value != hw_ep_get_halt(ci, num, dir));
aa69a809
DL
231
232 return 0;
233}
234
aa69a809
DL
235/**
236 * hw_is_port_high_speed: test if port is high speed
237 *
238 * This function returns true if high speed port
239 */
8e22978c 240static int hw_port_is_high_speed(struct ci_hdrc *ci)
aa69a809 241{
26c696c6
RZ
242 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
243 hw_read(ci, OP_PORTSC, PORTSC_HSP);
aa69a809
DL
244}
245
aa69a809
DL
246/**
247 * hw_test_and_clear_complete: test & clear complete status (execute without
248 * interruption)
dd39c358 249 * @n: endpoint number
aa69a809
DL
250 *
251 * This function returns complete status
252 */
8e22978c 253static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
aa69a809 254{
26c696c6
RZ
255 n = ep_to_bit(ci, n);
256 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
aa69a809
DL
257}
258
259/**
260 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
261 * without interruption)
262 *
263 * This function returns active interrutps
264 */
8e22978c 265static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
aa69a809 266{
26c696c6 267 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
aa69a809 268
26c696c6 269 hw_write(ci, OP_USBSTS, ~0, reg);
aa69a809
DL
270 return reg;
271}
272
273/**
274 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
275 * interruption)
276 *
277 * This function returns guard value
278 */
8e22978c 279static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
aa69a809 280{
26c696c6 281 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
aa69a809
DL
282}
283
284/**
285 * hw_test_and_set_setup_guard: test & set setup guard (execute without
286 * interruption)
287 *
288 * This function returns guard value
289 */
8e22978c 290static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
aa69a809 291{
26c696c6 292 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
aa69a809
DL
293}
294
295/**
296 * hw_usb_set_address: configures USB address (execute without interruption)
297 * @value: new USB address
298 *
ef15e549
AS
299 * This function explicitly sets the address, without the "USBADRA" (advance)
300 * feature, which is not supported by older versions of the controller.
aa69a809 301 */
8e22978c 302static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
aa69a809 303{
26c696c6 304 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
727b4ddb 305 value << __ffs(DEVICEADDR_USBADR));
aa69a809
DL
306}
307
308/**
309 * hw_usb_reset: restart device after a bus reset (execute without
310 * interruption)
311 *
312 * This function returns an error code
313 */
8e22978c 314static int hw_usb_reset(struct ci_hdrc *ci)
aa69a809 315{
26c696c6 316 hw_usb_set_address(ci, 0);
aa69a809
DL
317
318 /* ESS flushes only at end?!? */
26c696c6 319 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
aa69a809
DL
320
321 /* clear setup token semaphores */
26c696c6 322 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
aa69a809
DL
323
324 /* clear complete status */
26c696c6 325 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
aa69a809
DL
326
327 /* wait until all bits cleared */
26c696c6 328 while (hw_read(ci, OP_ENDPTPRIME, ~0))
aa69a809
DL
329 udelay(10); /* not RTOS friendly */
330
331 /* reset all endpoints ? */
332
333 /* reset internal status and wait for further instructions
334 no need to verify the port reset status (ESS does it) */
335
336 return 0;
337}
338
aa69a809
DL
339/******************************************************************************
340 * UTIL block
341 *****************************************************************************/
cc9e6c49 342
8e22978c 343static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
cc9e6c49
MG
344 unsigned length)
345{
2e270412
MG
346 int i;
347 u32 temp;
cc9e6c49
MG
348 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
349 GFP_ATOMIC);
350
351 if (node == NULL)
352 return -ENOMEM;
353
2dbc5c4c 354 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
cc9e6c49
MG
355 &node->dma);
356 if (node->ptr == NULL) {
357 kfree(node);
358 return -ENOMEM;
359 }
360
8e22978c 361 memset(node->ptr, 0, sizeof(struct ci_hw_td));
2e270412
MG
362 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
363 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
364 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
2fc5a7da
PC
365 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
366 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
367
368 if (hwreq->req.length == 0
369 || hwreq->req.length % hwep->ep.maxpacket)
370 mul++;
371 node->ptr->token |= mul << __ffs(TD_MULTO);
372 }
2e270412 373
2dbc5c4c 374 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
2e270412
MG
375 if (length) {
376 node->ptr->page[0] = cpu_to_le32(temp);
377 for (i = 1; i < TD_PAGE_COUNT; i++) {
8e22978c 378 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
2e270412
MG
379 page &= ~TD_RESERVED_MASK;
380 node->ptr->page[i] = cpu_to_le32(page);
381 }
382 }
383
2dbc5c4c 384 hwreq->req.actual += length;
cc9e6c49 385
2dbc5c4c 386 if (!list_empty(&hwreq->tds)) {
cc9e6c49 387 /* get the last entry */
2dbc5c4c 388 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
389 struct td_node, td);
390 lastnode->ptr->next = cpu_to_le32(node->dma);
391 }
392
393 INIT_LIST_HEAD(&node->td);
2dbc5c4c 394 list_add_tail(&node->td, &hwreq->tds);
cc9e6c49
MG
395
396 return 0;
397}
398
aa69a809
DL
399/**
400 * _usb_addr: calculates endpoint address from direction & number
401 * @ep: endpoint
402 */
8e22978c 403static inline u8 _usb_addr(struct ci_hw_ep *ep)
aa69a809
DL
404{
405 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
406}
407
408/**
409 * _hardware_queue: configures a request at hardware level
410 * @gadget: gadget
2dbc5c4c 411 * @hwep: endpoint
aa69a809
DL
412 *
413 * This function returns an error code
414 */
8e22978c 415static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 416{
8e22978c 417 struct ci_hdrc *ci = hwep->ci;
0e6ca199 418 int ret = 0;
2dbc5c4c 419 unsigned rest = hwreq->req.length;
2e270412 420 int pages = TD_PAGE_COUNT;
cc9e6c49 421 struct td_node *firstnode, *lastnode;
aa69a809 422
aa69a809 423 /* don't queue twice */
2dbc5c4c 424 if (hwreq->req.status == -EALREADY)
aa69a809
DL
425 return -EALREADY;
426
2dbc5c4c 427 hwreq->req.status = -EALREADY;
aa69a809 428
2dbc5c4c 429 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
5e0aa49e
AS
430 if (ret)
431 return ret;
432
2e270412
MG
433 /*
434 * The first buffer could be not page aligned.
435 * In that case we have to span into one extra td.
436 */
2dbc5c4c 437 if (hwreq->req.dma % PAGE_SIZE)
2e270412 438 pages--;
cc9e6c49 439
2e270412 440 if (rest == 0)
2dbc5c4c 441 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 442
2e270412 443 while (rest > 0) {
2dbc5c4c 444 unsigned count = min(hwreq->req.length - hwreq->req.actual,
8e22978c 445 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
2dbc5c4c 446 add_td_to_list(hwep, hwreq, count);
2e270412 447 rest -= count;
0e6ca199 448 }
aa69a809 449
2dbc5c4c
AS
450 if (hwreq->req.zero && hwreq->req.length
451 && (hwreq->req.length % hwep->ep.maxpacket == 0))
452 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 453
2dbc5c4c 454 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
2e270412 455
2dbc5c4c 456 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
457 struct td_node, td);
458
459 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
2dbc5c4c 460 if (!hwreq->req.no_interrupt)
cc9e6c49 461 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
a9c17430
MG
462 wmb();
463
2dbc5c4c
AS
464 hwreq->req.actual = 0;
465 if (!list_empty(&hwep->qh.queue)) {
8e22978c 466 struct ci_hw_req *hwreqprev;
2dbc5c4c 467 int n = hw_ep_bit(hwep->num, hwep->dir);
0e6ca199 468 int tmp_stat;
cc9e6c49
MG
469 struct td_node *prevlastnode;
470 u32 next = firstnode->dma & TD_ADDR_MASK;
0e6ca199 471
2dbc5c4c 472 hwreqprev = list_entry(hwep->qh.queue.prev,
8e22978c 473 struct ci_hw_req, queue);
2dbc5c4c 474 prevlastnode = list_entry(hwreqprev->tds.prev,
cc9e6c49
MG
475 struct td_node, td);
476
477 prevlastnode->ptr->next = cpu_to_le32(next);
0e6ca199 478 wmb();
26c696c6 479 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
0e6ca199
PK
480 goto done;
481 do {
26c696c6
RZ
482 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
483 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
484 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
485 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
0e6ca199
PK
486 if (tmp_stat)
487 goto done;
488 }
489
490 /* QH configuration */
2dbc5c4c
AS
491 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
492 hwep->qh.ptr->td.token &=
080ff5f4 493 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
aa69a809 494
2fc5a7da 495 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
2dbc5c4c 496 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
e4ce4ecd 497
2fc5a7da
PC
498 if (hwreq->req.length == 0
499 || hwreq->req.length % hwep->ep.maxpacket)
e4ce4ecd 500 mul++;
2dbc5c4c 501 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
e4ce4ecd
MG
502 }
503
aa69a809
DL
504 wmb(); /* synchronize before ep prime */
505
2dbc5c4c
AS
506 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
507 hwep->type == USB_ENDPOINT_XFER_CONTROL);
0e6ca199
PK
508done:
509 return ret;
aa69a809
DL
510}
511
2e270412
MG
512/*
513 * free_pending_td: remove a pending request for the endpoint
2dbc5c4c 514 * @hwep: endpoint
2e270412 515 */
8e22978c 516static void free_pending_td(struct ci_hw_ep *hwep)
2e270412 517{
2dbc5c4c 518 struct td_node *pending = hwep->pending_td;
2e270412 519
2dbc5c4c
AS
520 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
521 hwep->pending_td = NULL;
2e270412
MG
522 kfree(pending);
523}
524
aa69a809
DL
525/**
526 * _hardware_dequeue: handles a request at hardware level
527 * @gadget: gadget
2dbc5c4c 528 * @hwep: endpoint
aa69a809
DL
529 *
530 * This function returns an error code
531 */
8e22978c 532static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 533{
cc9e6c49 534 u32 tmptoken;
2e270412
MG
535 struct td_node *node, *tmpnode;
536 unsigned remaining_length;
2dbc5c4c 537 unsigned actual = hwreq->req.length;
9e506438 538
2dbc5c4c 539 if (hwreq->req.status != -EALREADY)
aa69a809
DL
540 return -EINVAL;
541
2dbc5c4c 542 hwreq->req.status = 0;
0e6ca199 543
2dbc5c4c 544 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
cc9e6c49 545 tmptoken = le32_to_cpu(node->ptr->token);
2e270412 546 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
2dbc5c4c 547 hwreq->req.status = -EALREADY;
0e6ca199 548 return -EBUSY;
cc9e6c49 549 }
aa69a809 550
2e270412
MG
551 remaining_length = (tmptoken & TD_TOTAL_BYTES);
552 remaining_length >>= __ffs(TD_TOTAL_BYTES);
553 actual -= remaining_length;
554
2dbc5c4c
AS
555 hwreq->req.status = tmptoken & TD_STATUS;
556 if ((TD_STATUS_HALTED & hwreq->req.status)) {
557 hwreq->req.status = -EPIPE;
2e270412 558 break;
2dbc5c4c
AS
559 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
560 hwreq->req.status = -EPROTO;
2e270412 561 break;
2dbc5c4c
AS
562 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
563 hwreq->req.status = -EILSEQ;
2e270412
MG
564 break;
565 }
566
567 if (remaining_length) {
2dbc5c4c
AS
568 if (hwep->dir) {
569 hwreq->req.status = -EPROTO;
2e270412
MG
570 break;
571 }
572 }
573 /*
574 * As the hardware could still address the freed td
575 * which will run the udc unusable, the cleanup of the
576 * td has to be delayed by one.
577 */
2dbc5c4c
AS
578 if (hwep->pending_td)
579 free_pending_td(hwep);
2e270412 580
2dbc5c4c 581 hwep->pending_td = node;
2e270412
MG
582 list_del_init(&node->td);
583 }
aa69a809 584
2dbc5c4c 585 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
aa69a809 586
2dbc5c4c 587 hwreq->req.actual += actual;
aa69a809 588
2dbc5c4c
AS
589 if (hwreq->req.status)
590 return hwreq->req.status;
aa69a809 591
2dbc5c4c 592 return hwreq->req.actual;
aa69a809
DL
593}
594
595/**
596 * _ep_nuke: dequeues all endpoint requests
2dbc5c4c 597 * @hwep: endpoint
aa69a809
DL
598 *
599 * This function returns an error code
600 * Caller must hold lock
601 */
8e22978c 602static int _ep_nuke(struct ci_hw_ep *hwep)
2dbc5c4c
AS
603__releases(hwep->lock)
604__acquires(hwep->lock)
aa69a809 605{
2e270412 606 struct td_node *node, *tmpnode;
2dbc5c4c 607 if (hwep == NULL)
aa69a809
DL
608 return -EINVAL;
609
2dbc5c4c 610 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 611
2dbc5c4c 612 while (!list_empty(&hwep->qh.queue)) {
aa69a809
DL
613
614 /* pop oldest request */
8e22978c
AS
615 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
616 struct ci_hw_req, queue);
7ca2cd29 617
2dbc5c4c
AS
618 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
619 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
620 list_del_init(&node->td);
621 node->ptr = NULL;
622 kfree(node);
7ca2cd29
MG
623 }
624
2dbc5c4c
AS
625 list_del_init(&hwreq->queue);
626 hwreq->req.status = -ESHUTDOWN;
aa69a809 627
2dbc5c4c
AS
628 if (hwreq->req.complete != NULL) {
629 spin_unlock(hwep->lock);
304f7e5e 630 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
2dbc5c4c 631 spin_lock(hwep->lock);
aa69a809
DL
632 }
633 }
2e270412 634
2dbc5c4c
AS
635 if (hwep->pending_td)
636 free_pending_td(hwep);
2e270412 637
aa69a809
DL
638 return 0;
639}
640
641/**
642 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
643 * @gadget: gadget
644 *
645 * This function returns an error code
aa69a809
DL
646 */
647static int _gadget_stop_activity(struct usb_gadget *gadget)
aa69a809
DL
648{
649 struct usb_ep *ep;
8e22978c 650 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
e2b61c1d 651 unsigned long flags;
aa69a809 652
26c696c6
RZ
653 spin_lock_irqsave(&ci->lock, flags);
654 ci->gadget.speed = USB_SPEED_UNKNOWN;
655 ci->remote_wakeup = 0;
656 ci->suspended = 0;
657 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d 658
aa69a809
DL
659 /* flush all endpoints */
660 gadget_for_each_ep(ep, gadget) {
661 usb_ep_fifo_flush(ep);
662 }
26c696c6
RZ
663 usb_ep_fifo_flush(&ci->ep0out->ep);
664 usb_ep_fifo_flush(&ci->ep0in->ep);
aa69a809 665
aa69a809
DL
666 /* make sure to disable all endpoints */
667 gadget_for_each_ep(ep, gadget) {
668 usb_ep_disable(ep);
669 }
aa69a809 670
26c696c6
RZ
671 if (ci->status != NULL) {
672 usb_ep_free_request(&ci->ep0in->ep, ci->status);
673 ci->status = NULL;
aa69a809
DL
674 }
675
aa69a809
DL
676 return 0;
677}
678
679/******************************************************************************
680 * ISR block
681 *****************************************************************************/
682/**
683 * isr_reset_handler: USB reset interrupt handler
26c696c6 684 * @ci: UDC device
aa69a809
DL
685 *
686 * This function resets USB engine after a bus reset occurred
687 */
8e22978c 688static void isr_reset_handler(struct ci_hdrc *ci)
26c696c6
RZ
689__releases(ci->lock)
690__acquires(ci->lock)
aa69a809 691{
aa69a809
DL
692 int retval;
693
a3aee368 694 spin_unlock(&ci->lock);
92b336d7
PC
695 if (ci->gadget.speed != USB_SPEED_UNKNOWN) {
696 if (ci->driver)
697 ci->driver->disconnect(&ci->gadget);
698 }
699
26c696c6 700 retval = _gadget_stop_activity(&ci->gadget);
aa69a809
DL
701 if (retval)
702 goto done;
703
26c696c6 704 retval = hw_usb_reset(ci);
aa69a809
DL
705 if (retval)
706 goto done;
707
26c696c6
RZ
708 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
709 if (ci->status == NULL)
ac1aa6a2 710 retval = -ENOMEM;
ca9cfea0 711
10775eb1
PC
712 usb_gadget_set_state(&ci->gadget, USB_STATE_DEFAULT);
713
b9322252 714done:
26c696c6 715 spin_lock(&ci->lock);
aa69a809 716
aa69a809 717 if (retval)
26c696c6 718 dev_err(ci->dev, "error: %i\n", retval);
aa69a809
DL
719}
720
721/**
722 * isr_get_status_complete: get_status request complete function
723 * @ep: endpoint
724 * @req: request handled
725 *
726 * Caller must release lock
727 */
728static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
729{
0f089094 730 if (ep == NULL || req == NULL)
aa69a809 731 return;
aa69a809
DL
732
733 kfree(req->buf);
734 usb_ep_free_request(ep, req);
735}
736
dd064e9d
MG
737/**
738 * _ep_queue: queues (submits) an I/O request to an endpoint
739 *
740 * Caller must hold lock
741 */
742static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
743 gfp_t __maybe_unused gfp_flags)
744{
8e22978c
AS
745 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
746 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
747 struct ci_hdrc *ci = hwep->ci;
dd064e9d
MG
748 int retval = 0;
749
2dbc5c4c 750 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
dd064e9d
MG
751 return -EINVAL;
752
2dbc5c4c 753 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
dd064e9d 754 if (req->length)
2dbc5c4c 755 hwep = (ci->ep0_dir == RX) ?
dd064e9d 756 ci->ep0out : ci->ep0in;
2dbc5c4c
AS
757 if (!list_empty(&hwep->qh.queue)) {
758 _ep_nuke(hwep);
dd064e9d 759 retval = -EOVERFLOW;
2dbc5c4c
AS
760 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
761 _usb_addr(hwep));
dd064e9d
MG
762 }
763 }
764
2dbc5c4c
AS
765 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
766 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
767 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
e4ce4ecd
MG
768 return -EMSGSIZE;
769 }
770
dd064e9d 771 /* first nuke then test link, e.g. previous status has not sent */
2dbc5c4c
AS
772 if (!list_empty(&hwreq->queue)) {
773 dev_err(hwep->ci->dev, "request already in queue\n");
dd064e9d
MG
774 return -EBUSY;
775 }
776
dd064e9d 777 /* push request */
2dbc5c4c
AS
778 hwreq->req.status = -EINPROGRESS;
779 hwreq->req.actual = 0;
dd064e9d 780
2dbc5c4c 781 retval = _hardware_enqueue(hwep, hwreq);
dd064e9d
MG
782
783 if (retval == -EALREADY)
784 retval = 0;
785 if (!retval)
2dbc5c4c 786 list_add_tail(&hwreq->queue, &hwep->qh.queue);
dd064e9d
MG
787
788 return retval;
789}
790
aa69a809
DL
791/**
792 * isr_get_status_response: get_status request response
26c696c6 793 * @ci: ci struct
aa69a809
DL
794 * @setup: setup request packet
795 *
796 * This function returns an error code
797 */
8e22978c 798static int isr_get_status_response(struct ci_hdrc *ci,
aa69a809 799 struct usb_ctrlrequest *setup)
2dbc5c4c
AS
800__releases(hwep->lock)
801__acquires(hwep->lock)
aa69a809 802{
8e22978c 803 struct ci_hw_ep *hwep = ci->ep0in;
aa69a809
DL
804 struct usb_request *req = NULL;
805 gfp_t gfp_flags = GFP_ATOMIC;
806 int dir, num, retval;
807
2dbc5c4c 808 if (hwep == NULL || setup == NULL)
aa69a809
DL
809 return -EINVAL;
810
2dbc5c4c
AS
811 spin_unlock(hwep->lock);
812 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
813 spin_lock(hwep->lock);
aa69a809
DL
814 if (req == NULL)
815 return -ENOMEM;
816
817 req->complete = isr_get_status_complete;
818 req->length = 2;
819 req->buf = kzalloc(req->length, gfp_flags);
820 if (req->buf == NULL) {
821 retval = -ENOMEM;
822 goto err_free_req;
823 }
824
825 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
e2b61c1d 826 /* Assume that device is bus powered for now. */
26c696c6 827 *(u16 *)req->buf = ci->remote_wakeup << 1;
aa69a809
DL
828 } else if ((setup->bRequestType & USB_RECIP_MASK) \
829 == USB_RECIP_ENDPOINT) {
830 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
831 TX : RX;
832 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
26c696c6 833 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
aa69a809
DL
834 }
835 /* else do nothing; reserved for future use */
836
2dbc5c4c 837 retval = _ep_queue(&hwep->ep, req, gfp_flags);
aa69a809
DL
838 if (retval)
839 goto err_free_buf;
840
841 return 0;
842
843 err_free_buf:
844 kfree(req->buf);
845 err_free_req:
2dbc5c4c
AS
846 spin_unlock(hwep->lock);
847 usb_ep_free_request(&hwep->ep, req);
848 spin_lock(hwep->lock);
aa69a809
DL
849 return retval;
850}
851
541cace8
PK
852/**
853 * isr_setup_status_complete: setup_status request complete function
854 * @ep: endpoint
855 * @req: request handled
856 *
857 * Caller must release lock. Put the port in test mode if test mode
858 * feature is selected.
859 */
860static void
861isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
862{
8e22978c 863 struct ci_hdrc *ci = req->context;
541cace8
PK
864 unsigned long flags;
865
26c696c6
RZ
866 if (ci->setaddr) {
867 hw_usb_set_address(ci, ci->address);
868 ci->setaddr = false;
10775eb1
PC
869 if (ci->address)
870 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
ef15e549
AS
871 }
872
26c696c6
RZ
873 spin_lock_irqsave(&ci->lock, flags);
874 if (ci->test_mode)
875 hw_port_test_set(ci, ci->test_mode);
876 spin_unlock_irqrestore(&ci->lock, flags);
541cace8
PK
877}
878
aa69a809
DL
879/**
880 * isr_setup_status_phase: queues the status phase of a setup transation
26c696c6 881 * @ci: ci struct
aa69a809
DL
882 *
883 * This function returns an error code
884 */
8e22978c 885static int isr_setup_status_phase(struct ci_hdrc *ci)
aa69a809
DL
886{
887 int retval;
8e22978c 888 struct ci_hw_ep *hwep;
aa69a809 889
2dbc5c4c 890 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
26c696c6
RZ
891 ci->status->context = ci;
892 ci->status->complete = isr_setup_status_complete;
aa69a809 893
2dbc5c4c 894 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
aa69a809
DL
895
896 return retval;
897}
898
899/**
900 * isr_tr_complete_low: transaction complete low level handler
2dbc5c4c 901 * @hwep: endpoint
aa69a809
DL
902 *
903 * This function returns an error code
904 * Caller must hold lock
905 */
8e22978c 906static int isr_tr_complete_low(struct ci_hw_ep *hwep)
2dbc5c4c
AS
907__releases(hwep->lock)
908__acquires(hwep->lock)
aa69a809 909{
8e22978c
AS
910 struct ci_hw_req *hwreq, *hwreqtemp;
911 struct ci_hw_ep *hweptemp = hwep;
db89960e 912 int retval = 0;
aa69a809 913
2dbc5c4c 914 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
0e6ca199 915 queue) {
2dbc5c4c 916 retval = _hardware_dequeue(hwep, hwreq);
0e6ca199
PK
917 if (retval < 0)
918 break;
2dbc5c4c
AS
919 list_del_init(&hwreq->queue);
920 if (hwreq->req.complete != NULL) {
921 spin_unlock(hwep->lock);
922 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
923 hwreq->req.length)
924 hweptemp = hwep->ci->ep0in;
304f7e5e 925 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
2dbc5c4c 926 spin_lock(hwep->lock);
0e6ca199 927 }
d9bb9c18
AL
928 }
929
ef907482 930 if (retval == -EBUSY)
0e6ca199 931 retval = 0;
aa69a809 932
aa69a809
DL
933 return retval;
934}
935
d7b00e31
PC
936/**
937 * isr_setup_packet_handler: setup packet handler
938 * @ci: UDC descriptor
939 *
940 * This function handles setup packet
941 */
942static void isr_setup_packet_handler(struct ci_hdrc *ci)
943__releases(ci->lock)
944__acquires(ci->lock)
945{
946 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
947 struct usb_ctrlrequest req;
948 int type, num, dir, err = -EINVAL;
949 u8 tmode = 0;
950
951 /*
952 * Flush data and handshake transactions of previous
953 * setup packet.
954 */
955 _ep_nuke(ci->ep0out);
956 _ep_nuke(ci->ep0in);
957
958 /* read_setup_packet */
959 do {
960 hw_test_and_set_setup_guard(ci);
961 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
962 } while (!hw_test_and_clear_setup_guard(ci));
963
964 type = req.bRequestType;
965
966 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
967
968 switch (req.bRequest) {
969 case USB_REQ_CLEAR_FEATURE:
970 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
971 le16_to_cpu(req.wValue) ==
972 USB_ENDPOINT_HALT) {
973 if (req.wLength != 0)
974 break;
975 num = le16_to_cpu(req.wIndex);
976 dir = num & USB_ENDPOINT_DIR_MASK;
977 num &= USB_ENDPOINT_NUMBER_MASK;
978 if (dir) /* TX */
979 num += ci->hw_ep_max / 2;
980 if (!ci->ci_hw_ep[num].wedge) {
981 spin_unlock(&ci->lock);
982 err = usb_ep_clear_halt(
983 &ci->ci_hw_ep[num].ep);
984 spin_lock(&ci->lock);
985 if (err)
986 break;
987 }
988 err = isr_setup_status_phase(ci);
989 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
990 le16_to_cpu(req.wValue) ==
991 USB_DEVICE_REMOTE_WAKEUP) {
992 if (req.wLength != 0)
993 break;
994 ci->remote_wakeup = 0;
995 err = isr_setup_status_phase(ci);
996 } else {
997 goto delegate;
998 }
999 break;
1000 case USB_REQ_GET_STATUS:
1001 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1002 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1003 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1004 goto delegate;
1005 if (le16_to_cpu(req.wLength) != 2 ||
1006 le16_to_cpu(req.wValue) != 0)
1007 break;
1008 err = isr_get_status_response(ci, &req);
1009 break;
1010 case USB_REQ_SET_ADDRESS:
1011 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1012 goto delegate;
1013 if (le16_to_cpu(req.wLength) != 0 ||
1014 le16_to_cpu(req.wIndex) != 0)
1015 break;
1016 ci->address = (u8)le16_to_cpu(req.wValue);
1017 ci->setaddr = true;
1018 err = isr_setup_status_phase(ci);
1019 break;
1020 case USB_REQ_SET_FEATURE:
1021 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1022 le16_to_cpu(req.wValue) ==
1023 USB_ENDPOINT_HALT) {
1024 if (req.wLength != 0)
1025 break;
1026 num = le16_to_cpu(req.wIndex);
1027 dir = num & USB_ENDPOINT_DIR_MASK;
1028 num &= USB_ENDPOINT_NUMBER_MASK;
1029 if (dir) /* TX */
1030 num += ci->hw_ep_max / 2;
1031
1032 spin_unlock(&ci->lock);
1033 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
1034 spin_lock(&ci->lock);
1035 if (!err)
1036 isr_setup_status_phase(ci);
1037 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1038 if (req.wLength != 0)
1039 break;
1040 switch (le16_to_cpu(req.wValue)) {
1041 case USB_DEVICE_REMOTE_WAKEUP:
1042 ci->remote_wakeup = 1;
1043 err = isr_setup_status_phase(ci);
1044 break;
1045 case USB_DEVICE_TEST_MODE:
1046 tmode = le16_to_cpu(req.wIndex) >> 8;
1047 switch (tmode) {
1048 case TEST_J:
1049 case TEST_K:
1050 case TEST_SE0_NAK:
1051 case TEST_PACKET:
1052 case TEST_FORCE_EN:
1053 ci->test_mode = tmode;
1054 err = isr_setup_status_phase(
1055 ci);
1056 break;
1057 default:
1058 break;
1059 }
95f5555f
LJ
1060 break;
1061 case USB_DEVICE_B_HNP_ENABLE:
1062 if (ci_otg_is_fsm_mode(ci)) {
1063 ci->gadget.b_hnp_enable = 1;
1064 err = isr_setup_status_phase(
1065 ci);
1066 }
1067 break;
d7b00e31
PC
1068 default:
1069 goto delegate;
1070 }
1071 } else {
1072 goto delegate;
1073 }
1074 break;
1075 default:
1076delegate:
1077 if (req.wLength == 0) /* no data phase */
1078 ci->ep0_dir = TX;
1079
1080 spin_unlock(&ci->lock);
1081 err = ci->driver->setup(&ci->gadget, &req);
1082 spin_lock(&ci->lock);
1083 break;
1084 }
1085
1086 if (err < 0) {
1087 spin_unlock(&ci->lock);
1088 if (usb_ep_set_halt(&hwep->ep))
1089 dev_err(ci->dev, "error: ep_set_halt\n");
1090 spin_lock(&ci->lock);
1091 }
1092}
1093
aa69a809
DL
1094/**
1095 * isr_tr_complete_handler: transaction complete interrupt handler
26c696c6 1096 * @ci: UDC descriptor
aa69a809
DL
1097 *
1098 * This function handles traffic events
1099 */
8e22978c 1100static void isr_tr_complete_handler(struct ci_hdrc *ci)
26c696c6
RZ
1101__releases(ci->lock)
1102__acquires(ci->lock)
aa69a809
DL
1103{
1104 unsigned i;
d7b00e31 1105 int err;
aa69a809 1106
26c696c6 1107 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 1108 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
aa69a809 1109
2dbc5c4c 1110 if (hwep->ep.desc == NULL)
aa69a809
DL
1111 continue; /* not configured */
1112
26c696c6 1113 if (hw_test_and_clear_complete(ci, i)) {
2dbc5c4c
AS
1114 err = isr_tr_complete_low(hwep);
1115 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
aa69a809 1116 if (err > 0) /* needs status phase */
26c696c6 1117 err = isr_setup_status_phase(ci);
aa69a809 1118 if (err < 0) {
26c696c6 1119 spin_unlock(&ci->lock);
2dbc5c4c 1120 if (usb_ep_set_halt(&hwep->ep))
26c696c6 1121 dev_err(ci->dev,
0917ba84 1122 "error: ep_set_halt\n");
26c696c6 1123 spin_lock(&ci->lock);
aa69a809
DL
1124 }
1125 }
1126 }
1127
64fc06c4 1128 /* Only handle setup packet below */
d7b00e31
PC
1129 if (i == 0 &&
1130 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1131 isr_setup_packet_handler(ci);
aa69a809
DL
1132 }
1133}
1134
1135/******************************************************************************
1136 * ENDPT block
1137 *****************************************************************************/
1138/**
1139 * ep_enable: configure endpoint, making it usable
1140 *
1141 * Check usb_ep_enable() at "usb_gadget.h" for details
1142 */
1143static int ep_enable(struct usb_ep *ep,
1144 const struct usb_endpoint_descriptor *desc)
1145{
8e22978c 1146 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
ca9cfea0 1147 int retval = 0;
aa69a809 1148 unsigned long flags;
1cd12a9c 1149 u32 cap = 0;
aa69a809 1150
aa69a809
DL
1151 if (ep == NULL || desc == NULL)
1152 return -EINVAL;
1153
2dbc5c4c 1154 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1155
1156 /* only internal SW should enable ctrl endpts */
1157
2dbc5c4c 1158 hwep->ep.desc = desc;
aa69a809 1159
2dbc5c4c
AS
1160 if (!list_empty(&hwep->qh.queue))
1161 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
aa69a809 1162
2dbc5c4c
AS
1163 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1164 hwep->num = usb_endpoint_num(desc);
1165 hwep->type = usb_endpoint_type(desc);
aa69a809 1166
2dbc5c4c
AS
1167 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1168 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
aa69a809 1169
2dbc5c4c 1170 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1cd12a9c 1171 cap |= QH_IOS;
953c6646
AR
1172
1173 cap |= QH_ZLT;
2dbc5c4c 1174 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
2fc5a7da
PC
1175 /*
1176 * For ISO-TX, we set mult at QH as the largest value, and use
1177 * MultO at TD as real mult value.
1178 */
1179 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1180 cap |= 3 << __ffs(QH_MULT);
1cd12a9c 1181
2dbc5c4c 1182 hwep->qh.ptr->cap = cpu_to_le32(cap);
1cd12a9c 1183
2dbc5c4c 1184 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
aa69a809 1185
64fc06c4
PC
1186 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1187 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1188 retval = -EINVAL;
1189 }
1190
ac1aa6a2
A
1191 /*
1192 * Enable endpoints in the HW other than ep0 as ep0
1193 * is always enabled
1194 */
2dbc5c4c
AS
1195 if (hwep->num)
1196 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1197 hwep->type);
aa69a809 1198
2dbc5c4c 1199 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1200 return retval;
1201}
1202
1203/**
1204 * ep_disable: endpoint is no longer usable
1205 *
1206 * Check usb_ep_disable() at "usb_gadget.h" for details
1207 */
1208static int ep_disable(struct usb_ep *ep)
1209{
8e22978c 1210 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1211 int direction, retval = 0;
1212 unsigned long flags;
1213
aa69a809
DL
1214 if (ep == NULL)
1215 return -EINVAL;
2dbc5c4c 1216 else if (hwep->ep.desc == NULL)
aa69a809
DL
1217 return -EBUSY;
1218
2dbc5c4c 1219 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1220
1221 /* only internal SW should disable ctrl endpts */
1222
2dbc5c4c 1223 direction = hwep->dir;
aa69a809 1224 do {
2dbc5c4c
AS
1225 retval |= _ep_nuke(hwep);
1226 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
aa69a809 1227
2dbc5c4c
AS
1228 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1229 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1230
2dbc5c4c 1231 } while (hwep->dir != direction);
aa69a809 1232
2dbc5c4c 1233 hwep->ep.desc = NULL;
aa69a809 1234
2dbc5c4c 1235 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1236 return retval;
1237}
1238
1239/**
1240 * ep_alloc_request: allocate a request object to use with this endpoint
1241 *
1242 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1243 */
1244static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1245{
8e22978c 1246 struct ci_hw_req *hwreq = NULL;
aa69a809 1247
0f089094 1248 if (ep == NULL)
aa69a809 1249 return NULL;
aa69a809 1250
8e22978c 1251 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
2dbc5c4c
AS
1252 if (hwreq != NULL) {
1253 INIT_LIST_HEAD(&hwreq->queue);
1254 INIT_LIST_HEAD(&hwreq->tds);
aa69a809
DL
1255 }
1256
2dbc5c4c 1257 return (hwreq == NULL) ? NULL : &hwreq->req;
aa69a809
DL
1258}
1259
1260/**
1261 * ep_free_request: frees a request object
1262 *
1263 * Check usb_ep_free_request() at "usb_gadget.h" for details
1264 */
1265static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1266{
8e22978c
AS
1267 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1268 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
2e270412 1269 struct td_node *node, *tmpnode;
aa69a809
DL
1270 unsigned long flags;
1271
aa69a809 1272 if (ep == NULL || req == NULL) {
aa69a809 1273 return;
2dbc5c4c
AS
1274 } else if (!list_empty(&hwreq->queue)) {
1275 dev_err(hwep->ci->dev, "freeing queued request\n");
aa69a809
DL
1276 return;
1277 }
1278
2dbc5c4c 1279 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1280
2dbc5c4c
AS
1281 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1282 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
1283 list_del_init(&node->td);
1284 node->ptr = NULL;
1285 kfree(node);
1286 }
cc9e6c49 1287
2dbc5c4c 1288 kfree(hwreq);
aa69a809 1289
2dbc5c4c 1290 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1291}
1292
1293/**
1294 * ep_queue: queues (submits) an I/O request to an endpoint
1295 *
1296 * Check usb_ep_queue()* at usb_gadget.h" for details
1297 */
1298static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1299 gfp_t __maybe_unused gfp_flags)
1300{
8e22978c 1301 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1302 int retval = 0;
1303 unsigned long flags;
1304
2dbc5c4c 1305 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1306 return -EINVAL;
1307
2dbc5c4c 1308 spin_lock_irqsave(hwep->lock, flags);
dd064e9d 1309 retval = _ep_queue(ep, req, gfp_flags);
2dbc5c4c 1310 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1311 return retval;
1312}
1313
1314/**
1315 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1316 *
1317 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1318 */
1319static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1320{
8e22978c
AS
1321 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1322 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
aa69a809 1323 unsigned long flags;
e4adcff0 1324 struct td_node *node, *tmpnode;
aa69a809 1325
2dbc5c4c
AS
1326 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1327 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1328 list_empty(&hwep->qh.queue))
aa69a809
DL
1329 return -EINVAL;
1330
2dbc5c4c 1331 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1332
2dbc5c4c 1333 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 1334
e4adcff0
PC
1335 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1336 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1337 list_del(&node->td);
1338 kfree(node);
1339 }
1340
aa69a809 1341 /* pop request */
2dbc5c4c 1342 list_del_init(&hwreq->queue);
5e0aa49e 1343
2dbc5c4c 1344 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
5e0aa49e 1345
aa69a809
DL
1346 req->status = -ECONNRESET;
1347
2dbc5c4c
AS
1348 if (hwreq->req.complete != NULL) {
1349 spin_unlock(hwep->lock);
304f7e5e 1350 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
2dbc5c4c 1351 spin_lock(hwep->lock);
aa69a809
DL
1352 }
1353
2dbc5c4c 1354 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1355 return 0;
1356}
1357
1358/**
1359 * ep_set_halt: sets the endpoint halt feature
1360 *
1361 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1362 */
1363static int ep_set_halt(struct usb_ep *ep, int value)
1364{
8e22978c 1365 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1366 int direction, retval = 0;
1367 unsigned long flags;
1368
2dbc5c4c 1369 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1370 return -EINVAL;
1371
2dbc5c4c 1372 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
e4ce4ecd
MG
1373 return -EOPNOTSUPP;
1374
2dbc5c4c 1375 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1376
1377#ifndef STALL_IN
1378 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2dbc5c4c
AS
1379 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
1380 !list_empty(&hwep->qh.queue)) {
1381 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1382 return -EAGAIN;
1383 }
1384#endif
1385
2dbc5c4c 1386 direction = hwep->dir;
aa69a809 1387 do {
2dbc5c4c 1388 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
aa69a809
DL
1389
1390 if (!value)
2dbc5c4c 1391 hwep->wedge = 0;
aa69a809 1392
2dbc5c4c
AS
1393 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1394 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1395
2dbc5c4c 1396 } while (hwep->dir != direction);
aa69a809 1397
2dbc5c4c 1398 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1399 return retval;
1400}
1401
1402/**
1403 * ep_set_wedge: sets the halt feature and ignores clear requests
1404 *
1405 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1406 */
1407static int ep_set_wedge(struct usb_ep *ep)
1408{
8e22978c 1409 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1410 unsigned long flags;
1411
2dbc5c4c 1412 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1413 return -EINVAL;
1414
2dbc5c4c
AS
1415 spin_lock_irqsave(hwep->lock, flags);
1416 hwep->wedge = 1;
1417 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1418
1419 return usb_ep_set_halt(ep);
1420}
1421
1422/**
1423 * ep_fifo_flush: flushes contents of a fifo
1424 *
1425 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1426 */
1427static void ep_fifo_flush(struct usb_ep *ep)
1428{
8e22978c 1429 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1430 unsigned long flags;
1431
aa69a809 1432 if (ep == NULL) {
2dbc5c4c 1433 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
aa69a809
DL
1434 return;
1435 }
1436
2dbc5c4c 1437 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1438
2dbc5c4c 1439 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 1440
2dbc5c4c 1441 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1442}
1443
1444/**
1445 * Endpoint-specific part of the API to the USB controller hardware
1446 * Check "usb_gadget.h" for details
1447 */
1448static const struct usb_ep_ops usb_ep_ops = {
1449 .enable = ep_enable,
1450 .disable = ep_disable,
1451 .alloc_request = ep_alloc_request,
1452 .free_request = ep_free_request,
1453 .queue = ep_queue,
1454 .dequeue = ep_dequeue,
1455 .set_halt = ep_set_halt,
1456 .set_wedge = ep_set_wedge,
1457 .fifo_flush = ep_fifo_flush,
1458};
1459
1460/******************************************************************************
1461 * GADGET block
1462 *****************************************************************************/
8e22978c 1463static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
f01ef574 1464{
8e22978c 1465 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
f01ef574
PK
1466 unsigned long flags;
1467 int gadget_ready = 0;
1468
26c696c6
RZ
1469 spin_lock_irqsave(&ci->lock, flags);
1470 ci->vbus_active = is_active;
1471 if (ci->driver)
f01ef574 1472 gadget_ready = 1;
26c696c6 1473 spin_unlock_irqrestore(&ci->lock, flags);
f01ef574
PK
1474
1475 if (gadget_ready) {
1476 if (is_active) {
c036019e 1477 pm_runtime_get_sync(&_gadget->dev);
26c696c6
RZ
1478 hw_device_reset(ci, USBMODE_CM_DC);
1479 hw_device_state(ci, ci->ep0out->qh.dma);
10775eb1 1480 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
f01ef574 1481 } else {
92b336d7
PC
1482 if (ci->driver)
1483 ci->driver->disconnect(&ci->gadget);
26c696c6
RZ
1484 hw_device_state(ci, 0);
1485 if (ci->platdata->notify_event)
1486 ci->platdata->notify_event(ci,
8e22978c 1487 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6 1488 _gadget_stop_activity(&ci->gadget);
c036019e 1489 pm_runtime_put_sync(&_gadget->dev);
10775eb1 1490 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
f01ef574
PK
1491 }
1492 }
1493
1494 return 0;
1495}
1496
8e22978c 1497static int ci_udc_wakeup(struct usb_gadget *_gadget)
e2b61c1d 1498{
8e22978c 1499 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
e2b61c1d
PK
1500 unsigned long flags;
1501 int ret = 0;
1502
26c696c6
RZ
1503 spin_lock_irqsave(&ci->lock, flags);
1504 if (!ci->remote_wakeup) {
e2b61c1d 1505 ret = -EOPNOTSUPP;
e2b61c1d
PK
1506 goto out;
1507 }
26c696c6 1508 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
e2b61c1d 1509 ret = -EINVAL;
e2b61c1d
PK
1510 goto out;
1511 }
26c696c6 1512 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
e2b61c1d 1513out:
26c696c6 1514 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d
PK
1515 return ret;
1516}
1517
8e22978c 1518static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
d860852e 1519{
8e22978c 1520 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
d860852e 1521
26c696c6 1522 if (ci->transceiver)
2dbc5c4c 1523 return usb_phy_set_power(ci->transceiver, ma);
d860852e
PK
1524 return -ENOTSUPP;
1525}
1526
c0a48e6c
MG
1527/* Change Data+ pullup status
1528 * this func is used by usb_gadget_connect/disconnet
1529 */
8e22978c 1530static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
c0a48e6c 1531{
8e22978c 1532 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
c0a48e6c 1533
4a64783b
PC
1534 if (!ci->vbus_active)
1535 return -EOPNOTSUPP;
1536
c0a48e6c
MG
1537 if (is_on)
1538 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1539 else
1540 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1541
1542 return 0;
1543}
1544
8e22978c 1545static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1546 struct usb_gadget_driver *driver);
8e22978c 1547static int ci_udc_stop(struct usb_gadget *gadget,
1f339d84 1548 struct usb_gadget_driver *driver);
aa69a809
DL
1549/**
1550 * Device operations part of the API to the USB controller hardware,
1551 * which don't involve endpoints (or i/o)
1552 * Check "usb_gadget.h" for details
1553 */
f01ef574 1554static const struct usb_gadget_ops usb_gadget_ops = {
8e22978c
AS
1555 .vbus_session = ci_udc_vbus_session,
1556 .wakeup = ci_udc_wakeup,
1557 .pullup = ci_udc_pullup,
1558 .vbus_draw = ci_udc_vbus_draw,
1559 .udc_start = ci_udc_start,
1560 .udc_stop = ci_udc_stop,
f01ef574 1561};
aa69a809 1562
8e22978c 1563static int init_eps(struct ci_hdrc *ci)
aa69a809 1564{
790c2d52 1565 int retval = 0, i, j;
aa69a809 1566
26c696c6 1567 for (i = 0; i < ci->hw_ep_max/2; i++)
ca9cfea0 1568 for (j = RX; j <= TX; j++) {
26c696c6 1569 int k = i + j * ci->hw_ep_max/2;
8e22978c 1570 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
aa69a809 1571
2dbc5c4c 1572 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
ca9cfea0 1573 (j == TX) ? "in" : "out");
aa69a809 1574
2dbc5c4c
AS
1575 hwep->ci = ci;
1576 hwep->lock = &ci->lock;
1577 hwep->td_pool = ci->td_pool;
aa69a809 1578
2dbc5c4c
AS
1579 hwep->ep.name = hwep->name;
1580 hwep->ep.ops = &usb_ep_ops;
7f67c38b
MG
1581 /*
1582 * for ep0: maxP defined in desc, for other
1583 * eps, maxP is set by epautoconfig() called
1584 * by gadget layer
1585 */
e117e742 1586 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
aa69a809 1587
2dbc5c4c
AS
1588 INIT_LIST_HEAD(&hwep->qh.queue);
1589 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1590 &hwep->qh.dma);
1591 if (hwep->qh.ptr == NULL)
aa69a809
DL
1592 retval = -ENOMEM;
1593 else
2dbc5c4c 1594 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
ca9cfea0 1595
d36ade60
AS
1596 /*
1597 * set up shorthands for ep0 out and in endpoints,
1598 * don't add to gadget's ep_list
1599 */
1600 if (i == 0) {
1601 if (j == RX)
2dbc5c4c 1602 ci->ep0out = hwep;
d36ade60 1603 else
2dbc5c4c 1604 ci->ep0in = hwep;
d36ade60 1605
e117e742 1606 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
ca9cfea0 1607 continue;
d36ade60 1608 }
ca9cfea0 1609
2dbc5c4c 1610 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
ca9cfea0 1611 }
790c2d52
AS
1612
1613 return retval;
1614}
1615
8e22978c 1616static void destroy_eps(struct ci_hdrc *ci)
ad6b1b97
MKB
1617{
1618 int i;
1619
1620 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 1621 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
ad6b1b97 1622
4a29567b
PC
1623 if (hwep->pending_td)
1624 free_pending_td(hwep);
2dbc5c4c 1625 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
ad6b1b97
MKB
1626 }
1627}
1628
790c2d52 1629/**
8e22978c 1630 * ci_udc_start: register a gadget driver
1f339d84 1631 * @gadget: our gadget
790c2d52 1632 * @driver: the driver being registered
790c2d52 1633 *
790c2d52
AS
1634 * Interrupts are enabled here.
1635 */
8e22978c 1636static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1637 struct usb_gadget_driver *driver)
790c2d52 1638{
8e22978c 1639 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
790c2d52 1640 unsigned long flags;
790c2d52
AS
1641 int retval = -ENOMEM;
1642
1f339d84 1643 if (driver->disconnect == NULL)
790c2d52 1644 return -EINVAL;
790c2d52 1645
790c2d52 1646
26c696c6
RZ
1647 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1648 retval = usb_ep_enable(&ci->ep0out->ep);
ac1aa6a2
A
1649 if (retval)
1650 return retval;
877c1f54 1651
26c696c6
RZ
1652 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1653 retval = usb_ep_enable(&ci->ep0in->ep);
ac1aa6a2
A
1654 if (retval)
1655 return retval;
26c696c6
RZ
1656
1657 ci->driver = driver;
4dcf720c
LJ
1658
1659 /* Start otg fsm for B-device */
1660 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1661 ci_hdrc_otg_fsm_start(ci);
1662 return retval;
1663 }
1664
26c696c6 1665 pm_runtime_get_sync(&ci->gadget.dev);
d268e9bc 1666 if (ci->vbus_active) {
65b2fb32 1667 spin_lock_irqsave(&ci->lock, flags);
d268e9bc
PC
1668 hw_device_reset(ci, USBMODE_CM_DC);
1669 } else {
1670 pm_runtime_put_sync(&ci->gadget.dev);
65b2fb32 1671 return retval;
f01ef574
PK
1672 }
1673
26c696c6 1674 retval = hw_device_state(ci, ci->ep0out->qh.dma);
65b2fb32 1675 spin_unlock_irqrestore(&ci->lock, flags);
c036019e 1676 if (retval)
26c696c6 1677 pm_runtime_put_sync(&ci->gadget.dev);
aa69a809 1678
aa69a809
DL
1679 return retval;
1680}
aa69a809
DL
1681
1682/**
8e22978c 1683 * ci_udc_stop: unregister a gadget driver
aa69a809 1684 */
8e22978c 1685static int ci_udc_stop(struct usb_gadget *gadget,
1f339d84 1686 struct usb_gadget_driver *driver)
aa69a809 1687{
8e22978c 1688 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1f339d84 1689 unsigned long flags;
aa69a809 1690
26c696c6 1691 spin_lock_irqsave(&ci->lock, flags);
aa69a809 1692
d268e9bc 1693 if (ci->vbus_active) {
26c696c6
RZ
1694 hw_device_state(ci, 0);
1695 if (ci->platdata->notify_event)
1696 ci->platdata->notify_event(ci,
8e22978c 1697 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6
RZ
1698 spin_unlock_irqrestore(&ci->lock, flags);
1699 _gadget_stop_activity(&ci->gadget);
1700 spin_lock_irqsave(&ci->lock, flags);
1701 pm_runtime_put(&ci->gadget.dev);
f01ef574 1702 }
aa69a809 1703
f84839da 1704 ci->driver = NULL;
26c696c6 1705 spin_unlock_irqrestore(&ci->lock, flags);
aa69a809 1706
aa69a809
DL
1707 return 0;
1708}
aa69a809
DL
1709
1710/******************************************************************************
1711 * BUS block
1712 *****************************************************************************/
1713/**
26c696c6 1714 * udc_irq: ci interrupt handler
aa69a809
DL
1715 *
1716 * This function returns IRQ_HANDLED if the IRQ has been handled
1717 * It locks access to registers
1718 */
8e22978c 1719static irqreturn_t udc_irq(struct ci_hdrc *ci)
aa69a809 1720{
aa69a809
DL
1721 irqreturn_t retval;
1722 u32 intr;
1723
26c696c6 1724 if (ci == NULL)
aa69a809 1725 return IRQ_HANDLED;
aa69a809 1726
26c696c6 1727 spin_lock(&ci->lock);
f01ef574 1728
8e22978c 1729 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
26c696c6 1730 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
758fc986 1731 USBMODE_CM_DC) {
26c696c6 1732 spin_unlock(&ci->lock);
f01ef574
PK
1733 return IRQ_NONE;
1734 }
1735 }
26c696c6 1736 intr = hw_test_and_clear_intr_active(ci);
aa69a809 1737
e443b333 1738 if (intr) {
aa69a809 1739 /* order defines priority - do NOT change it */
e443b333 1740 if (USBi_URI & intr)
26c696c6 1741 isr_reset_handler(ci);
e443b333 1742
aa69a809 1743 if (USBi_PCI & intr) {
26c696c6 1744 ci->gadget.speed = hw_port_is_high_speed(ci) ?
aa69a809 1745 USB_SPEED_HIGH : USB_SPEED_FULL;
26c696c6
RZ
1746 if (ci->suspended && ci->driver->resume) {
1747 spin_unlock(&ci->lock);
1748 ci->driver->resume(&ci->gadget);
1749 spin_lock(&ci->lock);
1750 ci->suspended = 0;
e2b61c1d 1751 }
aa69a809 1752 }
e443b333
AS
1753
1754 if (USBi_UI & intr)
26c696c6 1755 isr_tr_complete_handler(ci);
e443b333 1756
e2b61c1d 1757 if (USBi_SLI & intr) {
26c696c6
RZ
1758 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1759 ci->driver->suspend) {
1760 ci->suspended = 1;
1761 spin_unlock(&ci->lock);
1762 ci->driver->suspend(&ci->gadget);
10775eb1
PC
1763 usb_gadget_set_state(&ci->gadget,
1764 USB_STATE_SUSPENDED);
26c696c6 1765 spin_lock(&ci->lock);
e2b61c1d 1766 }
e2b61c1d 1767 }
aa69a809
DL
1768 retval = IRQ_HANDLED;
1769 } else {
aa69a809
DL
1770 retval = IRQ_NONE;
1771 }
26c696c6 1772 spin_unlock(&ci->lock);
aa69a809
DL
1773
1774 return retval;
1775}
1776
aa69a809 1777/**
5f36e231 1778 * udc_start: initialize gadget role
26c696c6 1779 * @ci: chipidea controller
aa69a809 1780 */
8e22978c 1781static int udc_start(struct ci_hdrc *ci)
aa69a809 1782{
26c696c6 1783 struct device *dev = ci->dev;
aa69a809
DL
1784 int retval = 0;
1785
26c696c6 1786 spin_lock_init(&ci->lock);
aa69a809 1787
26c696c6
RZ
1788 ci->gadget.ops = &usb_gadget_ops;
1789 ci->gadget.speed = USB_SPEED_UNKNOWN;
1790 ci->gadget.max_speed = USB_SPEED_HIGH;
95f5555f 1791 ci->gadget.is_otg = ci->is_otg ? 1 : 0;
26c696c6 1792 ci->gadget.name = ci->platdata->name;
aa69a809 1793
26c696c6 1794 INIT_LIST_HEAD(&ci->gadget.ep_list);
aa69a809 1795
790c2d52 1796 /* alloc resources */
8e22978c
AS
1797 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1798 sizeof(struct ci_hw_qh),
1799 64, CI_HDRC_PAGE_SIZE);
26c696c6 1800 if (ci->qh_pool == NULL)
5f36e231 1801 return -ENOMEM;
790c2d52 1802
8e22978c
AS
1803 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1804 sizeof(struct ci_hw_td),
1805 64, CI_HDRC_PAGE_SIZE);
26c696c6 1806 if (ci->td_pool == NULL) {
790c2d52
AS
1807 retval = -ENOMEM;
1808 goto free_qh_pool;
1809 }
1810
26c696c6 1811 retval = init_eps(ci);
790c2d52
AS
1812 if (retval)
1813 goto free_pools;
1814
26c696c6 1815 ci->gadget.ep0 = &ci->ep0in->ep;
f01ef574 1816
26c696c6 1817 retval = usb_add_gadget_udc(dev, &ci->gadget);
0f91349b 1818 if (retval)
74475ede 1819 goto destroy_eps;
0f91349b 1820
26c696c6
RZ
1821 pm_runtime_no_callbacks(&ci->gadget.dev);
1822 pm_runtime_enable(&ci->gadget.dev);
aa69a809 1823
aa69a809
DL
1824 return retval;
1825
ad6b1b97
MKB
1826destroy_eps:
1827 destroy_eps(ci);
790c2d52 1828free_pools:
26c696c6 1829 dma_pool_destroy(ci->td_pool);
790c2d52 1830free_qh_pool:
26c696c6 1831 dma_pool_destroy(ci->qh_pool);
aa69a809
DL
1832 return retval;
1833}
1834
1835/**
3f124d23 1836 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
aa69a809
DL
1837 *
1838 * No interrupts active, the IRQ has been released
1839 */
3f124d23 1840void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
aa69a809 1841{
3f124d23 1842 if (!ci->roles[CI_ROLE_GADGET])
aa69a809 1843 return;
0f089094 1844
26c696c6 1845 usb_del_gadget_udc(&ci->gadget);
aa69a809 1846
ad6b1b97 1847 destroy_eps(ci);
790c2d52 1848
26c696c6
RZ
1849 dma_pool_destroy(ci->td_pool);
1850 dma_pool_destroy(ci->qh_pool);
3f124d23
PC
1851}
1852
1853static int udc_id_switch_for_device(struct ci_hdrc *ci)
1854{
0c33bf78
LJ
1855 if (ci->is_otg)
1856 /* Clear and enable BSV irq */
1857 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1858 OTGSC_BSVIS | OTGSC_BSVIE);
3f124d23
PC
1859
1860 return 0;
1861}
1862
1863static void udc_id_switch_for_host(struct ci_hdrc *ci)
1864{
0c33bf78
LJ
1865 /*
1866 * host doesn't care B_SESSION_VALID event
1867 * so clear and disbale BSV irq
1868 */
1869 if (ci->is_otg)
1870 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
5f36e231
AS
1871}
1872
1873/**
1874 * ci_hdrc_gadget_init - initialize device related bits
1875 * ci: the controller
1876 *
3f124d23 1877 * This function initializes the gadget, if the device is "device capable".
5f36e231 1878 */
8e22978c 1879int ci_hdrc_gadget_init(struct ci_hdrc *ci)
5f36e231
AS
1880{
1881 struct ci_role_driver *rdrv;
1882
1883 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1884 return -ENXIO;
1885
1886 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1887 if (!rdrv)
1888 return -ENOMEM;
1889
3f124d23
PC
1890 rdrv->start = udc_id_switch_for_device;
1891 rdrv->stop = udc_id_switch_for_host;
5f36e231
AS
1892 rdrv->irq = udc_irq;
1893 rdrv->name = "gadget";
1894 ci->roles[CI_ROLE_GADGET] = rdrv;
aa69a809 1895
3f124d23 1896 return udc_start(ci);
aa69a809 1897}