]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - drivers/usb/chipidea/udc.c
Merge 4.4-rc6 into usb-next
[mirror_ubuntu-hirsute-kernel.git] / drivers / usb / chipidea / udc.c
CommitLineData
aa69a809 1/*
eb70e5ab 2 * udc.c - ChipIdea UDC driver
aa69a809
DL
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
36825a2d 13#include <linux/delay.h>
aa69a809
DL
14#include <linux/device.h>
15#include <linux/dmapool.h>
ded017ee 16#include <linux/err.h>
5b08319f 17#include <linux/irqreturn.h>
aa69a809 18#include <linux/kernel.h>
5a0e3ad6 19#include <linux/slab.h>
c036019e 20#include <linux/pm_runtime.h>
aa69a809
DL
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
95f5555f 23#include <linux/usb/otg-fsm.h>
e443b333 24#include <linux/usb/chipidea.h>
aa69a809 25
e443b333
AS
26#include "ci.h"
27#include "udc.h"
28#include "bits.h"
29#include "debug.h"
3f124d23 30#include "otg.h"
4dcf720c 31#include "otg_fsm.h"
954aad8c 32
aa69a809
DL
33/* control endpoint description */
34static const struct usb_endpoint_descriptor
ca9cfea0 35ctrl_endpt_out_desc = {
aa69a809
DL
36 .bLength = USB_DT_ENDPOINT_SIZE,
37 .bDescriptorType = USB_DT_ENDPOINT,
38
ca9cfea0
PK
39 .bEndpointAddress = USB_DIR_OUT,
40 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
41 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
42};
43
44static const struct usb_endpoint_descriptor
45ctrl_endpt_in_desc = {
46 .bLength = USB_DT_ENDPOINT_SIZE,
47 .bDescriptorType = USB_DT_ENDPOINT,
48
49 .bEndpointAddress = USB_DIR_IN,
aa69a809
DL
50 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
51 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
52};
53
aa69a809
DL
54/**
55 * hw_ep_bit: calculates the bit number
56 * @num: endpoint number
57 * @dir: endpoint direction
58 *
59 * This function returns bit number
60 */
61static inline int hw_ep_bit(int num, int dir)
62{
63 return num + (dir ? 16 : 0);
64}
65
8e22978c 66static inline int ep_to_bit(struct ci_hdrc *ci, int n)
dd39c358 67{
26c696c6 68 int fill = 16 - ci->hw_ep_max / 2;
dd39c358 69
26c696c6 70 if (n >= ci->hw_ep_max / 2)
dd39c358
MKB
71 n += fill;
72
73 return n;
74}
75
aa69a809 76/**
c0a48e6c 77 * hw_device_state: enables/disables interrupts (execute without interruption)
aa69a809
DL
78 * @dma: 0 => disable, !0 => enable and set dma engine
79 *
80 * This function returns an error code
81 */
8e22978c 82static int hw_device_state(struct ci_hdrc *ci, u32 dma)
aa69a809
DL
83{
84 if (dma) {
26c696c6 85 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
aa69a809 86 /* interrupt, error, port change, reset, sleep/suspend */
26c696c6 87 hw_write(ci, OP_USBINTR, ~0,
aa69a809 88 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
aa69a809 89 } else {
26c696c6 90 hw_write(ci, OP_USBINTR, ~0, 0);
aa69a809
DL
91 }
92 return 0;
93}
94
95/**
96 * hw_ep_flush: flush endpoint fifo (execute without interruption)
97 * @num: endpoint number
98 * @dir: endpoint direction
99 *
100 * This function returns an error code
101 */
8e22978c 102static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
103{
104 int n = hw_ep_bit(num, dir);
105
106 do {
107 /* flush any pending transfer */
5bf5dbed 108 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
26c696c6 109 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
aa69a809 110 cpu_relax();
26c696c6 111 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
aa69a809
DL
112
113 return 0;
114}
115
116/**
117 * hw_ep_disable: disables endpoint (execute without interruption)
118 * @num: endpoint number
119 * @dir: endpoint direction
120 *
121 * This function returns an error code
122 */
8e22978c 123static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
aa69a809 124{
26c696c6
RZ
125 hw_ep_flush(ci, num, dir);
126 hw_write(ci, OP_ENDPTCTRL + num,
d3595d13 127 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
aa69a809
DL
128 return 0;
129}
130
131/**
132 * hw_ep_enable: enables endpoint (execute without interruption)
133 * @num: endpoint number
134 * @dir: endpoint direction
135 * @type: endpoint type
136 *
137 * This function returns an error code
138 */
8e22978c 139static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
aa69a809
DL
140{
141 u32 mask, data;
142
143 if (dir) {
144 mask = ENDPTCTRL_TXT; /* type */
727b4ddb 145 data = type << __ffs(mask);
aa69a809
DL
146
147 mask |= ENDPTCTRL_TXS; /* unstall */
148 mask |= ENDPTCTRL_TXR; /* reset data toggle */
149 data |= ENDPTCTRL_TXR;
150 mask |= ENDPTCTRL_TXE; /* enable */
151 data |= ENDPTCTRL_TXE;
152 } else {
153 mask = ENDPTCTRL_RXT; /* type */
727b4ddb 154 data = type << __ffs(mask);
aa69a809
DL
155
156 mask |= ENDPTCTRL_RXS; /* unstall */
157 mask |= ENDPTCTRL_RXR; /* reset data toggle */
158 data |= ENDPTCTRL_RXR;
159 mask |= ENDPTCTRL_RXE; /* enable */
160 data |= ENDPTCTRL_RXE;
161 }
26c696c6 162 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
aa69a809
DL
163 return 0;
164}
165
166/**
167 * hw_ep_get_halt: return endpoint halt status
168 * @num: endpoint number
169 * @dir: endpoint direction
170 *
171 * This function returns 1 if endpoint halted
172 */
8e22978c 173static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
174{
175 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
176
26c696c6 177 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
aa69a809
DL
178}
179
aa69a809
DL
180/**
181 * hw_ep_prime: primes endpoint (execute without interruption)
182 * @num: endpoint number
183 * @dir: endpoint direction
184 * @is_ctrl: true if control endpoint
185 *
186 * This function returns an error code
187 */
8e22978c 188static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
aa69a809
DL
189{
190 int n = hw_ep_bit(num, dir);
191
26c696c6 192 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
193 return -EAGAIN;
194
5bf5dbed 195 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
aa69a809 196
26c696c6 197 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
aa69a809 198 cpu_relax();
26c696c6 199 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
200 return -EAGAIN;
201
202 /* status shoult be tested according with manual but it doesn't work */
203 return 0;
204}
205
206/**
207 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
208 * without interruption)
209 * @num: endpoint number
210 * @dir: endpoint direction
211 * @value: true => stall, false => unstall
212 *
213 * This function returns an error code
214 */
8e22978c 215static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
aa69a809
DL
216{
217 if (value != 0 && value != 1)
218 return -EINVAL;
219
220 do {
8e22978c 221 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
aa69a809
DL
222 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
223 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
224
225 /* data toggle - reserved for EP0 but it's in ESS */
26c696c6 226 hw_write(ci, reg, mask_xs|mask_xr,
262c1632 227 value ? mask_xs : mask_xr);
26c696c6 228 } while (value != hw_ep_get_halt(ci, num, dir));
aa69a809
DL
229
230 return 0;
231}
232
aa69a809
DL
233/**
234 * hw_is_port_high_speed: test if port is high speed
235 *
236 * This function returns true if high speed port
237 */
8e22978c 238static int hw_port_is_high_speed(struct ci_hdrc *ci)
aa69a809 239{
26c696c6
RZ
240 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
241 hw_read(ci, OP_PORTSC, PORTSC_HSP);
aa69a809
DL
242}
243
aa69a809
DL
244/**
245 * hw_test_and_clear_complete: test & clear complete status (execute without
246 * interruption)
dd39c358 247 * @n: endpoint number
aa69a809
DL
248 *
249 * This function returns complete status
250 */
8e22978c 251static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
aa69a809 252{
26c696c6
RZ
253 n = ep_to_bit(ci, n);
254 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
aa69a809
DL
255}
256
257/**
258 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
259 * without interruption)
260 *
261 * This function returns active interrutps
262 */
8e22978c 263static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
aa69a809 264{
26c696c6 265 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
aa69a809 266
26c696c6 267 hw_write(ci, OP_USBSTS, ~0, reg);
aa69a809
DL
268 return reg;
269}
270
271/**
272 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
273 * interruption)
274 *
275 * This function returns guard value
276 */
8e22978c 277static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
aa69a809 278{
26c696c6 279 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
aa69a809
DL
280}
281
282/**
283 * hw_test_and_set_setup_guard: test & set setup guard (execute without
284 * interruption)
285 *
286 * This function returns guard value
287 */
8e22978c 288static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
aa69a809 289{
26c696c6 290 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
aa69a809
DL
291}
292
293/**
294 * hw_usb_set_address: configures USB address (execute without interruption)
295 * @value: new USB address
296 *
ef15e549
AS
297 * This function explicitly sets the address, without the "USBADRA" (advance)
298 * feature, which is not supported by older versions of the controller.
aa69a809 299 */
8e22978c 300static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
aa69a809 301{
26c696c6 302 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
727b4ddb 303 value << __ffs(DEVICEADDR_USBADR));
aa69a809
DL
304}
305
306/**
307 * hw_usb_reset: restart device after a bus reset (execute without
308 * interruption)
309 *
310 * This function returns an error code
311 */
8e22978c 312static int hw_usb_reset(struct ci_hdrc *ci)
aa69a809 313{
26c696c6 314 hw_usb_set_address(ci, 0);
aa69a809
DL
315
316 /* ESS flushes only at end?!? */
26c696c6 317 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
aa69a809
DL
318
319 /* clear setup token semaphores */
26c696c6 320 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
aa69a809
DL
321
322 /* clear complete status */
26c696c6 323 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
aa69a809
DL
324
325 /* wait until all bits cleared */
26c696c6 326 while (hw_read(ci, OP_ENDPTPRIME, ~0))
aa69a809
DL
327 udelay(10); /* not RTOS friendly */
328
329 /* reset all endpoints ? */
330
331 /* reset internal status and wait for further instructions
332 no need to verify the port reset status (ESS does it) */
333
334 return 0;
335}
336
aa69a809
DL
337/******************************************************************************
338 * UTIL block
339 *****************************************************************************/
cc9e6c49 340
8e22978c 341static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
cc9e6c49
MG
342 unsigned length)
343{
2e270412
MG
344 int i;
345 u32 temp;
cc9e6c49
MG
346 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
347 GFP_ATOMIC);
348
349 if (node == NULL)
350 return -ENOMEM;
351
84c1eeb0 352 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC,
cc9e6c49
MG
353 &node->dma);
354 if (node->ptr == NULL) {
355 kfree(node);
356 return -ENOMEM;
357 }
358
2e270412
MG
359 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
360 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
361 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
2fc5a7da
PC
362 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
363 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
364
365 if (hwreq->req.length == 0
366 || hwreq->req.length % hwep->ep.maxpacket)
367 mul++;
368 node->ptr->token |= mul << __ffs(TD_MULTO);
369 }
2e270412 370
2dbc5c4c 371 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
2e270412
MG
372 if (length) {
373 node->ptr->page[0] = cpu_to_le32(temp);
374 for (i = 1; i < TD_PAGE_COUNT; i++) {
8e22978c 375 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
2e270412
MG
376 page &= ~TD_RESERVED_MASK;
377 node->ptr->page[i] = cpu_to_le32(page);
378 }
379 }
380
2dbc5c4c 381 hwreq->req.actual += length;
cc9e6c49 382
2dbc5c4c 383 if (!list_empty(&hwreq->tds)) {
cc9e6c49 384 /* get the last entry */
2dbc5c4c 385 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
386 struct td_node, td);
387 lastnode->ptr->next = cpu_to_le32(node->dma);
388 }
389
390 INIT_LIST_HEAD(&node->td);
2dbc5c4c 391 list_add_tail(&node->td, &hwreq->tds);
cc9e6c49
MG
392
393 return 0;
394}
395
aa69a809
DL
396/**
397 * _usb_addr: calculates endpoint address from direction & number
398 * @ep: endpoint
399 */
8e22978c 400static inline u8 _usb_addr(struct ci_hw_ep *ep)
aa69a809
DL
401{
402 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
403}
404
405/**
406 * _hardware_queue: configures a request at hardware level
407 * @gadget: gadget
2dbc5c4c 408 * @hwep: endpoint
aa69a809
DL
409 *
410 * This function returns an error code
411 */
8e22978c 412static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 413{
8e22978c 414 struct ci_hdrc *ci = hwep->ci;
0e6ca199 415 int ret = 0;
2dbc5c4c 416 unsigned rest = hwreq->req.length;
2e270412 417 int pages = TD_PAGE_COUNT;
cc9e6c49 418 struct td_node *firstnode, *lastnode;
aa69a809 419
aa69a809 420 /* don't queue twice */
2dbc5c4c 421 if (hwreq->req.status == -EALREADY)
aa69a809
DL
422 return -EALREADY;
423
2dbc5c4c 424 hwreq->req.status = -EALREADY;
aa69a809 425
2dbc5c4c 426 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
5e0aa49e
AS
427 if (ret)
428 return ret;
429
2e270412
MG
430 /*
431 * The first buffer could be not page aligned.
432 * In that case we have to span into one extra td.
433 */
2dbc5c4c 434 if (hwreq->req.dma % PAGE_SIZE)
2e270412 435 pages--;
cc9e6c49 436
2e270412 437 if (rest == 0)
2dbc5c4c 438 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 439
2e270412 440 while (rest > 0) {
2dbc5c4c 441 unsigned count = min(hwreq->req.length - hwreq->req.actual,
8e22978c 442 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
2dbc5c4c 443 add_td_to_list(hwep, hwreq, count);
2e270412 444 rest -= count;
0e6ca199 445 }
aa69a809 446
a4da4f12 447 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
2dbc5c4c
AS
448 && (hwreq->req.length % hwep->ep.maxpacket == 0))
449 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 450
2dbc5c4c 451 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
2e270412 452
2dbc5c4c 453 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
454 struct td_node, td);
455
456 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
2dbc5c4c 457 if (!hwreq->req.no_interrupt)
cc9e6c49 458 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
a9c17430
MG
459 wmb();
460
2dbc5c4c
AS
461 hwreq->req.actual = 0;
462 if (!list_empty(&hwep->qh.queue)) {
8e22978c 463 struct ci_hw_req *hwreqprev;
2dbc5c4c 464 int n = hw_ep_bit(hwep->num, hwep->dir);
0e6ca199 465 int tmp_stat;
cc9e6c49
MG
466 struct td_node *prevlastnode;
467 u32 next = firstnode->dma & TD_ADDR_MASK;
0e6ca199 468
2dbc5c4c 469 hwreqprev = list_entry(hwep->qh.queue.prev,
8e22978c 470 struct ci_hw_req, queue);
2dbc5c4c 471 prevlastnode = list_entry(hwreqprev->tds.prev,
cc9e6c49
MG
472 struct td_node, td);
473
474 prevlastnode->ptr->next = cpu_to_le32(next);
0e6ca199 475 wmb();
26c696c6 476 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
0e6ca199
PK
477 goto done;
478 do {
26c696c6
RZ
479 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
480 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
481 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
482 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
0e6ca199
PK
483 if (tmp_stat)
484 goto done;
485 }
486
487 /* QH configuration */
2dbc5c4c
AS
488 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
489 hwep->qh.ptr->td.token &=
080ff5f4 490 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
aa69a809 491
2fc5a7da 492 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
2dbc5c4c 493 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
e4ce4ecd 494
2fc5a7da
PC
495 if (hwreq->req.length == 0
496 || hwreq->req.length % hwep->ep.maxpacket)
e4ce4ecd 497 mul++;
2dbc5c4c 498 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
e4ce4ecd
MG
499 }
500
aa69a809
DL
501 wmb(); /* synchronize before ep prime */
502
2dbc5c4c
AS
503 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
504 hwep->type == USB_ENDPOINT_XFER_CONTROL);
0e6ca199
PK
505done:
506 return ret;
aa69a809
DL
507}
508
2e270412
MG
509/*
510 * free_pending_td: remove a pending request for the endpoint
2dbc5c4c 511 * @hwep: endpoint
2e270412 512 */
8e22978c 513static void free_pending_td(struct ci_hw_ep *hwep)
2e270412 514{
2dbc5c4c 515 struct td_node *pending = hwep->pending_td;
2e270412 516
2dbc5c4c
AS
517 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
518 hwep->pending_td = NULL;
2e270412
MG
519 kfree(pending);
520}
521
06bdfcdb
SM
522static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
523 struct td_node *node)
524{
525 hwep->qh.ptr->td.next = node->dma;
526 hwep->qh.ptr->td.token &=
527 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
528
529 /* Synchronize before ep prime */
530 wmb();
531
532 return hw_ep_prime(ci, hwep->num, hwep->dir,
533 hwep->type == USB_ENDPOINT_XFER_CONTROL);
534}
535
aa69a809
DL
536/**
537 * _hardware_dequeue: handles a request at hardware level
538 * @gadget: gadget
2dbc5c4c 539 * @hwep: endpoint
aa69a809
DL
540 *
541 * This function returns an error code
542 */
8e22978c 543static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 544{
cc9e6c49 545 u32 tmptoken;
2e270412
MG
546 struct td_node *node, *tmpnode;
547 unsigned remaining_length;
2dbc5c4c 548 unsigned actual = hwreq->req.length;
06bdfcdb 549 struct ci_hdrc *ci = hwep->ci;
9e506438 550
2dbc5c4c 551 if (hwreq->req.status != -EALREADY)
aa69a809
DL
552 return -EINVAL;
553
2dbc5c4c 554 hwreq->req.status = 0;
0e6ca199 555
2dbc5c4c 556 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
cc9e6c49 557 tmptoken = le32_to_cpu(node->ptr->token);
2e270412 558 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
06bdfcdb
SM
559 int n = hw_ep_bit(hwep->num, hwep->dir);
560
561 if (ci->rev == CI_REVISION_24)
562 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
563 reprime_dtd(ci, hwep, node);
2dbc5c4c 564 hwreq->req.status = -EALREADY;
0e6ca199 565 return -EBUSY;
cc9e6c49 566 }
aa69a809 567
2e270412
MG
568 remaining_length = (tmptoken & TD_TOTAL_BYTES);
569 remaining_length >>= __ffs(TD_TOTAL_BYTES);
570 actual -= remaining_length;
571
2dbc5c4c
AS
572 hwreq->req.status = tmptoken & TD_STATUS;
573 if ((TD_STATUS_HALTED & hwreq->req.status)) {
574 hwreq->req.status = -EPIPE;
2e270412 575 break;
2dbc5c4c
AS
576 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
577 hwreq->req.status = -EPROTO;
2e270412 578 break;
2dbc5c4c
AS
579 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
580 hwreq->req.status = -EILSEQ;
2e270412
MG
581 break;
582 }
583
584 if (remaining_length) {
2dbc5c4c
AS
585 if (hwep->dir) {
586 hwreq->req.status = -EPROTO;
2e270412
MG
587 break;
588 }
589 }
590 /*
591 * As the hardware could still address the freed td
592 * which will run the udc unusable, the cleanup of the
593 * td has to be delayed by one.
594 */
2dbc5c4c
AS
595 if (hwep->pending_td)
596 free_pending_td(hwep);
2e270412 597
2dbc5c4c 598 hwep->pending_td = node;
2e270412
MG
599 list_del_init(&node->td);
600 }
aa69a809 601
2dbc5c4c 602 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
aa69a809 603
2dbc5c4c 604 hwreq->req.actual += actual;
aa69a809 605
2dbc5c4c
AS
606 if (hwreq->req.status)
607 return hwreq->req.status;
aa69a809 608
2dbc5c4c 609 return hwreq->req.actual;
aa69a809
DL
610}
611
612/**
613 * _ep_nuke: dequeues all endpoint requests
2dbc5c4c 614 * @hwep: endpoint
aa69a809
DL
615 *
616 * This function returns an error code
617 * Caller must hold lock
618 */
8e22978c 619static int _ep_nuke(struct ci_hw_ep *hwep)
2dbc5c4c
AS
620__releases(hwep->lock)
621__acquires(hwep->lock)
aa69a809 622{
2e270412 623 struct td_node *node, *tmpnode;
2dbc5c4c 624 if (hwep == NULL)
aa69a809
DL
625 return -EINVAL;
626
2dbc5c4c 627 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 628
2dbc5c4c 629 while (!list_empty(&hwep->qh.queue)) {
aa69a809
DL
630
631 /* pop oldest request */
8e22978c
AS
632 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
633 struct ci_hw_req, queue);
7ca2cd29 634
2dbc5c4c
AS
635 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
636 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
637 list_del_init(&node->td);
638 node->ptr = NULL;
639 kfree(node);
7ca2cd29
MG
640 }
641
2dbc5c4c
AS
642 list_del_init(&hwreq->queue);
643 hwreq->req.status = -ESHUTDOWN;
aa69a809 644
2dbc5c4c
AS
645 if (hwreq->req.complete != NULL) {
646 spin_unlock(hwep->lock);
304f7e5e 647 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
2dbc5c4c 648 spin_lock(hwep->lock);
aa69a809
DL
649 }
650 }
2e270412 651
2dbc5c4c
AS
652 if (hwep->pending_td)
653 free_pending_td(hwep);
2e270412 654
aa69a809
DL
655 return 0;
656}
657
56ffa1d1
PC
658static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
659{
660 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
661 int direction, retval = 0;
662 unsigned long flags;
663
664 if (ep == NULL || hwep->ep.desc == NULL)
665 return -EINVAL;
666
667 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
668 return -EOPNOTSUPP;
669
670 spin_lock_irqsave(hwep->lock, flags);
671
672 if (value && hwep->dir == TX && check_transfer &&
673 !list_empty(&hwep->qh.queue) &&
674 !usb_endpoint_xfer_control(hwep->ep.desc)) {
675 spin_unlock_irqrestore(hwep->lock, flags);
676 return -EAGAIN;
677 }
678
679 direction = hwep->dir;
680 do {
681 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
682
683 if (!value)
684 hwep->wedge = 0;
685
686 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
687 hwep->dir = (hwep->dir == TX) ? RX : TX;
688
689 } while (hwep->dir != direction);
690
691 spin_unlock_irqrestore(hwep->lock, flags);
692 return retval;
693}
694
695
aa69a809
DL
696/**
697 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
698 * @gadget: gadget
699 *
700 * This function returns an error code
aa69a809
DL
701 */
702static int _gadget_stop_activity(struct usb_gadget *gadget)
aa69a809
DL
703{
704 struct usb_ep *ep;
8e22978c 705 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
e2b61c1d 706 unsigned long flags;
aa69a809 707
26c696c6
RZ
708 spin_lock_irqsave(&ci->lock, flags);
709 ci->gadget.speed = USB_SPEED_UNKNOWN;
710 ci->remote_wakeup = 0;
711 ci->suspended = 0;
712 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d 713
aa69a809
DL
714 /* flush all endpoints */
715 gadget_for_each_ep(ep, gadget) {
716 usb_ep_fifo_flush(ep);
717 }
26c696c6
RZ
718 usb_ep_fifo_flush(&ci->ep0out->ep);
719 usb_ep_fifo_flush(&ci->ep0in->ep);
aa69a809 720
aa69a809
DL
721 /* make sure to disable all endpoints */
722 gadget_for_each_ep(ep, gadget) {
723 usb_ep_disable(ep);
724 }
aa69a809 725
26c696c6
RZ
726 if (ci->status != NULL) {
727 usb_ep_free_request(&ci->ep0in->ep, ci->status);
728 ci->status = NULL;
aa69a809
DL
729 }
730
aa69a809
DL
731 return 0;
732}
733
734/******************************************************************************
735 * ISR block
736 *****************************************************************************/
737/**
738 * isr_reset_handler: USB reset interrupt handler
26c696c6 739 * @ci: UDC device
aa69a809
DL
740 *
741 * This function resets USB engine after a bus reset occurred
742 */
8e22978c 743static void isr_reset_handler(struct ci_hdrc *ci)
26c696c6
RZ
744__releases(ci->lock)
745__acquires(ci->lock)
aa69a809 746{
aa69a809
DL
747 int retval;
748
a3aee368 749 spin_unlock(&ci->lock);
afbe4775
PC
750 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
751 usb_gadget_udc_reset(&ci->gadget, ci->driver);
92b336d7 752
26c696c6 753 retval = _gadget_stop_activity(&ci->gadget);
aa69a809
DL
754 if (retval)
755 goto done;
756
26c696c6 757 retval = hw_usb_reset(ci);
aa69a809
DL
758 if (retval)
759 goto done;
760
26c696c6
RZ
761 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
762 if (ci->status == NULL)
ac1aa6a2 763 retval = -ENOMEM;
ca9cfea0 764
b9322252 765done:
26c696c6 766 spin_lock(&ci->lock);
aa69a809 767
aa69a809 768 if (retval)
26c696c6 769 dev_err(ci->dev, "error: %i\n", retval);
aa69a809
DL
770}
771
772/**
773 * isr_get_status_complete: get_status request complete function
774 * @ep: endpoint
775 * @req: request handled
776 *
777 * Caller must release lock
778 */
779static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
780{
0f089094 781 if (ep == NULL || req == NULL)
aa69a809 782 return;
aa69a809
DL
783
784 kfree(req->buf);
785 usb_ep_free_request(ep, req);
786}
787
dd064e9d
MG
788/**
789 * _ep_queue: queues (submits) an I/O request to an endpoint
790 *
791 * Caller must hold lock
792 */
793static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
794 gfp_t __maybe_unused gfp_flags)
795{
8e22978c
AS
796 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
797 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
798 struct ci_hdrc *ci = hwep->ci;
dd064e9d
MG
799 int retval = 0;
800
2dbc5c4c 801 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
dd064e9d
MG
802 return -EINVAL;
803
2dbc5c4c 804 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
dd064e9d 805 if (req->length)
2dbc5c4c 806 hwep = (ci->ep0_dir == RX) ?
dd064e9d 807 ci->ep0out : ci->ep0in;
2dbc5c4c
AS
808 if (!list_empty(&hwep->qh.queue)) {
809 _ep_nuke(hwep);
dd064e9d 810 retval = -EOVERFLOW;
2dbc5c4c
AS
811 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
812 _usb_addr(hwep));
dd064e9d
MG
813 }
814 }
815
2dbc5c4c
AS
816 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
817 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
818 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
e4ce4ecd
MG
819 return -EMSGSIZE;
820 }
821
dd064e9d 822 /* first nuke then test link, e.g. previous status has not sent */
2dbc5c4c
AS
823 if (!list_empty(&hwreq->queue)) {
824 dev_err(hwep->ci->dev, "request already in queue\n");
dd064e9d
MG
825 return -EBUSY;
826 }
827
dd064e9d 828 /* push request */
2dbc5c4c
AS
829 hwreq->req.status = -EINPROGRESS;
830 hwreq->req.actual = 0;
dd064e9d 831
2dbc5c4c 832 retval = _hardware_enqueue(hwep, hwreq);
dd064e9d
MG
833
834 if (retval == -EALREADY)
835 retval = 0;
836 if (!retval)
2dbc5c4c 837 list_add_tail(&hwreq->queue, &hwep->qh.queue);
dd064e9d
MG
838
839 return retval;
840}
841
aa69a809
DL
842/**
843 * isr_get_status_response: get_status request response
26c696c6 844 * @ci: ci struct
aa69a809
DL
845 * @setup: setup request packet
846 *
847 * This function returns an error code
848 */
8e22978c 849static int isr_get_status_response(struct ci_hdrc *ci,
aa69a809 850 struct usb_ctrlrequest *setup)
2dbc5c4c
AS
851__releases(hwep->lock)
852__acquires(hwep->lock)
aa69a809 853{
8e22978c 854 struct ci_hw_ep *hwep = ci->ep0in;
aa69a809
DL
855 struct usb_request *req = NULL;
856 gfp_t gfp_flags = GFP_ATOMIC;
857 int dir, num, retval;
858
2dbc5c4c 859 if (hwep == NULL || setup == NULL)
aa69a809
DL
860 return -EINVAL;
861
2dbc5c4c
AS
862 spin_unlock(hwep->lock);
863 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
864 spin_lock(hwep->lock);
aa69a809
DL
865 if (req == NULL)
866 return -ENOMEM;
867
868 req->complete = isr_get_status_complete;
869 req->length = 2;
870 req->buf = kzalloc(req->length, gfp_flags);
871 if (req->buf == NULL) {
872 retval = -ENOMEM;
873 goto err_free_req;
874 }
875
876 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1009f9a3
PC
877 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
878 ci->gadget.is_selfpowered;
aa69a809
DL
879 } else if ((setup->bRequestType & USB_RECIP_MASK) \
880 == USB_RECIP_ENDPOINT) {
881 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
882 TX : RX;
883 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
26c696c6 884 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
aa69a809
DL
885 }
886 /* else do nothing; reserved for future use */
887
2dbc5c4c 888 retval = _ep_queue(&hwep->ep, req, gfp_flags);
aa69a809
DL
889 if (retval)
890 goto err_free_buf;
891
892 return 0;
893
894 err_free_buf:
895 kfree(req->buf);
896 err_free_req:
2dbc5c4c
AS
897 spin_unlock(hwep->lock);
898 usb_ep_free_request(&hwep->ep, req);
899 spin_lock(hwep->lock);
aa69a809
DL
900 return retval;
901}
902
541cace8
PK
903/**
904 * isr_setup_status_complete: setup_status request complete function
905 * @ep: endpoint
906 * @req: request handled
907 *
908 * Caller must release lock. Put the port in test mode if test mode
909 * feature is selected.
910 */
911static void
912isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
913{
8e22978c 914 struct ci_hdrc *ci = req->context;
541cace8
PK
915 unsigned long flags;
916
26c696c6
RZ
917 if (ci->setaddr) {
918 hw_usb_set_address(ci, ci->address);
919 ci->setaddr = false;
10775eb1
PC
920 if (ci->address)
921 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
ef15e549
AS
922 }
923
26c696c6
RZ
924 spin_lock_irqsave(&ci->lock, flags);
925 if (ci->test_mode)
926 hw_port_test_set(ci, ci->test_mode);
927 spin_unlock_irqrestore(&ci->lock, flags);
541cace8
PK
928}
929
aa69a809
DL
930/**
931 * isr_setup_status_phase: queues the status phase of a setup transation
26c696c6 932 * @ci: ci struct
aa69a809
DL
933 *
934 * This function returns an error code
935 */
8e22978c 936static int isr_setup_status_phase(struct ci_hdrc *ci)
aa69a809
DL
937{
938 int retval;
8e22978c 939 struct ci_hw_ep *hwep;
aa69a809 940
2dbc5c4c 941 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
26c696c6
RZ
942 ci->status->context = ci;
943 ci->status->complete = isr_setup_status_complete;
aa69a809 944
2dbc5c4c 945 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
aa69a809
DL
946
947 return retval;
948}
949
950/**
951 * isr_tr_complete_low: transaction complete low level handler
2dbc5c4c 952 * @hwep: endpoint
aa69a809
DL
953 *
954 * This function returns an error code
955 * Caller must hold lock
956 */
8e22978c 957static int isr_tr_complete_low(struct ci_hw_ep *hwep)
2dbc5c4c
AS
958__releases(hwep->lock)
959__acquires(hwep->lock)
aa69a809 960{
8e22978c
AS
961 struct ci_hw_req *hwreq, *hwreqtemp;
962 struct ci_hw_ep *hweptemp = hwep;
db89960e 963 int retval = 0;
aa69a809 964
2dbc5c4c 965 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
0e6ca199 966 queue) {
2dbc5c4c 967 retval = _hardware_dequeue(hwep, hwreq);
0e6ca199
PK
968 if (retval < 0)
969 break;
2dbc5c4c
AS
970 list_del_init(&hwreq->queue);
971 if (hwreq->req.complete != NULL) {
972 spin_unlock(hwep->lock);
973 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
974 hwreq->req.length)
975 hweptemp = hwep->ci->ep0in;
304f7e5e 976 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
2dbc5c4c 977 spin_lock(hwep->lock);
0e6ca199 978 }
d9bb9c18
AL
979 }
980
ef907482 981 if (retval == -EBUSY)
0e6ca199 982 retval = 0;
aa69a809 983
aa69a809
DL
984 return retval;
985}
986
d20f7807
LJ
987static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
988{
989 dev_warn(&ci->gadget.dev,
990 "connect the device to an alternate port if you want HNP\n");
991 return isr_setup_status_phase(ci);
992}
993
d7b00e31
PC
994/**
995 * isr_setup_packet_handler: setup packet handler
996 * @ci: UDC descriptor
997 *
998 * This function handles setup packet
999 */
1000static void isr_setup_packet_handler(struct ci_hdrc *ci)
1001__releases(ci->lock)
1002__acquires(ci->lock)
1003{
1004 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1005 struct usb_ctrlrequest req;
1006 int type, num, dir, err = -EINVAL;
1007 u8 tmode = 0;
1008
1009 /*
1010 * Flush data and handshake transactions of previous
1011 * setup packet.
1012 */
1013 _ep_nuke(ci->ep0out);
1014 _ep_nuke(ci->ep0in);
1015
1016 /* read_setup_packet */
1017 do {
1018 hw_test_and_set_setup_guard(ci);
1019 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1020 } while (!hw_test_and_clear_setup_guard(ci));
1021
1022 type = req.bRequestType;
1023
1024 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1025
1026 switch (req.bRequest) {
1027 case USB_REQ_CLEAR_FEATURE:
1028 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1029 le16_to_cpu(req.wValue) ==
1030 USB_ENDPOINT_HALT) {
1031 if (req.wLength != 0)
1032 break;
1033 num = le16_to_cpu(req.wIndex);
1034 dir = num & USB_ENDPOINT_DIR_MASK;
1035 num &= USB_ENDPOINT_NUMBER_MASK;
1036 if (dir) /* TX */
1037 num += ci->hw_ep_max / 2;
1038 if (!ci->ci_hw_ep[num].wedge) {
1039 spin_unlock(&ci->lock);
1040 err = usb_ep_clear_halt(
1041 &ci->ci_hw_ep[num].ep);
1042 spin_lock(&ci->lock);
1043 if (err)
1044 break;
1045 }
1046 err = isr_setup_status_phase(ci);
1047 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1048 le16_to_cpu(req.wValue) ==
1049 USB_DEVICE_REMOTE_WAKEUP) {
1050 if (req.wLength != 0)
1051 break;
1052 ci->remote_wakeup = 0;
1053 err = isr_setup_status_phase(ci);
1054 } else {
1055 goto delegate;
1056 }
1057 break;
1058 case USB_REQ_GET_STATUS:
1059 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1060 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1061 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1062 goto delegate;
1063 if (le16_to_cpu(req.wLength) != 2 ||
1064 le16_to_cpu(req.wValue) != 0)
1065 break;
1066 err = isr_get_status_response(ci, &req);
1067 break;
1068 case USB_REQ_SET_ADDRESS:
1069 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1070 goto delegate;
1071 if (le16_to_cpu(req.wLength) != 0 ||
1072 le16_to_cpu(req.wIndex) != 0)
1073 break;
1074 ci->address = (u8)le16_to_cpu(req.wValue);
1075 ci->setaddr = true;
1076 err = isr_setup_status_phase(ci);
1077 break;
1078 case USB_REQ_SET_FEATURE:
1079 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1080 le16_to_cpu(req.wValue) ==
1081 USB_ENDPOINT_HALT) {
1082 if (req.wLength != 0)
1083 break;
1084 num = le16_to_cpu(req.wIndex);
1085 dir = num & USB_ENDPOINT_DIR_MASK;
1086 num &= USB_ENDPOINT_NUMBER_MASK;
1087 if (dir) /* TX */
1088 num += ci->hw_ep_max / 2;
1089
1090 spin_unlock(&ci->lock);
56ffa1d1 1091 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
d7b00e31
PC
1092 spin_lock(&ci->lock);
1093 if (!err)
1094 isr_setup_status_phase(ci);
1095 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1096 if (req.wLength != 0)
1097 break;
1098 switch (le16_to_cpu(req.wValue)) {
1099 case USB_DEVICE_REMOTE_WAKEUP:
1100 ci->remote_wakeup = 1;
1101 err = isr_setup_status_phase(ci);
1102 break;
1103 case USB_DEVICE_TEST_MODE:
1104 tmode = le16_to_cpu(req.wIndex) >> 8;
1105 switch (tmode) {
1106 case TEST_J:
1107 case TEST_K:
1108 case TEST_SE0_NAK:
1109 case TEST_PACKET:
1110 case TEST_FORCE_EN:
1111 ci->test_mode = tmode;
1112 err = isr_setup_status_phase(
1113 ci);
1114 break;
1115 default:
1116 break;
1117 }
95f5555f
LJ
1118 break;
1119 case USB_DEVICE_B_HNP_ENABLE:
1120 if (ci_otg_is_fsm_mode(ci)) {
1121 ci->gadget.b_hnp_enable = 1;
1122 err = isr_setup_status_phase(
1123 ci);
1124 }
1125 break;
d20f7807
LJ
1126 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1127 if (ci_otg_is_fsm_mode(ci))
1128 err = otg_a_alt_hnp_support(ci);
1129 break;
3520d462
PC
1130 case USB_DEVICE_A_HNP_SUPPORT:
1131 if (ci_otg_is_fsm_mode(ci)) {
1132 ci->gadget.a_hnp_support = 1;
1133 err = isr_setup_status_phase(
1134 ci);
1135 }
1136 break;
d7b00e31
PC
1137 default:
1138 goto delegate;
1139 }
1140 } else {
1141 goto delegate;
1142 }
1143 break;
1144 default:
1145delegate:
1146 if (req.wLength == 0) /* no data phase */
1147 ci->ep0_dir = TX;
1148
1149 spin_unlock(&ci->lock);
1150 err = ci->driver->setup(&ci->gadget, &req);
1151 spin_lock(&ci->lock);
1152 break;
1153 }
1154
1155 if (err < 0) {
1156 spin_unlock(&ci->lock);
56ffa1d1
PC
1157 if (_ep_set_halt(&hwep->ep, 1, false))
1158 dev_err(ci->dev, "error: _ep_set_halt\n");
d7b00e31
PC
1159 spin_lock(&ci->lock);
1160 }
1161}
1162
aa69a809
DL
1163/**
1164 * isr_tr_complete_handler: transaction complete interrupt handler
26c696c6 1165 * @ci: UDC descriptor
aa69a809
DL
1166 *
1167 * This function handles traffic events
1168 */
8e22978c 1169static void isr_tr_complete_handler(struct ci_hdrc *ci)
26c696c6
RZ
1170__releases(ci->lock)
1171__acquires(ci->lock)
aa69a809
DL
1172{
1173 unsigned i;
d7b00e31 1174 int err;
aa69a809 1175
26c696c6 1176 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 1177 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
aa69a809 1178
2dbc5c4c 1179 if (hwep->ep.desc == NULL)
aa69a809
DL
1180 continue; /* not configured */
1181
26c696c6 1182 if (hw_test_and_clear_complete(ci, i)) {
2dbc5c4c
AS
1183 err = isr_tr_complete_low(hwep);
1184 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
aa69a809 1185 if (err > 0) /* needs status phase */
26c696c6 1186 err = isr_setup_status_phase(ci);
aa69a809 1187 if (err < 0) {
26c696c6 1188 spin_unlock(&ci->lock);
56ffa1d1 1189 if (_ep_set_halt(&hwep->ep, 1, false))
26c696c6 1190 dev_err(ci->dev,
56ffa1d1 1191 "error: _ep_set_halt\n");
26c696c6 1192 spin_lock(&ci->lock);
aa69a809
DL
1193 }
1194 }
1195 }
1196
64fc06c4 1197 /* Only handle setup packet below */
d7b00e31
PC
1198 if (i == 0 &&
1199 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1200 isr_setup_packet_handler(ci);
aa69a809
DL
1201 }
1202}
1203
1204/******************************************************************************
1205 * ENDPT block
1206 *****************************************************************************/
1207/**
1208 * ep_enable: configure endpoint, making it usable
1209 *
1210 * Check usb_ep_enable() at "usb_gadget.h" for details
1211 */
1212static int ep_enable(struct usb_ep *ep,
1213 const struct usb_endpoint_descriptor *desc)
1214{
8e22978c 1215 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
ca9cfea0 1216 int retval = 0;
aa69a809 1217 unsigned long flags;
1cd12a9c 1218 u32 cap = 0;
aa69a809 1219
aa69a809
DL
1220 if (ep == NULL || desc == NULL)
1221 return -EINVAL;
1222
2dbc5c4c 1223 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1224
1225 /* only internal SW should enable ctrl endpts */
1226
d5d1e1be 1227 if (!list_empty(&hwep->qh.queue)) {
2dbc5c4c 1228 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
d5d1e1be
PC
1229 spin_unlock_irqrestore(hwep->lock, flags);
1230 return -EBUSY;
1231 }
1232
1233 hwep->ep.desc = desc;
aa69a809 1234
2dbc5c4c
AS
1235 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1236 hwep->num = usb_endpoint_num(desc);
1237 hwep->type = usb_endpoint_type(desc);
aa69a809 1238
2dbc5c4c
AS
1239 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1240 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
aa69a809 1241
2dbc5c4c 1242 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1cd12a9c 1243 cap |= QH_IOS;
953c6646
AR
1244
1245 cap |= QH_ZLT;
2dbc5c4c 1246 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
2fc5a7da
PC
1247 /*
1248 * For ISO-TX, we set mult at QH as the largest value, and use
1249 * MultO at TD as real mult value.
1250 */
1251 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1252 cap |= 3 << __ffs(QH_MULT);
1cd12a9c 1253
2dbc5c4c 1254 hwep->qh.ptr->cap = cpu_to_le32(cap);
1cd12a9c 1255
2dbc5c4c 1256 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
aa69a809 1257
64fc06c4
PC
1258 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1259 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1260 retval = -EINVAL;
1261 }
1262
ac1aa6a2
A
1263 /*
1264 * Enable endpoints in the HW other than ep0 as ep0
1265 * is always enabled
1266 */
2dbc5c4c
AS
1267 if (hwep->num)
1268 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1269 hwep->type);
aa69a809 1270
2dbc5c4c 1271 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1272 return retval;
1273}
1274
1275/**
1276 * ep_disable: endpoint is no longer usable
1277 *
1278 * Check usb_ep_disable() at "usb_gadget.h" for details
1279 */
1280static int ep_disable(struct usb_ep *ep)
1281{
8e22978c 1282 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1283 int direction, retval = 0;
1284 unsigned long flags;
1285
aa69a809
DL
1286 if (ep == NULL)
1287 return -EINVAL;
2dbc5c4c 1288 else if (hwep->ep.desc == NULL)
aa69a809
DL
1289 return -EBUSY;
1290
2dbc5c4c 1291 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1292
1293 /* only internal SW should disable ctrl endpts */
1294
2dbc5c4c 1295 direction = hwep->dir;
aa69a809 1296 do {
2dbc5c4c
AS
1297 retval |= _ep_nuke(hwep);
1298 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
aa69a809 1299
2dbc5c4c
AS
1300 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1301 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1302
2dbc5c4c 1303 } while (hwep->dir != direction);
aa69a809 1304
2dbc5c4c 1305 hwep->ep.desc = NULL;
aa69a809 1306
2dbc5c4c 1307 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1308 return retval;
1309}
1310
1311/**
1312 * ep_alloc_request: allocate a request object to use with this endpoint
1313 *
1314 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1315 */
1316static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1317{
8e22978c 1318 struct ci_hw_req *hwreq = NULL;
aa69a809 1319
0f089094 1320 if (ep == NULL)
aa69a809 1321 return NULL;
aa69a809 1322
8e22978c 1323 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
2dbc5c4c
AS
1324 if (hwreq != NULL) {
1325 INIT_LIST_HEAD(&hwreq->queue);
1326 INIT_LIST_HEAD(&hwreq->tds);
aa69a809
DL
1327 }
1328
2dbc5c4c 1329 return (hwreq == NULL) ? NULL : &hwreq->req;
aa69a809
DL
1330}
1331
1332/**
1333 * ep_free_request: frees a request object
1334 *
1335 * Check usb_ep_free_request() at "usb_gadget.h" for details
1336 */
1337static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1338{
8e22978c
AS
1339 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1340 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
2e270412 1341 struct td_node *node, *tmpnode;
aa69a809
DL
1342 unsigned long flags;
1343
aa69a809 1344 if (ep == NULL || req == NULL) {
aa69a809 1345 return;
2dbc5c4c
AS
1346 } else if (!list_empty(&hwreq->queue)) {
1347 dev_err(hwep->ci->dev, "freeing queued request\n");
aa69a809
DL
1348 return;
1349 }
1350
2dbc5c4c 1351 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1352
2dbc5c4c
AS
1353 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1354 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
1355 list_del_init(&node->td);
1356 node->ptr = NULL;
1357 kfree(node);
1358 }
cc9e6c49 1359
2dbc5c4c 1360 kfree(hwreq);
aa69a809 1361
2dbc5c4c 1362 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1363}
1364
1365/**
1366 * ep_queue: queues (submits) an I/O request to an endpoint
1367 *
1368 * Check usb_ep_queue()* at usb_gadget.h" for details
1369 */
1370static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1371 gfp_t __maybe_unused gfp_flags)
1372{
8e22978c 1373 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1374 int retval = 0;
1375 unsigned long flags;
1376
2dbc5c4c 1377 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1378 return -EINVAL;
1379
2dbc5c4c 1380 spin_lock_irqsave(hwep->lock, flags);
dd064e9d 1381 retval = _ep_queue(ep, req, gfp_flags);
2dbc5c4c 1382 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1383 return retval;
1384}
1385
1386/**
1387 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1388 *
1389 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1390 */
1391static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1392{
8e22978c
AS
1393 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1394 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
aa69a809 1395 unsigned long flags;
e4adcff0 1396 struct td_node *node, *tmpnode;
aa69a809 1397
2dbc5c4c
AS
1398 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1399 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1400 list_empty(&hwep->qh.queue))
aa69a809
DL
1401 return -EINVAL;
1402
2dbc5c4c 1403 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1404
2dbc5c4c 1405 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 1406
e4adcff0
PC
1407 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1408 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1409 list_del(&node->td);
1410 kfree(node);
1411 }
1412
aa69a809 1413 /* pop request */
2dbc5c4c 1414 list_del_init(&hwreq->queue);
5e0aa49e 1415
2dbc5c4c 1416 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
5e0aa49e 1417
aa69a809
DL
1418 req->status = -ECONNRESET;
1419
2dbc5c4c
AS
1420 if (hwreq->req.complete != NULL) {
1421 spin_unlock(hwep->lock);
304f7e5e 1422 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
2dbc5c4c 1423 spin_lock(hwep->lock);
aa69a809
DL
1424 }
1425
2dbc5c4c 1426 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1427 return 0;
1428}
1429
1430/**
1431 * ep_set_halt: sets the endpoint halt feature
1432 *
1433 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1434 */
1435static int ep_set_halt(struct usb_ep *ep, int value)
1436{
56ffa1d1 1437 return _ep_set_halt(ep, value, true);
aa69a809
DL
1438}
1439
1440/**
1441 * ep_set_wedge: sets the halt feature and ignores clear requests
1442 *
1443 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1444 */
1445static int ep_set_wedge(struct usb_ep *ep)
1446{
8e22978c 1447 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1448 unsigned long flags;
1449
2dbc5c4c 1450 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1451 return -EINVAL;
1452
2dbc5c4c
AS
1453 spin_lock_irqsave(hwep->lock, flags);
1454 hwep->wedge = 1;
1455 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1456
1457 return usb_ep_set_halt(ep);
1458}
1459
1460/**
1461 * ep_fifo_flush: flushes contents of a fifo
1462 *
1463 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1464 */
1465static void ep_fifo_flush(struct usb_ep *ep)
1466{
8e22978c 1467 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1468 unsigned long flags;
1469
aa69a809 1470 if (ep == NULL) {
2dbc5c4c 1471 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
aa69a809
DL
1472 return;
1473 }
1474
2dbc5c4c 1475 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1476
2dbc5c4c 1477 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 1478
2dbc5c4c 1479 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1480}
1481
1482/**
1483 * Endpoint-specific part of the API to the USB controller hardware
1484 * Check "usb_gadget.h" for details
1485 */
1486static const struct usb_ep_ops usb_ep_ops = {
1487 .enable = ep_enable,
1488 .disable = ep_disable,
1489 .alloc_request = ep_alloc_request,
1490 .free_request = ep_free_request,
1491 .queue = ep_queue,
1492 .dequeue = ep_dequeue,
1493 .set_halt = ep_set_halt,
1494 .set_wedge = ep_set_wedge,
1495 .fifo_flush = ep_fifo_flush,
1496};
1497
1498/******************************************************************************
1499 * GADGET block
1500 *****************************************************************************/
8e22978c 1501static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
f01ef574 1502{
8e22978c 1503 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
f01ef574
PK
1504 unsigned long flags;
1505 int gadget_ready = 0;
1506
26c696c6
RZ
1507 spin_lock_irqsave(&ci->lock, flags);
1508 ci->vbus_active = is_active;
1509 if (ci->driver)
f01ef574 1510 gadget_ready = 1;
26c696c6 1511 spin_unlock_irqrestore(&ci->lock, flags);
f01ef574
PK
1512
1513 if (gadget_ready) {
1514 if (is_active) {
c036019e 1515 pm_runtime_get_sync(&_gadget->dev);
5b157300 1516 hw_device_reset(ci);
26c696c6 1517 hw_device_state(ci, ci->ep0out->qh.dma);
10775eb1 1518 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
467a78c8 1519 usb_udc_vbus_handler(_gadget, true);
f01ef574 1520 } else {
467a78c8 1521 usb_udc_vbus_handler(_gadget, false);
92b336d7
PC
1522 if (ci->driver)
1523 ci->driver->disconnect(&ci->gadget);
26c696c6
RZ
1524 hw_device_state(ci, 0);
1525 if (ci->platdata->notify_event)
1526 ci->platdata->notify_event(ci,
8e22978c 1527 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6 1528 _gadget_stop_activity(&ci->gadget);
c036019e 1529 pm_runtime_put_sync(&_gadget->dev);
10775eb1 1530 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
f01ef574
PK
1531 }
1532 }
1533
1534 return 0;
1535}
1536
8e22978c 1537static int ci_udc_wakeup(struct usb_gadget *_gadget)
e2b61c1d 1538{
8e22978c 1539 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
e2b61c1d
PK
1540 unsigned long flags;
1541 int ret = 0;
1542
26c696c6
RZ
1543 spin_lock_irqsave(&ci->lock, flags);
1544 if (!ci->remote_wakeup) {
e2b61c1d 1545 ret = -EOPNOTSUPP;
e2b61c1d
PK
1546 goto out;
1547 }
26c696c6 1548 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
e2b61c1d 1549 ret = -EINVAL;
e2b61c1d
PK
1550 goto out;
1551 }
26c696c6 1552 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
e2b61c1d 1553out:
26c696c6 1554 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d
PK
1555 return ret;
1556}
1557
8e22978c 1558static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
d860852e 1559{
8e22978c 1560 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
d860852e 1561
ef44cb42
AT
1562 if (ci->usb_phy)
1563 return usb_phy_set_power(ci->usb_phy, ma);
d860852e
PK
1564 return -ENOTSUPP;
1565}
1566
1009f9a3
PC
1567static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1568{
1569 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1570 struct ci_hw_ep *hwep = ci->ep0in;
1571 unsigned long flags;
1572
1573 spin_lock_irqsave(hwep->lock, flags);
1574 _gadget->is_selfpowered = (is_on != 0);
1575 spin_unlock_irqrestore(hwep->lock, flags);
1576
1577 return 0;
1578}
1579
c0a48e6c
MG
1580/* Change Data+ pullup status
1581 * this func is used by usb_gadget_connect/disconnet
1582 */
8e22978c 1583static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
c0a48e6c 1584{
8e22978c 1585 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
c0a48e6c 1586
9b6567e1
LJ
1587 /* Data+ pullup controlled by OTG state machine in OTG fsm mode */
1588 if (ci_otg_is_fsm_mode(ci))
1589 return 0;
1590
467a78c8 1591 pm_runtime_get_sync(&ci->gadget.dev);
c0a48e6c
MG
1592 if (is_on)
1593 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1594 else
1595 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
467a78c8 1596 pm_runtime_put_sync(&ci->gadget.dev);
c0a48e6c
MG
1597
1598 return 0;
1599}
1600
8e22978c 1601static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1602 struct usb_gadget_driver *driver);
22835b80 1603static int ci_udc_stop(struct usb_gadget *gadget);
aa69a809
DL
1604/**
1605 * Device operations part of the API to the USB controller hardware,
1606 * which don't involve endpoints (or i/o)
1607 * Check "usb_gadget.h" for details
1608 */
f01ef574 1609static const struct usb_gadget_ops usb_gadget_ops = {
8e22978c
AS
1610 .vbus_session = ci_udc_vbus_session,
1611 .wakeup = ci_udc_wakeup,
1009f9a3 1612 .set_selfpowered = ci_udc_selfpowered,
8e22978c
AS
1613 .pullup = ci_udc_pullup,
1614 .vbus_draw = ci_udc_vbus_draw,
1615 .udc_start = ci_udc_start,
1616 .udc_stop = ci_udc_stop,
f01ef574 1617};
aa69a809 1618
8e22978c 1619static int init_eps(struct ci_hdrc *ci)
aa69a809 1620{
790c2d52 1621 int retval = 0, i, j;
aa69a809 1622
26c696c6 1623 for (i = 0; i < ci->hw_ep_max/2; i++)
ca9cfea0 1624 for (j = RX; j <= TX; j++) {
26c696c6 1625 int k = i + j * ci->hw_ep_max/2;
8e22978c 1626 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
aa69a809 1627
2dbc5c4c 1628 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
ca9cfea0 1629 (j == TX) ? "in" : "out");
aa69a809 1630
2dbc5c4c
AS
1631 hwep->ci = ci;
1632 hwep->lock = &ci->lock;
1633 hwep->td_pool = ci->td_pool;
aa69a809 1634
2dbc5c4c
AS
1635 hwep->ep.name = hwep->name;
1636 hwep->ep.ops = &usb_ep_ops;
a7e3f141
RB
1637
1638 if (i == 0) {
1639 hwep->ep.caps.type_control = true;
1640 } else {
1641 hwep->ep.caps.type_iso = true;
1642 hwep->ep.caps.type_bulk = true;
1643 hwep->ep.caps.type_int = true;
1644 }
1645
1646 if (j == TX)
1647 hwep->ep.caps.dir_in = true;
1648 else
1649 hwep->ep.caps.dir_out = true;
1650
7f67c38b
MG
1651 /*
1652 * for ep0: maxP defined in desc, for other
1653 * eps, maxP is set by epautoconfig() called
1654 * by gadget layer
1655 */
e117e742 1656 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
aa69a809 1657
2dbc5c4c
AS
1658 INIT_LIST_HEAD(&hwep->qh.queue);
1659 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1660 &hwep->qh.dma);
1661 if (hwep->qh.ptr == NULL)
aa69a809
DL
1662 retval = -ENOMEM;
1663 else
2dbc5c4c 1664 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
ca9cfea0 1665
d36ade60
AS
1666 /*
1667 * set up shorthands for ep0 out and in endpoints,
1668 * don't add to gadget's ep_list
1669 */
1670 if (i == 0) {
1671 if (j == RX)
2dbc5c4c 1672 ci->ep0out = hwep;
d36ade60 1673 else
2dbc5c4c 1674 ci->ep0in = hwep;
d36ade60 1675
e117e742 1676 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
ca9cfea0 1677 continue;
d36ade60 1678 }
ca9cfea0 1679
2dbc5c4c 1680 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
ca9cfea0 1681 }
790c2d52
AS
1682
1683 return retval;
1684}
1685
8e22978c 1686static void destroy_eps(struct ci_hdrc *ci)
ad6b1b97
MKB
1687{
1688 int i;
1689
1690 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 1691 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
ad6b1b97 1692
4a29567b
PC
1693 if (hwep->pending_td)
1694 free_pending_td(hwep);
2dbc5c4c 1695 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
ad6b1b97
MKB
1696 }
1697}
1698
790c2d52 1699/**
8e22978c 1700 * ci_udc_start: register a gadget driver
1f339d84 1701 * @gadget: our gadget
790c2d52 1702 * @driver: the driver being registered
790c2d52 1703 *
790c2d52
AS
1704 * Interrupts are enabled here.
1705 */
8e22978c 1706static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1707 struct usb_gadget_driver *driver)
790c2d52 1708{
8e22978c 1709 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
790c2d52 1710 unsigned long flags;
790c2d52
AS
1711 int retval = -ENOMEM;
1712
1f339d84 1713 if (driver->disconnect == NULL)
790c2d52 1714 return -EINVAL;
790c2d52 1715
790c2d52 1716
26c696c6
RZ
1717 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1718 retval = usb_ep_enable(&ci->ep0out->ep);
ac1aa6a2
A
1719 if (retval)
1720 return retval;
877c1f54 1721
26c696c6
RZ
1722 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1723 retval = usb_ep_enable(&ci->ep0in->ep);
ac1aa6a2
A
1724 if (retval)
1725 return retval;
26c696c6
RZ
1726
1727 ci->driver = driver;
4dcf720c
LJ
1728
1729 /* Start otg fsm for B-device */
1730 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1731 ci_hdrc_otg_fsm_start(ci);
1732 return retval;
1733 }
1734
26c696c6 1735 pm_runtime_get_sync(&ci->gadget.dev);
d268e9bc 1736 if (ci->vbus_active) {
65b2fb32 1737 spin_lock_irqsave(&ci->lock, flags);
5b157300 1738 hw_device_reset(ci);
d268e9bc 1739 } else {
467a78c8 1740 usb_udc_vbus_handler(&ci->gadget, false);
d268e9bc 1741 pm_runtime_put_sync(&ci->gadget.dev);
65b2fb32 1742 return retval;
f01ef574
PK
1743 }
1744
26c696c6 1745 retval = hw_device_state(ci, ci->ep0out->qh.dma);
65b2fb32 1746 spin_unlock_irqrestore(&ci->lock, flags);
c036019e 1747 if (retval)
26c696c6 1748 pm_runtime_put_sync(&ci->gadget.dev);
aa69a809 1749
aa69a809
DL
1750 return retval;
1751}
aa69a809 1752
85da852d
LJ
1753static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1754{
1755 if (!ci_otg_is_fsm_mode(ci))
1756 return;
1757
1758 mutex_lock(&ci->fsm.lock);
1759 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1760 ci->fsm.a_bidl_adis_tmout = 1;
1761 ci_hdrc_otg_fsm_start(ci);
1762 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1763 ci->fsm.protocol = PROTO_UNDEF;
1764 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1765 }
1766 mutex_unlock(&ci->fsm.lock);
1767}
1768
aa69a809 1769/**
8e22978c 1770 * ci_udc_stop: unregister a gadget driver
aa69a809 1771 */
22835b80 1772static int ci_udc_stop(struct usb_gadget *gadget)
aa69a809 1773{
8e22978c 1774 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1f339d84 1775 unsigned long flags;
aa69a809 1776
26c696c6 1777 spin_lock_irqsave(&ci->lock, flags);
aa69a809 1778
d268e9bc 1779 if (ci->vbus_active) {
26c696c6
RZ
1780 hw_device_state(ci, 0);
1781 if (ci->platdata->notify_event)
1782 ci->platdata->notify_event(ci,
8e22978c 1783 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6
RZ
1784 spin_unlock_irqrestore(&ci->lock, flags);
1785 _gadget_stop_activity(&ci->gadget);
1786 spin_lock_irqsave(&ci->lock, flags);
1787 pm_runtime_put(&ci->gadget.dev);
f01ef574 1788 }
aa69a809 1789
f84839da 1790 ci->driver = NULL;
26c696c6 1791 spin_unlock_irqrestore(&ci->lock, flags);
aa69a809 1792
85da852d 1793 ci_udc_stop_for_otg_fsm(ci);
aa69a809
DL
1794 return 0;
1795}
aa69a809
DL
1796
1797/******************************************************************************
1798 * BUS block
1799 *****************************************************************************/
1800/**
26c696c6 1801 * udc_irq: ci interrupt handler
aa69a809
DL
1802 *
1803 * This function returns IRQ_HANDLED if the IRQ has been handled
1804 * It locks access to registers
1805 */
8e22978c 1806static irqreturn_t udc_irq(struct ci_hdrc *ci)
aa69a809 1807{
aa69a809
DL
1808 irqreturn_t retval;
1809 u32 intr;
1810
26c696c6 1811 if (ci == NULL)
aa69a809 1812 return IRQ_HANDLED;
aa69a809 1813
26c696c6 1814 spin_lock(&ci->lock);
f01ef574 1815
8e22978c 1816 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
26c696c6 1817 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
758fc986 1818 USBMODE_CM_DC) {
26c696c6 1819 spin_unlock(&ci->lock);
f01ef574
PK
1820 return IRQ_NONE;
1821 }
1822 }
26c696c6 1823 intr = hw_test_and_clear_intr_active(ci);
aa69a809 1824
e443b333 1825 if (intr) {
aa69a809 1826 /* order defines priority - do NOT change it */
e443b333 1827 if (USBi_URI & intr)
26c696c6 1828 isr_reset_handler(ci);
e443b333 1829
aa69a809 1830 if (USBi_PCI & intr) {
26c696c6 1831 ci->gadget.speed = hw_port_is_high_speed(ci) ?
aa69a809 1832 USB_SPEED_HIGH : USB_SPEED_FULL;
26c696c6
RZ
1833 if (ci->suspended && ci->driver->resume) {
1834 spin_unlock(&ci->lock);
1835 ci->driver->resume(&ci->gadget);
1836 spin_lock(&ci->lock);
1837 ci->suspended = 0;
e2b61c1d 1838 }
aa69a809 1839 }
e443b333
AS
1840
1841 if (USBi_UI & intr)
26c696c6 1842 isr_tr_complete_handler(ci);
e443b333 1843
e2b61c1d 1844 if (USBi_SLI & intr) {
26c696c6
RZ
1845 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1846 ci->driver->suspend) {
1847 ci->suspended = 1;
1848 spin_unlock(&ci->lock);
1849 ci->driver->suspend(&ci->gadget);
10775eb1
PC
1850 usb_gadget_set_state(&ci->gadget,
1851 USB_STATE_SUSPENDED);
26c696c6 1852 spin_lock(&ci->lock);
e2b61c1d 1853 }
e2b61c1d 1854 }
aa69a809
DL
1855 retval = IRQ_HANDLED;
1856 } else {
aa69a809
DL
1857 retval = IRQ_NONE;
1858 }
26c696c6 1859 spin_unlock(&ci->lock);
aa69a809
DL
1860
1861 return retval;
1862}
1863
aa69a809 1864/**
5f36e231 1865 * udc_start: initialize gadget role
26c696c6 1866 * @ci: chipidea controller
aa69a809 1867 */
8e22978c 1868static int udc_start(struct ci_hdrc *ci)
aa69a809 1869{
26c696c6 1870 struct device *dev = ci->dev;
79742351 1871 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
aa69a809
DL
1872 int retval = 0;
1873
26c696c6 1874 spin_lock_init(&ci->lock);
aa69a809 1875
26c696c6
RZ
1876 ci->gadget.ops = &usb_gadget_ops;
1877 ci->gadget.speed = USB_SPEED_UNKNOWN;
1878 ci->gadget.max_speed = USB_SPEED_HIGH;
26c696c6 1879 ci->gadget.name = ci->platdata->name;
79742351
LJ
1880 ci->gadget.otg_caps = otg_caps;
1881
3f217e9e
LJ
1882 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1883 otg_caps->adp_support))
79742351 1884 ci->gadget.is_otg = 1;
aa69a809 1885
26c696c6 1886 INIT_LIST_HEAD(&ci->gadget.ep_list);
aa69a809 1887
790c2d52 1888 /* alloc resources */
8e22978c
AS
1889 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1890 sizeof(struct ci_hw_qh),
1891 64, CI_HDRC_PAGE_SIZE);
26c696c6 1892 if (ci->qh_pool == NULL)
5f36e231 1893 return -ENOMEM;
790c2d52 1894
8e22978c
AS
1895 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1896 sizeof(struct ci_hw_td),
1897 64, CI_HDRC_PAGE_SIZE);
26c696c6 1898 if (ci->td_pool == NULL) {
790c2d52
AS
1899 retval = -ENOMEM;
1900 goto free_qh_pool;
1901 }
1902
26c696c6 1903 retval = init_eps(ci);
790c2d52
AS
1904 if (retval)
1905 goto free_pools;
1906
26c696c6 1907 ci->gadget.ep0 = &ci->ep0in->ep;
f01ef574 1908
26c696c6 1909 retval = usb_add_gadget_udc(dev, &ci->gadget);
0f91349b 1910 if (retval)
74475ede 1911 goto destroy_eps;
0f91349b 1912
26c696c6
RZ
1913 pm_runtime_no_callbacks(&ci->gadget.dev);
1914 pm_runtime_enable(&ci->gadget.dev);
aa69a809 1915
aa69a809
DL
1916 return retval;
1917
ad6b1b97
MKB
1918destroy_eps:
1919 destroy_eps(ci);
790c2d52 1920free_pools:
26c696c6 1921 dma_pool_destroy(ci->td_pool);
790c2d52 1922free_qh_pool:
26c696c6 1923 dma_pool_destroy(ci->qh_pool);
aa69a809
DL
1924 return retval;
1925}
1926
1927/**
3f124d23 1928 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
aa69a809
DL
1929 *
1930 * No interrupts active, the IRQ has been released
1931 */
3f124d23 1932void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
aa69a809 1933{
3f124d23 1934 if (!ci->roles[CI_ROLE_GADGET])
aa69a809 1935 return;
0f089094 1936
26c696c6 1937 usb_del_gadget_udc(&ci->gadget);
aa69a809 1938
ad6b1b97 1939 destroy_eps(ci);
790c2d52 1940
26c696c6
RZ
1941 dma_pool_destroy(ci->td_pool);
1942 dma_pool_destroy(ci->qh_pool);
3f124d23
PC
1943}
1944
1945static int udc_id_switch_for_device(struct ci_hdrc *ci)
1946{
0c33bf78
LJ
1947 if (ci->is_otg)
1948 /* Clear and enable BSV irq */
1949 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1950 OTGSC_BSVIS | OTGSC_BSVIE);
3f124d23
PC
1951
1952 return 0;
1953}
1954
1955static void udc_id_switch_for_host(struct ci_hdrc *ci)
1956{
0c33bf78
LJ
1957 /*
1958 * host doesn't care B_SESSION_VALID event
1959 * so clear and disbale BSV irq
1960 */
1961 if (ci->is_otg)
1962 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
5f36e231
AS
1963}
1964
1965/**
1966 * ci_hdrc_gadget_init - initialize device related bits
1967 * ci: the controller
1968 *
3f124d23 1969 * This function initializes the gadget, if the device is "device capable".
5f36e231 1970 */
8e22978c 1971int ci_hdrc_gadget_init(struct ci_hdrc *ci)
5f36e231
AS
1972{
1973 struct ci_role_driver *rdrv;
1974
1975 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1976 return -ENXIO;
1977
1978 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1979 if (!rdrv)
1980 return -ENOMEM;
1981
3f124d23
PC
1982 rdrv->start = udc_id_switch_for_device;
1983 rdrv->stop = udc_id_switch_for_host;
5f36e231
AS
1984 rdrv->irq = udc_irq;
1985 rdrv->name = "gadget";
1986 ci->roles[CI_ROLE_GADGET] = rdrv;
aa69a809 1987
3f124d23 1988 return udc_start(ci);
aa69a809 1989}