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usb: chipidea: refine PHY operation
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aa69a809 1/*
eb70e5ab 2 * udc.c - ChipIdea UDC driver
aa69a809
DL
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
36825a2d 13#include <linux/delay.h>
aa69a809
DL
14#include <linux/device.h>
15#include <linux/dmapool.h>
ded017ee 16#include <linux/err.h>
5b08319f 17#include <linux/irqreturn.h>
aa69a809 18#include <linux/kernel.h>
5a0e3ad6 19#include <linux/slab.h>
c036019e 20#include <linux/pm_runtime.h>
aa69a809
DL
21#include <linux/usb/ch9.h>
22#include <linux/usb/gadget.h>
e443b333 23#include <linux/usb/chipidea.h>
aa69a809 24
e443b333
AS
25#include "ci.h"
26#include "udc.h"
27#include "bits.h"
28#include "debug.h"
3f124d23 29#include "otg.h"
954aad8c 30
aa69a809
DL
31/* control endpoint description */
32static const struct usb_endpoint_descriptor
ca9cfea0 33ctrl_endpt_out_desc = {
aa69a809
DL
34 .bLength = USB_DT_ENDPOINT_SIZE,
35 .bDescriptorType = USB_DT_ENDPOINT,
36
ca9cfea0
PK
37 .bEndpointAddress = USB_DIR_OUT,
38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
40};
41
42static const struct usb_endpoint_descriptor
43ctrl_endpt_in_desc = {
44 .bLength = USB_DT_ENDPOINT_SIZE,
45 .bDescriptorType = USB_DT_ENDPOINT,
46
47 .bEndpointAddress = USB_DIR_IN,
aa69a809
DL
48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
50};
51
aa69a809
DL
52/**
53 * hw_ep_bit: calculates the bit number
54 * @num: endpoint number
55 * @dir: endpoint direction
56 *
57 * This function returns bit number
58 */
59static inline int hw_ep_bit(int num, int dir)
60{
61 return num + (dir ? 16 : 0);
62}
63
8e22978c 64static inline int ep_to_bit(struct ci_hdrc *ci, int n)
dd39c358 65{
26c696c6 66 int fill = 16 - ci->hw_ep_max / 2;
dd39c358 67
26c696c6 68 if (n >= ci->hw_ep_max / 2)
dd39c358
MKB
69 n += fill;
70
71 return n;
72}
73
aa69a809 74/**
c0a48e6c 75 * hw_device_state: enables/disables interrupts (execute without interruption)
aa69a809
DL
76 * @dma: 0 => disable, !0 => enable and set dma engine
77 *
78 * This function returns an error code
79 */
8e22978c 80static int hw_device_state(struct ci_hdrc *ci, u32 dma)
aa69a809
DL
81{
82 if (dma) {
26c696c6 83 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
aa69a809 84 /* interrupt, error, port change, reset, sleep/suspend */
26c696c6 85 hw_write(ci, OP_USBINTR, ~0,
aa69a809 86 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
a107f8c5 87 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
aa69a809 88 } else {
26c696c6 89 hw_write(ci, OP_USBINTR, ~0, 0);
a107f8c5 90 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
aa69a809
DL
91 }
92 return 0;
93}
94
95/**
96 * hw_ep_flush: flush endpoint fifo (execute without interruption)
97 * @num: endpoint number
98 * @dir: endpoint direction
99 *
100 * This function returns an error code
101 */
8e22978c 102static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
103{
104 int n = hw_ep_bit(num, dir);
105
106 do {
107 /* flush any pending transfer */
5bf5dbed 108 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
26c696c6 109 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
aa69a809 110 cpu_relax();
26c696c6 111 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
aa69a809
DL
112
113 return 0;
114}
115
116/**
117 * hw_ep_disable: disables endpoint (execute without interruption)
118 * @num: endpoint number
119 * @dir: endpoint direction
120 *
121 * This function returns an error code
122 */
8e22978c 123static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
aa69a809 124{
26c696c6
RZ
125 hw_ep_flush(ci, num, dir);
126 hw_write(ci, OP_ENDPTCTRL + num,
d3595d13 127 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
aa69a809
DL
128 return 0;
129}
130
131/**
132 * hw_ep_enable: enables endpoint (execute without interruption)
133 * @num: endpoint number
134 * @dir: endpoint direction
135 * @type: endpoint type
136 *
137 * This function returns an error code
138 */
8e22978c 139static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
aa69a809
DL
140{
141 u32 mask, data;
142
143 if (dir) {
144 mask = ENDPTCTRL_TXT; /* type */
727b4ddb 145 data = type << __ffs(mask);
aa69a809
DL
146
147 mask |= ENDPTCTRL_TXS; /* unstall */
148 mask |= ENDPTCTRL_TXR; /* reset data toggle */
149 data |= ENDPTCTRL_TXR;
150 mask |= ENDPTCTRL_TXE; /* enable */
151 data |= ENDPTCTRL_TXE;
152 } else {
153 mask = ENDPTCTRL_RXT; /* type */
727b4ddb 154 data = type << __ffs(mask);
aa69a809
DL
155
156 mask |= ENDPTCTRL_RXS; /* unstall */
157 mask |= ENDPTCTRL_RXR; /* reset data toggle */
158 data |= ENDPTCTRL_RXR;
159 mask |= ENDPTCTRL_RXE; /* enable */
160 data |= ENDPTCTRL_RXE;
161 }
26c696c6 162 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
aa69a809
DL
163 return 0;
164}
165
166/**
167 * hw_ep_get_halt: return endpoint halt status
168 * @num: endpoint number
169 * @dir: endpoint direction
170 *
171 * This function returns 1 if endpoint halted
172 */
8e22978c 173static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
aa69a809
DL
174{
175 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
176
26c696c6 177 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
aa69a809
DL
178}
179
aa69a809
DL
180/**
181 * hw_test_and_clear_setup_status: test & clear setup status (execute without
182 * interruption)
dd39c358 183 * @n: endpoint number
aa69a809
DL
184 *
185 * This function returns setup status
186 */
8e22978c 187static int hw_test_and_clear_setup_status(struct ci_hdrc *ci, int n)
aa69a809 188{
26c696c6
RZ
189 n = ep_to_bit(ci, n);
190 return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
aa69a809
DL
191}
192
193/**
194 * hw_ep_prime: primes endpoint (execute without interruption)
195 * @num: endpoint number
196 * @dir: endpoint direction
197 * @is_ctrl: true if control endpoint
198 *
199 * This function returns an error code
200 */
8e22978c 201static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
aa69a809
DL
202{
203 int n = hw_ep_bit(num, dir);
204
26c696c6 205 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
206 return -EAGAIN;
207
5bf5dbed 208 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
aa69a809 209
26c696c6 210 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
aa69a809 211 cpu_relax();
26c696c6 212 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
aa69a809
DL
213 return -EAGAIN;
214
215 /* status shoult be tested according with manual but it doesn't work */
216 return 0;
217}
218
219/**
220 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
221 * without interruption)
222 * @num: endpoint number
223 * @dir: endpoint direction
224 * @value: true => stall, false => unstall
225 *
226 * This function returns an error code
227 */
8e22978c 228static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
aa69a809
DL
229{
230 if (value != 0 && value != 1)
231 return -EINVAL;
232
233 do {
8e22978c 234 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
aa69a809
DL
235 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
236 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
237
238 /* data toggle - reserved for EP0 but it's in ESS */
26c696c6 239 hw_write(ci, reg, mask_xs|mask_xr,
262c1632 240 value ? mask_xs : mask_xr);
26c696c6 241 } while (value != hw_ep_get_halt(ci, num, dir));
aa69a809
DL
242
243 return 0;
244}
245
aa69a809
DL
246/**
247 * hw_is_port_high_speed: test if port is high speed
248 *
249 * This function returns true if high speed port
250 */
8e22978c 251static int hw_port_is_high_speed(struct ci_hdrc *ci)
aa69a809 252{
26c696c6
RZ
253 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
254 hw_read(ci, OP_PORTSC, PORTSC_HSP);
aa69a809
DL
255}
256
aa69a809
DL
257/**
258 * hw_read_intr_enable: returns interrupt enable register
259 *
260 * This function returns register data
261 */
8e22978c 262static u32 hw_read_intr_enable(struct ci_hdrc *ci)
aa69a809 263{
26c696c6 264 return hw_read(ci, OP_USBINTR, ~0);
aa69a809
DL
265}
266
267/**
268 * hw_read_intr_status: returns interrupt status register
269 *
270 * This function returns register data
271 */
8e22978c 272static u32 hw_read_intr_status(struct ci_hdrc *ci)
aa69a809 273{
26c696c6 274 return hw_read(ci, OP_USBSTS, ~0);
aa69a809
DL
275}
276
aa69a809
DL
277/**
278 * hw_test_and_clear_complete: test & clear complete status (execute without
279 * interruption)
dd39c358 280 * @n: endpoint number
aa69a809
DL
281 *
282 * This function returns complete status
283 */
8e22978c 284static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
aa69a809 285{
26c696c6
RZ
286 n = ep_to_bit(ci, n);
287 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
aa69a809
DL
288}
289
290/**
291 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
292 * without interruption)
293 *
294 * This function returns active interrutps
295 */
8e22978c 296static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
aa69a809 297{
26c696c6 298 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
aa69a809 299
26c696c6 300 hw_write(ci, OP_USBSTS, ~0, reg);
aa69a809
DL
301 return reg;
302}
303
304/**
305 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
306 * interruption)
307 *
308 * This function returns guard value
309 */
8e22978c 310static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
aa69a809 311{
26c696c6 312 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
aa69a809
DL
313}
314
315/**
316 * hw_test_and_set_setup_guard: test & set setup guard (execute without
317 * interruption)
318 *
319 * This function returns guard value
320 */
8e22978c 321static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
aa69a809 322{
26c696c6 323 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
aa69a809
DL
324}
325
326/**
327 * hw_usb_set_address: configures USB address (execute without interruption)
328 * @value: new USB address
329 *
ef15e549
AS
330 * This function explicitly sets the address, without the "USBADRA" (advance)
331 * feature, which is not supported by older versions of the controller.
aa69a809 332 */
8e22978c 333static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
aa69a809 334{
26c696c6 335 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
727b4ddb 336 value << __ffs(DEVICEADDR_USBADR));
aa69a809
DL
337}
338
339/**
340 * hw_usb_reset: restart device after a bus reset (execute without
341 * interruption)
342 *
343 * This function returns an error code
344 */
8e22978c 345static int hw_usb_reset(struct ci_hdrc *ci)
aa69a809 346{
26c696c6 347 hw_usb_set_address(ci, 0);
aa69a809
DL
348
349 /* ESS flushes only at end?!? */
26c696c6 350 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
aa69a809
DL
351
352 /* clear setup token semaphores */
26c696c6 353 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
aa69a809
DL
354
355 /* clear complete status */
26c696c6 356 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
aa69a809
DL
357
358 /* wait until all bits cleared */
26c696c6 359 while (hw_read(ci, OP_ENDPTPRIME, ~0))
aa69a809
DL
360 udelay(10); /* not RTOS friendly */
361
362 /* reset all endpoints ? */
363
364 /* reset internal status and wait for further instructions
365 no need to verify the port reset status (ESS does it) */
366
367 return 0;
368}
369
aa69a809
DL
370/******************************************************************************
371 * UTIL block
372 *****************************************************************************/
cc9e6c49 373
8e22978c 374static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
cc9e6c49
MG
375 unsigned length)
376{
2e270412
MG
377 int i;
378 u32 temp;
cc9e6c49
MG
379 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
380 GFP_ATOMIC);
381
382 if (node == NULL)
383 return -ENOMEM;
384
2dbc5c4c 385 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
cc9e6c49
MG
386 &node->dma);
387 if (node->ptr == NULL) {
388 kfree(node);
389 return -ENOMEM;
390 }
391
8e22978c 392 memset(node->ptr, 0, sizeof(struct ci_hw_td));
2e270412
MG
393 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
394 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
395 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
2fc5a7da
PC
396 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
397 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
398
399 if (hwreq->req.length == 0
400 || hwreq->req.length % hwep->ep.maxpacket)
401 mul++;
402 node->ptr->token |= mul << __ffs(TD_MULTO);
403 }
2e270412 404
2dbc5c4c 405 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
2e270412
MG
406 if (length) {
407 node->ptr->page[0] = cpu_to_le32(temp);
408 for (i = 1; i < TD_PAGE_COUNT; i++) {
8e22978c 409 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
2e270412
MG
410 page &= ~TD_RESERVED_MASK;
411 node->ptr->page[i] = cpu_to_le32(page);
412 }
413 }
414
2dbc5c4c 415 hwreq->req.actual += length;
cc9e6c49 416
2dbc5c4c 417 if (!list_empty(&hwreq->tds)) {
cc9e6c49 418 /* get the last entry */
2dbc5c4c 419 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
420 struct td_node, td);
421 lastnode->ptr->next = cpu_to_le32(node->dma);
422 }
423
424 INIT_LIST_HEAD(&node->td);
2dbc5c4c 425 list_add_tail(&node->td, &hwreq->tds);
cc9e6c49
MG
426
427 return 0;
428}
429
aa69a809
DL
430/**
431 * _usb_addr: calculates endpoint address from direction & number
432 * @ep: endpoint
433 */
8e22978c 434static inline u8 _usb_addr(struct ci_hw_ep *ep)
aa69a809
DL
435{
436 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
437}
438
439/**
440 * _hardware_queue: configures a request at hardware level
441 * @gadget: gadget
2dbc5c4c 442 * @hwep: endpoint
aa69a809
DL
443 *
444 * This function returns an error code
445 */
8e22978c 446static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 447{
8e22978c 448 struct ci_hdrc *ci = hwep->ci;
0e6ca199 449 int ret = 0;
2dbc5c4c 450 unsigned rest = hwreq->req.length;
2e270412 451 int pages = TD_PAGE_COUNT;
cc9e6c49 452 struct td_node *firstnode, *lastnode;
aa69a809 453
aa69a809 454 /* don't queue twice */
2dbc5c4c 455 if (hwreq->req.status == -EALREADY)
aa69a809
DL
456 return -EALREADY;
457
2dbc5c4c 458 hwreq->req.status = -EALREADY;
aa69a809 459
2dbc5c4c 460 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
5e0aa49e
AS
461 if (ret)
462 return ret;
463
2e270412
MG
464 /*
465 * The first buffer could be not page aligned.
466 * In that case we have to span into one extra td.
467 */
2dbc5c4c 468 if (hwreq->req.dma % PAGE_SIZE)
2e270412 469 pages--;
cc9e6c49 470
2e270412 471 if (rest == 0)
2dbc5c4c 472 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 473
2e270412 474 while (rest > 0) {
2dbc5c4c 475 unsigned count = min(hwreq->req.length - hwreq->req.actual,
8e22978c 476 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
2dbc5c4c 477 add_td_to_list(hwep, hwreq, count);
2e270412 478 rest -= count;
0e6ca199 479 }
aa69a809 480
2dbc5c4c
AS
481 if (hwreq->req.zero && hwreq->req.length
482 && (hwreq->req.length % hwep->ep.maxpacket == 0))
483 add_td_to_list(hwep, hwreq, 0);
cc9e6c49 484
2dbc5c4c 485 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
2e270412 486
2dbc5c4c 487 lastnode = list_entry(hwreq->tds.prev,
cc9e6c49
MG
488 struct td_node, td);
489
490 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
2dbc5c4c 491 if (!hwreq->req.no_interrupt)
cc9e6c49 492 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
a9c17430
MG
493 wmb();
494
2dbc5c4c
AS
495 hwreq->req.actual = 0;
496 if (!list_empty(&hwep->qh.queue)) {
8e22978c 497 struct ci_hw_req *hwreqprev;
2dbc5c4c 498 int n = hw_ep_bit(hwep->num, hwep->dir);
0e6ca199 499 int tmp_stat;
cc9e6c49
MG
500 struct td_node *prevlastnode;
501 u32 next = firstnode->dma & TD_ADDR_MASK;
0e6ca199 502
2dbc5c4c 503 hwreqprev = list_entry(hwep->qh.queue.prev,
8e22978c 504 struct ci_hw_req, queue);
2dbc5c4c 505 prevlastnode = list_entry(hwreqprev->tds.prev,
cc9e6c49
MG
506 struct td_node, td);
507
508 prevlastnode->ptr->next = cpu_to_le32(next);
0e6ca199 509 wmb();
26c696c6 510 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
0e6ca199
PK
511 goto done;
512 do {
26c696c6
RZ
513 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
514 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
515 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
516 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
0e6ca199
PK
517 if (tmp_stat)
518 goto done;
519 }
520
521 /* QH configuration */
2dbc5c4c
AS
522 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
523 hwep->qh.ptr->td.token &=
080ff5f4 524 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
aa69a809 525
2fc5a7da 526 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
2dbc5c4c 527 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
e4ce4ecd 528
2fc5a7da
PC
529 if (hwreq->req.length == 0
530 || hwreq->req.length % hwep->ep.maxpacket)
e4ce4ecd 531 mul++;
2dbc5c4c 532 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
e4ce4ecd
MG
533 }
534
aa69a809
DL
535 wmb(); /* synchronize before ep prime */
536
2dbc5c4c
AS
537 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
538 hwep->type == USB_ENDPOINT_XFER_CONTROL);
0e6ca199
PK
539done:
540 return ret;
aa69a809
DL
541}
542
2e270412
MG
543/*
544 * free_pending_td: remove a pending request for the endpoint
2dbc5c4c 545 * @hwep: endpoint
2e270412 546 */
8e22978c 547static void free_pending_td(struct ci_hw_ep *hwep)
2e270412 548{
2dbc5c4c 549 struct td_node *pending = hwep->pending_td;
2e270412 550
2dbc5c4c
AS
551 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
552 hwep->pending_td = NULL;
2e270412
MG
553 kfree(pending);
554}
555
aa69a809
DL
556/**
557 * _hardware_dequeue: handles a request at hardware level
558 * @gadget: gadget
2dbc5c4c 559 * @hwep: endpoint
aa69a809
DL
560 *
561 * This function returns an error code
562 */
8e22978c 563static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
aa69a809 564{
cc9e6c49 565 u32 tmptoken;
2e270412
MG
566 struct td_node *node, *tmpnode;
567 unsigned remaining_length;
2dbc5c4c 568 unsigned actual = hwreq->req.length;
9e506438 569
2dbc5c4c 570 if (hwreq->req.status != -EALREADY)
aa69a809
DL
571 return -EINVAL;
572
2dbc5c4c 573 hwreq->req.status = 0;
0e6ca199 574
2dbc5c4c 575 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
cc9e6c49 576 tmptoken = le32_to_cpu(node->ptr->token);
2e270412 577 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
2dbc5c4c 578 hwreq->req.status = -EALREADY;
0e6ca199 579 return -EBUSY;
cc9e6c49 580 }
aa69a809 581
2e270412
MG
582 remaining_length = (tmptoken & TD_TOTAL_BYTES);
583 remaining_length >>= __ffs(TD_TOTAL_BYTES);
584 actual -= remaining_length;
585
2dbc5c4c
AS
586 hwreq->req.status = tmptoken & TD_STATUS;
587 if ((TD_STATUS_HALTED & hwreq->req.status)) {
588 hwreq->req.status = -EPIPE;
2e270412 589 break;
2dbc5c4c
AS
590 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
591 hwreq->req.status = -EPROTO;
2e270412 592 break;
2dbc5c4c
AS
593 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
594 hwreq->req.status = -EILSEQ;
2e270412
MG
595 break;
596 }
597
598 if (remaining_length) {
2dbc5c4c
AS
599 if (hwep->dir) {
600 hwreq->req.status = -EPROTO;
2e270412
MG
601 break;
602 }
603 }
604 /*
605 * As the hardware could still address the freed td
606 * which will run the udc unusable, the cleanup of the
607 * td has to be delayed by one.
608 */
2dbc5c4c
AS
609 if (hwep->pending_td)
610 free_pending_td(hwep);
2e270412 611
2dbc5c4c 612 hwep->pending_td = node;
2e270412
MG
613 list_del_init(&node->td);
614 }
aa69a809 615
2dbc5c4c 616 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
aa69a809 617
2dbc5c4c 618 hwreq->req.actual += actual;
aa69a809 619
2dbc5c4c
AS
620 if (hwreq->req.status)
621 return hwreq->req.status;
aa69a809 622
2dbc5c4c 623 return hwreq->req.actual;
aa69a809
DL
624}
625
626/**
627 * _ep_nuke: dequeues all endpoint requests
2dbc5c4c 628 * @hwep: endpoint
aa69a809
DL
629 *
630 * This function returns an error code
631 * Caller must hold lock
632 */
8e22978c 633static int _ep_nuke(struct ci_hw_ep *hwep)
2dbc5c4c
AS
634__releases(hwep->lock)
635__acquires(hwep->lock)
aa69a809 636{
2e270412 637 struct td_node *node, *tmpnode;
2dbc5c4c 638 if (hwep == NULL)
aa69a809
DL
639 return -EINVAL;
640
2dbc5c4c 641 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 642
2dbc5c4c 643 while (!list_empty(&hwep->qh.queue)) {
aa69a809
DL
644
645 /* pop oldest request */
8e22978c
AS
646 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
647 struct ci_hw_req, queue);
7ca2cd29 648
2dbc5c4c
AS
649 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
650 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
651 list_del_init(&node->td);
652 node->ptr = NULL;
653 kfree(node);
7ca2cd29
MG
654 }
655
2dbc5c4c
AS
656 list_del_init(&hwreq->queue);
657 hwreq->req.status = -ESHUTDOWN;
aa69a809 658
2dbc5c4c
AS
659 if (hwreq->req.complete != NULL) {
660 spin_unlock(hwep->lock);
661 hwreq->req.complete(&hwep->ep, &hwreq->req);
662 spin_lock(hwep->lock);
aa69a809
DL
663 }
664 }
2e270412 665
2dbc5c4c
AS
666 if (hwep->pending_td)
667 free_pending_td(hwep);
2e270412 668
aa69a809
DL
669 return 0;
670}
671
672/**
673 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
674 * @gadget: gadget
675 *
676 * This function returns an error code
aa69a809
DL
677 */
678static int _gadget_stop_activity(struct usb_gadget *gadget)
aa69a809
DL
679{
680 struct usb_ep *ep;
8e22978c 681 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
e2b61c1d 682 unsigned long flags;
aa69a809 683
26c696c6
RZ
684 spin_lock_irqsave(&ci->lock, flags);
685 ci->gadget.speed = USB_SPEED_UNKNOWN;
686 ci->remote_wakeup = 0;
687 ci->suspended = 0;
688 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d 689
aa69a809
DL
690 /* flush all endpoints */
691 gadget_for_each_ep(ep, gadget) {
692 usb_ep_fifo_flush(ep);
693 }
26c696c6
RZ
694 usb_ep_fifo_flush(&ci->ep0out->ep);
695 usb_ep_fifo_flush(&ci->ep0in->ep);
aa69a809 696
aa69a809
DL
697 /* make sure to disable all endpoints */
698 gadget_for_each_ep(ep, gadget) {
699 usb_ep_disable(ep);
700 }
aa69a809 701
26c696c6
RZ
702 if (ci->status != NULL) {
703 usb_ep_free_request(&ci->ep0in->ep, ci->status);
704 ci->status = NULL;
aa69a809
DL
705 }
706
aa69a809
DL
707 return 0;
708}
709
710/******************************************************************************
711 * ISR block
712 *****************************************************************************/
713/**
714 * isr_reset_handler: USB reset interrupt handler
26c696c6 715 * @ci: UDC device
aa69a809
DL
716 *
717 * This function resets USB engine after a bus reset occurred
718 */
8e22978c 719static void isr_reset_handler(struct ci_hdrc *ci)
26c696c6
RZ
720__releases(ci->lock)
721__acquires(ci->lock)
aa69a809 722{
aa69a809
DL
723 int retval;
724
a3aee368 725 spin_unlock(&ci->lock);
92b336d7
PC
726 if (ci->gadget.speed != USB_SPEED_UNKNOWN) {
727 if (ci->driver)
728 ci->driver->disconnect(&ci->gadget);
729 }
730
26c696c6 731 retval = _gadget_stop_activity(&ci->gadget);
aa69a809
DL
732 if (retval)
733 goto done;
734
26c696c6 735 retval = hw_usb_reset(ci);
aa69a809
DL
736 if (retval)
737 goto done;
738
26c696c6
RZ
739 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
740 if (ci->status == NULL)
ac1aa6a2 741 retval = -ENOMEM;
ca9cfea0 742
b9322252 743done:
26c696c6 744 spin_lock(&ci->lock);
aa69a809 745
aa69a809 746 if (retval)
26c696c6 747 dev_err(ci->dev, "error: %i\n", retval);
aa69a809
DL
748}
749
750/**
751 * isr_get_status_complete: get_status request complete function
752 * @ep: endpoint
753 * @req: request handled
754 *
755 * Caller must release lock
756 */
757static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
758{
0f089094 759 if (ep == NULL || req == NULL)
aa69a809 760 return;
aa69a809
DL
761
762 kfree(req->buf);
763 usb_ep_free_request(ep, req);
764}
765
dd064e9d
MG
766/**
767 * _ep_queue: queues (submits) an I/O request to an endpoint
768 *
769 * Caller must hold lock
770 */
771static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
772 gfp_t __maybe_unused gfp_flags)
773{
8e22978c
AS
774 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
775 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
776 struct ci_hdrc *ci = hwep->ci;
dd064e9d
MG
777 int retval = 0;
778
2dbc5c4c 779 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
dd064e9d
MG
780 return -EINVAL;
781
2dbc5c4c 782 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
dd064e9d 783 if (req->length)
2dbc5c4c 784 hwep = (ci->ep0_dir == RX) ?
dd064e9d 785 ci->ep0out : ci->ep0in;
2dbc5c4c
AS
786 if (!list_empty(&hwep->qh.queue)) {
787 _ep_nuke(hwep);
dd064e9d 788 retval = -EOVERFLOW;
2dbc5c4c
AS
789 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
790 _usb_addr(hwep));
dd064e9d
MG
791 }
792 }
793
2dbc5c4c
AS
794 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
795 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
796 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
e4ce4ecd
MG
797 return -EMSGSIZE;
798 }
799
dd064e9d 800 /* first nuke then test link, e.g. previous status has not sent */
2dbc5c4c
AS
801 if (!list_empty(&hwreq->queue)) {
802 dev_err(hwep->ci->dev, "request already in queue\n");
dd064e9d
MG
803 return -EBUSY;
804 }
805
dd064e9d 806 /* push request */
2dbc5c4c
AS
807 hwreq->req.status = -EINPROGRESS;
808 hwreq->req.actual = 0;
dd064e9d 809
2dbc5c4c 810 retval = _hardware_enqueue(hwep, hwreq);
dd064e9d
MG
811
812 if (retval == -EALREADY)
813 retval = 0;
814 if (!retval)
2dbc5c4c 815 list_add_tail(&hwreq->queue, &hwep->qh.queue);
dd064e9d
MG
816
817 return retval;
818}
819
aa69a809
DL
820/**
821 * isr_get_status_response: get_status request response
26c696c6 822 * @ci: ci struct
aa69a809
DL
823 * @setup: setup request packet
824 *
825 * This function returns an error code
826 */
8e22978c 827static int isr_get_status_response(struct ci_hdrc *ci,
aa69a809 828 struct usb_ctrlrequest *setup)
2dbc5c4c
AS
829__releases(hwep->lock)
830__acquires(hwep->lock)
aa69a809 831{
8e22978c 832 struct ci_hw_ep *hwep = ci->ep0in;
aa69a809
DL
833 struct usb_request *req = NULL;
834 gfp_t gfp_flags = GFP_ATOMIC;
835 int dir, num, retval;
836
2dbc5c4c 837 if (hwep == NULL || setup == NULL)
aa69a809
DL
838 return -EINVAL;
839
2dbc5c4c
AS
840 spin_unlock(hwep->lock);
841 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
842 spin_lock(hwep->lock);
aa69a809
DL
843 if (req == NULL)
844 return -ENOMEM;
845
846 req->complete = isr_get_status_complete;
847 req->length = 2;
848 req->buf = kzalloc(req->length, gfp_flags);
849 if (req->buf == NULL) {
850 retval = -ENOMEM;
851 goto err_free_req;
852 }
853
854 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
e2b61c1d 855 /* Assume that device is bus powered for now. */
26c696c6 856 *(u16 *)req->buf = ci->remote_wakeup << 1;
aa69a809
DL
857 retval = 0;
858 } else if ((setup->bRequestType & USB_RECIP_MASK) \
859 == USB_RECIP_ENDPOINT) {
860 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
861 TX : RX;
862 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
26c696c6 863 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
aa69a809
DL
864 }
865 /* else do nothing; reserved for future use */
866
2dbc5c4c 867 retval = _ep_queue(&hwep->ep, req, gfp_flags);
aa69a809
DL
868 if (retval)
869 goto err_free_buf;
870
871 return 0;
872
873 err_free_buf:
874 kfree(req->buf);
875 err_free_req:
2dbc5c4c
AS
876 spin_unlock(hwep->lock);
877 usb_ep_free_request(&hwep->ep, req);
878 spin_lock(hwep->lock);
aa69a809
DL
879 return retval;
880}
881
541cace8
PK
882/**
883 * isr_setup_status_complete: setup_status request complete function
884 * @ep: endpoint
885 * @req: request handled
886 *
887 * Caller must release lock. Put the port in test mode if test mode
888 * feature is selected.
889 */
890static void
891isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
892{
8e22978c 893 struct ci_hdrc *ci = req->context;
541cace8
PK
894 unsigned long flags;
895
26c696c6
RZ
896 if (ci->setaddr) {
897 hw_usb_set_address(ci, ci->address);
898 ci->setaddr = false;
ef15e549
AS
899 }
900
26c696c6
RZ
901 spin_lock_irqsave(&ci->lock, flags);
902 if (ci->test_mode)
903 hw_port_test_set(ci, ci->test_mode);
904 spin_unlock_irqrestore(&ci->lock, flags);
541cace8
PK
905}
906
aa69a809
DL
907/**
908 * isr_setup_status_phase: queues the status phase of a setup transation
26c696c6 909 * @ci: ci struct
aa69a809
DL
910 *
911 * This function returns an error code
912 */
8e22978c 913static int isr_setup_status_phase(struct ci_hdrc *ci)
aa69a809
DL
914{
915 int retval;
8e22978c 916 struct ci_hw_ep *hwep;
aa69a809 917
2dbc5c4c 918 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
26c696c6
RZ
919 ci->status->context = ci;
920 ci->status->complete = isr_setup_status_complete;
aa69a809 921
2dbc5c4c 922 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
aa69a809
DL
923
924 return retval;
925}
926
927/**
928 * isr_tr_complete_low: transaction complete low level handler
2dbc5c4c 929 * @hwep: endpoint
aa69a809
DL
930 *
931 * This function returns an error code
932 * Caller must hold lock
933 */
8e22978c 934static int isr_tr_complete_low(struct ci_hw_ep *hwep)
2dbc5c4c
AS
935__releases(hwep->lock)
936__acquires(hwep->lock)
aa69a809 937{
8e22978c
AS
938 struct ci_hw_req *hwreq, *hwreqtemp;
939 struct ci_hw_ep *hweptemp = hwep;
db89960e 940 int retval = 0;
aa69a809 941
2dbc5c4c 942 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
0e6ca199 943 queue) {
2dbc5c4c 944 retval = _hardware_dequeue(hwep, hwreq);
0e6ca199
PK
945 if (retval < 0)
946 break;
2dbc5c4c
AS
947 list_del_init(&hwreq->queue);
948 if (hwreq->req.complete != NULL) {
949 spin_unlock(hwep->lock);
950 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
951 hwreq->req.length)
952 hweptemp = hwep->ci->ep0in;
953 hwreq->req.complete(&hweptemp->ep, &hwreq->req);
954 spin_lock(hwep->lock);
0e6ca199 955 }
d9bb9c18
AL
956 }
957
ef907482 958 if (retval == -EBUSY)
0e6ca199 959 retval = 0;
aa69a809 960
aa69a809
DL
961 return retval;
962}
963
964/**
965 * isr_tr_complete_handler: transaction complete interrupt handler
26c696c6 966 * @ci: UDC descriptor
aa69a809
DL
967 *
968 * This function handles traffic events
969 */
8e22978c 970static void isr_tr_complete_handler(struct ci_hdrc *ci)
26c696c6
RZ
971__releases(ci->lock)
972__acquires(ci->lock)
aa69a809
DL
973{
974 unsigned i;
541cace8 975 u8 tmode = 0;
aa69a809 976
26c696c6 977 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 978 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
4c5212b7 979 int type, num, dir, err = -EINVAL;
aa69a809
DL
980 struct usb_ctrlrequest req;
981
2dbc5c4c 982 if (hwep->ep.desc == NULL)
aa69a809
DL
983 continue; /* not configured */
984
26c696c6 985 if (hw_test_and_clear_complete(ci, i)) {
2dbc5c4c
AS
986 err = isr_tr_complete_low(hwep);
987 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
aa69a809 988 if (err > 0) /* needs status phase */
26c696c6 989 err = isr_setup_status_phase(ci);
aa69a809 990 if (err < 0) {
26c696c6 991 spin_unlock(&ci->lock);
2dbc5c4c 992 if (usb_ep_set_halt(&hwep->ep))
26c696c6 993 dev_err(ci->dev,
0917ba84 994 "error: ep_set_halt\n");
26c696c6 995 spin_lock(&ci->lock);
aa69a809
DL
996 }
997 }
998 }
999
2dbc5c4c 1000 if (hwep->type != USB_ENDPOINT_XFER_CONTROL ||
26c696c6 1001 !hw_test_and_clear_setup_status(ci, i))
aa69a809
DL
1002 continue;
1003
1004 if (i != 0) {
26c696c6 1005 dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
aa69a809
DL
1006 continue;
1007 }
1008
ca9cfea0
PK
1009 /*
1010 * Flush data and handshake transactions of previous
1011 * setup packet.
1012 */
26c696c6
RZ
1013 _ep_nuke(ci->ep0out);
1014 _ep_nuke(ci->ep0in);
ca9cfea0 1015
aa69a809
DL
1016 /* read_setup_packet */
1017 do {
26c696c6 1018 hw_test_and_set_setup_guard(ci);
2dbc5c4c 1019 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
26c696c6 1020 } while (!hw_test_and_clear_setup_guard(ci));
aa69a809
DL
1021
1022 type = req.bRequestType;
1023
26c696c6 1024 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
aa69a809 1025
aa69a809
DL
1026 switch (req.bRequest) {
1027 case USB_REQ_CLEAR_FEATURE:
e2b61c1d
PK
1028 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1029 le16_to_cpu(req.wValue) ==
1030 USB_ENDPOINT_HALT) {
1031 if (req.wLength != 0)
1032 break;
1033 num = le16_to_cpu(req.wIndex);
4c5212b7 1034 dir = num & USB_ENDPOINT_DIR_MASK;
e2b61c1d 1035 num &= USB_ENDPOINT_NUMBER_MASK;
4c5212b7 1036 if (dir) /* TX */
26c696c6 1037 num += ci->hw_ep_max/2;
8e22978c 1038 if (!ci->ci_hw_ep[num].wedge) {
26c696c6 1039 spin_unlock(&ci->lock);
e2b61c1d 1040 err = usb_ep_clear_halt(
8e22978c 1041 &ci->ci_hw_ep[num].ep);
26c696c6 1042 spin_lock(&ci->lock);
e2b61c1d
PK
1043 if (err)
1044 break;
1045 }
26c696c6 1046 err = isr_setup_status_phase(ci);
e2b61c1d
PK
1047 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1048 le16_to_cpu(req.wValue) ==
1049 USB_DEVICE_REMOTE_WAKEUP) {
1050 if (req.wLength != 0)
aa69a809 1051 break;
26c696c6
RZ
1052 ci->remote_wakeup = 0;
1053 err = isr_setup_status_phase(ci);
e2b61c1d
PK
1054 } else {
1055 goto delegate;
aa69a809 1056 }
aa69a809
DL
1057 break;
1058 case USB_REQ_GET_STATUS:
1059 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1060 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1061 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1062 goto delegate;
1063 if (le16_to_cpu(req.wLength) != 2 ||
1064 le16_to_cpu(req.wValue) != 0)
1065 break;
26c696c6 1066 err = isr_get_status_response(ci, &req);
aa69a809
DL
1067 break;
1068 case USB_REQ_SET_ADDRESS:
1069 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1070 goto delegate;
1071 if (le16_to_cpu(req.wLength) != 0 ||
1072 le16_to_cpu(req.wIndex) != 0)
1073 break;
26c696c6
RZ
1074 ci->address = (u8)le16_to_cpu(req.wValue);
1075 ci->setaddr = true;
1076 err = isr_setup_status_phase(ci);
aa69a809
DL
1077 break;
1078 case USB_REQ_SET_FEATURE:
e2b61c1d
PK
1079 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1080 le16_to_cpu(req.wValue) ==
1081 USB_ENDPOINT_HALT) {
1082 if (req.wLength != 0)
1083 break;
1084 num = le16_to_cpu(req.wIndex);
4c5212b7 1085 dir = num & USB_ENDPOINT_DIR_MASK;
e2b61c1d 1086 num &= USB_ENDPOINT_NUMBER_MASK;
4c5212b7 1087 if (dir) /* TX */
26c696c6 1088 num += ci->hw_ep_max/2;
aa69a809 1089
26c696c6 1090 spin_unlock(&ci->lock);
8e22978c 1091 err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
26c696c6 1092 spin_lock(&ci->lock);
e2b61c1d 1093 if (!err)
26c696c6 1094 isr_setup_status_phase(ci);
541cace8 1095 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
e2b61c1d
PK
1096 if (req.wLength != 0)
1097 break;
541cace8
PK
1098 switch (le16_to_cpu(req.wValue)) {
1099 case USB_DEVICE_REMOTE_WAKEUP:
26c696c6
RZ
1100 ci->remote_wakeup = 1;
1101 err = isr_setup_status_phase(ci);
541cace8
PK
1102 break;
1103 case USB_DEVICE_TEST_MODE:
1104 tmode = le16_to_cpu(req.wIndex) >> 8;
1105 switch (tmode) {
1106 case TEST_J:
1107 case TEST_K:
1108 case TEST_SE0_NAK:
1109 case TEST_PACKET:
1110 case TEST_FORCE_EN:
26c696c6 1111 ci->test_mode = tmode;
541cace8 1112 err = isr_setup_status_phase(
26c696c6 1113 ci);
541cace8
PK
1114 break;
1115 default:
1116 break;
1117 }
1118 default:
1119 goto delegate;
1120 }
e2b61c1d
PK
1121 } else {
1122 goto delegate;
1123 }
aa69a809
DL
1124 break;
1125 default:
1126delegate:
1127 if (req.wLength == 0) /* no data phase */
26c696c6 1128 ci->ep0_dir = TX;
aa69a809 1129
26c696c6
RZ
1130 spin_unlock(&ci->lock);
1131 err = ci->driver->setup(&ci->gadget, &req);
1132 spin_lock(&ci->lock);
aa69a809
DL
1133 break;
1134 }
1135
1136 if (err < 0) {
26c696c6 1137 spin_unlock(&ci->lock);
2dbc5c4c 1138 if (usb_ep_set_halt(&hwep->ep))
26c696c6
RZ
1139 dev_err(ci->dev, "error: ep_set_halt\n");
1140 spin_lock(&ci->lock);
aa69a809
DL
1141 }
1142 }
1143}
1144
1145/******************************************************************************
1146 * ENDPT block
1147 *****************************************************************************/
1148/**
1149 * ep_enable: configure endpoint, making it usable
1150 *
1151 * Check usb_ep_enable() at "usb_gadget.h" for details
1152 */
1153static int ep_enable(struct usb_ep *ep,
1154 const struct usb_endpoint_descriptor *desc)
1155{
8e22978c 1156 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
ca9cfea0 1157 int retval = 0;
aa69a809 1158 unsigned long flags;
1cd12a9c 1159 u32 cap = 0;
aa69a809 1160
aa69a809
DL
1161 if (ep == NULL || desc == NULL)
1162 return -EINVAL;
1163
2dbc5c4c 1164 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1165
1166 /* only internal SW should enable ctrl endpts */
1167
2dbc5c4c 1168 hwep->ep.desc = desc;
aa69a809 1169
2dbc5c4c
AS
1170 if (!list_empty(&hwep->qh.queue))
1171 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
aa69a809 1172
2dbc5c4c
AS
1173 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1174 hwep->num = usb_endpoint_num(desc);
1175 hwep->type = usb_endpoint_type(desc);
aa69a809 1176
2dbc5c4c
AS
1177 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1178 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
aa69a809 1179
2dbc5c4c 1180 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1cd12a9c 1181 cap |= QH_IOS;
2dbc5c4c 1182 if (hwep->num)
776ffc16 1183 cap |= QH_ZLT;
2dbc5c4c 1184 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
2fc5a7da
PC
1185 /*
1186 * For ISO-TX, we set mult at QH as the largest value, and use
1187 * MultO at TD as real mult value.
1188 */
1189 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1190 cap |= 3 << __ffs(QH_MULT);
1cd12a9c 1191
2dbc5c4c 1192 hwep->qh.ptr->cap = cpu_to_le32(cap);
1cd12a9c 1193
2dbc5c4c 1194 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
aa69a809 1195
ac1aa6a2
A
1196 /*
1197 * Enable endpoints in the HW other than ep0 as ep0
1198 * is always enabled
1199 */
2dbc5c4c
AS
1200 if (hwep->num)
1201 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1202 hwep->type);
aa69a809 1203
2dbc5c4c 1204 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1205 return retval;
1206}
1207
1208/**
1209 * ep_disable: endpoint is no longer usable
1210 *
1211 * Check usb_ep_disable() at "usb_gadget.h" for details
1212 */
1213static int ep_disable(struct usb_ep *ep)
1214{
8e22978c 1215 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1216 int direction, retval = 0;
1217 unsigned long flags;
1218
aa69a809
DL
1219 if (ep == NULL)
1220 return -EINVAL;
2dbc5c4c 1221 else if (hwep->ep.desc == NULL)
aa69a809
DL
1222 return -EBUSY;
1223
2dbc5c4c 1224 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1225
1226 /* only internal SW should disable ctrl endpts */
1227
2dbc5c4c 1228 direction = hwep->dir;
aa69a809 1229 do {
2dbc5c4c
AS
1230 retval |= _ep_nuke(hwep);
1231 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
aa69a809 1232
2dbc5c4c
AS
1233 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1234 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1235
2dbc5c4c 1236 } while (hwep->dir != direction);
aa69a809 1237
2dbc5c4c 1238 hwep->ep.desc = NULL;
aa69a809 1239
2dbc5c4c 1240 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1241 return retval;
1242}
1243
1244/**
1245 * ep_alloc_request: allocate a request object to use with this endpoint
1246 *
1247 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1248 */
1249static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1250{
8e22978c 1251 struct ci_hw_req *hwreq = NULL;
aa69a809 1252
0f089094 1253 if (ep == NULL)
aa69a809 1254 return NULL;
aa69a809 1255
8e22978c 1256 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
2dbc5c4c
AS
1257 if (hwreq != NULL) {
1258 INIT_LIST_HEAD(&hwreq->queue);
1259 INIT_LIST_HEAD(&hwreq->tds);
aa69a809
DL
1260 }
1261
2dbc5c4c 1262 return (hwreq == NULL) ? NULL : &hwreq->req;
aa69a809
DL
1263}
1264
1265/**
1266 * ep_free_request: frees a request object
1267 *
1268 * Check usb_ep_free_request() at "usb_gadget.h" for details
1269 */
1270static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1271{
8e22978c
AS
1272 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1273 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
2e270412 1274 struct td_node *node, *tmpnode;
aa69a809
DL
1275 unsigned long flags;
1276
aa69a809 1277 if (ep == NULL || req == NULL) {
aa69a809 1278 return;
2dbc5c4c
AS
1279 } else if (!list_empty(&hwreq->queue)) {
1280 dev_err(hwep->ci->dev, "freeing queued request\n");
aa69a809
DL
1281 return;
1282 }
1283
2dbc5c4c 1284 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1285
2dbc5c4c
AS
1286 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1287 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
2e270412
MG
1288 list_del_init(&node->td);
1289 node->ptr = NULL;
1290 kfree(node);
1291 }
cc9e6c49 1292
2dbc5c4c 1293 kfree(hwreq);
aa69a809 1294
2dbc5c4c 1295 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1296}
1297
1298/**
1299 * ep_queue: queues (submits) an I/O request to an endpoint
1300 *
1301 * Check usb_ep_queue()* at usb_gadget.h" for details
1302 */
1303static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1304 gfp_t __maybe_unused gfp_flags)
1305{
8e22978c 1306 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1307 int retval = 0;
1308 unsigned long flags;
1309
2dbc5c4c 1310 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1311 return -EINVAL;
1312
2dbc5c4c 1313 spin_lock_irqsave(hwep->lock, flags);
dd064e9d 1314 retval = _ep_queue(ep, req, gfp_flags);
2dbc5c4c 1315 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1316 return retval;
1317}
1318
1319/**
1320 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1321 *
1322 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1323 */
1324static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1325{
8e22978c
AS
1326 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1327 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
aa69a809
DL
1328 unsigned long flags;
1329
2dbc5c4c
AS
1330 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1331 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1332 list_empty(&hwep->qh.queue))
aa69a809
DL
1333 return -EINVAL;
1334
2dbc5c4c 1335 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1336
2dbc5c4c 1337 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809
DL
1338
1339 /* pop request */
2dbc5c4c 1340 list_del_init(&hwreq->queue);
5e0aa49e 1341
2dbc5c4c 1342 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
5e0aa49e 1343
aa69a809
DL
1344 req->status = -ECONNRESET;
1345
2dbc5c4c
AS
1346 if (hwreq->req.complete != NULL) {
1347 spin_unlock(hwep->lock);
1348 hwreq->req.complete(&hwep->ep, &hwreq->req);
1349 spin_lock(hwep->lock);
aa69a809
DL
1350 }
1351
2dbc5c4c 1352 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1353 return 0;
1354}
1355
1356/**
1357 * ep_set_halt: sets the endpoint halt feature
1358 *
1359 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1360 */
1361static int ep_set_halt(struct usb_ep *ep, int value)
1362{
8e22978c 1363 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1364 int direction, retval = 0;
1365 unsigned long flags;
1366
2dbc5c4c 1367 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1368 return -EINVAL;
1369
2dbc5c4c 1370 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
e4ce4ecd
MG
1371 return -EOPNOTSUPP;
1372
2dbc5c4c 1373 spin_lock_irqsave(hwep->lock, flags);
aa69a809
DL
1374
1375#ifndef STALL_IN
1376 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2dbc5c4c
AS
1377 if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
1378 !list_empty(&hwep->qh.queue)) {
1379 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1380 return -EAGAIN;
1381 }
1382#endif
1383
2dbc5c4c 1384 direction = hwep->dir;
aa69a809 1385 do {
2dbc5c4c 1386 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
aa69a809
DL
1387
1388 if (!value)
2dbc5c4c 1389 hwep->wedge = 0;
aa69a809 1390
2dbc5c4c
AS
1391 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1392 hwep->dir = (hwep->dir == TX) ? RX : TX;
aa69a809 1393
2dbc5c4c 1394 } while (hwep->dir != direction);
aa69a809 1395
2dbc5c4c 1396 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1397 return retval;
1398}
1399
1400/**
1401 * ep_set_wedge: sets the halt feature and ignores clear requests
1402 *
1403 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1404 */
1405static int ep_set_wedge(struct usb_ep *ep)
1406{
8e22978c 1407 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1408 unsigned long flags;
1409
2dbc5c4c 1410 if (ep == NULL || hwep->ep.desc == NULL)
aa69a809
DL
1411 return -EINVAL;
1412
2dbc5c4c
AS
1413 spin_lock_irqsave(hwep->lock, flags);
1414 hwep->wedge = 1;
1415 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1416
1417 return usb_ep_set_halt(ep);
1418}
1419
1420/**
1421 * ep_fifo_flush: flushes contents of a fifo
1422 *
1423 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1424 */
1425static void ep_fifo_flush(struct usb_ep *ep)
1426{
8e22978c 1427 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
aa69a809
DL
1428 unsigned long flags;
1429
aa69a809 1430 if (ep == NULL) {
2dbc5c4c 1431 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
aa69a809
DL
1432 return;
1433 }
1434
2dbc5c4c 1435 spin_lock_irqsave(hwep->lock, flags);
aa69a809 1436
2dbc5c4c 1437 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
aa69a809 1438
2dbc5c4c 1439 spin_unlock_irqrestore(hwep->lock, flags);
aa69a809
DL
1440}
1441
1442/**
1443 * Endpoint-specific part of the API to the USB controller hardware
1444 * Check "usb_gadget.h" for details
1445 */
1446static const struct usb_ep_ops usb_ep_ops = {
1447 .enable = ep_enable,
1448 .disable = ep_disable,
1449 .alloc_request = ep_alloc_request,
1450 .free_request = ep_free_request,
1451 .queue = ep_queue,
1452 .dequeue = ep_dequeue,
1453 .set_halt = ep_set_halt,
1454 .set_wedge = ep_set_wedge,
1455 .fifo_flush = ep_fifo_flush,
1456};
1457
1458/******************************************************************************
1459 * GADGET block
1460 *****************************************************************************/
8e22978c 1461static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
f01ef574 1462{
8e22978c 1463 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
f01ef574
PK
1464 unsigned long flags;
1465 int gadget_ready = 0;
1466
26c696c6
RZ
1467 spin_lock_irqsave(&ci->lock, flags);
1468 ci->vbus_active = is_active;
1469 if (ci->driver)
f01ef574 1470 gadget_ready = 1;
26c696c6 1471 spin_unlock_irqrestore(&ci->lock, flags);
f01ef574
PK
1472
1473 if (gadget_ready) {
1474 if (is_active) {
c036019e 1475 pm_runtime_get_sync(&_gadget->dev);
26c696c6
RZ
1476 hw_device_reset(ci, USBMODE_CM_DC);
1477 hw_device_state(ci, ci->ep0out->qh.dma);
a107f8c5 1478 dev_dbg(ci->dev, "Connected to host\n");
f01ef574 1479 } else {
92b336d7
PC
1480 if (ci->driver)
1481 ci->driver->disconnect(&ci->gadget);
26c696c6
RZ
1482 hw_device_state(ci, 0);
1483 if (ci->platdata->notify_event)
1484 ci->platdata->notify_event(ci,
8e22978c 1485 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6 1486 _gadget_stop_activity(&ci->gadget);
c036019e 1487 pm_runtime_put_sync(&_gadget->dev);
a107f8c5 1488 dev_dbg(ci->dev, "Disconnected from host\n");
f01ef574
PK
1489 }
1490 }
1491
1492 return 0;
1493}
1494
8e22978c 1495static int ci_udc_wakeup(struct usb_gadget *_gadget)
e2b61c1d 1496{
8e22978c 1497 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
e2b61c1d
PK
1498 unsigned long flags;
1499 int ret = 0;
1500
26c696c6
RZ
1501 spin_lock_irqsave(&ci->lock, flags);
1502 if (!ci->remote_wakeup) {
e2b61c1d 1503 ret = -EOPNOTSUPP;
e2b61c1d
PK
1504 goto out;
1505 }
26c696c6 1506 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
e2b61c1d 1507 ret = -EINVAL;
e2b61c1d
PK
1508 goto out;
1509 }
26c696c6 1510 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
e2b61c1d 1511out:
26c696c6 1512 spin_unlock_irqrestore(&ci->lock, flags);
e2b61c1d
PK
1513 return ret;
1514}
1515
8e22978c 1516static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
d860852e 1517{
8e22978c 1518 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
d860852e 1519
26c696c6 1520 if (ci->transceiver)
2dbc5c4c 1521 return usb_phy_set_power(ci->transceiver, ma);
d860852e
PK
1522 return -ENOTSUPP;
1523}
1524
c0a48e6c
MG
1525/* Change Data+ pullup status
1526 * this func is used by usb_gadget_connect/disconnet
1527 */
8e22978c 1528static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
c0a48e6c 1529{
8e22978c 1530 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
c0a48e6c 1531
4a64783b
PC
1532 if (!ci->vbus_active)
1533 return -EOPNOTSUPP;
1534
c0a48e6c
MG
1535 if (is_on)
1536 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1537 else
1538 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1539
1540 return 0;
1541}
1542
8e22978c 1543static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1544 struct usb_gadget_driver *driver);
8e22978c 1545static int ci_udc_stop(struct usb_gadget *gadget,
1f339d84 1546 struct usb_gadget_driver *driver);
aa69a809
DL
1547/**
1548 * Device operations part of the API to the USB controller hardware,
1549 * which don't involve endpoints (or i/o)
1550 * Check "usb_gadget.h" for details
1551 */
f01ef574 1552static const struct usb_gadget_ops usb_gadget_ops = {
8e22978c
AS
1553 .vbus_session = ci_udc_vbus_session,
1554 .wakeup = ci_udc_wakeup,
1555 .pullup = ci_udc_pullup,
1556 .vbus_draw = ci_udc_vbus_draw,
1557 .udc_start = ci_udc_start,
1558 .udc_stop = ci_udc_stop,
f01ef574 1559};
aa69a809 1560
8e22978c 1561static int init_eps(struct ci_hdrc *ci)
aa69a809 1562{
790c2d52 1563 int retval = 0, i, j;
aa69a809 1564
26c696c6 1565 for (i = 0; i < ci->hw_ep_max/2; i++)
ca9cfea0 1566 for (j = RX; j <= TX; j++) {
26c696c6 1567 int k = i + j * ci->hw_ep_max/2;
8e22978c 1568 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
aa69a809 1569
2dbc5c4c 1570 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
ca9cfea0 1571 (j == TX) ? "in" : "out");
aa69a809 1572
2dbc5c4c
AS
1573 hwep->ci = ci;
1574 hwep->lock = &ci->lock;
1575 hwep->td_pool = ci->td_pool;
aa69a809 1576
2dbc5c4c
AS
1577 hwep->ep.name = hwep->name;
1578 hwep->ep.ops = &usb_ep_ops;
7f67c38b
MG
1579 /*
1580 * for ep0: maxP defined in desc, for other
1581 * eps, maxP is set by epautoconfig() called
1582 * by gadget layer
1583 */
e117e742 1584 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
aa69a809 1585
2dbc5c4c
AS
1586 INIT_LIST_HEAD(&hwep->qh.queue);
1587 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1588 &hwep->qh.dma);
1589 if (hwep->qh.ptr == NULL)
aa69a809
DL
1590 retval = -ENOMEM;
1591 else
2dbc5c4c 1592 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
ca9cfea0 1593
d36ade60
AS
1594 /*
1595 * set up shorthands for ep0 out and in endpoints,
1596 * don't add to gadget's ep_list
1597 */
1598 if (i == 0) {
1599 if (j == RX)
2dbc5c4c 1600 ci->ep0out = hwep;
d36ade60 1601 else
2dbc5c4c 1602 ci->ep0in = hwep;
d36ade60 1603
e117e742 1604 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
ca9cfea0 1605 continue;
d36ade60 1606 }
ca9cfea0 1607
2dbc5c4c 1608 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
ca9cfea0 1609 }
790c2d52
AS
1610
1611 return retval;
1612}
1613
8e22978c 1614static void destroy_eps(struct ci_hdrc *ci)
ad6b1b97
MKB
1615{
1616 int i;
1617
1618 for (i = 0; i < ci->hw_ep_max; i++) {
8e22978c 1619 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
ad6b1b97 1620
4a29567b
PC
1621 if (hwep->pending_td)
1622 free_pending_td(hwep);
2dbc5c4c 1623 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
ad6b1b97
MKB
1624 }
1625}
1626
790c2d52 1627/**
8e22978c 1628 * ci_udc_start: register a gadget driver
1f339d84 1629 * @gadget: our gadget
790c2d52 1630 * @driver: the driver being registered
790c2d52 1631 *
790c2d52
AS
1632 * Interrupts are enabled here.
1633 */
8e22978c 1634static int ci_udc_start(struct usb_gadget *gadget,
1f339d84 1635 struct usb_gadget_driver *driver)
790c2d52 1636{
8e22978c 1637 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
790c2d52 1638 unsigned long flags;
790c2d52
AS
1639 int retval = -ENOMEM;
1640
1f339d84 1641 if (driver->disconnect == NULL)
790c2d52 1642 return -EINVAL;
790c2d52 1643
790c2d52 1644
26c696c6
RZ
1645 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1646 retval = usb_ep_enable(&ci->ep0out->ep);
ac1aa6a2
A
1647 if (retval)
1648 return retval;
877c1f54 1649
26c696c6
RZ
1650 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1651 retval = usb_ep_enable(&ci->ep0in->ep);
ac1aa6a2
A
1652 if (retval)
1653 return retval;
26c696c6
RZ
1654
1655 ci->driver = driver;
1656 pm_runtime_get_sync(&ci->gadget.dev);
d268e9bc 1657 if (ci->vbus_active) {
65b2fb32 1658 spin_lock_irqsave(&ci->lock, flags);
d268e9bc
PC
1659 hw_device_reset(ci, USBMODE_CM_DC);
1660 } else {
1661 pm_runtime_put_sync(&ci->gadget.dev);
65b2fb32 1662 return retval;
f01ef574
PK
1663 }
1664
26c696c6 1665 retval = hw_device_state(ci, ci->ep0out->qh.dma);
65b2fb32 1666 spin_unlock_irqrestore(&ci->lock, flags);
c036019e 1667 if (retval)
26c696c6 1668 pm_runtime_put_sync(&ci->gadget.dev);
aa69a809 1669
aa69a809
DL
1670 return retval;
1671}
aa69a809
DL
1672
1673/**
8e22978c 1674 * ci_udc_stop: unregister a gadget driver
aa69a809 1675 */
8e22978c 1676static int ci_udc_stop(struct usb_gadget *gadget,
1f339d84 1677 struct usb_gadget_driver *driver)
aa69a809 1678{
8e22978c 1679 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1f339d84 1680 unsigned long flags;
aa69a809 1681
26c696c6 1682 spin_lock_irqsave(&ci->lock, flags);
aa69a809 1683
d268e9bc 1684 if (ci->vbus_active) {
26c696c6
RZ
1685 hw_device_state(ci, 0);
1686 if (ci->platdata->notify_event)
1687 ci->platdata->notify_event(ci,
8e22978c 1688 CI_HDRC_CONTROLLER_STOPPED_EVENT);
26c696c6
RZ
1689 spin_unlock_irqrestore(&ci->lock, flags);
1690 _gadget_stop_activity(&ci->gadget);
1691 spin_lock_irqsave(&ci->lock, flags);
1692 pm_runtime_put(&ci->gadget.dev);
f01ef574 1693 }
aa69a809 1694
f84839da 1695 ci->driver = NULL;
26c696c6 1696 spin_unlock_irqrestore(&ci->lock, flags);
aa69a809 1697
aa69a809
DL
1698 return 0;
1699}
aa69a809
DL
1700
1701/******************************************************************************
1702 * BUS block
1703 *****************************************************************************/
1704/**
26c696c6 1705 * udc_irq: ci interrupt handler
aa69a809
DL
1706 *
1707 * This function returns IRQ_HANDLED if the IRQ has been handled
1708 * It locks access to registers
1709 */
8e22978c 1710static irqreturn_t udc_irq(struct ci_hdrc *ci)
aa69a809 1711{
aa69a809
DL
1712 irqreturn_t retval;
1713 u32 intr;
1714
26c696c6 1715 if (ci == NULL)
aa69a809 1716 return IRQ_HANDLED;
aa69a809 1717
26c696c6 1718 spin_lock(&ci->lock);
f01ef574 1719
8e22978c 1720 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
26c696c6 1721 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
758fc986 1722 USBMODE_CM_DC) {
26c696c6 1723 spin_unlock(&ci->lock);
f01ef574
PK
1724 return IRQ_NONE;
1725 }
1726 }
26c696c6 1727 intr = hw_test_and_clear_intr_active(ci);
aa69a809 1728
e443b333 1729 if (intr) {
aa69a809 1730 /* order defines priority - do NOT change it */
e443b333 1731 if (USBi_URI & intr)
26c696c6 1732 isr_reset_handler(ci);
e443b333 1733
aa69a809 1734 if (USBi_PCI & intr) {
26c696c6 1735 ci->gadget.speed = hw_port_is_high_speed(ci) ?
aa69a809 1736 USB_SPEED_HIGH : USB_SPEED_FULL;
26c696c6
RZ
1737 if (ci->suspended && ci->driver->resume) {
1738 spin_unlock(&ci->lock);
1739 ci->driver->resume(&ci->gadget);
1740 spin_lock(&ci->lock);
1741 ci->suspended = 0;
e2b61c1d 1742 }
aa69a809 1743 }
e443b333
AS
1744
1745 if (USBi_UI & intr)
26c696c6 1746 isr_tr_complete_handler(ci);
e443b333 1747
e2b61c1d 1748 if (USBi_SLI & intr) {
26c696c6
RZ
1749 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1750 ci->driver->suspend) {
1751 ci->suspended = 1;
1752 spin_unlock(&ci->lock);
1753 ci->driver->suspend(&ci->gadget);
1754 spin_lock(&ci->lock);
e2b61c1d 1755 }
e2b61c1d 1756 }
aa69a809
DL
1757 retval = IRQ_HANDLED;
1758 } else {
aa69a809
DL
1759 retval = IRQ_NONE;
1760 }
26c696c6 1761 spin_unlock(&ci->lock);
aa69a809
DL
1762
1763 return retval;
1764}
1765
aa69a809 1766/**
5f36e231 1767 * udc_start: initialize gadget role
26c696c6 1768 * @ci: chipidea controller
aa69a809 1769 */
8e22978c 1770static int udc_start(struct ci_hdrc *ci)
aa69a809 1771{
26c696c6 1772 struct device *dev = ci->dev;
aa69a809
DL
1773 int retval = 0;
1774
26c696c6 1775 spin_lock_init(&ci->lock);
aa69a809 1776
26c696c6
RZ
1777 ci->gadget.ops = &usb_gadget_ops;
1778 ci->gadget.speed = USB_SPEED_UNKNOWN;
1779 ci->gadget.max_speed = USB_SPEED_HIGH;
1780 ci->gadget.is_otg = 0;
1781 ci->gadget.name = ci->platdata->name;
aa69a809 1782
26c696c6 1783 INIT_LIST_HEAD(&ci->gadget.ep_list);
aa69a809 1784
790c2d52 1785 /* alloc resources */
8e22978c
AS
1786 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1787 sizeof(struct ci_hw_qh),
1788 64, CI_HDRC_PAGE_SIZE);
26c696c6 1789 if (ci->qh_pool == NULL)
5f36e231 1790 return -ENOMEM;
790c2d52 1791
8e22978c
AS
1792 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1793 sizeof(struct ci_hw_td),
1794 64, CI_HDRC_PAGE_SIZE);
26c696c6 1795 if (ci->td_pool == NULL) {
790c2d52
AS
1796 retval = -ENOMEM;
1797 goto free_qh_pool;
1798 }
1799
26c696c6 1800 retval = init_eps(ci);
790c2d52
AS
1801 if (retval)
1802 goto free_pools;
1803
26c696c6 1804 ci->gadget.ep0 = &ci->ep0in->ep;
f01ef574 1805
26c696c6 1806 retval = usb_add_gadget_udc(dev, &ci->gadget);
0f91349b 1807 if (retval)
74475ede 1808 goto destroy_eps;
0f91349b 1809
26c696c6
RZ
1810 pm_runtime_no_callbacks(&ci->gadget.dev);
1811 pm_runtime_enable(&ci->gadget.dev);
aa69a809 1812
aa69a809
DL
1813 return retval;
1814
ad6b1b97
MKB
1815destroy_eps:
1816 destroy_eps(ci);
790c2d52 1817free_pools:
26c696c6 1818 dma_pool_destroy(ci->td_pool);
790c2d52 1819free_qh_pool:
26c696c6 1820 dma_pool_destroy(ci->qh_pool);
aa69a809
DL
1821 return retval;
1822}
1823
1824/**
3f124d23 1825 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
aa69a809
DL
1826 *
1827 * No interrupts active, the IRQ has been released
1828 */
3f124d23 1829void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
aa69a809 1830{
3f124d23 1831 if (!ci->roles[CI_ROLE_GADGET])
aa69a809 1832 return;
0f089094 1833
26c696c6 1834 usb_del_gadget_udc(&ci->gadget);
aa69a809 1835
ad6b1b97 1836 destroy_eps(ci);
790c2d52 1837
26c696c6
RZ
1838 dma_pool_destroy(ci->td_pool);
1839 dma_pool_destroy(ci->qh_pool);
3f124d23
PC
1840}
1841
1842static int udc_id_switch_for_device(struct ci_hdrc *ci)
1843{
1844 if (ci->is_otg) {
1845 ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
1846 ci_enable_otg_interrupt(ci, OTGSC_BSVIE);
1847 }
1848
1849 return 0;
1850}
1851
1852static void udc_id_switch_for_host(struct ci_hdrc *ci)
1853{
1854 if (ci->is_otg) {
1855 /* host doesn't care B_SESSION_VALID event */
1856 ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
1857 ci_disable_otg_interrupt(ci, OTGSC_BSVIE);
1858 }
5f36e231
AS
1859}
1860
1861/**
1862 * ci_hdrc_gadget_init - initialize device related bits
1863 * ci: the controller
1864 *
3f124d23 1865 * This function initializes the gadget, if the device is "device capable".
5f36e231 1866 */
8e22978c 1867int ci_hdrc_gadget_init(struct ci_hdrc *ci)
5f36e231
AS
1868{
1869 struct ci_role_driver *rdrv;
1870
1871 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1872 return -ENXIO;
1873
1874 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1875 if (!rdrv)
1876 return -ENOMEM;
1877
3f124d23
PC
1878 rdrv->start = udc_id_switch_for_device;
1879 rdrv->stop = udc_id_switch_for_host;
5f36e231
AS
1880 rdrv->irq = udc_irq;
1881 rdrv->name = "gadget";
1882 ci->roles[CI_ROLE_GADGET] = rdrv;
aa69a809 1883
3f124d23 1884 return udc_start(ci);
aa69a809 1885}