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Commit | Line | Data |
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aa69a809 | 1 | /* |
eb70e5ab | 2 | * udc.c - ChipIdea UDC driver |
aa69a809 DL |
3 | * |
4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | |
5 | * | |
6 | * Author: David Lopo | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
36825a2d | 13 | #include <linux/delay.h> |
aa69a809 DL |
14 | #include <linux/device.h> |
15 | #include <linux/dmapool.h> | |
ded017ee | 16 | #include <linux/err.h> |
5b08319f | 17 | #include <linux/irqreturn.h> |
aa69a809 | 18 | #include <linux/kernel.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c036019e | 20 | #include <linux/pm_runtime.h> |
aa69a809 DL |
21 | #include <linux/usb/ch9.h> |
22 | #include <linux/usb/gadget.h> | |
e443b333 | 23 | #include <linux/usb/chipidea.h> |
aa69a809 | 24 | |
e443b333 AS |
25 | #include "ci.h" |
26 | #include "udc.h" | |
27 | #include "bits.h" | |
28 | #include "debug.h" | |
3f124d23 | 29 | #include "otg.h" |
954aad8c | 30 | |
aa69a809 DL |
31 | /* control endpoint description */ |
32 | static const struct usb_endpoint_descriptor | |
ca9cfea0 | 33 | ctrl_endpt_out_desc = { |
aa69a809 DL |
34 | .bLength = USB_DT_ENDPOINT_SIZE, |
35 | .bDescriptorType = USB_DT_ENDPOINT, | |
36 | ||
ca9cfea0 PK |
37 | .bEndpointAddress = USB_DIR_OUT, |
38 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
39 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
40 | }; | |
41 | ||
42 | static const struct usb_endpoint_descriptor | |
43 | ctrl_endpt_in_desc = { | |
44 | .bLength = USB_DT_ENDPOINT_SIZE, | |
45 | .bDescriptorType = USB_DT_ENDPOINT, | |
46 | ||
47 | .bEndpointAddress = USB_DIR_IN, | |
aa69a809 DL |
48 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
49 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
50 | }; | |
51 | ||
aa69a809 DL |
52 | /** |
53 | * hw_ep_bit: calculates the bit number | |
54 | * @num: endpoint number | |
55 | * @dir: endpoint direction | |
56 | * | |
57 | * This function returns bit number | |
58 | */ | |
59 | static inline int hw_ep_bit(int num, int dir) | |
60 | { | |
61 | return num + (dir ? 16 : 0); | |
62 | } | |
63 | ||
8e22978c | 64 | static inline int ep_to_bit(struct ci_hdrc *ci, int n) |
dd39c358 | 65 | { |
26c696c6 | 66 | int fill = 16 - ci->hw_ep_max / 2; |
dd39c358 | 67 | |
26c696c6 | 68 | if (n >= ci->hw_ep_max / 2) |
dd39c358 MKB |
69 | n += fill; |
70 | ||
71 | return n; | |
72 | } | |
73 | ||
aa69a809 | 74 | /** |
c0a48e6c | 75 | * hw_device_state: enables/disables interrupts (execute without interruption) |
aa69a809 DL |
76 | * @dma: 0 => disable, !0 => enable and set dma engine |
77 | * | |
78 | * This function returns an error code | |
79 | */ | |
8e22978c | 80 | static int hw_device_state(struct ci_hdrc *ci, u32 dma) |
aa69a809 DL |
81 | { |
82 | if (dma) { | |
26c696c6 | 83 | hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); |
aa69a809 | 84 | /* interrupt, error, port change, reset, sleep/suspend */ |
26c696c6 | 85 | hw_write(ci, OP_USBINTR, ~0, |
aa69a809 | 86 | USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); |
a107f8c5 | 87 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); |
aa69a809 | 88 | } else { |
26c696c6 | 89 | hw_write(ci, OP_USBINTR, ~0, 0); |
a107f8c5 | 90 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); |
aa69a809 DL |
91 | } |
92 | return 0; | |
93 | } | |
94 | ||
95 | /** | |
96 | * hw_ep_flush: flush endpoint fifo (execute without interruption) | |
97 | * @num: endpoint number | |
98 | * @dir: endpoint direction | |
99 | * | |
100 | * This function returns an error code | |
101 | */ | |
8e22978c | 102 | static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
103 | { |
104 | int n = hw_ep_bit(num, dir); | |
105 | ||
106 | do { | |
107 | /* flush any pending transfer */ | |
5bf5dbed | 108 | hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); |
26c696c6 | 109 | while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) |
aa69a809 | 110 | cpu_relax(); |
26c696c6 | 111 | } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); |
aa69a809 DL |
112 | |
113 | return 0; | |
114 | } | |
115 | ||
116 | /** | |
117 | * hw_ep_disable: disables endpoint (execute without interruption) | |
118 | * @num: endpoint number | |
119 | * @dir: endpoint direction | |
120 | * | |
121 | * This function returns an error code | |
122 | */ | |
8e22978c | 123 | static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) |
aa69a809 | 124 | { |
26c696c6 RZ |
125 | hw_ep_flush(ci, num, dir); |
126 | hw_write(ci, OP_ENDPTCTRL + num, | |
d3595d13 | 127 | dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); |
aa69a809 DL |
128 | return 0; |
129 | } | |
130 | ||
131 | /** | |
132 | * hw_ep_enable: enables endpoint (execute without interruption) | |
133 | * @num: endpoint number | |
134 | * @dir: endpoint direction | |
135 | * @type: endpoint type | |
136 | * | |
137 | * This function returns an error code | |
138 | */ | |
8e22978c | 139 | static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) |
aa69a809 DL |
140 | { |
141 | u32 mask, data; | |
142 | ||
143 | if (dir) { | |
144 | mask = ENDPTCTRL_TXT; /* type */ | |
727b4ddb | 145 | data = type << __ffs(mask); |
aa69a809 DL |
146 | |
147 | mask |= ENDPTCTRL_TXS; /* unstall */ | |
148 | mask |= ENDPTCTRL_TXR; /* reset data toggle */ | |
149 | data |= ENDPTCTRL_TXR; | |
150 | mask |= ENDPTCTRL_TXE; /* enable */ | |
151 | data |= ENDPTCTRL_TXE; | |
152 | } else { | |
153 | mask = ENDPTCTRL_RXT; /* type */ | |
727b4ddb | 154 | data = type << __ffs(mask); |
aa69a809 DL |
155 | |
156 | mask |= ENDPTCTRL_RXS; /* unstall */ | |
157 | mask |= ENDPTCTRL_RXR; /* reset data toggle */ | |
158 | data |= ENDPTCTRL_RXR; | |
159 | mask |= ENDPTCTRL_RXE; /* enable */ | |
160 | data |= ENDPTCTRL_RXE; | |
161 | } | |
26c696c6 | 162 | hw_write(ci, OP_ENDPTCTRL + num, mask, data); |
aa69a809 DL |
163 | return 0; |
164 | } | |
165 | ||
166 | /** | |
167 | * hw_ep_get_halt: return endpoint halt status | |
168 | * @num: endpoint number | |
169 | * @dir: endpoint direction | |
170 | * | |
171 | * This function returns 1 if endpoint halted | |
172 | */ | |
8e22978c | 173 | static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
174 | { |
175 | u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; | |
176 | ||
26c696c6 | 177 | return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; |
aa69a809 DL |
178 | } |
179 | ||
aa69a809 DL |
180 | /** |
181 | * hw_ep_prime: primes endpoint (execute without interruption) | |
182 | * @num: endpoint number | |
183 | * @dir: endpoint direction | |
184 | * @is_ctrl: true if control endpoint | |
185 | * | |
186 | * This function returns an error code | |
187 | */ | |
8e22978c | 188 | static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) |
aa69a809 DL |
189 | { |
190 | int n = hw_ep_bit(num, dir); | |
191 | ||
26c696c6 | 192 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
193 | return -EAGAIN; |
194 | ||
5bf5dbed | 195 | hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); |
aa69a809 | 196 | |
26c696c6 | 197 | while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
aa69a809 | 198 | cpu_relax(); |
26c696c6 | 199 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
200 | return -EAGAIN; |
201 | ||
202 | /* status shoult be tested according with manual but it doesn't work */ | |
203 | return 0; | |
204 | } | |
205 | ||
206 | /** | |
207 | * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute | |
208 | * without interruption) | |
209 | * @num: endpoint number | |
210 | * @dir: endpoint direction | |
211 | * @value: true => stall, false => unstall | |
212 | * | |
213 | * This function returns an error code | |
214 | */ | |
8e22978c | 215 | static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) |
aa69a809 DL |
216 | { |
217 | if (value != 0 && value != 1) | |
218 | return -EINVAL; | |
219 | ||
220 | do { | |
8e22978c | 221 | enum ci_hw_regs reg = OP_ENDPTCTRL + num; |
aa69a809 DL |
222 | u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
223 | u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; | |
224 | ||
225 | /* data toggle - reserved for EP0 but it's in ESS */ | |
26c696c6 | 226 | hw_write(ci, reg, mask_xs|mask_xr, |
262c1632 | 227 | value ? mask_xs : mask_xr); |
26c696c6 | 228 | } while (value != hw_ep_get_halt(ci, num, dir)); |
aa69a809 DL |
229 | |
230 | return 0; | |
231 | } | |
232 | ||
aa69a809 DL |
233 | /** |
234 | * hw_is_port_high_speed: test if port is high speed | |
235 | * | |
236 | * This function returns true if high speed port | |
237 | */ | |
8e22978c | 238 | static int hw_port_is_high_speed(struct ci_hdrc *ci) |
aa69a809 | 239 | { |
26c696c6 RZ |
240 | return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : |
241 | hw_read(ci, OP_PORTSC, PORTSC_HSP); | |
aa69a809 DL |
242 | } |
243 | ||
aa69a809 DL |
244 | /** |
245 | * hw_read_intr_enable: returns interrupt enable register | |
246 | * | |
247 | * This function returns register data | |
248 | */ | |
8e22978c | 249 | static u32 hw_read_intr_enable(struct ci_hdrc *ci) |
aa69a809 | 250 | { |
26c696c6 | 251 | return hw_read(ci, OP_USBINTR, ~0); |
aa69a809 DL |
252 | } |
253 | ||
254 | /** | |
255 | * hw_read_intr_status: returns interrupt status register | |
256 | * | |
257 | * This function returns register data | |
258 | */ | |
8e22978c | 259 | static u32 hw_read_intr_status(struct ci_hdrc *ci) |
aa69a809 | 260 | { |
26c696c6 | 261 | return hw_read(ci, OP_USBSTS, ~0); |
aa69a809 DL |
262 | } |
263 | ||
aa69a809 DL |
264 | /** |
265 | * hw_test_and_clear_complete: test & clear complete status (execute without | |
266 | * interruption) | |
dd39c358 | 267 | * @n: endpoint number |
aa69a809 DL |
268 | * |
269 | * This function returns complete status | |
270 | */ | |
8e22978c | 271 | static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) |
aa69a809 | 272 | { |
26c696c6 RZ |
273 | n = ep_to_bit(ci, n); |
274 | return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); | |
aa69a809 DL |
275 | } |
276 | ||
277 | /** | |
278 | * hw_test_and_clear_intr_active: test & clear active interrupts (execute | |
279 | * without interruption) | |
280 | * | |
281 | * This function returns active interrutps | |
282 | */ | |
8e22978c | 283 | static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) |
aa69a809 | 284 | { |
26c696c6 | 285 | u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); |
aa69a809 | 286 | |
26c696c6 | 287 | hw_write(ci, OP_USBSTS, ~0, reg); |
aa69a809 DL |
288 | return reg; |
289 | } | |
290 | ||
291 | /** | |
292 | * hw_test_and_clear_setup_guard: test & clear setup guard (execute without | |
293 | * interruption) | |
294 | * | |
295 | * This function returns guard value | |
296 | */ | |
8e22978c | 297 | static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 298 | { |
26c696c6 | 299 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); |
aa69a809 DL |
300 | } |
301 | ||
302 | /** | |
303 | * hw_test_and_set_setup_guard: test & set setup guard (execute without | |
304 | * interruption) | |
305 | * | |
306 | * This function returns guard value | |
307 | */ | |
8e22978c | 308 | static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 309 | { |
26c696c6 | 310 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); |
aa69a809 DL |
311 | } |
312 | ||
313 | /** | |
314 | * hw_usb_set_address: configures USB address (execute without interruption) | |
315 | * @value: new USB address | |
316 | * | |
ef15e549 AS |
317 | * This function explicitly sets the address, without the "USBADRA" (advance) |
318 | * feature, which is not supported by older versions of the controller. | |
aa69a809 | 319 | */ |
8e22978c | 320 | static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) |
aa69a809 | 321 | { |
26c696c6 | 322 | hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, |
727b4ddb | 323 | value << __ffs(DEVICEADDR_USBADR)); |
aa69a809 DL |
324 | } |
325 | ||
326 | /** | |
327 | * hw_usb_reset: restart device after a bus reset (execute without | |
328 | * interruption) | |
329 | * | |
330 | * This function returns an error code | |
331 | */ | |
8e22978c | 332 | static int hw_usb_reset(struct ci_hdrc *ci) |
aa69a809 | 333 | { |
26c696c6 | 334 | hw_usb_set_address(ci, 0); |
aa69a809 DL |
335 | |
336 | /* ESS flushes only at end?!? */ | |
26c696c6 | 337 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
aa69a809 DL |
338 | |
339 | /* clear setup token semaphores */ | |
26c696c6 | 340 | hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); |
aa69a809 DL |
341 | |
342 | /* clear complete status */ | |
26c696c6 | 343 | hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); |
aa69a809 DL |
344 | |
345 | /* wait until all bits cleared */ | |
26c696c6 | 346 | while (hw_read(ci, OP_ENDPTPRIME, ~0)) |
aa69a809 DL |
347 | udelay(10); /* not RTOS friendly */ |
348 | ||
349 | /* reset all endpoints ? */ | |
350 | ||
351 | /* reset internal status and wait for further instructions | |
352 | no need to verify the port reset status (ESS does it) */ | |
353 | ||
354 | return 0; | |
355 | } | |
356 | ||
aa69a809 DL |
357 | /****************************************************************************** |
358 | * UTIL block | |
359 | *****************************************************************************/ | |
cc9e6c49 | 360 | |
8e22978c | 361 | static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, |
cc9e6c49 MG |
362 | unsigned length) |
363 | { | |
2e270412 MG |
364 | int i; |
365 | u32 temp; | |
cc9e6c49 MG |
366 | struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), |
367 | GFP_ATOMIC); | |
368 | ||
369 | if (node == NULL) | |
370 | return -ENOMEM; | |
371 | ||
2dbc5c4c | 372 | node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC, |
cc9e6c49 MG |
373 | &node->dma); |
374 | if (node->ptr == NULL) { | |
375 | kfree(node); | |
376 | return -ENOMEM; | |
377 | } | |
378 | ||
8e22978c | 379 | memset(node->ptr, 0, sizeof(struct ci_hw_td)); |
2e270412 MG |
380 | node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); |
381 | node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); | |
382 | node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); | |
2fc5a7da PC |
383 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { |
384 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; | |
385 | ||
386 | if (hwreq->req.length == 0 | |
387 | || hwreq->req.length % hwep->ep.maxpacket) | |
388 | mul++; | |
389 | node->ptr->token |= mul << __ffs(TD_MULTO); | |
390 | } | |
2e270412 | 391 | |
2dbc5c4c | 392 | temp = (u32) (hwreq->req.dma + hwreq->req.actual); |
2e270412 MG |
393 | if (length) { |
394 | node->ptr->page[0] = cpu_to_le32(temp); | |
395 | for (i = 1; i < TD_PAGE_COUNT; i++) { | |
8e22978c | 396 | u32 page = temp + i * CI_HDRC_PAGE_SIZE; |
2e270412 MG |
397 | page &= ~TD_RESERVED_MASK; |
398 | node->ptr->page[i] = cpu_to_le32(page); | |
399 | } | |
400 | } | |
401 | ||
2dbc5c4c | 402 | hwreq->req.actual += length; |
cc9e6c49 | 403 | |
2dbc5c4c | 404 | if (!list_empty(&hwreq->tds)) { |
cc9e6c49 | 405 | /* get the last entry */ |
2dbc5c4c | 406 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
407 | struct td_node, td); |
408 | lastnode->ptr->next = cpu_to_le32(node->dma); | |
409 | } | |
410 | ||
411 | INIT_LIST_HEAD(&node->td); | |
2dbc5c4c | 412 | list_add_tail(&node->td, &hwreq->tds); |
cc9e6c49 MG |
413 | |
414 | return 0; | |
415 | } | |
416 | ||
aa69a809 DL |
417 | /** |
418 | * _usb_addr: calculates endpoint address from direction & number | |
419 | * @ep: endpoint | |
420 | */ | |
8e22978c | 421 | static inline u8 _usb_addr(struct ci_hw_ep *ep) |
aa69a809 DL |
422 | { |
423 | return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; | |
424 | } | |
425 | ||
426 | /** | |
427 | * _hardware_queue: configures a request at hardware level | |
428 | * @gadget: gadget | |
2dbc5c4c | 429 | * @hwep: endpoint |
aa69a809 DL |
430 | * |
431 | * This function returns an error code | |
432 | */ | |
8e22978c | 433 | static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 434 | { |
8e22978c | 435 | struct ci_hdrc *ci = hwep->ci; |
0e6ca199 | 436 | int ret = 0; |
2dbc5c4c | 437 | unsigned rest = hwreq->req.length; |
2e270412 | 438 | int pages = TD_PAGE_COUNT; |
cc9e6c49 | 439 | struct td_node *firstnode, *lastnode; |
aa69a809 | 440 | |
aa69a809 | 441 | /* don't queue twice */ |
2dbc5c4c | 442 | if (hwreq->req.status == -EALREADY) |
aa69a809 DL |
443 | return -EALREADY; |
444 | ||
2dbc5c4c | 445 | hwreq->req.status = -EALREADY; |
aa69a809 | 446 | |
2dbc5c4c | 447 | ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); |
5e0aa49e AS |
448 | if (ret) |
449 | return ret; | |
450 | ||
2e270412 MG |
451 | /* |
452 | * The first buffer could be not page aligned. | |
453 | * In that case we have to span into one extra td. | |
454 | */ | |
2dbc5c4c | 455 | if (hwreq->req.dma % PAGE_SIZE) |
2e270412 | 456 | pages--; |
cc9e6c49 | 457 | |
2e270412 | 458 | if (rest == 0) |
2dbc5c4c | 459 | add_td_to_list(hwep, hwreq, 0); |
cc9e6c49 | 460 | |
2e270412 | 461 | while (rest > 0) { |
2dbc5c4c | 462 | unsigned count = min(hwreq->req.length - hwreq->req.actual, |
8e22978c | 463 | (unsigned)(pages * CI_HDRC_PAGE_SIZE)); |
2dbc5c4c | 464 | add_td_to_list(hwep, hwreq, count); |
2e270412 | 465 | rest -= count; |
0e6ca199 | 466 | } |
aa69a809 | 467 | |
2dbc5c4c AS |
468 | if (hwreq->req.zero && hwreq->req.length |
469 | && (hwreq->req.length % hwep->ep.maxpacket == 0)) | |
470 | add_td_to_list(hwep, hwreq, 0); | |
cc9e6c49 | 471 | |
2dbc5c4c | 472 | firstnode = list_first_entry(&hwreq->tds, struct td_node, td); |
2e270412 | 473 | |
2dbc5c4c | 474 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
475 | struct td_node, td); |
476 | ||
477 | lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); | |
2dbc5c4c | 478 | if (!hwreq->req.no_interrupt) |
cc9e6c49 | 479 | lastnode->ptr->token |= cpu_to_le32(TD_IOC); |
a9c17430 MG |
480 | wmb(); |
481 | ||
2dbc5c4c AS |
482 | hwreq->req.actual = 0; |
483 | if (!list_empty(&hwep->qh.queue)) { | |
8e22978c | 484 | struct ci_hw_req *hwreqprev; |
2dbc5c4c | 485 | int n = hw_ep_bit(hwep->num, hwep->dir); |
0e6ca199 | 486 | int tmp_stat; |
cc9e6c49 MG |
487 | struct td_node *prevlastnode; |
488 | u32 next = firstnode->dma & TD_ADDR_MASK; | |
0e6ca199 | 489 | |
2dbc5c4c | 490 | hwreqprev = list_entry(hwep->qh.queue.prev, |
8e22978c | 491 | struct ci_hw_req, queue); |
2dbc5c4c | 492 | prevlastnode = list_entry(hwreqprev->tds.prev, |
cc9e6c49 MG |
493 | struct td_node, td); |
494 | ||
495 | prevlastnode->ptr->next = cpu_to_le32(next); | |
0e6ca199 | 496 | wmb(); |
26c696c6 | 497 | if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
0e6ca199 PK |
498 | goto done; |
499 | do { | |
26c696c6 RZ |
500 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); |
501 | tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); | |
502 | } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); | |
503 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); | |
0e6ca199 PK |
504 | if (tmp_stat) |
505 | goto done; | |
506 | } | |
507 | ||
508 | /* QH configuration */ | |
2dbc5c4c AS |
509 | hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); |
510 | hwep->qh.ptr->td.token &= | |
080ff5f4 | 511 | cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); |
aa69a809 | 512 | |
2fc5a7da | 513 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { |
2dbc5c4c | 514 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; |
e4ce4ecd | 515 | |
2fc5a7da PC |
516 | if (hwreq->req.length == 0 |
517 | || hwreq->req.length % hwep->ep.maxpacket) | |
e4ce4ecd | 518 | mul++; |
2dbc5c4c | 519 | hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); |
e4ce4ecd MG |
520 | } |
521 | ||
aa69a809 DL |
522 | wmb(); /* synchronize before ep prime */ |
523 | ||
2dbc5c4c AS |
524 | ret = hw_ep_prime(ci, hwep->num, hwep->dir, |
525 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
0e6ca199 PK |
526 | done: |
527 | return ret; | |
aa69a809 DL |
528 | } |
529 | ||
2e270412 MG |
530 | /* |
531 | * free_pending_td: remove a pending request for the endpoint | |
2dbc5c4c | 532 | * @hwep: endpoint |
2e270412 | 533 | */ |
8e22978c | 534 | static void free_pending_td(struct ci_hw_ep *hwep) |
2e270412 | 535 | { |
2dbc5c4c | 536 | struct td_node *pending = hwep->pending_td; |
2e270412 | 537 | |
2dbc5c4c AS |
538 | dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); |
539 | hwep->pending_td = NULL; | |
2e270412 MG |
540 | kfree(pending); |
541 | } | |
542 | ||
aa69a809 DL |
543 | /** |
544 | * _hardware_dequeue: handles a request at hardware level | |
545 | * @gadget: gadget | |
2dbc5c4c | 546 | * @hwep: endpoint |
aa69a809 DL |
547 | * |
548 | * This function returns an error code | |
549 | */ | |
8e22978c | 550 | static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 551 | { |
cc9e6c49 | 552 | u32 tmptoken; |
2e270412 MG |
553 | struct td_node *node, *tmpnode; |
554 | unsigned remaining_length; | |
2dbc5c4c | 555 | unsigned actual = hwreq->req.length; |
9e506438 | 556 | |
2dbc5c4c | 557 | if (hwreq->req.status != -EALREADY) |
aa69a809 DL |
558 | return -EINVAL; |
559 | ||
2dbc5c4c | 560 | hwreq->req.status = 0; |
0e6ca199 | 561 | |
2dbc5c4c | 562 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
cc9e6c49 | 563 | tmptoken = le32_to_cpu(node->ptr->token); |
2e270412 | 564 | if ((TD_STATUS_ACTIVE & tmptoken) != 0) { |
2dbc5c4c | 565 | hwreq->req.status = -EALREADY; |
0e6ca199 | 566 | return -EBUSY; |
cc9e6c49 | 567 | } |
aa69a809 | 568 | |
2e270412 MG |
569 | remaining_length = (tmptoken & TD_TOTAL_BYTES); |
570 | remaining_length >>= __ffs(TD_TOTAL_BYTES); | |
571 | actual -= remaining_length; | |
572 | ||
2dbc5c4c AS |
573 | hwreq->req.status = tmptoken & TD_STATUS; |
574 | if ((TD_STATUS_HALTED & hwreq->req.status)) { | |
575 | hwreq->req.status = -EPIPE; | |
2e270412 | 576 | break; |
2dbc5c4c AS |
577 | } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { |
578 | hwreq->req.status = -EPROTO; | |
2e270412 | 579 | break; |
2dbc5c4c AS |
580 | } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { |
581 | hwreq->req.status = -EILSEQ; | |
2e270412 MG |
582 | break; |
583 | } | |
584 | ||
585 | if (remaining_length) { | |
2dbc5c4c AS |
586 | if (hwep->dir) { |
587 | hwreq->req.status = -EPROTO; | |
2e270412 MG |
588 | break; |
589 | } | |
590 | } | |
591 | /* | |
592 | * As the hardware could still address the freed td | |
593 | * which will run the udc unusable, the cleanup of the | |
594 | * td has to be delayed by one. | |
595 | */ | |
2dbc5c4c AS |
596 | if (hwep->pending_td) |
597 | free_pending_td(hwep); | |
2e270412 | 598 | |
2dbc5c4c | 599 | hwep->pending_td = node; |
2e270412 MG |
600 | list_del_init(&node->td); |
601 | } | |
aa69a809 | 602 | |
2dbc5c4c | 603 | usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); |
aa69a809 | 604 | |
2dbc5c4c | 605 | hwreq->req.actual += actual; |
aa69a809 | 606 | |
2dbc5c4c AS |
607 | if (hwreq->req.status) |
608 | return hwreq->req.status; | |
aa69a809 | 609 | |
2dbc5c4c | 610 | return hwreq->req.actual; |
aa69a809 DL |
611 | } |
612 | ||
613 | /** | |
614 | * _ep_nuke: dequeues all endpoint requests | |
2dbc5c4c | 615 | * @hwep: endpoint |
aa69a809 DL |
616 | * |
617 | * This function returns an error code | |
618 | * Caller must hold lock | |
619 | */ | |
8e22978c | 620 | static int _ep_nuke(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
621 | __releases(hwep->lock) |
622 | __acquires(hwep->lock) | |
aa69a809 | 623 | { |
2e270412 | 624 | struct td_node *node, *tmpnode; |
2dbc5c4c | 625 | if (hwep == NULL) |
aa69a809 DL |
626 | return -EINVAL; |
627 | ||
2dbc5c4c | 628 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 629 | |
2dbc5c4c | 630 | while (!list_empty(&hwep->qh.queue)) { |
aa69a809 DL |
631 | |
632 | /* pop oldest request */ | |
8e22978c AS |
633 | struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, |
634 | struct ci_hw_req, queue); | |
7ca2cd29 | 635 | |
2dbc5c4c AS |
636 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
637 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
638 | list_del_init(&node->td); |
639 | node->ptr = NULL; | |
640 | kfree(node); | |
7ca2cd29 MG |
641 | } |
642 | ||
2dbc5c4c AS |
643 | list_del_init(&hwreq->queue); |
644 | hwreq->req.status = -ESHUTDOWN; | |
aa69a809 | 645 | |
2dbc5c4c AS |
646 | if (hwreq->req.complete != NULL) { |
647 | spin_unlock(hwep->lock); | |
648 | hwreq->req.complete(&hwep->ep, &hwreq->req); | |
649 | spin_lock(hwep->lock); | |
aa69a809 DL |
650 | } |
651 | } | |
2e270412 | 652 | |
2dbc5c4c AS |
653 | if (hwep->pending_td) |
654 | free_pending_td(hwep); | |
2e270412 | 655 | |
aa69a809 DL |
656 | return 0; |
657 | } | |
658 | ||
659 | /** | |
660 | * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts | |
661 | * @gadget: gadget | |
662 | * | |
663 | * This function returns an error code | |
aa69a809 DL |
664 | */ |
665 | static int _gadget_stop_activity(struct usb_gadget *gadget) | |
aa69a809 DL |
666 | { |
667 | struct usb_ep *ep; | |
8e22978c | 668 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
e2b61c1d | 669 | unsigned long flags; |
aa69a809 | 670 | |
26c696c6 RZ |
671 | spin_lock_irqsave(&ci->lock, flags); |
672 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
673 | ci->remote_wakeup = 0; | |
674 | ci->suspended = 0; | |
675 | spin_unlock_irqrestore(&ci->lock, flags); | |
e2b61c1d | 676 | |
aa69a809 DL |
677 | /* flush all endpoints */ |
678 | gadget_for_each_ep(ep, gadget) { | |
679 | usb_ep_fifo_flush(ep); | |
680 | } | |
26c696c6 RZ |
681 | usb_ep_fifo_flush(&ci->ep0out->ep); |
682 | usb_ep_fifo_flush(&ci->ep0in->ep); | |
aa69a809 | 683 | |
aa69a809 DL |
684 | /* make sure to disable all endpoints */ |
685 | gadget_for_each_ep(ep, gadget) { | |
686 | usb_ep_disable(ep); | |
687 | } | |
aa69a809 | 688 | |
26c696c6 RZ |
689 | if (ci->status != NULL) { |
690 | usb_ep_free_request(&ci->ep0in->ep, ci->status); | |
691 | ci->status = NULL; | |
aa69a809 DL |
692 | } |
693 | ||
aa69a809 DL |
694 | return 0; |
695 | } | |
696 | ||
697 | /****************************************************************************** | |
698 | * ISR block | |
699 | *****************************************************************************/ | |
700 | /** | |
701 | * isr_reset_handler: USB reset interrupt handler | |
26c696c6 | 702 | * @ci: UDC device |
aa69a809 DL |
703 | * |
704 | * This function resets USB engine after a bus reset occurred | |
705 | */ | |
8e22978c | 706 | static void isr_reset_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
707 | __releases(ci->lock) |
708 | __acquires(ci->lock) | |
aa69a809 | 709 | { |
aa69a809 DL |
710 | int retval; |
711 | ||
a3aee368 | 712 | spin_unlock(&ci->lock); |
92b336d7 PC |
713 | if (ci->gadget.speed != USB_SPEED_UNKNOWN) { |
714 | if (ci->driver) | |
715 | ci->driver->disconnect(&ci->gadget); | |
716 | } | |
717 | ||
26c696c6 | 718 | retval = _gadget_stop_activity(&ci->gadget); |
aa69a809 DL |
719 | if (retval) |
720 | goto done; | |
721 | ||
26c696c6 | 722 | retval = hw_usb_reset(ci); |
aa69a809 DL |
723 | if (retval) |
724 | goto done; | |
725 | ||
26c696c6 RZ |
726 | ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); |
727 | if (ci->status == NULL) | |
ac1aa6a2 | 728 | retval = -ENOMEM; |
ca9cfea0 | 729 | |
b9322252 | 730 | done: |
26c696c6 | 731 | spin_lock(&ci->lock); |
aa69a809 | 732 | |
aa69a809 | 733 | if (retval) |
26c696c6 | 734 | dev_err(ci->dev, "error: %i\n", retval); |
aa69a809 DL |
735 | } |
736 | ||
737 | /** | |
738 | * isr_get_status_complete: get_status request complete function | |
739 | * @ep: endpoint | |
740 | * @req: request handled | |
741 | * | |
742 | * Caller must release lock | |
743 | */ | |
744 | static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) | |
745 | { | |
0f089094 | 746 | if (ep == NULL || req == NULL) |
aa69a809 | 747 | return; |
aa69a809 DL |
748 | |
749 | kfree(req->buf); | |
750 | usb_ep_free_request(ep, req); | |
751 | } | |
752 | ||
dd064e9d MG |
753 | /** |
754 | * _ep_queue: queues (submits) an I/O request to an endpoint | |
755 | * | |
756 | * Caller must hold lock | |
757 | */ | |
758 | static int _ep_queue(struct usb_ep *ep, struct usb_request *req, | |
759 | gfp_t __maybe_unused gfp_flags) | |
760 | { | |
8e22978c AS |
761 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
762 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
763 | struct ci_hdrc *ci = hwep->ci; | |
dd064e9d MG |
764 | int retval = 0; |
765 | ||
2dbc5c4c | 766 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
dd064e9d MG |
767 | return -EINVAL; |
768 | ||
2dbc5c4c | 769 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
dd064e9d | 770 | if (req->length) |
2dbc5c4c | 771 | hwep = (ci->ep0_dir == RX) ? |
dd064e9d | 772 | ci->ep0out : ci->ep0in; |
2dbc5c4c AS |
773 | if (!list_empty(&hwep->qh.queue)) { |
774 | _ep_nuke(hwep); | |
dd064e9d | 775 | retval = -EOVERFLOW; |
2dbc5c4c AS |
776 | dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", |
777 | _usb_addr(hwep)); | |
dd064e9d MG |
778 | } |
779 | } | |
780 | ||
2dbc5c4c AS |
781 | if (usb_endpoint_xfer_isoc(hwep->ep.desc) && |
782 | hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { | |
783 | dev_err(hwep->ci->dev, "request length too big for isochronous\n"); | |
e4ce4ecd MG |
784 | return -EMSGSIZE; |
785 | } | |
786 | ||
dd064e9d | 787 | /* first nuke then test link, e.g. previous status has not sent */ |
2dbc5c4c AS |
788 | if (!list_empty(&hwreq->queue)) { |
789 | dev_err(hwep->ci->dev, "request already in queue\n"); | |
dd064e9d MG |
790 | return -EBUSY; |
791 | } | |
792 | ||
dd064e9d | 793 | /* push request */ |
2dbc5c4c AS |
794 | hwreq->req.status = -EINPROGRESS; |
795 | hwreq->req.actual = 0; | |
dd064e9d | 796 | |
2dbc5c4c | 797 | retval = _hardware_enqueue(hwep, hwreq); |
dd064e9d MG |
798 | |
799 | if (retval == -EALREADY) | |
800 | retval = 0; | |
801 | if (!retval) | |
2dbc5c4c | 802 | list_add_tail(&hwreq->queue, &hwep->qh.queue); |
dd064e9d MG |
803 | |
804 | return retval; | |
805 | } | |
806 | ||
aa69a809 DL |
807 | /** |
808 | * isr_get_status_response: get_status request response | |
26c696c6 | 809 | * @ci: ci struct |
aa69a809 DL |
810 | * @setup: setup request packet |
811 | * | |
812 | * This function returns an error code | |
813 | */ | |
8e22978c | 814 | static int isr_get_status_response(struct ci_hdrc *ci, |
aa69a809 | 815 | struct usb_ctrlrequest *setup) |
2dbc5c4c AS |
816 | __releases(hwep->lock) |
817 | __acquires(hwep->lock) | |
aa69a809 | 818 | { |
8e22978c | 819 | struct ci_hw_ep *hwep = ci->ep0in; |
aa69a809 DL |
820 | struct usb_request *req = NULL; |
821 | gfp_t gfp_flags = GFP_ATOMIC; | |
822 | int dir, num, retval; | |
823 | ||
2dbc5c4c | 824 | if (hwep == NULL || setup == NULL) |
aa69a809 DL |
825 | return -EINVAL; |
826 | ||
2dbc5c4c AS |
827 | spin_unlock(hwep->lock); |
828 | req = usb_ep_alloc_request(&hwep->ep, gfp_flags); | |
829 | spin_lock(hwep->lock); | |
aa69a809 DL |
830 | if (req == NULL) |
831 | return -ENOMEM; | |
832 | ||
833 | req->complete = isr_get_status_complete; | |
834 | req->length = 2; | |
835 | req->buf = kzalloc(req->length, gfp_flags); | |
836 | if (req->buf == NULL) { | |
837 | retval = -ENOMEM; | |
838 | goto err_free_req; | |
839 | } | |
840 | ||
841 | if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { | |
e2b61c1d | 842 | /* Assume that device is bus powered for now. */ |
26c696c6 | 843 | *(u16 *)req->buf = ci->remote_wakeup << 1; |
aa69a809 DL |
844 | retval = 0; |
845 | } else if ((setup->bRequestType & USB_RECIP_MASK) \ | |
846 | == USB_RECIP_ENDPOINT) { | |
847 | dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? | |
848 | TX : RX; | |
849 | num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
26c696c6 | 850 | *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); |
aa69a809 DL |
851 | } |
852 | /* else do nothing; reserved for future use */ | |
853 | ||
2dbc5c4c | 854 | retval = _ep_queue(&hwep->ep, req, gfp_flags); |
aa69a809 DL |
855 | if (retval) |
856 | goto err_free_buf; | |
857 | ||
858 | return 0; | |
859 | ||
860 | err_free_buf: | |
861 | kfree(req->buf); | |
862 | err_free_req: | |
2dbc5c4c AS |
863 | spin_unlock(hwep->lock); |
864 | usb_ep_free_request(&hwep->ep, req); | |
865 | spin_lock(hwep->lock); | |
aa69a809 DL |
866 | return retval; |
867 | } | |
868 | ||
541cace8 PK |
869 | /** |
870 | * isr_setup_status_complete: setup_status request complete function | |
871 | * @ep: endpoint | |
872 | * @req: request handled | |
873 | * | |
874 | * Caller must release lock. Put the port in test mode if test mode | |
875 | * feature is selected. | |
876 | */ | |
877 | static void | |
878 | isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) | |
879 | { | |
8e22978c | 880 | struct ci_hdrc *ci = req->context; |
541cace8 PK |
881 | unsigned long flags; |
882 | ||
26c696c6 RZ |
883 | if (ci->setaddr) { |
884 | hw_usb_set_address(ci, ci->address); | |
885 | ci->setaddr = false; | |
ef15e549 AS |
886 | } |
887 | ||
26c696c6 RZ |
888 | spin_lock_irqsave(&ci->lock, flags); |
889 | if (ci->test_mode) | |
890 | hw_port_test_set(ci, ci->test_mode); | |
891 | spin_unlock_irqrestore(&ci->lock, flags); | |
541cace8 PK |
892 | } |
893 | ||
aa69a809 DL |
894 | /** |
895 | * isr_setup_status_phase: queues the status phase of a setup transation | |
26c696c6 | 896 | * @ci: ci struct |
aa69a809 DL |
897 | * |
898 | * This function returns an error code | |
899 | */ | |
8e22978c | 900 | static int isr_setup_status_phase(struct ci_hdrc *ci) |
aa69a809 DL |
901 | { |
902 | int retval; | |
8e22978c | 903 | struct ci_hw_ep *hwep; |
aa69a809 | 904 | |
2dbc5c4c | 905 | hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; |
26c696c6 RZ |
906 | ci->status->context = ci; |
907 | ci->status->complete = isr_setup_status_complete; | |
aa69a809 | 908 | |
2dbc5c4c | 909 | retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); |
aa69a809 DL |
910 | |
911 | return retval; | |
912 | } | |
913 | ||
914 | /** | |
915 | * isr_tr_complete_low: transaction complete low level handler | |
2dbc5c4c | 916 | * @hwep: endpoint |
aa69a809 DL |
917 | * |
918 | * This function returns an error code | |
919 | * Caller must hold lock | |
920 | */ | |
8e22978c | 921 | static int isr_tr_complete_low(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
922 | __releases(hwep->lock) |
923 | __acquires(hwep->lock) | |
aa69a809 | 924 | { |
8e22978c AS |
925 | struct ci_hw_req *hwreq, *hwreqtemp; |
926 | struct ci_hw_ep *hweptemp = hwep; | |
db89960e | 927 | int retval = 0; |
aa69a809 | 928 | |
2dbc5c4c | 929 | list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, |
0e6ca199 | 930 | queue) { |
2dbc5c4c | 931 | retval = _hardware_dequeue(hwep, hwreq); |
0e6ca199 PK |
932 | if (retval < 0) |
933 | break; | |
2dbc5c4c AS |
934 | list_del_init(&hwreq->queue); |
935 | if (hwreq->req.complete != NULL) { | |
936 | spin_unlock(hwep->lock); | |
937 | if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && | |
938 | hwreq->req.length) | |
939 | hweptemp = hwep->ci->ep0in; | |
940 | hwreq->req.complete(&hweptemp->ep, &hwreq->req); | |
941 | spin_lock(hwep->lock); | |
0e6ca199 | 942 | } |
d9bb9c18 AL |
943 | } |
944 | ||
ef907482 | 945 | if (retval == -EBUSY) |
0e6ca199 | 946 | retval = 0; |
aa69a809 | 947 | |
aa69a809 DL |
948 | return retval; |
949 | } | |
950 | ||
d7b00e31 PC |
951 | /** |
952 | * isr_setup_packet_handler: setup packet handler | |
953 | * @ci: UDC descriptor | |
954 | * | |
955 | * This function handles setup packet | |
956 | */ | |
957 | static void isr_setup_packet_handler(struct ci_hdrc *ci) | |
958 | __releases(ci->lock) | |
959 | __acquires(ci->lock) | |
960 | { | |
961 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[0]; | |
962 | struct usb_ctrlrequest req; | |
963 | int type, num, dir, err = -EINVAL; | |
964 | u8 tmode = 0; | |
965 | ||
966 | /* | |
967 | * Flush data and handshake transactions of previous | |
968 | * setup packet. | |
969 | */ | |
970 | _ep_nuke(ci->ep0out); | |
971 | _ep_nuke(ci->ep0in); | |
972 | ||
973 | /* read_setup_packet */ | |
974 | do { | |
975 | hw_test_and_set_setup_guard(ci); | |
976 | memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); | |
977 | } while (!hw_test_and_clear_setup_guard(ci)); | |
978 | ||
979 | type = req.bRequestType; | |
980 | ||
981 | ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; | |
982 | ||
983 | switch (req.bRequest) { | |
984 | case USB_REQ_CLEAR_FEATURE: | |
985 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
986 | le16_to_cpu(req.wValue) == | |
987 | USB_ENDPOINT_HALT) { | |
988 | if (req.wLength != 0) | |
989 | break; | |
990 | num = le16_to_cpu(req.wIndex); | |
991 | dir = num & USB_ENDPOINT_DIR_MASK; | |
992 | num &= USB_ENDPOINT_NUMBER_MASK; | |
993 | if (dir) /* TX */ | |
994 | num += ci->hw_ep_max / 2; | |
995 | if (!ci->ci_hw_ep[num].wedge) { | |
996 | spin_unlock(&ci->lock); | |
997 | err = usb_ep_clear_halt( | |
998 | &ci->ci_hw_ep[num].ep); | |
999 | spin_lock(&ci->lock); | |
1000 | if (err) | |
1001 | break; | |
1002 | } | |
1003 | err = isr_setup_status_phase(ci); | |
1004 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && | |
1005 | le16_to_cpu(req.wValue) == | |
1006 | USB_DEVICE_REMOTE_WAKEUP) { | |
1007 | if (req.wLength != 0) | |
1008 | break; | |
1009 | ci->remote_wakeup = 0; | |
1010 | err = isr_setup_status_phase(ci); | |
1011 | } else { | |
1012 | goto delegate; | |
1013 | } | |
1014 | break; | |
1015 | case USB_REQ_GET_STATUS: | |
1016 | if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && | |
1017 | type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && | |
1018 | type != (USB_DIR_IN|USB_RECIP_INTERFACE)) | |
1019 | goto delegate; | |
1020 | if (le16_to_cpu(req.wLength) != 2 || | |
1021 | le16_to_cpu(req.wValue) != 0) | |
1022 | break; | |
1023 | err = isr_get_status_response(ci, &req); | |
1024 | break; | |
1025 | case USB_REQ_SET_ADDRESS: | |
1026 | if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) | |
1027 | goto delegate; | |
1028 | if (le16_to_cpu(req.wLength) != 0 || | |
1029 | le16_to_cpu(req.wIndex) != 0) | |
1030 | break; | |
1031 | ci->address = (u8)le16_to_cpu(req.wValue); | |
1032 | ci->setaddr = true; | |
1033 | err = isr_setup_status_phase(ci); | |
1034 | break; | |
1035 | case USB_REQ_SET_FEATURE: | |
1036 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
1037 | le16_to_cpu(req.wValue) == | |
1038 | USB_ENDPOINT_HALT) { | |
1039 | if (req.wLength != 0) | |
1040 | break; | |
1041 | num = le16_to_cpu(req.wIndex); | |
1042 | dir = num & USB_ENDPOINT_DIR_MASK; | |
1043 | num &= USB_ENDPOINT_NUMBER_MASK; | |
1044 | if (dir) /* TX */ | |
1045 | num += ci->hw_ep_max / 2; | |
1046 | ||
1047 | spin_unlock(&ci->lock); | |
1048 | err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep); | |
1049 | spin_lock(&ci->lock); | |
1050 | if (!err) | |
1051 | isr_setup_status_phase(ci); | |
1052 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { | |
1053 | if (req.wLength != 0) | |
1054 | break; | |
1055 | switch (le16_to_cpu(req.wValue)) { | |
1056 | case USB_DEVICE_REMOTE_WAKEUP: | |
1057 | ci->remote_wakeup = 1; | |
1058 | err = isr_setup_status_phase(ci); | |
1059 | break; | |
1060 | case USB_DEVICE_TEST_MODE: | |
1061 | tmode = le16_to_cpu(req.wIndex) >> 8; | |
1062 | switch (tmode) { | |
1063 | case TEST_J: | |
1064 | case TEST_K: | |
1065 | case TEST_SE0_NAK: | |
1066 | case TEST_PACKET: | |
1067 | case TEST_FORCE_EN: | |
1068 | ci->test_mode = tmode; | |
1069 | err = isr_setup_status_phase( | |
1070 | ci); | |
1071 | break; | |
1072 | default: | |
1073 | break; | |
1074 | } | |
1075 | default: | |
1076 | goto delegate; | |
1077 | } | |
1078 | } else { | |
1079 | goto delegate; | |
1080 | } | |
1081 | break; | |
1082 | default: | |
1083 | delegate: | |
1084 | if (req.wLength == 0) /* no data phase */ | |
1085 | ci->ep0_dir = TX; | |
1086 | ||
1087 | spin_unlock(&ci->lock); | |
1088 | err = ci->driver->setup(&ci->gadget, &req); | |
1089 | spin_lock(&ci->lock); | |
1090 | break; | |
1091 | } | |
1092 | ||
1093 | if (err < 0) { | |
1094 | spin_unlock(&ci->lock); | |
1095 | if (usb_ep_set_halt(&hwep->ep)) | |
1096 | dev_err(ci->dev, "error: ep_set_halt\n"); | |
1097 | spin_lock(&ci->lock); | |
1098 | } | |
1099 | } | |
1100 | ||
aa69a809 DL |
1101 | /** |
1102 | * isr_tr_complete_handler: transaction complete interrupt handler | |
26c696c6 | 1103 | * @ci: UDC descriptor |
aa69a809 DL |
1104 | * |
1105 | * This function handles traffic events | |
1106 | */ | |
8e22978c | 1107 | static void isr_tr_complete_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
1108 | __releases(ci->lock) |
1109 | __acquires(ci->lock) | |
aa69a809 DL |
1110 | { |
1111 | unsigned i; | |
d7b00e31 | 1112 | int err; |
aa69a809 | 1113 | |
26c696c6 | 1114 | for (i = 0; i < ci->hw_ep_max; i++) { |
8e22978c | 1115 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
aa69a809 | 1116 | |
2dbc5c4c | 1117 | if (hwep->ep.desc == NULL) |
aa69a809 DL |
1118 | continue; /* not configured */ |
1119 | ||
26c696c6 | 1120 | if (hw_test_and_clear_complete(ci, i)) { |
2dbc5c4c AS |
1121 | err = isr_tr_complete_low(hwep); |
1122 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { | |
aa69a809 | 1123 | if (err > 0) /* needs status phase */ |
26c696c6 | 1124 | err = isr_setup_status_phase(ci); |
aa69a809 | 1125 | if (err < 0) { |
26c696c6 | 1126 | spin_unlock(&ci->lock); |
2dbc5c4c | 1127 | if (usb_ep_set_halt(&hwep->ep)) |
26c696c6 | 1128 | dev_err(ci->dev, |
0917ba84 | 1129 | "error: ep_set_halt\n"); |
26c696c6 | 1130 | spin_lock(&ci->lock); |
aa69a809 DL |
1131 | } |
1132 | } | |
1133 | } | |
1134 | ||
64fc06c4 | 1135 | /* Only handle setup packet below */ |
d7b00e31 PC |
1136 | if (i == 0 && |
1137 | hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0))) | |
1138 | isr_setup_packet_handler(ci); | |
aa69a809 DL |
1139 | } |
1140 | } | |
1141 | ||
1142 | /****************************************************************************** | |
1143 | * ENDPT block | |
1144 | *****************************************************************************/ | |
1145 | /** | |
1146 | * ep_enable: configure endpoint, making it usable | |
1147 | * | |
1148 | * Check usb_ep_enable() at "usb_gadget.h" for details | |
1149 | */ | |
1150 | static int ep_enable(struct usb_ep *ep, | |
1151 | const struct usb_endpoint_descriptor *desc) | |
1152 | { | |
8e22978c | 1153 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
ca9cfea0 | 1154 | int retval = 0; |
aa69a809 | 1155 | unsigned long flags; |
1cd12a9c | 1156 | u32 cap = 0; |
aa69a809 | 1157 | |
aa69a809 DL |
1158 | if (ep == NULL || desc == NULL) |
1159 | return -EINVAL; | |
1160 | ||
2dbc5c4c | 1161 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1162 | |
1163 | /* only internal SW should enable ctrl endpts */ | |
1164 | ||
2dbc5c4c | 1165 | hwep->ep.desc = desc; |
aa69a809 | 1166 | |
2dbc5c4c AS |
1167 | if (!list_empty(&hwep->qh.queue)) |
1168 | dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); | |
aa69a809 | 1169 | |
2dbc5c4c AS |
1170 | hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; |
1171 | hwep->num = usb_endpoint_num(desc); | |
1172 | hwep->type = usb_endpoint_type(desc); | |
aa69a809 | 1173 | |
2dbc5c4c AS |
1174 | hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; |
1175 | hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); | |
aa69a809 | 1176 | |
2dbc5c4c | 1177 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1cd12a9c | 1178 | cap |= QH_IOS; |
2dbc5c4c | 1179 | if (hwep->num) |
776ffc16 | 1180 | cap |= QH_ZLT; |
2dbc5c4c | 1181 | cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; |
2fc5a7da PC |
1182 | /* |
1183 | * For ISO-TX, we set mult at QH as the largest value, and use | |
1184 | * MultO at TD as real mult value. | |
1185 | */ | |
1186 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) | |
1187 | cap |= 3 << __ffs(QH_MULT); | |
1cd12a9c | 1188 | |
2dbc5c4c | 1189 | hwep->qh.ptr->cap = cpu_to_le32(cap); |
1cd12a9c | 1190 | |
2dbc5c4c | 1191 | hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ |
aa69a809 | 1192 | |
64fc06c4 PC |
1193 | if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
1194 | dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n"); | |
1195 | retval = -EINVAL; | |
1196 | } | |
1197 | ||
ac1aa6a2 A |
1198 | /* |
1199 | * Enable endpoints in the HW other than ep0 as ep0 | |
1200 | * is always enabled | |
1201 | */ | |
2dbc5c4c AS |
1202 | if (hwep->num) |
1203 | retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, | |
1204 | hwep->type); | |
aa69a809 | 1205 | |
2dbc5c4c | 1206 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1207 | return retval; |
1208 | } | |
1209 | ||
1210 | /** | |
1211 | * ep_disable: endpoint is no longer usable | |
1212 | * | |
1213 | * Check usb_ep_disable() at "usb_gadget.h" for details | |
1214 | */ | |
1215 | static int ep_disable(struct usb_ep *ep) | |
1216 | { | |
8e22978c | 1217 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1218 | int direction, retval = 0; |
1219 | unsigned long flags; | |
1220 | ||
aa69a809 DL |
1221 | if (ep == NULL) |
1222 | return -EINVAL; | |
2dbc5c4c | 1223 | else if (hwep->ep.desc == NULL) |
aa69a809 DL |
1224 | return -EBUSY; |
1225 | ||
2dbc5c4c | 1226 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1227 | |
1228 | /* only internal SW should disable ctrl endpts */ | |
1229 | ||
2dbc5c4c | 1230 | direction = hwep->dir; |
aa69a809 | 1231 | do { |
2dbc5c4c AS |
1232 | retval |= _ep_nuke(hwep); |
1233 | retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); | |
aa69a809 | 1234 | |
2dbc5c4c AS |
1235 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1236 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1237 | |
2dbc5c4c | 1238 | } while (hwep->dir != direction); |
aa69a809 | 1239 | |
2dbc5c4c | 1240 | hwep->ep.desc = NULL; |
aa69a809 | 1241 | |
2dbc5c4c | 1242 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1243 | return retval; |
1244 | } | |
1245 | ||
1246 | /** | |
1247 | * ep_alloc_request: allocate a request object to use with this endpoint | |
1248 | * | |
1249 | * Check usb_ep_alloc_request() at "usb_gadget.h" for details | |
1250 | */ | |
1251 | static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) | |
1252 | { | |
8e22978c | 1253 | struct ci_hw_req *hwreq = NULL; |
aa69a809 | 1254 | |
0f089094 | 1255 | if (ep == NULL) |
aa69a809 | 1256 | return NULL; |
aa69a809 | 1257 | |
8e22978c | 1258 | hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); |
2dbc5c4c AS |
1259 | if (hwreq != NULL) { |
1260 | INIT_LIST_HEAD(&hwreq->queue); | |
1261 | INIT_LIST_HEAD(&hwreq->tds); | |
aa69a809 DL |
1262 | } |
1263 | ||
2dbc5c4c | 1264 | return (hwreq == NULL) ? NULL : &hwreq->req; |
aa69a809 DL |
1265 | } |
1266 | ||
1267 | /** | |
1268 | * ep_free_request: frees a request object | |
1269 | * | |
1270 | * Check usb_ep_free_request() at "usb_gadget.h" for details | |
1271 | */ | |
1272 | static void ep_free_request(struct usb_ep *ep, struct usb_request *req) | |
1273 | { | |
8e22978c AS |
1274 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1275 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
2e270412 | 1276 | struct td_node *node, *tmpnode; |
aa69a809 DL |
1277 | unsigned long flags; |
1278 | ||
aa69a809 | 1279 | if (ep == NULL || req == NULL) { |
aa69a809 | 1280 | return; |
2dbc5c4c AS |
1281 | } else if (!list_empty(&hwreq->queue)) { |
1282 | dev_err(hwep->ci->dev, "freeing queued request\n"); | |
aa69a809 DL |
1283 | return; |
1284 | } | |
1285 | ||
2dbc5c4c | 1286 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1287 | |
2dbc5c4c AS |
1288 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1289 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
1290 | list_del_init(&node->td); |
1291 | node->ptr = NULL; | |
1292 | kfree(node); | |
1293 | } | |
cc9e6c49 | 1294 | |
2dbc5c4c | 1295 | kfree(hwreq); |
aa69a809 | 1296 | |
2dbc5c4c | 1297 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1298 | } |
1299 | ||
1300 | /** | |
1301 | * ep_queue: queues (submits) an I/O request to an endpoint | |
1302 | * | |
1303 | * Check usb_ep_queue()* at usb_gadget.h" for details | |
1304 | */ | |
1305 | static int ep_queue(struct usb_ep *ep, struct usb_request *req, | |
1306 | gfp_t __maybe_unused gfp_flags) | |
1307 | { | |
8e22978c | 1308 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1309 | int retval = 0; |
1310 | unsigned long flags; | |
1311 | ||
2dbc5c4c | 1312 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1313 | return -EINVAL; |
1314 | ||
2dbc5c4c | 1315 | spin_lock_irqsave(hwep->lock, flags); |
dd064e9d | 1316 | retval = _ep_queue(ep, req, gfp_flags); |
2dbc5c4c | 1317 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1318 | return retval; |
1319 | } | |
1320 | ||
1321 | /** | |
1322 | * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint | |
1323 | * | |
1324 | * Check usb_ep_dequeue() at "usb_gadget.h" for details | |
1325 | */ | |
1326 | static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) | |
1327 | { | |
8e22978c AS |
1328 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1329 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
aa69a809 DL |
1330 | unsigned long flags; |
1331 | ||
2dbc5c4c AS |
1332 | if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || |
1333 | hwep->ep.desc == NULL || list_empty(&hwreq->queue) || | |
1334 | list_empty(&hwep->qh.queue)) | |
aa69a809 DL |
1335 | return -EINVAL; |
1336 | ||
2dbc5c4c | 1337 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1338 | |
2dbc5c4c | 1339 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 DL |
1340 | |
1341 | /* pop request */ | |
2dbc5c4c | 1342 | list_del_init(&hwreq->queue); |
5e0aa49e | 1343 | |
2dbc5c4c | 1344 | usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); |
5e0aa49e | 1345 | |
aa69a809 DL |
1346 | req->status = -ECONNRESET; |
1347 | ||
2dbc5c4c AS |
1348 | if (hwreq->req.complete != NULL) { |
1349 | spin_unlock(hwep->lock); | |
1350 | hwreq->req.complete(&hwep->ep, &hwreq->req); | |
1351 | spin_lock(hwep->lock); | |
aa69a809 DL |
1352 | } |
1353 | ||
2dbc5c4c | 1354 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1355 | return 0; |
1356 | } | |
1357 | ||
1358 | /** | |
1359 | * ep_set_halt: sets the endpoint halt feature | |
1360 | * | |
1361 | * Check usb_ep_set_halt() at "usb_gadget.h" for details | |
1362 | */ | |
1363 | static int ep_set_halt(struct usb_ep *ep, int value) | |
1364 | { | |
8e22978c | 1365 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1366 | int direction, retval = 0; |
1367 | unsigned long flags; | |
1368 | ||
2dbc5c4c | 1369 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1370 | return -EINVAL; |
1371 | ||
2dbc5c4c | 1372 | if (usb_endpoint_xfer_isoc(hwep->ep.desc)) |
e4ce4ecd MG |
1373 | return -EOPNOTSUPP; |
1374 | ||
2dbc5c4c | 1375 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1376 | |
1377 | #ifndef STALL_IN | |
1378 | /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */ | |
2dbc5c4c AS |
1379 | if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX && |
1380 | !list_empty(&hwep->qh.queue)) { | |
1381 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1382 | return -EAGAIN; |
1383 | } | |
1384 | #endif | |
1385 | ||
2dbc5c4c | 1386 | direction = hwep->dir; |
aa69a809 | 1387 | do { |
2dbc5c4c | 1388 | retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); |
aa69a809 DL |
1389 | |
1390 | if (!value) | |
2dbc5c4c | 1391 | hwep->wedge = 0; |
aa69a809 | 1392 | |
2dbc5c4c AS |
1393 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1394 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1395 | |
2dbc5c4c | 1396 | } while (hwep->dir != direction); |
aa69a809 | 1397 | |
2dbc5c4c | 1398 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1399 | return retval; |
1400 | } | |
1401 | ||
1402 | /** | |
1403 | * ep_set_wedge: sets the halt feature and ignores clear requests | |
1404 | * | |
1405 | * Check usb_ep_set_wedge() at "usb_gadget.h" for details | |
1406 | */ | |
1407 | static int ep_set_wedge(struct usb_ep *ep) | |
1408 | { | |
8e22978c | 1409 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1410 | unsigned long flags; |
1411 | ||
2dbc5c4c | 1412 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1413 | return -EINVAL; |
1414 | ||
2dbc5c4c AS |
1415 | spin_lock_irqsave(hwep->lock, flags); |
1416 | hwep->wedge = 1; | |
1417 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1418 | |
1419 | return usb_ep_set_halt(ep); | |
1420 | } | |
1421 | ||
1422 | /** | |
1423 | * ep_fifo_flush: flushes contents of a fifo | |
1424 | * | |
1425 | * Check usb_ep_fifo_flush() at "usb_gadget.h" for details | |
1426 | */ | |
1427 | static void ep_fifo_flush(struct usb_ep *ep) | |
1428 | { | |
8e22978c | 1429 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1430 | unsigned long flags; |
1431 | ||
aa69a809 | 1432 | if (ep == NULL) { |
2dbc5c4c | 1433 | dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); |
aa69a809 DL |
1434 | return; |
1435 | } | |
1436 | ||
2dbc5c4c | 1437 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1438 | |
2dbc5c4c | 1439 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1440 | |
2dbc5c4c | 1441 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1442 | } |
1443 | ||
1444 | /** | |
1445 | * Endpoint-specific part of the API to the USB controller hardware | |
1446 | * Check "usb_gadget.h" for details | |
1447 | */ | |
1448 | static const struct usb_ep_ops usb_ep_ops = { | |
1449 | .enable = ep_enable, | |
1450 | .disable = ep_disable, | |
1451 | .alloc_request = ep_alloc_request, | |
1452 | .free_request = ep_free_request, | |
1453 | .queue = ep_queue, | |
1454 | .dequeue = ep_dequeue, | |
1455 | .set_halt = ep_set_halt, | |
1456 | .set_wedge = ep_set_wedge, | |
1457 | .fifo_flush = ep_fifo_flush, | |
1458 | }; | |
1459 | ||
1460 | /****************************************************************************** | |
1461 | * GADGET block | |
1462 | *****************************************************************************/ | |
8e22978c | 1463 | static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) |
f01ef574 | 1464 | { |
8e22978c | 1465 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
f01ef574 PK |
1466 | unsigned long flags; |
1467 | int gadget_ready = 0; | |
1468 | ||
26c696c6 RZ |
1469 | spin_lock_irqsave(&ci->lock, flags); |
1470 | ci->vbus_active = is_active; | |
1471 | if (ci->driver) | |
f01ef574 | 1472 | gadget_ready = 1; |
26c696c6 | 1473 | spin_unlock_irqrestore(&ci->lock, flags); |
f01ef574 PK |
1474 | |
1475 | if (gadget_ready) { | |
1476 | if (is_active) { | |
c036019e | 1477 | pm_runtime_get_sync(&_gadget->dev); |
26c696c6 RZ |
1478 | hw_device_reset(ci, USBMODE_CM_DC); |
1479 | hw_device_state(ci, ci->ep0out->qh.dma); | |
a107f8c5 | 1480 | dev_dbg(ci->dev, "Connected to host\n"); |
f01ef574 | 1481 | } else { |
92b336d7 PC |
1482 | if (ci->driver) |
1483 | ci->driver->disconnect(&ci->gadget); | |
26c696c6 RZ |
1484 | hw_device_state(ci, 0); |
1485 | if (ci->platdata->notify_event) | |
1486 | ci->platdata->notify_event(ci, | |
8e22978c | 1487 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 | 1488 | _gadget_stop_activity(&ci->gadget); |
c036019e | 1489 | pm_runtime_put_sync(&_gadget->dev); |
a107f8c5 | 1490 | dev_dbg(ci->dev, "Disconnected from host\n"); |
f01ef574 PK |
1491 | } |
1492 | } | |
1493 | ||
1494 | return 0; | |
1495 | } | |
1496 | ||
8e22978c | 1497 | static int ci_udc_wakeup(struct usb_gadget *_gadget) |
e2b61c1d | 1498 | { |
8e22978c | 1499 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
e2b61c1d PK |
1500 | unsigned long flags; |
1501 | int ret = 0; | |
1502 | ||
26c696c6 RZ |
1503 | spin_lock_irqsave(&ci->lock, flags); |
1504 | if (!ci->remote_wakeup) { | |
e2b61c1d | 1505 | ret = -EOPNOTSUPP; |
e2b61c1d PK |
1506 | goto out; |
1507 | } | |
26c696c6 | 1508 | if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { |
e2b61c1d | 1509 | ret = -EINVAL; |
e2b61c1d PK |
1510 | goto out; |
1511 | } | |
26c696c6 | 1512 | hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); |
e2b61c1d | 1513 | out: |
26c696c6 | 1514 | spin_unlock_irqrestore(&ci->lock, flags); |
e2b61c1d PK |
1515 | return ret; |
1516 | } | |
1517 | ||
8e22978c | 1518 | static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) |
d860852e | 1519 | { |
8e22978c | 1520 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
d860852e | 1521 | |
26c696c6 | 1522 | if (ci->transceiver) |
2dbc5c4c | 1523 | return usb_phy_set_power(ci->transceiver, ma); |
d860852e PK |
1524 | return -ENOTSUPP; |
1525 | } | |
1526 | ||
c0a48e6c MG |
1527 | /* Change Data+ pullup status |
1528 | * this func is used by usb_gadget_connect/disconnet | |
1529 | */ | |
8e22978c | 1530 | static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) |
c0a48e6c | 1531 | { |
8e22978c | 1532 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
c0a48e6c | 1533 | |
4a64783b PC |
1534 | if (!ci->vbus_active) |
1535 | return -EOPNOTSUPP; | |
1536 | ||
c0a48e6c MG |
1537 | if (is_on) |
1538 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); | |
1539 | else | |
1540 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); | |
1541 | ||
1542 | return 0; | |
1543 | } | |
1544 | ||
8e22978c | 1545 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1546 | struct usb_gadget_driver *driver); |
8e22978c | 1547 | static int ci_udc_stop(struct usb_gadget *gadget, |
1f339d84 | 1548 | struct usb_gadget_driver *driver); |
aa69a809 DL |
1549 | /** |
1550 | * Device operations part of the API to the USB controller hardware, | |
1551 | * which don't involve endpoints (or i/o) | |
1552 | * Check "usb_gadget.h" for details | |
1553 | */ | |
f01ef574 | 1554 | static const struct usb_gadget_ops usb_gadget_ops = { |
8e22978c AS |
1555 | .vbus_session = ci_udc_vbus_session, |
1556 | .wakeup = ci_udc_wakeup, | |
1557 | .pullup = ci_udc_pullup, | |
1558 | .vbus_draw = ci_udc_vbus_draw, | |
1559 | .udc_start = ci_udc_start, | |
1560 | .udc_stop = ci_udc_stop, | |
f01ef574 | 1561 | }; |
aa69a809 | 1562 | |
8e22978c | 1563 | static int init_eps(struct ci_hdrc *ci) |
aa69a809 | 1564 | { |
790c2d52 | 1565 | int retval = 0, i, j; |
aa69a809 | 1566 | |
26c696c6 | 1567 | for (i = 0; i < ci->hw_ep_max/2; i++) |
ca9cfea0 | 1568 | for (j = RX; j <= TX; j++) { |
26c696c6 | 1569 | int k = i + j * ci->hw_ep_max/2; |
8e22978c | 1570 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; |
aa69a809 | 1571 | |
2dbc5c4c | 1572 | scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, |
ca9cfea0 | 1573 | (j == TX) ? "in" : "out"); |
aa69a809 | 1574 | |
2dbc5c4c AS |
1575 | hwep->ci = ci; |
1576 | hwep->lock = &ci->lock; | |
1577 | hwep->td_pool = ci->td_pool; | |
aa69a809 | 1578 | |
2dbc5c4c AS |
1579 | hwep->ep.name = hwep->name; |
1580 | hwep->ep.ops = &usb_ep_ops; | |
7f67c38b MG |
1581 | /* |
1582 | * for ep0: maxP defined in desc, for other | |
1583 | * eps, maxP is set by epautoconfig() called | |
1584 | * by gadget layer | |
1585 | */ | |
e117e742 | 1586 | usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); |
aa69a809 | 1587 | |
2dbc5c4c AS |
1588 | INIT_LIST_HEAD(&hwep->qh.queue); |
1589 | hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, | |
1590 | &hwep->qh.dma); | |
1591 | if (hwep->qh.ptr == NULL) | |
aa69a809 DL |
1592 | retval = -ENOMEM; |
1593 | else | |
2dbc5c4c | 1594 | memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); |
ca9cfea0 | 1595 | |
d36ade60 AS |
1596 | /* |
1597 | * set up shorthands for ep0 out and in endpoints, | |
1598 | * don't add to gadget's ep_list | |
1599 | */ | |
1600 | if (i == 0) { | |
1601 | if (j == RX) | |
2dbc5c4c | 1602 | ci->ep0out = hwep; |
d36ade60 | 1603 | else |
2dbc5c4c | 1604 | ci->ep0in = hwep; |
d36ade60 | 1605 | |
e117e742 | 1606 | usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); |
ca9cfea0 | 1607 | continue; |
d36ade60 | 1608 | } |
ca9cfea0 | 1609 | |
2dbc5c4c | 1610 | list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); |
ca9cfea0 | 1611 | } |
790c2d52 AS |
1612 | |
1613 | return retval; | |
1614 | } | |
1615 | ||
8e22978c | 1616 | static void destroy_eps(struct ci_hdrc *ci) |
ad6b1b97 MKB |
1617 | { |
1618 | int i; | |
1619 | ||
1620 | for (i = 0; i < ci->hw_ep_max; i++) { | |
8e22978c | 1621 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
ad6b1b97 | 1622 | |
4a29567b PC |
1623 | if (hwep->pending_td) |
1624 | free_pending_td(hwep); | |
2dbc5c4c | 1625 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
ad6b1b97 MKB |
1626 | } |
1627 | } | |
1628 | ||
790c2d52 | 1629 | /** |
8e22978c | 1630 | * ci_udc_start: register a gadget driver |
1f339d84 | 1631 | * @gadget: our gadget |
790c2d52 | 1632 | * @driver: the driver being registered |
790c2d52 | 1633 | * |
790c2d52 AS |
1634 | * Interrupts are enabled here. |
1635 | */ | |
8e22978c | 1636 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1637 | struct usb_gadget_driver *driver) |
790c2d52 | 1638 | { |
8e22978c | 1639 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
790c2d52 | 1640 | unsigned long flags; |
790c2d52 AS |
1641 | int retval = -ENOMEM; |
1642 | ||
1f339d84 | 1643 | if (driver->disconnect == NULL) |
790c2d52 | 1644 | return -EINVAL; |
790c2d52 | 1645 | |
790c2d52 | 1646 | |
26c696c6 RZ |
1647 | ci->ep0out->ep.desc = &ctrl_endpt_out_desc; |
1648 | retval = usb_ep_enable(&ci->ep0out->ep); | |
ac1aa6a2 A |
1649 | if (retval) |
1650 | return retval; | |
877c1f54 | 1651 | |
26c696c6 RZ |
1652 | ci->ep0in->ep.desc = &ctrl_endpt_in_desc; |
1653 | retval = usb_ep_enable(&ci->ep0in->ep); | |
ac1aa6a2 A |
1654 | if (retval) |
1655 | return retval; | |
26c696c6 RZ |
1656 | |
1657 | ci->driver = driver; | |
1658 | pm_runtime_get_sync(&ci->gadget.dev); | |
d268e9bc | 1659 | if (ci->vbus_active) { |
65b2fb32 | 1660 | spin_lock_irqsave(&ci->lock, flags); |
d268e9bc PC |
1661 | hw_device_reset(ci, USBMODE_CM_DC); |
1662 | } else { | |
1663 | pm_runtime_put_sync(&ci->gadget.dev); | |
65b2fb32 | 1664 | return retval; |
f01ef574 PK |
1665 | } |
1666 | ||
26c696c6 | 1667 | retval = hw_device_state(ci, ci->ep0out->qh.dma); |
65b2fb32 | 1668 | spin_unlock_irqrestore(&ci->lock, flags); |
c036019e | 1669 | if (retval) |
26c696c6 | 1670 | pm_runtime_put_sync(&ci->gadget.dev); |
aa69a809 | 1671 | |
aa69a809 DL |
1672 | return retval; |
1673 | } | |
aa69a809 DL |
1674 | |
1675 | /** | |
8e22978c | 1676 | * ci_udc_stop: unregister a gadget driver |
aa69a809 | 1677 | */ |
8e22978c | 1678 | static int ci_udc_stop(struct usb_gadget *gadget, |
1f339d84 | 1679 | struct usb_gadget_driver *driver) |
aa69a809 | 1680 | { |
8e22978c | 1681 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
1f339d84 | 1682 | unsigned long flags; |
aa69a809 | 1683 | |
26c696c6 | 1684 | spin_lock_irqsave(&ci->lock, flags); |
aa69a809 | 1685 | |
d268e9bc | 1686 | if (ci->vbus_active) { |
26c696c6 RZ |
1687 | hw_device_state(ci, 0); |
1688 | if (ci->platdata->notify_event) | |
1689 | ci->platdata->notify_event(ci, | |
8e22978c | 1690 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 RZ |
1691 | spin_unlock_irqrestore(&ci->lock, flags); |
1692 | _gadget_stop_activity(&ci->gadget); | |
1693 | spin_lock_irqsave(&ci->lock, flags); | |
1694 | pm_runtime_put(&ci->gadget.dev); | |
f01ef574 | 1695 | } |
aa69a809 | 1696 | |
f84839da | 1697 | ci->driver = NULL; |
26c696c6 | 1698 | spin_unlock_irqrestore(&ci->lock, flags); |
aa69a809 | 1699 | |
aa69a809 DL |
1700 | return 0; |
1701 | } | |
aa69a809 DL |
1702 | |
1703 | /****************************************************************************** | |
1704 | * BUS block | |
1705 | *****************************************************************************/ | |
1706 | /** | |
26c696c6 | 1707 | * udc_irq: ci interrupt handler |
aa69a809 DL |
1708 | * |
1709 | * This function returns IRQ_HANDLED if the IRQ has been handled | |
1710 | * It locks access to registers | |
1711 | */ | |
8e22978c | 1712 | static irqreturn_t udc_irq(struct ci_hdrc *ci) |
aa69a809 | 1713 | { |
aa69a809 DL |
1714 | irqreturn_t retval; |
1715 | u32 intr; | |
1716 | ||
26c696c6 | 1717 | if (ci == NULL) |
aa69a809 | 1718 | return IRQ_HANDLED; |
aa69a809 | 1719 | |
26c696c6 | 1720 | spin_lock(&ci->lock); |
f01ef574 | 1721 | |
8e22978c | 1722 | if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { |
26c696c6 | 1723 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != |
758fc986 | 1724 | USBMODE_CM_DC) { |
26c696c6 | 1725 | spin_unlock(&ci->lock); |
f01ef574 PK |
1726 | return IRQ_NONE; |
1727 | } | |
1728 | } | |
26c696c6 | 1729 | intr = hw_test_and_clear_intr_active(ci); |
aa69a809 | 1730 | |
e443b333 | 1731 | if (intr) { |
aa69a809 | 1732 | /* order defines priority - do NOT change it */ |
e443b333 | 1733 | if (USBi_URI & intr) |
26c696c6 | 1734 | isr_reset_handler(ci); |
e443b333 | 1735 | |
aa69a809 | 1736 | if (USBi_PCI & intr) { |
26c696c6 | 1737 | ci->gadget.speed = hw_port_is_high_speed(ci) ? |
aa69a809 | 1738 | USB_SPEED_HIGH : USB_SPEED_FULL; |
26c696c6 RZ |
1739 | if (ci->suspended && ci->driver->resume) { |
1740 | spin_unlock(&ci->lock); | |
1741 | ci->driver->resume(&ci->gadget); | |
1742 | spin_lock(&ci->lock); | |
1743 | ci->suspended = 0; | |
e2b61c1d | 1744 | } |
aa69a809 | 1745 | } |
e443b333 AS |
1746 | |
1747 | if (USBi_UI & intr) | |
26c696c6 | 1748 | isr_tr_complete_handler(ci); |
e443b333 | 1749 | |
e2b61c1d | 1750 | if (USBi_SLI & intr) { |
26c696c6 RZ |
1751 | if (ci->gadget.speed != USB_SPEED_UNKNOWN && |
1752 | ci->driver->suspend) { | |
1753 | ci->suspended = 1; | |
1754 | spin_unlock(&ci->lock); | |
1755 | ci->driver->suspend(&ci->gadget); | |
1756 | spin_lock(&ci->lock); | |
e2b61c1d | 1757 | } |
e2b61c1d | 1758 | } |
aa69a809 DL |
1759 | retval = IRQ_HANDLED; |
1760 | } else { | |
aa69a809 DL |
1761 | retval = IRQ_NONE; |
1762 | } | |
26c696c6 | 1763 | spin_unlock(&ci->lock); |
aa69a809 DL |
1764 | |
1765 | return retval; | |
1766 | } | |
1767 | ||
aa69a809 | 1768 | /** |
5f36e231 | 1769 | * udc_start: initialize gadget role |
26c696c6 | 1770 | * @ci: chipidea controller |
aa69a809 | 1771 | */ |
8e22978c | 1772 | static int udc_start(struct ci_hdrc *ci) |
aa69a809 | 1773 | { |
26c696c6 | 1774 | struct device *dev = ci->dev; |
aa69a809 DL |
1775 | int retval = 0; |
1776 | ||
26c696c6 | 1777 | spin_lock_init(&ci->lock); |
aa69a809 | 1778 | |
26c696c6 RZ |
1779 | ci->gadget.ops = &usb_gadget_ops; |
1780 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
1781 | ci->gadget.max_speed = USB_SPEED_HIGH; | |
1782 | ci->gadget.is_otg = 0; | |
1783 | ci->gadget.name = ci->platdata->name; | |
aa69a809 | 1784 | |
26c696c6 | 1785 | INIT_LIST_HEAD(&ci->gadget.ep_list); |
aa69a809 | 1786 | |
790c2d52 | 1787 | /* alloc resources */ |
8e22978c AS |
1788 | ci->qh_pool = dma_pool_create("ci_hw_qh", dev, |
1789 | sizeof(struct ci_hw_qh), | |
1790 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1791 | if (ci->qh_pool == NULL) |
5f36e231 | 1792 | return -ENOMEM; |
790c2d52 | 1793 | |
8e22978c AS |
1794 | ci->td_pool = dma_pool_create("ci_hw_td", dev, |
1795 | sizeof(struct ci_hw_td), | |
1796 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1797 | if (ci->td_pool == NULL) { |
790c2d52 AS |
1798 | retval = -ENOMEM; |
1799 | goto free_qh_pool; | |
1800 | } | |
1801 | ||
26c696c6 | 1802 | retval = init_eps(ci); |
790c2d52 AS |
1803 | if (retval) |
1804 | goto free_pools; | |
1805 | ||
26c696c6 | 1806 | ci->gadget.ep0 = &ci->ep0in->ep; |
f01ef574 | 1807 | |
26c696c6 | 1808 | retval = usb_add_gadget_udc(dev, &ci->gadget); |
0f91349b | 1809 | if (retval) |
74475ede | 1810 | goto destroy_eps; |
0f91349b | 1811 | |
26c696c6 RZ |
1812 | pm_runtime_no_callbacks(&ci->gadget.dev); |
1813 | pm_runtime_enable(&ci->gadget.dev); | |
aa69a809 | 1814 | |
aa69a809 DL |
1815 | return retval; |
1816 | ||
ad6b1b97 MKB |
1817 | destroy_eps: |
1818 | destroy_eps(ci); | |
790c2d52 | 1819 | free_pools: |
26c696c6 | 1820 | dma_pool_destroy(ci->td_pool); |
790c2d52 | 1821 | free_qh_pool: |
26c696c6 | 1822 | dma_pool_destroy(ci->qh_pool); |
aa69a809 DL |
1823 | return retval; |
1824 | } | |
1825 | ||
1826 | /** | |
3f124d23 | 1827 | * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC |
aa69a809 DL |
1828 | * |
1829 | * No interrupts active, the IRQ has been released | |
1830 | */ | |
3f124d23 | 1831 | void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) |
aa69a809 | 1832 | { |
3f124d23 | 1833 | if (!ci->roles[CI_ROLE_GADGET]) |
aa69a809 | 1834 | return; |
0f089094 | 1835 | |
26c696c6 | 1836 | usb_del_gadget_udc(&ci->gadget); |
aa69a809 | 1837 | |
ad6b1b97 | 1838 | destroy_eps(ci); |
790c2d52 | 1839 | |
26c696c6 RZ |
1840 | dma_pool_destroy(ci->td_pool); |
1841 | dma_pool_destroy(ci->qh_pool); | |
3f124d23 PC |
1842 | } |
1843 | ||
1844 | static int udc_id_switch_for_device(struct ci_hdrc *ci) | |
1845 | { | |
1846 | if (ci->is_otg) { | |
1847 | ci_clear_otg_interrupt(ci, OTGSC_BSVIS); | |
1848 | ci_enable_otg_interrupt(ci, OTGSC_BSVIE); | |
1849 | } | |
1850 | ||
1851 | return 0; | |
1852 | } | |
1853 | ||
1854 | static void udc_id_switch_for_host(struct ci_hdrc *ci) | |
1855 | { | |
1856 | if (ci->is_otg) { | |
1857 | /* host doesn't care B_SESSION_VALID event */ | |
1858 | ci_clear_otg_interrupt(ci, OTGSC_BSVIS); | |
1859 | ci_disable_otg_interrupt(ci, OTGSC_BSVIE); | |
1860 | } | |
5f36e231 AS |
1861 | } |
1862 | ||
1863 | /** | |
1864 | * ci_hdrc_gadget_init - initialize device related bits | |
1865 | * ci: the controller | |
1866 | * | |
3f124d23 | 1867 | * This function initializes the gadget, if the device is "device capable". |
5f36e231 | 1868 | */ |
8e22978c | 1869 | int ci_hdrc_gadget_init(struct ci_hdrc *ci) |
5f36e231 AS |
1870 | { |
1871 | struct ci_role_driver *rdrv; | |
1872 | ||
1873 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) | |
1874 | return -ENXIO; | |
1875 | ||
1876 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); | |
1877 | if (!rdrv) | |
1878 | return -ENOMEM; | |
1879 | ||
3f124d23 PC |
1880 | rdrv->start = udc_id_switch_for_device; |
1881 | rdrv->stop = udc_id_switch_for_host; | |
5f36e231 AS |
1882 | rdrv->irq = udc_irq; |
1883 | rdrv->name = "gadget"; | |
1884 | ci->roles[CI_ROLE_GADGET] = rdrv; | |
aa69a809 | 1885 | |
3f124d23 | 1886 | return udc_start(ci); |
aa69a809 | 1887 | } |