[mirror_ubuntu-bionic-kernel.git] / drivers / usb / chipidea / usbmisc_imx.c

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/delay.h>

#include "ci_hdrc_imx.h"

#define MX25_USB_PHY_CTRL_OFFSET	0x08
#define MX25_BM_EXTERNAL_VBUS_DIVIDER	BIT(23)

#define MX25_EHCI_INTERFACE_SINGLE_UNI	(2 << 0)
#define MX25_EHCI_INTERFACE_DIFF_UNI	(0 << 0)
#define MX25_EHCI_INTERFACE_MASK	(0xf)

#define MX25_OTG_SIC_SHIFT		29
#define MX25_OTG_SIC_MASK		(0x3 << MX25_OTG_SIC_SHIFT)
#define MX25_OTG_PM_BIT			BIT(24)
#define MX25_OTG_PP_BIT			BIT(11)
#define MX25_OTG_OCPOL_BIT		BIT(3)

#define MX25_H1_SIC_SHIFT		21
#define MX25_H1_SIC_MASK		(0x3 << MX25_H1_SIC_SHIFT)
#define MX25_H1_PP_BIT			BIT(18)
#define MX25_H1_PM_BIT			BIT(16)
#define MX25_H1_IPPUE_UP_BIT		BIT(7)
#define MX25_H1_IPPUE_DOWN_BIT		BIT(6)
#define MX25_H1_TLL_BIT			BIT(5)
#define MX25_H1_USBTE_BIT		BIT(4)
#define MX25_H1_OCPOL_BIT		BIT(2)

#define MX27_H1_PM_BIT			BIT(8)
#define MX27_H2_PM_BIT			BIT(16)
#define MX27_OTG_PM_BIT			BIT(24)

#define MX53_USB_OTG_PHY_CTRL_0_OFFSET	0x08
#define MX53_USB_OTG_PHY_CTRL_1_OFFSET	0x0c
#define MX53_USB_CTRL_1_OFFSET	        0x10
#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)
#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2)
#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6)
#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6)
#define MX53_USB_UH2_CTRL_OFFSET	0x14
#define MX53_USB_UH3_CTRL_OFFSET	0x18
#define MX53_USB_CLKONOFF_CTRL_OFFSET	0x24
#define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21)
#define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22)
#define MX53_BM_OVER_CUR_DIS_H1		BIT(5)
#define MX53_BM_OVER_CUR_DIS_OTG	BIT(8)
#define MX53_BM_OVER_CUR_DIS_UHx	BIT(30)
#define MX53_USB_CTRL_1_UH2_ULPI_EN	BIT(26)
#define MX53_USB_CTRL_1_UH3_ULPI_EN	BIT(27)
#define MX53_USB_UHx_CTRL_WAKE_UP_EN	BIT(7)
#define MX53_USB_UHx_CTRL_ULPI_INT_EN	BIT(8)
#define MX53_USB_PHYCTRL1_PLLDIV_MASK	0x3
#define MX53_USB_PLL_DIV_24_MHZ		0x01

#define MX6_BM_NON_BURST_SETTING	BIT(1)
#define MX6_BM_OVER_CUR_DIS		BIT(7)
#define MX6_BM_OVER_CUR_POLARITY	BIT(8)
#define MX6_BM_WAKEUP_ENABLE		BIT(10)
#define MX6_BM_ID_WAKEUP		BIT(16)
#define MX6_BM_VBUS_WAKEUP		BIT(17)
#define MX6SX_BM_DPDM_WAKEUP_EN		BIT(29)
#define MX6_BM_WAKEUP_INTR		BIT(31)
#define MX6_USB_OTG1_PHY_CTRL		0x18
/* For imx6dql, it is host-only controller, for later imx6, it is otg's */
#define MX6_USB_OTG2_PHY_CTRL		0x1c
#define MX6SX_USB_VBUS_WAKEUP_SOURCE(v)	(v << 8)
#define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS	MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
#define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID	MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
#define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID	MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
#define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END	MX6SX_USB_VBUS_WAKEUP_SOURCE(3)

#define VF610_OVER_CUR_DIS		BIT(7)

#define MX7D_USBNC_USB_CTRL2		0x4
#define MX7D_USB_VBUS_WAKEUP_SOURCE_MASK	0x3
#define MX7D_USB_VBUS_WAKEUP_SOURCE(v)		(v << 0)
#define MX7D_USB_VBUS_WAKEUP_SOURCE_VBUS	MX7D_USB_VBUS_WAKEUP_SOURCE(0)
#define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID	MX7D_USB_VBUS_WAKEUP_SOURCE(1)
#define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID	MX7D_USB_VBUS_WAKEUP_SOURCE(2)
#define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END	MX7D_USB_VBUS_WAKEUP_SOURCE(3)

struct usbmisc_ops {
	/* It's called once when probe a usb device */
	int (*init)(struct imx_usbmisc_data *data);
	/* It's called once after adding a usb device */
	int (*post)(struct imx_usbmisc_data *data);
	/* It's called when we need to enable/disable usb wakeup */
	int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled);
};

struct imx_usbmisc {
	void __iomem *base;
	spinlock_t lock;
	const struct usbmisc_ops *ops;
};

static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data);

static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 val = 0;

	if (data->index > 1)
		return -EINVAL;

	spin_lock_irqsave(&usbmisc->lock, flags);
	switch (data->index) {
	case 0:
		val = readl(usbmisc->base);
		val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
		val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
		val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
		writel(val, usbmisc->base);
		break;
	case 1:
		val = readl(usbmisc->base);
		val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT |  MX25_H1_IPPUE_UP_BIT);
		val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
		val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
			MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT);

		writel(val, usbmisc->base);

		break;
	}
	spin_unlock_irqrestore(&usbmisc->lock, flags);

	return 0;
}

static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	void __iomem *reg;
	unsigned long flags;
	u32 val;

	if (data->index > 2)
		return -EINVAL;

	if (data->evdo) {
		spin_lock_irqsave(&usbmisc->lock, flags);
		reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET;
		val = readl(reg);
		writel(val | MX25_BM_EXTERNAL_VBUS_DIVIDER, reg);
		spin_unlock_irqrestore(&usbmisc->lock, flags);
		usleep_range(5000, 10000); /* needed to stabilize voltage */
	}

	return 0;
}

static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 val;

	switch (data->index) {
	case 0:
		val = MX27_OTG_PM_BIT;
		break;
	case 1:
		val = MX27_H1_PM_BIT;
		break;
	case 2:
		val = MX27_H2_PM_BIT;
		break;
	default:
		return -EINVAL;
	}

	spin_lock_irqsave(&usbmisc->lock, flags);
	if (data->disable_oc)
		val = readl(usbmisc->base) | val;
	else
		val = readl(usbmisc->base) & ~val;
	writel(val, usbmisc->base);
	spin_unlock_irqrestore(&usbmisc->lock, flags);

	return 0;
}

static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	void __iomem *reg = NULL;
	unsigned long flags;
	u32 val = 0;

	if (data->index > 3)
		return -EINVAL;

	/* Select a 24 MHz reference clock for the PHY  */
	val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
	val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
	val |= MX53_USB_PLL_DIV_24_MHZ;
	writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);

	spin_lock_irqsave(&usbmisc->lock, flags);

	switch (data->index) {
	case 0:
		if (data->disable_oc) {
			reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
			val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
			writel(val, reg);
		}
		break;
	case 1:
		if (data->disable_oc) {
			reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
			val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
			writel(val, reg);
		}
		break;
	case 2:
		if (data->ulpi) {
			/* set USBH2 into ULPI-mode. */
			reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
			val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN;
			/* select ULPI clock */
			val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK;
			val |= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI;
			writel(val, reg);
			/* Set interrupt wake up enable */
			reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
			val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
				| MX53_USB_UHx_CTRL_ULPI_INT_EN;
			writel(val, reg);
			if (is_imx53_usbmisc(data)) {
				/* Disable internal 60Mhz clock */
				reg = usbmisc->base +
					MX53_USB_CLKONOFF_CTRL_OFFSET;
				val = readl(reg) |
					MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF;
				writel(val, reg);
			}

		}
		if (data->disable_oc) {
			reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
			val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
			writel(val, reg);
		}
		break;
	case 3:
		if (data->ulpi) {
			/* set USBH3 into ULPI-mode. */
			reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
			val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN;
			/* select ULPI clock */
			val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK;
			val |= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI;
			writel(val, reg);
			/* Set interrupt wake up enable */
			reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
			val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
				| MX53_USB_UHx_CTRL_ULPI_INT_EN;
			writel(val, reg);

			if (is_imx53_usbmisc(data)) {
				/* Disable internal 60Mhz clock */
				reg = usbmisc->base +
					MX53_USB_CLKONOFF_CTRL_OFFSET;
				val = readl(reg) |
					MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF;
				writel(val, reg);
			}
		}
		if (data->disable_oc) {
			reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
			val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
			writel(val, reg);
		}
		break;
	}

	spin_unlock_irqrestore(&usbmisc->lock, flags);

	return 0;
}

static int usbmisc_imx6q_set_wakeup
	(struct imx_usbmisc_data *data, bool enabled)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 val;
	u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE |
		MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP);
	int ret = 0;

	if (data->index > 3)
		return -EINVAL;

	spin_lock_irqsave(&usbmisc->lock, flags);
	val = readl(usbmisc->base + data->index * 4);
	if (enabled) {
		val |= wakeup_setting;
		writel(val, usbmisc->base + data->index * 4);
	} else {
		if (val & MX6_BM_WAKEUP_INTR)
			pr_debug("wakeup int at ci_hdrc.%d\n", data->index);
		val &= ~wakeup_setting;
		writel(val, usbmisc->base + data->index * 4);
	}
	spin_unlock_irqrestore(&usbmisc->lock, flags);

	return ret;
}

static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 reg;

	if (data->index > 3)
		return -EINVAL;

	spin_lock_irqsave(&usbmisc->lock, flags);

	reg = readl(usbmisc->base + data->index * 4);
	if (data->disable_oc) {
		reg |= MX6_BM_OVER_CUR_DIS;
	} else if (data->oc_polarity == 1) {
		/* High active */
		reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY);
	}
	writel(reg, usbmisc->base + data->index * 4);

	/* SoC non-burst setting */
	reg = readl(usbmisc->base + data->index * 4);
	writel(reg | MX6_BM_NON_BURST_SETTING,
			usbmisc->base + data->index * 4);

	spin_unlock_irqrestore(&usbmisc->lock, flags);

	usbmisc_imx6q_set_wakeup(data, false);

	return 0;
}

static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data)
{
	void __iomem *reg = NULL;
	unsigned long flags;
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	u32 val;

	usbmisc_imx6q_init(data);

	if (data->index == 0 || data->index == 1) {
		reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4;
		spin_lock_irqsave(&usbmisc->lock, flags);
		/* Set vbus wakeup source as bvalid */
		val = readl(reg);
		writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
		/*
		 * Disable dp/dm wakeup in device mode when vbus is
		 * not there.
		 */
		val = readl(usbmisc->base + data->index * 4);
		writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
			usbmisc->base + data->index * 4);
		spin_unlock_irqrestore(&usbmisc->lock, flags);
	}

	return 0;
}

static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	u32 reg;

	/*
	 * Vybrid only has one misc register set, but in two different
	 * areas. These is reflected in two instances of this driver.
	 */
	if (data->index >= 1)
		return -EINVAL;

	if (data->disable_oc) {
		reg = readl(usbmisc->base);
		writel(reg | VF610_OVER_CUR_DIS, usbmisc->base);
	}

	return 0;
}

static int usbmisc_imx7d_set_wakeup
	(struct imx_usbmisc_data *data, bool enabled)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 val;
	u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE |
		MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP);

	spin_lock_irqsave(&usbmisc->lock, flags);
	val = readl(usbmisc->base);
	if (enabled) {
		writel(val | wakeup_setting, usbmisc->base);
	} else {
		if (val & MX6_BM_WAKEUP_INTR)
			dev_dbg(data->dev, "wakeup int\n");
		writel(val & ~wakeup_setting, usbmisc->base);
	}
	spin_unlock_irqrestore(&usbmisc->lock, flags);

	return 0;
}

static int usbmisc_imx7d_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 reg;

	if (data->index >= 1)
		return -EINVAL;

	spin_lock_irqsave(&usbmisc->lock, flags);
	reg = readl(usbmisc->base);
	if (data->disable_oc) {
		reg |= MX6_BM_OVER_CUR_DIS;
	} else if (data->oc_polarity == 1) {
		/* High active */
		reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY);
	}
	writel(reg, usbmisc->base);

	reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
	reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK;
	writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID,
		 usbmisc->base + MX7D_USBNC_USB_CTRL2);
	spin_unlock_irqrestore(&usbmisc->lock, flags);

	usbmisc_imx7d_set_wakeup(data, false);

	return 0;
}

static const struct usbmisc_ops imx25_usbmisc_ops = {
	.init = usbmisc_imx25_init,
	.post = usbmisc_imx25_post,
};

static const struct usbmisc_ops imx27_usbmisc_ops = {
	.init = usbmisc_imx27_init,
};

static const struct usbmisc_ops imx51_usbmisc_ops = {
	.init = usbmisc_imx53_init,
};

static const struct usbmisc_ops imx53_usbmisc_ops = {
	.init = usbmisc_imx53_init,
};

static const struct usbmisc_ops imx6q_usbmisc_ops = {
	.set_wakeup = usbmisc_imx6q_set_wakeup,
	.init = usbmisc_imx6q_init,
};

static const struct usbmisc_ops vf610_usbmisc_ops = {
	.init = usbmisc_vf610_init,
};

static const struct usbmisc_ops imx6sx_usbmisc_ops = {
	.set_wakeup = usbmisc_imx6q_set_wakeup,
	.init = usbmisc_imx6sx_init,
};

static const struct usbmisc_ops imx7d_usbmisc_ops = {
	.init = usbmisc_imx7d_init,
	.set_wakeup = usbmisc_imx7d_set_wakeup,
};

static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);

	return usbmisc->ops == &imx53_usbmisc_ops;
}

int imx_usbmisc_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc;

	if (!data)
		return 0;

	usbmisc = dev_get_drvdata(data->dev);
	if (!usbmisc->ops->init)
		return 0;
	return usbmisc->ops->init(data);
}
EXPORT_SYMBOL_GPL(imx_usbmisc_init);

int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc;

	if (!data)
		return 0;

	usbmisc = dev_get_drvdata(data->dev);
	if (!usbmisc->ops->post)
		return 0;
	return usbmisc->ops->post(data);
}
EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);

int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
{
	struct imx_usbmisc *usbmisc;

	if (!data)
		return 0;

	usbmisc = dev_get_drvdata(data->dev);
	if (!usbmisc->ops->set_wakeup)
		return 0;
	return usbmisc->ops->set_wakeup(data, enabled);
}
EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup);

static const struct of_device_id usbmisc_imx_dt_ids[] = {
	{
		.compatible = "fsl,imx25-usbmisc",
		.data = &imx25_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx35-usbmisc",
		.data = &imx25_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx27-usbmisc",
		.data = &imx27_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx51-usbmisc",
		.data = &imx51_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx53-usbmisc",
		.data = &imx53_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx6q-usbmisc",
		.data = &imx6q_usbmisc_ops,
	},
	{
		.compatible = "fsl,vf610-usbmisc",
		.data = &vf610_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx6sx-usbmisc",
		.data = &imx6sx_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx6ul-usbmisc",
		.data = &imx6sx_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx7d-usbmisc",
		.data = &imx7d_usbmisc_ops,
	},
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);

static int usbmisc_imx_probe(struct platform_device *pdev)
{
	struct resource	*res;
	struct imx_usbmisc *data;
	const struct of_device_id *of_id;

	of_id = of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
	if (!of_id)
		return -ENODEV;

	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	spin_lock_init(&data->lock);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	data->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(data->base))
		return PTR_ERR(data->base);

	data->ops = (const struct usbmisc_ops *)of_id->data;
	platform_set_drvdata(pdev, data);

	return 0;
}

static int usbmisc_imx_remove(struct platform_device *pdev)
{
	return 0;
}

static struct platform_driver usbmisc_imx_driver = {
	.probe = usbmisc_imx_probe,
	.remove = usbmisc_imx_remove,
	.driver = {
		.name = "usbmisc_imx",
		.of_match_table = usbmisc_imx_dt_ids,
	 },
};

module_platform_driver(usbmisc_imx_driver);

MODULE_ALIAS("platform:usbmisc-imx");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("driver for imx usb non-core registers");
MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");
Commit	Line	Data
d142d6be RZ	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/of_platform.h>
d142d6be RZ	14	#include <linux/err.h>
d142d6be RZ	15	#include <linux/io.h>
a0685330	16	#include <linux/delay.h>
d142d6be	17
8e22978c	18	#include "ci_hdrc_imx.h"
d142d6be	19
a0685330 MG	20	#define MX25_USB_PHY_CTRL_OFFSET 0x08
	21	#define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23)
	22
72ee92d1 DC	23	#define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
	24	#define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0)
	25	#define MX25_EHCI_INTERFACE_MASK (0xf)
	26
	27	#define MX25_OTG_SIC_SHIFT 29
	28	#define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
	29	#define MX25_OTG_PM_BIT BIT(24)
	30	#define MX25_OTG_PP_BIT BIT(11)
	31	#define MX25_OTG_OCPOL_BIT BIT(3)
	32
	33	#define MX25_H1_SIC_SHIFT 21
	34	#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
	35	#define MX25_H1_PP_BIT BIT(18)
	36	#define MX25_H1_PM_BIT BIT(16)
	37	#define MX25_H1_IPPUE_UP_BIT BIT(7)
	38	#define MX25_H1_IPPUE_DOWN_BIT BIT(6)
	39	#define MX25_H1_TLL_BIT BIT(5)
	40	#define MX25_H1_USBTE_BIT BIT(4)
	41	#define MX25_H1_OCPOL_BIT BIT(2)
	42
9f90e111 AS	43	#define MX27_H1_PM_BIT BIT(8)
	44	#define MX27_H2_PM_BIT BIT(16)
	45	#define MX27_OTG_PM_BIT BIT(24)
	46
f0c910b6	47	#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
33f92a8a	48	#define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
d13631bb FL	49	#define MX53_USB_CTRL_1_OFFSET 0x10
	50	#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)
	51	#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2)
	52	#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6)
	53	#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6)
f0c910b6 MG	54	#define MX53_USB_UH2_CTRL_OFFSET 0x14
f0c910b6 MG	55	#define MX53_USB_UH3_CTRL_OFFSET 0x18
3be3251d FL	56	#define MX53_USB_CLKONOFF_CTRL_OFFSET 0x24
	57	#define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21)
	58	#define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22)
f0c910b6 MG	59	#define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
	60	#define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
	61	#define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
d13631bb FL	62	#define MX53_USB_CTRL_1_UH2_ULPI_EN BIT(26)
	63	#define MX53_USB_CTRL_1_UH3_ULPI_EN BIT(27)
	64	#define MX53_USB_UHx_CTRL_WAKE_UP_EN BIT(7)
	65	#define MX53_USB_UHx_CTRL_ULPI_INT_EN BIT(8)
33f92a8a FE	66	#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
33f92a8a FE	67	#define MX53_USB_PLL_DIV_24_MHZ 0x01
f0c910b6	68
ed6e5eb5	69	#define MX6_BM_NON_BURST_SETTING BIT(1)
e609108a	70	#define MX6_BM_OVER_CUR_DIS BIT(7)
9dba516e	71	#define MX6_BM_OVER_CUR_POLARITY BIT(8)
f636cec5 PC	72	#define MX6_BM_WAKEUP_ENABLE BIT(10)
	73	#define MX6_BM_ID_WAKEUP BIT(16)
	74	#define MX6_BM_VBUS_WAKEUP BIT(17)
8721a752	75	#define MX6SX_BM_DPDM_WAKEUP_EN BIT(29)
f636cec5	76	#define MX6_BM_WAKEUP_INTR BIT(31)
8721a752 PC	77	#define MX6_USB_OTG1_PHY_CTRL 0x18
	78	/* For imx6dql, it is host-only controller, for later imx6, it is otg's */
	79	#define MX6_USB_OTG2_PHY_CTRL 0x1c
	80	#define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8)
	81	#define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
	82	#define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
	83	#define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
	84	#define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3)
d142d6be	85
f40017e0 SA	86	#define VF610_OVER_CUR_DIS BIT(7)
f40017e0 SA	87
5cb377c5 PC	88	#define MX7D_USBNC_USB_CTRL2 0x4
	89	#define MX7D_USB_VBUS_WAKEUP_SOURCE_MASK 0x3
	90	#define MX7D_USB_VBUS_WAKEUP_SOURCE(v) (v << 0)
	91	#define MX7D_USB_VBUS_WAKEUP_SOURCE_VBUS MX7D_USB_VBUS_WAKEUP_SOURCE(0)
	92	#define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID MX7D_USB_VBUS_WAKEUP_SOURCE(1)
	93	#define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID MX7D_USB_VBUS_WAKEUP_SOURCE(2)
	94	#define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END MX7D_USB_VBUS_WAKEUP_SOURCE(3)
	95
05986ba9 SH	96	struct usbmisc_ops {
	97	/* It's called once when probe a usb device */
	98	int (init)(struct imx_usbmisc_data data);
	99	/* It's called once after adding a usb device */
	100	int (post)(struct imx_usbmisc_data data);
f636cec5 PC	101	/* It's called when we need to enable/disable usb wakeup */
f636cec5 PC	102	int (set_wakeup)(struct imx_usbmisc_data data, bool enabled);
05986ba9 SH	103	};
05986ba9 SH	104
a7bc2fdf	105	struct imx_usbmisc {
d142d6be RZ	106	void __iomem *base;
d142d6be RZ	107	spinlock_t lock;
e609108a	108	const struct usbmisc_ops *ops;
d142d6be RZ	109	};
d142d6be RZ	110
62b97d50 AS	111	static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data);
62b97d50 AS	112
72ee92d1 DC	113	static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
72ee92d1 DC	114	{
f40017e0	115	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
72ee92d1 DC	116	unsigned long flags;
	117	u32 val = 0;
	118
	119	if (data->index > 1)
	120	return -EINVAL;
	121
	122	spin_lock_irqsave(&usbmisc->lock, flags);
	123	switch (data->index) {
	124	case 0:
	125	val = readl(usbmisc->base);
	126	val &= ~(MX25_OTG_SIC_MASK \| MX25_OTG_PP_BIT);
	127	val \|= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
	128	val \|= (MX25_OTG_PM_BIT \| MX25_OTG_OCPOL_BIT);
	129	writel(val, usbmisc->base);
	130	break;
	131	case 1:
	132	val = readl(usbmisc->base);
	133	val &= ~(MX25_H1_SIC_MASK \| MX25_H1_PP_BIT \| MX25_H1_IPPUE_UP_BIT);
	134	val \|= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
	135	val \|= (MX25_H1_PM_BIT \| MX25_H1_OCPOL_BIT \| MX25_H1_TLL_BIT \|
	136	MX25_H1_USBTE_BIT \| MX25_H1_IPPUE_DOWN_BIT);
	137
	138	writel(val, usbmisc->base);
	139
	140	break;
	141	}
	142	spin_unlock_irqrestore(&usbmisc->lock, flags);
	143
	144	return 0;
	145	}
	146
05986ba9	147	static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
a0685330	148	{
f40017e0	149	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
a0685330 MG	150	void __iomem *reg;
	151	unsigned long flags;
	152	u32 val;
	153
05986ba9 SH	154	if (data->index > 2)
05986ba9 SH	155	return -EINVAL;
a0685330	156
05986ba9	157	if (data->evdo) {
a0685330	158	spin_lock_irqsave(&usbmisc->lock, flags);
8d1dc4d0	159	reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET;
a0685330 MG	160	val = readl(reg);
	161	writel(val \| MX25_BM_EXTERNAL_VBUS_DIVIDER, reg);
	162	spin_unlock_irqrestore(&usbmisc->lock, flags);
	163	usleep_range(5000, 10000); /* needed to stabilize voltage */
	164	}
	165
	166	return 0;
	167	}
	168
9f90e111 AS	169	static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
9f90e111 AS	170	{
f40017e0	171	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
9f90e111 AS	172	unsigned long flags;
	173	u32 val;
	174
	175	switch (data->index) {
	176	case 0:
	177	val = MX27_OTG_PM_BIT;
	178	break;
	179	case 1:
	180	val = MX27_H1_PM_BIT;
	181	break;
	182	case 2:
	183	val = MX27_H2_PM_BIT;
	184	break;
	185	default:
	186	return -EINVAL;
aa90e990	187	}
9f90e111 AS	188
	189	spin_lock_irqsave(&usbmisc->lock, flags);
	190	if (data->disable_oc)
	191	val = readl(usbmisc->base) \| val;
	192	else
	193	val = readl(usbmisc->base) & ~val;
	194	writel(val, usbmisc->base);
	195	spin_unlock_irqrestore(&usbmisc->lock, flags);
	196
	197	return 0;
	198	}
	199
05986ba9	200	static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
f0c910b6	201	{
f40017e0	202	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
f0c910b6 MG	203	void __iomem *reg = NULL;
	204	unsigned long flags;
	205	u32 val = 0;
	206
05986ba9 SH	207	if (data->index > 3)
05986ba9 SH	208	return -EINVAL;
f0c910b6	209
33f92a8a	210	/* Select a 24 MHz reference clock for the PHY */
4a1d6cf1	211	val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
33f92a8a FE	212	val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
	213	val \|= MX53_USB_PLL_DIV_24_MHZ;
	214	writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
	215
d13631bb FL	216	spin_lock_irqsave(&usbmisc->lock, flags);
	217
	218	switch (data->index) {
	219	case 0:
	220	if (data->disable_oc) {
f0c910b6 MG	221	reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
f0c910b6 MG	222	val = readl(reg) \| MX53_BM_OVER_CUR_DIS_OTG;
d13631bb FL	223	writel(val, reg);
	224	}
	225	break;
	226	case 1:
	227	if (data->disable_oc) {
f0c910b6 MG	228	reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
f0c910b6 MG	229	val = readl(reg) \| MX53_BM_OVER_CUR_DIS_H1;
d13631bb FL	230	writel(val, reg);
	231	}
	232	break;
	233	case 2:
	234	if (data->ulpi) {
	235	/* set USBH2 into ULPI-mode. */
	236	reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
	237	val = readl(reg) \| MX53_USB_CTRL_1_UH2_ULPI_EN;
	238	/* select ULPI clock */
	239	val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK;
	240	val \|= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI;
	241	writel(val, reg);
	242	/* Set interrupt wake up enable */
	243	reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
	244	val = readl(reg) \| MX53_USB_UHx_CTRL_WAKE_UP_EN
	245	\| MX53_USB_UHx_CTRL_ULPI_INT_EN;
	246	writel(val, reg);
62b97d50 AS	247	if (is_imx53_usbmisc(data)) {
	248	/* Disable internal 60Mhz clock */
	249	reg = usbmisc->base +
	250	MX53_USB_CLKONOFF_CTRL_OFFSET;
	251	val = readl(reg) \|
	252	MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF;
	253	writel(val, reg);
	254	}
	255
d13631bb FL	256	}
d13631bb FL	257	if (data->disable_oc) {
f0c910b6 MG	258	reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
f0c910b6 MG	259	val = readl(reg) \| MX53_BM_OVER_CUR_DIS_UHx;
d13631bb FL	260	writel(val, reg);
	261	}
	262	break;
	263	case 3:
	264	if (data->ulpi) {
	265	/* set USBH3 into ULPI-mode. */
	266	reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
	267	val = readl(reg) \| MX53_USB_CTRL_1_UH3_ULPI_EN;
	268	/* select ULPI clock */
	269	val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK;
	270	val \|= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI;
	271	writel(val, reg);
	272	/* Set interrupt wake up enable */
f0c910b6	273	reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
d13631bb FL	274	val = readl(reg) \| MX53_USB_UHx_CTRL_WAKE_UP_EN
	275	\| MX53_USB_UHx_CTRL_ULPI_INT_EN;
	276	writel(val, reg);
62b97d50 AS	277
	278	if (is_imx53_usbmisc(data)) {
	279	/* Disable internal 60Mhz clock */
	280	reg = usbmisc->base +
	281	MX53_USB_CLKONOFF_CTRL_OFFSET;
	282	val = readl(reg) \|
	283	MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF;
	284	writel(val, reg);
	285	}
f0c910b6	286	}
d13631bb FL	287	if (data->disable_oc) {
	288	reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
	289	val = readl(reg) \| MX53_BM_OVER_CUR_DIS_UHx;
f0c910b6	290	writel(val, reg);
d13631bb FL	291	}
d13631bb FL	292	break;
f0c910b6 MG	293	}
f0c910b6 MG	294
d13631bb FL	295	spin_unlock_irqrestore(&usbmisc->lock, flags);
d13631bb FL	296
f0c910b6 MG	297	return 0;
	298	}
	299
f636cec5 PC	300	static int usbmisc_imx6q_set_wakeup
	301	(struct imx_usbmisc_data *data, bool enabled)
	302	{
	303	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	304	unsigned long flags;
	305	u32 val;
	306	u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE \|
	307	MX6_BM_VBUS_WAKEUP \| MX6_BM_ID_WAKEUP);
	308	int ret = 0;
	309
	310	if (data->index > 3)
	311	return -EINVAL;
	312
	313	spin_lock_irqsave(&usbmisc->lock, flags);
	314	val = readl(usbmisc->base + data->index * 4);
	315	if (enabled) {
	316	val \|= wakeup_setting;
	317	writel(val, usbmisc->base + data->index * 4);
	318	} else {
	319	if (val & MX6_BM_WAKEUP_INTR)
	320	pr_debug("wakeup int at ci_hdrc.%d\n", data->index);
	321	val &= ~wakeup_setting;
	322	writel(val, usbmisc->base + data->index * 4);
	323	}
	324	spin_unlock_irqrestore(&usbmisc->lock, flags);
	325
	326	return ret;
	327	}
	328
05986ba9	329	static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
d142d6be	330	{
f40017e0	331	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
d142d6be RZ	332	unsigned long flags;
	333	u32 reg;
	334
05986ba9 SH	335	if (data->index > 3)
05986ba9 SH	336	return -EINVAL;
d142d6be	337
ed6e5eb5 PC	338	spin_lock_irqsave(&usbmisc->lock, flags);
ed6e5eb5 PC	339
9dba516e	340	reg = readl(usbmisc->base + data->index * 4);
05986ba9	341	if (data->disable_oc) {
9dba516e LJ	342	reg \|= MX6_BM_OVER_CUR_DIS;
	343	} else if (data->oc_polarity == 1) {
	344	/* High active */
	345	reg &= ~(MX6_BM_OVER_CUR_DIS \| MX6_BM_OVER_CUR_POLARITY);
d142d6be	346	}
9dba516e	347	writel(reg, usbmisc->base + data->index * 4);
d142d6be	348
ed6e5eb5 PC	349	/* SoC non-burst setting */
	350	reg = readl(usbmisc->base + data->index * 4);
	351	writel(reg \| MX6_BM_NON_BURST_SETTING,
	352	usbmisc->base + data->index * 4);
	353
	354	spin_unlock_irqrestore(&usbmisc->lock, flags);
	355
f636cec5 PC	356	usbmisc_imx6q_set_wakeup(data, false);
f636cec5 PC	357
d142d6be RZ	358	return 0;
	359	}
	360
8721a752 PC	361	static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data)
	362	{
	363	void __iomem *reg = NULL;
	364	unsigned long flags;
	365	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	366	u32 val;
8721a752 PC	367
	368	usbmisc_imx6q_init(data);
	369
	370	if (data->index == 0 \|\| data->index == 1) {
	371	reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4;
	372	spin_lock_irqsave(&usbmisc->lock, flags);
	373	/* Set vbus wakeup source as bvalid */
	374	val = readl(reg);
	375	writel(val \| MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
	376	/*
	377	* Disable dp/dm wakeup in device mode when vbus is
	378	* not there.
	379	*/
	380	val = readl(usbmisc->base + data->index * 4);
	381	writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
	382	usbmisc->base + data->index * 4);
	383	spin_unlock_irqrestore(&usbmisc->lock, flags);
	384	}
	385
1fcefbdf	386	return 0;
8721a752 PC	387	}
8721a752 PC	388
f40017e0 SA	389	static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
	390	{
	391	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	392	u32 reg;
	393
	394	/*
	395	* Vybrid only has one misc register set, but in two different
	396	* areas. These is reflected in two instances of this driver.
	397	*/
	398	if (data->index >= 1)
	399	return -EINVAL;
	400
	401	if (data->disable_oc) {
	402	reg = readl(usbmisc->base);
	403	writel(reg \| VF610_OVER_CUR_DIS, usbmisc->base);
	404	}
	405
	406	return 0;
	407	}
	408
5cb377c5 PC	409	static int usbmisc_imx7d_set_wakeup
	410	(struct imx_usbmisc_data *data, bool enabled)
	411	{
	412	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	413	unsigned long flags;
	414	u32 val;
	415	u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE \|
	416	MX6_BM_VBUS_WAKEUP \| MX6_BM_ID_WAKEUP);
	417
	418	spin_lock_irqsave(&usbmisc->lock, flags);
	419	val = readl(usbmisc->base);
	420	if (enabled) {
	421	writel(val \| wakeup_setting, usbmisc->base);
	422	} else {
	423	if (val & MX6_BM_WAKEUP_INTR)
	424	dev_dbg(data->dev, "wakeup int\n");
	425	writel(val & ~wakeup_setting, usbmisc->base);
	426	}
	427	spin_unlock_irqrestore(&usbmisc->lock, flags);
	428
	429	return 0;
	430	}
	431
	432	static int usbmisc_imx7d_init(struct imx_usbmisc_data *data)
	433	{
	434	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	435	unsigned long flags;
	436	u32 reg;
	437
	438	if (data->index >= 1)
	439	return -EINVAL;
	440
	441	spin_lock_irqsave(&usbmisc->lock, flags);
9dba516e	442	reg = readl(usbmisc->base);
5cb377c5	443	if (data->disable_oc) {
9dba516e LJ	444	reg \|= MX6_BM_OVER_CUR_DIS;
	445	} else if (data->oc_polarity == 1) {
	446	/* High active */
	447	reg &= ~(MX6_BM_OVER_CUR_DIS \| MX6_BM_OVER_CUR_POLARITY);
5cb377c5	448	}
9dba516e	449	writel(reg, usbmisc->base);
5cb377c5 PC	450
	451	reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
	452	reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK;
	453	writel(reg \| MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID,
	454	usbmisc->base + MX7D_USBNC_USB_CTRL2);
	455	spin_unlock_irqrestore(&usbmisc->lock, flags);
	456
	457	usbmisc_imx7d_set_wakeup(data, false);
	458
	459	return 0;
	460	}
	461
a0685330	462	static const struct usbmisc_ops imx25_usbmisc_ops = {
72ee92d1	463	.init = usbmisc_imx25_init,
a0685330 MG	464	.post = usbmisc_imx25_post,
	465	};
	466
9f90e111 AS	467	static const struct usbmisc_ops imx27_usbmisc_ops = {
	468	.init = usbmisc_imx27_init,
	469	};
	470
62b97d50 AS	471	static const struct usbmisc_ops imx51_usbmisc_ops = {
	472	.init = usbmisc_imx53_init,
	473	};
	474
f0c910b6 MG	475	static const struct usbmisc_ops imx53_usbmisc_ops = {
	476	.init = usbmisc_imx53_init,
	477	};
	478
d142d6be	479	static const struct usbmisc_ops imx6q_usbmisc_ops = {
f636cec5	480	.set_wakeup = usbmisc_imx6q_set_wakeup,
d142d6be RZ	481	.init = usbmisc_imx6q_init,
	482	};
	483
f40017e0 SA	484	static const struct usbmisc_ops vf610_usbmisc_ops = {
	485	.init = usbmisc_vf610_init,
	486	};
	487
8721a752 PC	488	static const struct usbmisc_ops imx6sx_usbmisc_ops = {
	489	.set_wakeup = usbmisc_imx6q_set_wakeup,
	490	.init = usbmisc_imx6sx_init,
	491	};
	492
5cb377c5 PC	493	static const struct usbmisc_ops imx7d_usbmisc_ops = {
	494	.init = usbmisc_imx7d_init,
	495	.set_wakeup = usbmisc_imx7d_set_wakeup,
	496	};
	497
62b97d50 AS	498	static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data)
	499	{
	500	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	501
	502	return usbmisc->ops == &imx53_usbmisc_ops;
	503	}
	504
05986ba9 SH	505	int imx_usbmisc_init(struct imx_usbmisc_data *data)
05986ba9 SH	506	{
a4cf1b14 PC	507	struct imx_usbmisc *usbmisc;
	508
	509	if (!data)
	510	return 0;
f40017e0	511
a4cf1b14	512	usbmisc = dev_get_drvdata(data->dev);
05986ba9 SH	513	if (!usbmisc->ops->init)
	514	return 0;
	515	return usbmisc->ops->init(data);
	516	}
	517	EXPORT_SYMBOL_GPL(imx_usbmisc_init);
	518
	519	int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
	520	{
a4cf1b14 PC	521	struct imx_usbmisc *usbmisc;
	522
	523	if (!data)
	524	return 0;
f40017e0	525
a4cf1b14	526	usbmisc = dev_get_drvdata(data->dev);
05986ba9 SH	527	if (!usbmisc->ops->post)
	528	return 0;
	529	return usbmisc->ops->post(data);
	530	}
	531	EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);
	532
f636cec5 PC	533	int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
	534	{
	535	struct imx_usbmisc *usbmisc;
	536
	537	if (!data)
	538	return 0;
	539
	540	usbmisc = dev_get_drvdata(data->dev);
	541	if (!usbmisc->ops->set_wakeup)
	542	return 0;
	543	return usbmisc->ops->set_wakeup(data, enabled);
	544	}
	545	EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup);
	546
a7bc2fdf	547	static const struct of_device_id usbmisc_imx_dt_ids[] = {
a0685330 MG	548	{
	549	.compatible = "fsl,imx25-usbmisc",
	550	.data = &imx25_usbmisc_ops,
	551	},
72ee92d1 DC	552	{
	553	.compatible = "fsl,imx35-usbmisc",
	554	.data = &imx25_usbmisc_ops,
	555	},
9f90e111 AS	556	{
	557	.compatible = "fsl,imx27-usbmisc",
	558	.data = &imx27_usbmisc_ops,
	559	},
c4962e03 AS	560	{
c4962e03 AS	561	.compatible = "fsl,imx51-usbmisc",
62b97d50	562	.data = &imx51_usbmisc_ops,
c4962e03	563	},
f0c910b6 MG	564	{
	565	.compatible = "fsl,imx53-usbmisc",
	566	.data = &imx53_usbmisc_ops,
	567	},
e609108a MKB	568	{
	569	.compatible = "fsl,imx6q-usbmisc",
	570	.data = &imx6q_usbmisc_ops,
	571	},
f40017e0 SA	572	{
	573	.compatible = "fsl,vf610-usbmisc",
	574	.data = &vf610_usbmisc_ops,
	575	},
8721a752 PC	576	{
	577	.compatible = "fsl,imx6sx-usbmisc",
	578	.data = &imx6sx_usbmisc_ops,
	579	},
52fe568e PC	580	{
	581	.compatible = "fsl,imx6ul-usbmisc",
	582	.data = &imx6sx_usbmisc_ops,
	583	},
9dba516e LJ	584	{
	585	.compatible = "fsl,imx7d-usbmisc",
	586	.data = &imx7d_usbmisc_ops,
	587	},
d142d6be RZ	588	{ /* sentinel */ }
d142d6be RZ	589	};
269b83dc	590	MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
d142d6be	591
a7bc2fdf	592	static int usbmisc_imx_probe(struct platform_device *pdev)
d142d6be RZ	593	{
d142d6be RZ	594	struct resource *res;
a7bc2fdf	595	struct imx_usbmisc *data;
090bc267 LC	596	const struct of_device_id *of_id;
	597
	598	of_id = of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
	599	if (!of_id)
	600	return -ENODEV;
d142d6be	601
d142d6be RZ	602	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	603	if (!data)
	604	return -ENOMEM;
	605
	606	spin_lock_init(&data->lock);
	607
	608	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
148e1134 TR	609	data->base = devm_ioremap_resource(&pdev->dev, res);
	610	if (IS_ERR(data->base))
	611	return PTR_ERR(data->base);
d142d6be	612
090bc267	613	data->ops = (const struct usbmisc_ops *)of_id->data;
f40017e0	614	platform_set_drvdata(pdev, data);
d142d6be	615
d142d6be RZ	616	return 0;
	617	}
	618
a7bc2fdf	619	static int usbmisc_imx_remove(struct platform_device *pdev)
d142d6be	620	{
d142d6be RZ	621	return 0;
	622	}
	623
a7bc2fdf MG	624	static struct platform_driver usbmisc_imx_driver = {
	625	.probe = usbmisc_imx_probe,
	626	.remove = usbmisc_imx_remove,
d142d6be	627	.driver = {
a7bc2fdf	628	.name = "usbmisc_imx",
a7bc2fdf	629	.of_match_table = usbmisc_imx_dt_ids,
d142d6be RZ	630	},
	631	};
	632
0404ae03	633	module_platform_driver(usbmisc_imx_driver);
d142d6be	634
a7bc2fdf	635	MODULE_ALIAS("platform:usbmisc-imx");
d142d6be	636	MODULE_LICENSE("GPL v2");
a7bc2fdf	637	MODULE_DESCRIPTION("driver for imx usb non-core registers");
d142d6be	638	MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");