[mirror_ubuntu-bionic-kernel.git] / drivers / usb / chipidea / usbmisc_imx.c

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/delay.h>

#include "ci_hdrc_imx.h"

#define MX25_USB_PHY_CTRL_OFFSET	0x08
#define MX25_BM_EXTERNAL_VBUS_DIVIDER	BIT(23)

#define MX25_EHCI_INTERFACE_SINGLE_UNI	(2 << 0)
#define MX25_EHCI_INTERFACE_DIFF_UNI	(0 << 0)
#define MX25_EHCI_INTERFACE_MASK	(0xf)

#define MX25_OTG_SIC_SHIFT		29
#define MX25_OTG_SIC_MASK		(0x3 << MX25_OTG_SIC_SHIFT)
#define MX25_OTG_PM_BIT			BIT(24)
#define MX25_OTG_PP_BIT			BIT(11)
#define MX25_OTG_OCPOL_BIT		BIT(3)

#define MX25_H1_SIC_SHIFT		21
#define MX25_H1_SIC_MASK		(0x3 << MX25_H1_SIC_SHIFT)
#define MX25_H1_PP_BIT			BIT(18)
#define MX25_H1_PM_BIT			BIT(16)
#define MX25_H1_IPPUE_UP_BIT		BIT(7)
#define MX25_H1_IPPUE_DOWN_BIT		BIT(6)
#define MX25_H1_TLL_BIT			BIT(5)
#define MX25_H1_USBTE_BIT		BIT(4)
#define MX25_H1_OCPOL_BIT		BIT(2)

#define MX27_H1_PM_BIT			BIT(8)
#define MX27_H2_PM_BIT			BIT(16)
#define MX27_OTG_PM_BIT			BIT(24)

#define MX53_USB_OTG_PHY_CTRL_0_OFFSET	0x08
#define MX53_USB_OTG_PHY_CTRL_1_OFFSET	0x0c
#define MX53_USB_UH2_CTRL_OFFSET	0x14
#define MX53_USB_UH3_CTRL_OFFSET	0x18
#define MX53_BM_OVER_CUR_DIS_H1		BIT(5)
#define MX53_BM_OVER_CUR_DIS_OTG	BIT(8)
#define MX53_BM_OVER_CUR_DIS_UHx	BIT(30)
#define MX53_USB_PHYCTRL1_PLLDIV_MASK	0x3
#define MX53_USB_PLL_DIV_24_MHZ		0x01

#define MX6_BM_NON_BURST_SETTING	BIT(1)
#define MX6_BM_OVER_CUR_DIS		BIT(7)
#define MX6_BM_WAKEUP_ENABLE		BIT(10)
#define MX6_BM_ID_WAKEUP		BIT(16)
#define MX6_BM_VBUS_WAKEUP		BIT(17)
#define MX6SX_BM_DPDM_WAKEUP_EN		BIT(29)
#define MX6_BM_WAKEUP_INTR		BIT(31)
#define MX6_USB_OTG1_PHY_CTRL		0x18
/* For imx6dql, it is host-only controller, for later imx6, it is otg's */
#define MX6_USB_OTG2_PHY_CTRL		0x1c
#define MX6SX_USB_VBUS_WAKEUP_SOURCE(v)	(v << 8)
#define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS	MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
#define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID	MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
#define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID	MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
#define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END	MX6SX_USB_VBUS_WAKEUP_SOURCE(3)

#define VF610_OVER_CUR_DIS		BIT(7)

struct usbmisc_ops {
	/* It's called once when probe a usb device */
	int (*init)(struct imx_usbmisc_data *data);
	/* It's called once after adding a usb device */
	int (*post)(struct imx_usbmisc_data *data);
	/* It's called when we need to enable/disable usb wakeup */
	int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled);
};

struct imx_usbmisc {
	void __iomem *base;
	spinlock_t lock;
	const struct usbmisc_ops *ops;
};

static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 val = 0;

	if (data->index > 1)
		return -EINVAL;

	spin_lock_irqsave(&usbmisc->lock, flags);
	switch (data->index) {
	case 0:
		val = readl(usbmisc->base);
		val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
		val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
		val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
		writel(val, usbmisc->base);
		break;
	case 1:
		val = readl(usbmisc->base);
		val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT |  MX25_H1_IPPUE_UP_BIT);
		val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
		val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
			MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT);

		writel(val, usbmisc->base);

		break;
	}
	spin_unlock_irqrestore(&usbmisc->lock, flags);

	return 0;
}

static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	void __iomem *reg;
	unsigned long flags;
	u32 val;

	if (data->index > 2)
		return -EINVAL;

	if (data->evdo) {
		spin_lock_irqsave(&usbmisc->lock, flags);
		reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET;
		val = readl(reg);
		writel(val | MX25_BM_EXTERNAL_VBUS_DIVIDER, reg);
		spin_unlock_irqrestore(&usbmisc->lock, flags);
		usleep_range(5000, 10000); /* needed to stabilize voltage */
	}

	return 0;
}

static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 val;

	switch (data->index) {
	case 0:
		val = MX27_OTG_PM_BIT;
		break;
	case 1:
		val = MX27_H1_PM_BIT;
		break;
	case 2:
		val = MX27_H2_PM_BIT;
		break;
	default:
		return -EINVAL;
	}

	spin_lock_irqsave(&usbmisc->lock, flags);
	if (data->disable_oc)
		val = readl(usbmisc->base) | val;
	else
		val = readl(usbmisc->base) & ~val;
	writel(val, usbmisc->base);
	spin_unlock_irqrestore(&usbmisc->lock, flags);

	return 0;
}

static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	void __iomem *reg = NULL;
	unsigned long flags;
	u32 val = 0;

	if (data->index > 3)
		return -EINVAL;

	/* Select a 24 MHz reference clock for the PHY  */
	val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
	val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
	val |= MX53_USB_PLL_DIV_24_MHZ;
	writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);

	if (data->disable_oc) {
		spin_lock_irqsave(&usbmisc->lock, flags);
		switch (data->index) {
		case 0:
			reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
			val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
			break;
		case 1:
			reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
			val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
			break;
		case 2:
			reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
			val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
			break;
		case 3:
			reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
			val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
			break;
		}
		if (reg && val)
			writel(val, reg);
		spin_unlock_irqrestore(&usbmisc->lock, flags);
	}

	return 0;
}

static int usbmisc_imx6q_set_wakeup
	(struct imx_usbmisc_data *data, bool enabled)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 val;
	u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE |
		MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP);
	int ret = 0;

	if (data->index > 3)
		return -EINVAL;

	spin_lock_irqsave(&usbmisc->lock, flags);
	val = readl(usbmisc->base + data->index * 4);
	if (enabled) {
		val |= wakeup_setting;
		writel(val, usbmisc->base + data->index * 4);
	} else {
		if (val & MX6_BM_WAKEUP_INTR)
			pr_debug("wakeup int at ci_hdrc.%d\n", data->index);
		val &= ~wakeup_setting;
		writel(val, usbmisc->base + data->index * 4);
	}
	spin_unlock_irqrestore(&usbmisc->lock, flags);

	return ret;
}

static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	unsigned long flags;
	u32 reg;

	if (data->index > 3)
		return -EINVAL;

	spin_lock_irqsave(&usbmisc->lock, flags);

	if (data->disable_oc) {
		reg = readl(usbmisc->base + data->index * 4);
		writel(reg | MX6_BM_OVER_CUR_DIS,
			usbmisc->base + data->index * 4);
	}

	/* SoC non-burst setting */
	reg = readl(usbmisc->base + data->index * 4);
	writel(reg | MX6_BM_NON_BURST_SETTING,
			usbmisc->base + data->index * 4);

	spin_unlock_irqrestore(&usbmisc->lock, flags);

	usbmisc_imx6q_set_wakeup(data, false);

	return 0;
}

static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data)
{
	void __iomem *reg = NULL;
	unsigned long flags;
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	u32 val;

	usbmisc_imx6q_init(data);

	if (data->index == 0 || data->index == 1) {
		reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4;
		spin_lock_irqsave(&usbmisc->lock, flags);
		/* Set vbus wakeup source as bvalid */
		val = readl(reg);
		writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
		/*
		 * Disable dp/dm wakeup in device mode when vbus is
		 * not there.
		 */
		val = readl(usbmisc->base + data->index * 4);
		writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
			usbmisc->base + data->index * 4);
		spin_unlock_irqrestore(&usbmisc->lock, flags);
	}

	return 0;
}

static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	u32 reg;

	/*
	 * Vybrid only has one misc register set, but in two different
	 * areas. These is reflected in two instances of this driver.
	 */
	if (data->index >= 1)
		return -EINVAL;

	if (data->disable_oc) {
		reg = readl(usbmisc->base);
		writel(reg | VF610_OVER_CUR_DIS, usbmisc->base);
	}

	return 0;
}

static const struct usbmisc_ops imx25_usbmisc_ops = {
	.init = usbmisc_imx25_init,
	.post = usbmisc_imx25_post,
};

static const struct usbmisc_ops imx27_usbmisc_ops = {
	.init = usbmisc_imx27_init,
};

static const struct usbmisc_ops imx53_usbmisc_ops = {
	.init = usbmisc_imx53_init,
};

static const struct usbmisc_ops imx6q_usbmisc_ops = {
	.set_wakeup = usbmisc_imx6q_set_wakeup,
	.init = usbmisc_imx6q_init,
};

static const struct usbmisc_ops vf610_usbmisc_ops = {
	.init = usbmisc_vf610_init,
};

static const struct usbmisc_ops imx6sx_usbmisc_ops = {
	.set_wakeup = usbmisc_imx6q_set_wakeup,
	.init = usbmisc_imx6sx_init,
};

int imx_usbmisc_init(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc;

	if (!data)
		return 0;

	usbmisc = dev_get_drvdata(data->dev);
	if (!usbmisc->ops->init)
		return 0;
	return usbmisc->ops->init(data);
}
EXPORT_SYMBOL_GPL(imx_usbmisc_init);

int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
{
	struct imx_usbmisc *usbmisc;

	if (!data)
		return 0;

	usbmisc = dev_get_drvdata(data->dev);
	if (!usbmisc->ops->post)
		return 0;
	return usbmisc->ops->post(data);
}
EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);

int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
{
	struct imx_usbmisc *usbmisc;

	if (!data)
		return 0;

	usbmisc = dev_get_drvdata(data->dev);
	if (!usbmisc->ops->set_wakeup)
		return 0;
	return usbmisc->ops->set_wakeup(data, enabled);
}
EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup);

static const struct of_device_id usbmisc_imx_dt_ids[] = {
	{
		.compatible = "fsl,imx25-usbmisc",
		.data = &imx25_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx35-usbmisc",
		.data = &imx25_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx27-usbmisc",
		.data = &imx27_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx51-usbmisc",
		.data = &imx53_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx53-usbmisc",
		.data = &imx53_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx6q-usbmisc",
		.data = &imx6q_usbmisc_ops,
	},
	{
		.compatible = "fsl,vf610-usbmisc",
		.data = &vf610_usbmisc_ops,
	},
	{
		.compatible = "fsl,imx6sx-usbmisc",
		.data = &imx6sx_usbmisc_ops,
	},
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);

static int usbmisc_imx_probe(struct platform_device *pdev)
{
	struct resource	*res;
	struct imx_usbmisc *data;
	struct of_device_id *tmp_dev;

	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	spin_lock_init(&data->lock);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	data->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(data->base))
		return PTR_ERR(data->base);

	tmp_dev = (struct of_device_id *)
		of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
	data->ops = (const struct usbmisc_ops *)tmp_dev->data;
	platform_set_drvdata(pdev, data);

	return 0;
}

static int usbmisc_imx_remove(struct platform_device *pdev)
{
	return 0;
}

static struct platform_driver usbmisc_imx_driver = {
	.probe = usbmisc_imx_probe,
	.remove = usbmisc_imx_remove,
	.driver = {
		.name = "usbmisc_imx",
		.of_match_table = usbmisc_imx_dt_ids,
	 },
};

module_platform_driver(usbmisc_imx_driver);

MODULE_ALIAS("platform:usbmisc-imx");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("driver for imx usb non-core registers");
MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");
Commit	Line	Data
d142d6be RZ	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/of_platform.h>
d142d6be RZ	14	#include <linux/err.h>
d142d6be RZ	15	#include <linux/io.h>
a0685330	16	#include <linux/delay.h>
d142d6be	17
8e22978c	18	#include "ci_hdrc_imx.h"
d142d6be	19
a0685330 MG	20	#define MX25_USB_PHY_CTRL_OFFSET 0x08
	21	#define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23)
	22
72ee92d1 DC	23	#define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
	24	#define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0)
	25	#define MX25_EHCI_INTERFACE_MASK (0xf)
	26
	27	#define MX25_OTG_SIC_SHIFT 29
	28	#define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
	29	#define MX25_OTG_PM_BIT BIT(24)
	30	#define MX25_OTG_PP_BIT BIT(11)
	31	#define MX25_OTG_OCPOL_BIT BIT(3)
	32
	33	#define MX25_H1_SIC_SHIFT 21
	34	#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
	35	#define MX25_H1_PP_BIT BIT(18)
	36	#define MX25_H1_PM_BIT BIT(16)
	37	#define MX25_H1_IPPUE_UP_BIT BIT(7)
	38	#define MX25_H1_IPPUE_DOWN_BIT BIT(6)
	39	#define MX25_H1_TLL_BIT BIT(5)
	40	#define MX25_H1_USBTE_BIT BIT(4)
	41	#define MX25_H1_OCPOL_BIT BIT(2)
	42
9f90e111 AS	43	#define MX27_H1_PM_BIT BIT(8)
	44	#define MX27_H2_PM_BIT BIT(16)
	45	#define MX27_OTG_PM_BIT BIT(24)
	46
f0c910b6	47	#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
33f92a8a	48	#define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
f0c910b6 MG	49	#define MX53_USB_UH2_CTRL_OFFSET 0x14
	50	#define MX53_USB_UH3_CTRL_OFFSET 0x18
	51	#define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
	52	#define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
	53	#define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
33f92a8a FE	54	#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
33f92a8a FE	55	#define MX53_USB_PLL_DIV_24_MHZ 0x01
f0c910b6	56
ed6e5eb5	57	#define MX6_BM_NON_BURST_SETTING BIT(1)
e609108a	58	#define MX6_BM_OVER_CUR_DIS BIT(7)
f636cec5 PC	59	#define MX6_BM_WAKEUP_ENABLE BIT(10)
	60	#define MX6_BM_ID_WAKEUP BIT(16)
	61	#define MX6_BM_VBUS_WAKEUP BIT(17)
8721a752	62	#define MX6SX_BM_DPDM_WAKEUP_EN BIT(29)
f636cec5	63	#define MX6_BM_WAKEUP_INTR BIT(31)
8721a752 PC	64	#define MX6_USB_OTG1_PHY_CTRL 0x18
	65	/* For imx6dql, it is host-only controller, for later imx6, it is otg's */
	66	#define MX6_USB_OTG2_PHY_CTRL 0x1c
	67	#define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8)
	68	#define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
	69	#define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
	70	#define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
	71	#define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3)
d142d6be	72
f40017e0 SA	73	#define VF610_OVER_CUR_DIS BIT(7)
f40017e0 SA	74
05986ba9 SH	75	struct usbmisc_ops {
	76	/* It's called once when probe a usb device */
	77	int (init)(struct imx_usbmisc_data data);
	78	/* It's called once after adding a usb device */
	79	int (post)(struct imx_usbmisc_data data);
f636cec5 PC	80	/* It's called when we need to enable/disable usb wakeup */
f636cec5 PC	81	int (set_wakeup)(struct imx_usbmisc_data data, bool enabled);
05986ba9 SH	82	};
05986ba9 SH	83
a7bc2fdf	84	struct imx_usbmisc {
d142d6be RZ	85	void __iomem *base;
d142d6be RZ	86	spinlock_t lock;
e609108a	87	const struct usbmisc_ops *ops;
d142d6be RZ	88	};
d142d6be RZ	89
72ee92d1 DC	90	static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
72ee92d1 DC	91	{
f40017e0	92	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
72ee92d1 DC	93	unsigned long flags;
	94	u32 val = 0;
	95
	96	if (data->index > 1)
	97	return -EINVAL;
	98
	99	spin_lock_irqsave(&usbmisc->lock, flags);
	100	switch (data->index) {
	101	case 0:
	102	val = readl(usbmisc->base);
	103	val &= ~(MX25_OTG_SIC_MASK \| MX25_OTG_PP_BIT);
	104	val \|= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
	105	val \|= (MX25_OTG_PM_BIT \| MX25_OTG_OCPOL_BIT);
	106	writel(val, usbmisc->base);
	107	break;
	108	case 1:
	109	val = readl(usbmisc->base);
	110	val &= ~(MX25_H1_SIC_MASK \| MX25_H1_PP_BIT \| MX25_H1_IPPUE_UP_BIT);
	111	val \|= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
	112	val \|= (MX25_H1_PM_BIT \| MX25_H1_OCPOL_BIT \| MX25_H1_TLL_BIT \|
	113	MX25_H1_USBTE_BIT \| MX25_H1_IPPUE_DOWN_BIT);
	114
	115	writel(val, usbmisc->base);
	116
	117	break;
	118	}
	119	spin_unlock_irqrestore(&usbmisc->lock, flags);
	120
	121	return 0;
	122	}
	123
05986ba9	124	static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
a0685330	125	{
f40017e0	126	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
a0685330 MG	127	void __iomem *reg;
	128	unsigned long flags;
	129	u32 val;
	130
05986ba9 SH	131	if (data->index > 2)
05986ba9 SH	132	return -EINVAL;
a0685330	133
05986ba9	134	if (data->evdo) {
a0685330	135	spin_lock_irqsave(&usbmisc->lock, flags);
8d1dc4d0	136	reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET;
a0685330 MG	137	val = readl(reg);
	138	writel(val \| MX25_BM_EXTERNAL_VBUS_DIVIDER, reg);
	139	spin_unlock_irqrestore(&usbmisc->lock, flags);
	140	usleep_range(5000, 10000); /* needed to stabilize voltage */
	141	}
	142
	143	return 0;
	144	}
	145
9f90e111 AS	146	static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
9f90e111 AS	147	{
f40017e0	148	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
9f90e111 AS	149	unsigned long flags;
	150	u32 val;
	151
	152	switch (data->index) {
	153	case 0:
	154	val = MX27_OTG_PM_BIT;
	155	break;
	156	case 1:
	157	val = MX27_H1_PM_BIT;
	158	break;
	159	case 2:
	160	val = MX27_H2_PM_BIT;
	161	break;
	162	default:
	163	return -EINVAL;
aa90e990	164	}
9f90e111 AS	165
	166	spin_lock_irqsave(&usbmisc->lock, flags);
	167	if (data->disable_oc)
	168	val = readl(usbmisc->base) \| val;
	169	else
	170	val = readl(usbmisc->base) & ~val;
	171	writel(val, usbmisc->base);
	172	spin_unlock_irqrestore(&usbmisc->lock, flags);
	173
	174	return 0;
	175	}
	176
05986ba9	177	static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
f0c910b6	178	{
f40017e0	179	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
f0c910b6 MG	180	void __iomem *reg = NULL;
	181	unsigned long flags;
	182	u32 val = 0;
	183
05986ba9 SH	184	if (data->index > 3)
05986ba9 SH	185	return -EINVAL;
f0c910b6	186
33f92a8a	187	/* Select a 24 MHz reference clock for the PHY */
4a1d6cf1	188	val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
33f92a8a FE	189	val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
	190	val \|= MX53_USB_PLL_DIV_24_MHZ;
	191	writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
	192
05986ba9	193	if (data->disable_oc) {
f0c910b6	194	spin_lock_irqsave(&usbmisc->lock, flags);
05986ba9	195	switch (data->index) {
f0c910b6 MG	196	case 0:
	197	reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
	198	val = readl(reg) \| MX53_BM_OVER_CUR_DIS_OTG;
	199	break;
	200	case 1:
	201	reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
	202	val = readl(reg) \| MX53_BM_OVER_CUR_DIS_H1;
	203	break;
	204	case 2:
	205	reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
	206	val = readl(reg) \| MX53_BM_OVER_CUR_DIS_UHx;
	207	break;
	208	case 3:
	209	reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
	210	val = readl(reg) \| MX53_BM_OVER_CUR_DIS_UHx;
	211	break;
	212	}
	213	if (reg && val)
	214	writel(val, reg);
	215	spin_unlock_irqrestore(&usbmisc->lock, flags);
	216	}
	217
	218	return 0;
	219	}
	220
f636cec5 PC	221	static int usbmisc_imx6q_set_wakeup
	222	(struct imx_usbmisc_data *data, bool enabled)
	223	{
	224	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	225	unsigned long flags;
	226	u32 val;
	227	u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE \|
	228	MX6_BM_VBUS_WAKEUP \| MX6_BM_ID_WAKEUP);
	229	int ret = 0;
	230
	231	if (data->index > 3)
	232	return -EINVAL;
	233
	234	spin_lock_irqsave(&usbmisc->lock, flags);
	235	val = readl(usbmisc->base + data->index * 4);
	236	if (enabled) {
	237	val \|= wakeup_setting;
	238	writel(val, usbmisc->base + data->index * 4);
	239	} else {
	240	if (val & MX6_BM_WAKEUP_INTR)
	241	pr_debug("wakeup int at ci_hdrc.%d\n", data->index);
	242	val &= ~wakeup_setting;
	243	writel(val, usbmisc->base + data->index * 4);
	244	}
	245	spin_unlock_irqrestore(&usbmisc->lock, flags);
	246
	247	return ret;
	248	}
	249
05986ba9	250	static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
d142d6be	251	{
f40017e0	252	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
d142d6be RZ	253	unsigned long flags;
	254	u32 reg;
	255
05986ba9 SH	256	if (data->index > 3)
05986ba9 SH	257	return -EINVAL;
d142d6be	258
ed6e5eb5 PC	259	spin_lock_irqsave(&usbmisc->lock, flags);
ed6e5eb5 PC	260
05986ba9	261	if (data->disable_oc) {
05986ba9	262	reg = readl(usbmisc->base + data->index * 4);
e609108a	263	writel(reg \| MX6_BM_OVER_CUR_DIS,
05986ba9	264	usbmisc->base + data->index * 4);
d142d6be RZ	265	}
d142d6be RZ	266
ed6e5eb5 PC	267	/* SoC non-burst setting */
	268	reg = readl(usbmisc->base + data->index * 4);
	269	writel(reg \| MX6_BM_NON_BURST_SETTING,
	270	usbmisc->base + data->index * 4);
	271
	272	spin_unlock_irqrestore(&usbmisc->lock, flags);
	273
f636cec5 PC	274	usbmisc_imx6q_set_wakeup(data, false);
f636cec5 PC	275
d142d6be RZ	276	return 0;
	277	}
	278
8721a752 PC	279	static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data)
	280	{
	281	void __iomem *reg = NULL;
	282	unsigned long flags;
	283	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	284	u32 val;
8721a752 PC	285
	286	usbmisc_imx6q_init(data);
	287
	288	if (data->index == 0 \|\| data->index == 1) {
	289	reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4;
	290	spin_lock_irqsave(&usbmisc->lock, flags);
	291	/* Set vbus wakeup source as bvalid */
	292	val = readl(reg);
	293	writel(val \| MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
	294	/*
	295	* Disable dp/dm wakeup in device mode when vbus is
	296	* not there.
	297	*/
	298	val = readl(usbmisc->base + data->index * 4);
	299	writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
	300	usbmisc->base + data->index * 4);
	301	spin_unlock_irqrestore(&usbmisc->lock, flags);
	302	}
	303
1fcefbdf	304	return 0;
8721a752 PC	305	}
8721a752 PC	306
f40017e0 SA	307	static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
	308	{
	309	struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
	310	u32 reg;
	311
	312	/*
	313	* Vybrid only has one misc register set, but in two different
	314	* areas. These is reflected in two instances of this driver.
	315	*/
	316	if (data->index >= 1)
	317	return -EINVAL;
	318
	319	if (data->disable_oc) {
	320	reg = readl(usbmisc->base);
	321	writel(reg \| VF610_OVER_CUR_DIS, usbmisc->base);
	322	}
	323
	324	return 0;
	325	}
	326
a0685330	327	static const struct usbmisc_ops imx25_usbmisc_ops = {
72ee92d1	328	.init = usbmisc_imx25_init,
a0685330 MG	329	.post = usbmisc_imx25_post,
	330	};
	331
9f90e111 AS	332	static const struct usbmisc_ops imx27_usbmisc_ops = {
	333	.init = usbmisc_imx27_init,
	334	};
	335
f0c910b6 MG	336	static const struct usbmisc_ops imx53_usbmisc_ops = {
	337	.init = usbmisc_imx53_init,
	338	};
	339
d142d6be	340	static const struct usbmisc_ops imx6q_usbmisc_ops = {
f636cec5	341	.set_wakeup = usbmisc_imx6q_set_wakeup,
d142d6be RZ	342	.init = usbmisc_imx6q_init,
	343	};
	344
f40017e0 SA	345	static const struct usbmisc_ops vf610_usbmisc_ops = {
	346	.init = usbmisc_vf610_init,
	347	};
	348
8721a752 PC	349	static const struct usbmisc_ops imx6sx_usbmisc_ops = {
	350	.set_wakeup = usbmisc_imx6q_set_wakeup,
	351	.init = usbmisc_imx6sx_init,
	352	};
	353
05986ba9 SH	354	int imx_usbmisc_init(struct imx_usbmisc_data *data)
05986ba9 SH	355	{
a4cf1b14 PC	356	struct imx_usbmisc *usbmisc;
	357
	358	if (!data)
	359	return 0;
f40017e0	360
a4cf1b14	361	usbmisc = dev_get_drvdata(data->dev);
05986ba9 SH	362	if (!usbmisc->ops->init)
	363	return 0;
	364	return usbmisc->ops->init(data);
	365	}
	366	EXPORT_SYMBOL_GPL(imx_usbmisc_init);
	367
	368	int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
	369	{
a4cf1b14 PC	370	struct imx_usbmisc *usbmisc;
	371
	372	if (!data)
	373	return 0;
f40017e0	374
a4cf1b14	375	usbmisc = dev_get_drvdata(data->dev);
05986ba9 SH	376	if (!usbmisc->ops->post)
	377	return 0;
	378	return usbmisc->ops->post(data);
	379	}
	380	EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);
	381
f636cec5 PC	382	int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
	383	{
	384	struct imx_usbmisc *usbmisc;
	385
	386	if (!data)
	387	return 0;
	388
	389	usbmisc = dev_get_drvdata(data->dev);
	390	if (!usbmisc->ops->set_wakeup)
	391	return 0;
	392	return usbmisc->ops->set_wakeup(data, enabled);
	393	}
	394	EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup);
	395
a7bc2fdf	396	static const struct of_device_id usbmisc_imx_dt_ids[] = {
a0685330 MG	397	{
	398	.compatible = "fsl,imx25-usbmisc",
	399	.data = &imx25_usbmisc_ops,
	400	},
72ee92d1 DC	401	{
	402	.compatible = "fsl,imx35-usbmisc",
	403	.data = &imx25_usbmisc_ops,
	404	},
9f90e111 AS	405	{
	406	.compatible = "fsl,imx27-usbmisc",
	407	.data = &imx27_usbmisc_ops,
	408	},
c4962e03 AS	409	{
	410	.compatible = "fsl,imx51-usbmisc",
	411	.data = &imx53_usbmisc_ops,
	412	},
f0c910b6 MG	413	{
	414	.compatible = "fsl,imx53-usbmisc",
	415	.data = &imx53_usbmisc_ops,
	416	},
e609108a MKB	417	{
	418	.compatible = "fsl,imx6q-usbmisc",
	419	.data = &imx6q_usbmisc_ops,
	420	},
f40017e0 SA	421	{
	422	.compatible = "fsl,vf610-usbmisc",
	423	.data = &vf610_usbmisc_ops,
	424	},
8721a752 PC	425	{
	426	.compatible = "fsl,imx6sx-usbmisc",
	427	.data = &imx6sx_usbmisc_ops,
	428	},
d142d6be RZ	429	{ /* sentinel */ }
d142d6be RZ	430	};
269b83dc	431	MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
d142d6be	432
a7bc2fdf	433	static int usbmisc_imx_probe(struct platform_device *pdev)
d142d6be RZ	434	{
d142d6be RZ	435	struct resource *res;
a7bc2fdf	436	struct imx_usbmisc *data;
e609108a	437	struct of_device_id *tmp_dev;
d142d6be	438
d142d6be RZ	439	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	440	if (!data)
	441	return -ENOMEM;
	442
	443	spin_lock_init(&data->lock);
	444
	445	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
148e1134 TR	446	data->base = devm_ioremap_resource(&pdev->dev, res);
	447	if (IS_ERR(data->base))
	448	return PTR_ERR(data->base);
d142d6be	449
e609108a MKB	450	tmp_dev = (struct of_device_id *)
	451	of_match_device(usbmisc_imx_dt_ids, &pdev->dev);
	452	data->ops = (const struct usbmisc_ops *)tmp_dev->data;
f40017e0	453	platform_set_drvdata(pdev, data);
d142d6be	454
d142d6be RZ	455	return 0;
	456	}
	457
a7bc2fdf	458	static int usbmisc_imx_remove(struct platform_device *pdev)
d142d6be	459	{
d142d6be RZ	460	return 0;
	461	}
	462
a7bc2fdf MG	463	static struct platform_driver usbmisc_imx_driver = {
	464	.probe = usbmisc_imx_probe,
	465	.remove = usbmisc_imx_remove,
d142d6be	466	.driver = {
a7bc2fdf	467	.name = "usbmisc_imx",
a7bc2fdf	468	.of_match_table = usbmisc_imx_dt_ids,
d142d6be RZ	469	},
	470	};
	471
0404ae03	472	module_platform_driver(usbmisc_imx_driver);
d142d6be	473
a7bc2fdf	474	MODULE_ALIAS("platform:usbmisc-imx");
d142d6be	475	MODULE_LICENSE("GPL v2");
a7bc2fdf	476	MODULE_DESCRIPTION("driver for imx usb non-core registers");
d142d6be	477	MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");