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91777826
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1/*
2 * Standalone EHCI usb debug driver
3 *
4 * Originally written by:
5 * Eric W. Biederman" <ebiederm@xmission.com> and
6 * Yinghai Lu <yhlu.kernel@gmail.com>
7 *
8 * Changes for early/late printk and HW errata:
9 * Jason Wessel <jason.wessel@windriver.com>
10 * Copyright (C) 2009 Wind River Systems, Inc.
11 *
12 */
13
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14#include <linux/console.h>
15#include <linux/errno.h>
91777826 16#include <linux/module.h>
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17#include <linux/pci_regs.h>
18#include <linux/pci_ids.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/ehci_def.h>
21#include <linux/delay.h>
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22#include <linux/serial_core.h>
23#include <linux/kgdb.h>
24#include <linux/kthread.h>
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25#include <asm/io.h>
26#include <asm/pci-direct.h>
27#include <asm/fixmap.h>
28
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29/* The code here is intended to talk directly to the EHCI debug port
30 * and does not require that you have any kind of USB host controller
31 * drivers or USB device drivers compiled into the kernel.
32 *
33 * If you make a change to anything in here, the following test cases
34 * need to pass where a USB debug device works in the following
35 * configurations.
36 *
37 * 1. boot args: earlyprintk=dbgp
38 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
39 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
40 * 2. boot args: earlyprintk=dbgp,keep
41 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
42 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
43 * 3. boot args: earlyprintk=dbgp console=ttyUSB0
44 * o kernel has CONFIG_USB_EHCI_HCD=y and
45 * CONFIG_USB_SERIAL_DEBUG=y
46 * 4. boot args: earlyprintk=vga,dbgp
47 * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
48 * o kernel compiled with CONFIG_USB_EHCI_HCD=y
49 *
50 * For the 4th configuration you can turn on or off the DBGP_DEBUG
51 * such that you can debug the dbgp device's driver code.
52 */
53
54static int dbgp_phys_port = 1;
56faf0f9 55
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56static struct ehci_caps __iomem *ehci_caps;
57static struct ehci_regs __iomem *ehci_regs;
58static struct ehci_dbg_port __iomem *ehci_debug;
91777826 59static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
df6c5169 60static unsigned int dbgp_endpoint_out;
4fe1da4e 61static unsigned int dbgp_endpoint_in;
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62
63struct ehci_dev {
64 u32 bus;
65 u32 slot;
66 u32 func;
67};
68
69static struct ehci_dev ehci_dev;
70
71#define USB_DEBUG_DEVNUM 127
72
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73#ifdef DBGP_DEBUG
74#define dbgp_printk printk
75static void dbgp_ehci_status(char *str)
76{
77 if (!ehci_debug)
78 return;
79 dbgp_printk("dbgp: %s\n", str);
80 dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control));
81 dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command));
82 dbgp_printk(" ehci conf flg: %08x\n",
83 readl(&ehci_regs->configured_flag));
84 dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status));
85 dbgp_printk(" ehci portsc : %08x\n",
86 readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
87}
88#else
89static inline void dbgp_ehci_status(char *str) { }
90static inline void dbgp_printk(const char *fmt, ...) { }
91#endif
92
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93static inline u32 dbgp_len_update(u32 x, u32 len)
94{
95 return (x & ~0x0f) | (len & 0x0f);
96}
97
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98#ifdef CONFIG_KGDB
99static struct kgdb_io kgdbdbgp_io_ops;
100#define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops)
101#else
102#define dbgp_kgdb_mode (0)
103#endif
104
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105/*
106 * USB Packet IDs (PIDs)
107 */
108
109/* token */
110#define USB_PID_OUT 0xe1
111#define USB_PID_IN 0x69
112#define USB_PID_SOF 0xa5
113#define USB_PID_SETUP 0x2d
114/* handshake */
115#define USB_PID_ACK 0xd2
116#define USB_PID_NAK 0x5a
117#define USB_PID_STALL 0x1e
118#define USB_PID_NYET 0x96
119/* data */
120#define USB_PID_DATA0 0xc3
121#define USB_PID_DATA1 0x4b
122#define USB_PID_DATA2 0x87
123#define USB_PID_MDATA 0x0f
124/* Special */
125#define USB_PID_PREAMBLE 0x3c
126#define USB_PID_ERR 0x3c
127#define USB_PID_SPLIT 0x78
128#define USB_PID_PING 0xb4
129#define USB_PID_UNDEF_0 0xf0
130
131#define USB_PID_DATA_TOGGLE 0x88
132#define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
133
134#define PCI_CAP_ID_EHCI_DEBUG 0xa
135
136#define HUB_ROOT_RESET_TIME 50 /* times are in msec */
137#define HUB_SHORT_RESET_TIME 10
138#define HUB_LONG_RESET_TIME 200
139#define HUB_RESET_TIMEOUT 500
140
141#define DBGP_MAX_PACKET 8
91777826 142#define DBGP_TIMEOUT (250 * 1000)
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143#define DBGP_LOOPS 1000
144
145static inline u32 dbgp_pid_write_update(u32 x, u32 tok)
146{
147 static int data0 = USB_PID_DATA1;
148 data0 ^= USB_PID_DATA_TOGGLE;
149 return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff);
150}
151
152static inline u32 dbgp_pid_read_update(u32 x, u32 tok)
153{
154 return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff);
155}
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156
157static int dbgp_wait_until_complete(void)
158{
159 u32 ctrl;
91777826 160 int loop = DBGP_TIMEOUT;
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161
162 do {
163 ctrl = readl(&ehci_debug->control);
164 /* Stop when the transaction is finished */
165 if (ctrl & DBGP_DONE)
166 break;
91777826 167 udelay(1);
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168 } while (--loop > 0);
169
170 if (!loop)
91777826 171 return -DBGP_TIMEOUT;
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172
173 /*
174 * Now that we have observed the completed transaction,
175 * clear the done bit.
176 */
177 writel(ctrl | DBGP_DONE, &ehci_debug->control);
178 return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
179}
180
91777826 181static inline void dbgp_mdelay(int ms)
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182{
183 int i;
184
185 while (ms--) {
186 for (i = 0; i < 1000; i++)
187 outb(0x1, 0x80);
188 }
189}
190
191static void dbgp_breath(void)
192{
193 /* Sleep to give the debug port a chance to breathe */
194}
195
4fe1da4e 196static int dbgp_wait_until_done(unsigned ctrl, int loop)
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197{
198 u32 pids, lpid;
199 int ret;
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200
201retry:
202 writel(ctrl | DBGP_GO, &ehci_debug->control);
203 ret = dbgp_wait_until_complete();
204 pids = readl(&ehci_debug->pids);
205 lpid = DBGP_PID_GET(pids);
206
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207 if (ret < 0) {
208 /* A -DBGP_TIMEOUT failure here means the device has
209 * failed, perhaps because it was unplugged, in which
210 * case we do not want to hang the system so the dbgp
211 * will be marked as unsafe to use. EHCI reset is the
212 * only way to recover if you unplug the dbgp device.
213 */
214 if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
215 dbgp_not_safe = 1;
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216 if (ret == -DBGP_ERR_BAD && --loop > 0)
217 goto retry;
df6c5169 218 return ret;
91777826 219 }
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220
221 /*
222 * If the port is getting full or it has dropped data
223 * start pacing ourselves, not necessary but it's friendly.
224 */
225 if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
226 dbgp_breath();
227
228 /* If I get a NACK reissue the transmission */
229 if (lpid == USB_PID_NAK) {
230 if (--loop > 0)
231 goto retry;
232 }
233
234 return ret;
235}
236
91777826 237static inline void dbgp_set_data(const void *buf, int size)
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238{
239 const unsigned char *bytes = buf;
240 u32 lo, hi;
241 int i;
242
243 lo = hi = 0;
244 for (i = 0; i < 4 && i < size; i++)
245 lo |= bytes[i] << (8*i);
246 for (; i < 8 && i < size; i++)
247 hi |= bytes[i] << (8*(i - 4));
248 writel(lo, &ehci_debug->data03);
249 writel(hi, &ehci_debug->data47);
250}
251
91777826 252static inline void dbgp_get_data(void *buf, int size)
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253{
254 unsigned char *bytes = buf;
255 u32 lo, hi;
256 int i;
257
258 lo = readl(&ehci_debug->data03);
259 hi = readl(&ehci_debug->data47);
260 for (i = 0; i < 4 && i < size; i++)
261 bytes[i] = (lo >> (8*i)) & 0xff;
262 for (; i < 8 && i < size; i++)
263 bytes[i] = (hi >> (8*(i - 4))) & 0xff;
264}
265
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266static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
267 const char *bytes, int size)
df6c5169 268{
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269 int ret;
270 u32 addr;
68d2956a 271 u32 pids, ctrl;
df6c5169 272
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273 if (size > DBGP_MAX_PACKET)
274 return -1;
275
276 addr = DBGP_EPADDR(devnum, endpoint);
277
df6c5169 278 pids = readl(&ehci_debug->pids);
815e173e 279 pids = dbgp_pid_write_update(pids, USB_PID_OUT);
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280
281 ctrl = readl(&ehci_debug->control);
282 ctrl = dbgp_len_update(ctrl, size);
283 ctrl |= DBGP_OUT;
284 ctrl |= DBGP_GO;
285
286 dbgp_set_data(bytes, size);
287 writel(addr, &ehci_debug->address);
288 writel(pids, &ehci_debug->pids);
4fe1da4e 289 ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
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290
291 return ret;
292}
293
91777826 294static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
4fe1da4e 295 int size, int loops)
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296{
297 u32 pids, addr, ctrl;
298 int ret;
299
300 if (size > DBGP_MAX_PACKET)
301 return -1;
302
303 addr = DBGP_EPADDR(devnum, endpoint);
304
305 pids = readl(&ehci_debug->pids);
815e173e 306 pids = dbgp_pid_read_update(pids, USB_PID_IN);
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307
308 ctrl = readl(&ehci_debug->control);
309 ctrl = dbgp_len_update(ctrl, size);
310 ctrl &= ~DBGP_OUT;
311 ctrl |= DBGP_GO;
312
313 writel(addr, &ehci_debug->address);
314 writel(pids, &ehci_debug->pids);
4fe1da4e 315 ret = dbgp_wait_until_done(ctrl, loops);
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316 if (ret < 0)
317 return ret;
318
319 if (size > ret)
320 size = ret;
321 dbgp_get_data(data, size);
322 return ret;
323}
324
91777826 325static int dbgp_control_msg(unsigned devnum, int requesttype,
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326 int request, int value, int index, void *data, int size)
327{
328 u32 pids, addr, ctrl;
329 struct usb_ctrlrequest req;
330 int read;
331 int ret;
332
333 read = (requesttype & USB_DIR_IN) != 0;
334 if (size > (read ? DBGP_MAX_PACKET:0))
335 return -1;
336
337 /* Compute the control message */
338 req.bRequestType = requesttype;
339 req.bRequest = request;
340 req.wValue = cpu_to_le16(value);
341 req.wIndex = cpu_to_le16(index);
342 req.wLength = cpu_to_le16(size);
343
344 pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
345 addr = DBGP_EPADDR(devnum, 0);
346
347 ctrl = readl(&ehci_debug->control);
348 ctrl = dbgp_len_update(ctrl, sizeof(req));
349 ctrl |= DBGP_OUT;
350 ctrl |= DBGP_GO;
351
352 /* Send the setup message */
353 dbgp_set_data(&req, sizeof(req));
354 writel(addr, &ehci_debug->address);
355 writel(pids, &ehci_debug->pids);
4fe1da4e 356 ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
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357 if (ret < 0)
358 return ret;
359
360 /* Read the result */
4fe1da4e 361 return dbgp_bulk_read(devnum, 0, data, size, DBGP_LOOPS);
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362}
363
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364/* Find a PCI capability */
365static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
366{
367 u8 pos;
368 int bytes;
369
370 if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
371 PCI_STATUS_CAP_LIST))
372 return 0;
373
374 pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
375 for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
376 u8 id;
377
378 pos &= ~3;
379 id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
380 if (id == 0xff)
381 break;
382 if (id == cap)
383 return pos;
384
385 pos = read_pci_config_byte(num, slot, func,
386 pos+PCI_CAP_LIST_NEXT);
387 }
388 return 0;
389}
390
391static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
392{
393 u32 class;
394
395 class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
396 if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
397 return 0;
398
399 return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
400}
401
402static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
403{
404 u32 bus, slot, func;
405
406 for (bus = 0; bus < 256; bus++) {
407 for (slot = 0; slot < 32; slot++) {
408 for (func = 0; func < 8; func++) {
409 unsigned cap;
410
411 cap = __find_dbgp(bus, slot, func);
412
413 if (!cap)
414 continue;
415 if (ehci_num-- != 0)
416 continue;
417 *rbus = bus;
418 *rslot = slot;
419 *rfunc = func;
420 return cap;
421 }
422 }
423 }
424 return 0;
425}
426
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427static int dbgp_ehci_startup(void)
428{
429 u32 ctrl, cmd, status;
430 int loop;
431
432 /* Claim ownership, but do not enable yet */
433 ctrl = readl(&ehci_debug->control);
434 ctrl |= DBGP_OWNER;
435 ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
436 writel(ctrl, &ehci_debug->control);
437 udelay(1);
438
439 dbgp_ehci_status("EHCI startup");
440 /* Start the ehci running */
441 cmd = readl(&ehci_regs->command);
442 cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
443 cmd |= CMD_RUN;
444 writel(cmd, &ehci_regs->command);
445
446 /* Ensure everything is routed to the EHCI */
447 writel(FLAG_CF, &ehci_regs->configured_flag);
448
449 /* Wait until the controller is no longer halted */
450 loop = 10;
451 do {
452 status = readl(&ehci_regs->status);
453 if (!(status & STS_HALT))
454 break;
455 udelay(1);
456 } while (--loop > 0);
457
458 if (!loop) {
459 dbgp_printk("ehci can not be started\n");
460 return -ENODEV;
461 }
462 dbgp_printk("ehci started\n");
463 return 0;
464}
465
466static int dbgp_ehci_controller_reset(void)
467{
468 int loop = 250 * 1000;
469 u32 cmd;
470
471 /* Reset the EHCI controller */
472 cmd = readl(&ehci_regs->command);
473 cmd |= CMD_RESET;
474 writel(cmd, &ehci_regs->command);
475 do {
476 cmd = readl(&ehci_regs->command);
477 } while ((cmd & CMD_RESET) && (--loop > 0));
478
479 if (!loop) {
480 dbgp_printk("can not reset ehci\n");
481 return -1;
482 }
483 dbgp_ehci_status("ehci reset done");
484 return 0;
485}
486static int ehci_wait_for_port(int port);
487/* Return 0 on success
488 * Return -ENODEV for any general failure
489 * Return -EIO if wait for port fails
490 */
491int dbgp_external_startup(void)
492{
493 int devnum;
494 struct usb_debug_descriptor dbgp_desc;
495 int ret;
aab2d408 496 u32 ctrl, portsc, cmd;
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497 int dbg_port = dbgp_phys_port;
498 int tries = 3;
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499 int reset_port_tries = 1;
500 int try_hard_once = 1;
91777826 501
aab2d408 502try_port_reset_again:
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503 ret = dbgp_ehci_startup();
504 if (ret)
505 return ret;
506
507 /* Wait for a device to show up in the debug port */
508 ret = ehci_wait_for_port(dbg_port);
509 if (ret < 0) {
510 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
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511 if (!(portsc & PORT_CONNECT) && try_hard_once) {
512 /* Last ditch effort to try to force enable
513 * the debug device by using the packet test
514 * ehci command to try and wake it up. */
515 try_hard_once = 0;
516 cmd = readl(&ehci_regs->command);
517 cmd &= ~CMD_RUN;
518 writel(cmd, &ehci_regs->command);
519 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
520 portsc |= PORT_TEST_PKT;
521 writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
522 dbgp_ehci_status("Trying to force debug port online");
523 mdelay(50);
524 dbgp_ehci_controller_reset();
525 goto try_port_reset_again;
526 } else if (reset_port_tries--) {
527 goto try_port_reset_again;
528 }
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529 dbgp_printk("No device found in debug port\n");
530 return -EIO;
531 }
532 dbgp_ehci_status("wait for port done");
533
534 /* Enable the debug port */
535 ctrl = readl(&ehci_debug->control);
536 ctrl |= DBGP_CLAIM;
537 writel(ctrl, &ehci_debug->control);
538 ctrl = readl(&ehci_debug->control);
539 if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
540 dbgp_printk("No device in debug port\n");
541 writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
542 return -ENODEV;
543 }
544 dbgp_ehci_status("debug ported enabled");
545
546 /* Completely transfer the debug device to the debug controller */
547 portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
548 portsc &= ~PORT_PE;
549 writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
550
551 dbgp_mdelay(100);
552
553try_again:
554 /* Find the debug device and make it device number 127 */
555 for (devnum = 0; devnum <= 127; devnum++) {
556 ret = dbgp_control_msg(devnum,
557 USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
558 USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
559 &dbgp_desc, sizeof(dbgp_desc));
560 if (ret > 0)
561 break;
562 }
563 if (devnum > 127) {
564 dbgp_printk("Could not find attached debug device\n");
565 goto err;
566 }
567 if (ret < 0) {
568 dbgp_printk("Attached device is not a debug device\n");
569 goto err;
570 }
571 dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
4fe1da4e 572 dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
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573
574 /* Move the device to 127 if it isn't already there */
575 if (devnum != USB_DEBUG_DEVNUM) {
576 ret = dbgp_control_msg(devnum,
577 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
578 USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
579 if (ret < 0) {
580 dbgp_printk("Could not move attached device to %d\n",
581 USB_DEBUG_DEVNUM);
582 goto err;
583 }
584 devnum = USB_DEBUG_DEVNUM;
585 dbgp_printk("debug device renamed to 127\n");
586 }
587
588 /* Enable the debug interface */
589 ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
590 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
591 USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
592 if (ret < 0) {
593 dbgp_printk(" Could not enable the debug device\n");
594 goto err;
595 }
596 dbgp_printk("debug interface enabled\n");
597 /* Perform a small write to get the even/odd data state in sync
598 */
599 ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
600 if (ret < 0) {
601 dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
602 goto err;
603 }
ef58d97a 604 dbgp_printk("small write done\n");
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605 dbgp_not_safe = 0;
606
607 return 0;
608err:
609 if (tries--)
610 goto try_again;
611 return -ENODEV;
612}
613EXPORT_SYMBOL_GPL(dbgp_external_startup);
614
40b52371 615static int ehci_reset_port(int port)
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616{
617 u32 portsc;
618 u32 delay_time, delay;
619 int loop;
620
91777826 621 dbgp_ehci_status("reset port");
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622 /* Reset the usb debug port */
623 portsc = readl(&ehci_regs->port_status[port - 1]);
624 portsc &= ~PORT_PE;
625 portsc |= PORT_RESET;
626 writel(portsc, &ehci_regs->port_status[port - 1]);
627
628 delay = HUB_ROOT_RESET_TIME;
629 for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
630 delay_time += delay) {
631 dbgp_mdelay(delay);
df6c5169 632 portsc = readl(&ehci_regs->port_status[port - 1]);
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633 if (!(portsc & PORT_RESET))
634 break;
635 }
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636 if (portsc & PORT_RESET) {
637 /* force reset to complete */
56faf0f9 638 loop = 100 * 1000;
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639 writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
640 &ehci_regs->port_status[port - 1]);
641 do {
56faf0f9 642 udelay(1);
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643 portsc = readl(&ehci_regs->port_status[port-1]);
644 } while ((portsc & PORT_RESET) && (--loop > 0));
645 }
646
647 /* Device went away? */
648 if (!(portsc & PORT_CONNECT))
649 return -ENOTCONN;
650
25985edc 651 /* bomb out completely if something weird happened */
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652 if ((portsc & PORT_CSC))
653 return -EINVAL;
654
655 /* If we've finished resetting, then break out of the loop */
656 if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
657 return 0;
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658 return -EBUSY;
659}
660
91777826 661static int ehci_wait_for_port(int port)
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JW
662{
663 u32 status;
664 int ret, reps;
665
56faf0f9 666 for (reps = 0; reps < 300; reps++) {
df6c5169 667 status = readl(&ehci_regs->status);
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JW
668 if (status & STS_PCD)
669 break;
670 dbgp_mdelay(1);
df6c5169 671 }
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672 ret = ehci_reset_port(port);
673 if (ret == 0)
674 return 0;
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675 return -ENOTCONN;
676}
677
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678typedef void (*set_debug_port_t)(int port);
679
680static void __init default_set_debug_port(int port)
681{
682}
683
684static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
685
686static void __init nvidia_set_debug_port(int port)
687{
688 u32 dword;
689 dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
690 0x74);
691 dword &= ~(0x0f<<12);
692 dword |= ((port & 0x0f)<<12);
693 write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
694 dword);
695 dbgp_printk("set debug port to %d\n", port);
696}
697
698static void __init detect_set_debug_port(void)
699{
700 u32 vendorid;
701
702 vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
703 0x00);
704
705 if ((vendorid & 0xffff) == 0x10de) {
706 dbgp_printk("using nvidia set_debug_port\n");
707 set_debug_port = nvidia_set_debug_port;
708 }
709}
710
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711/* The code in early_ehci_bios_handoff() is derived from the usb pci
712 * quirk initialization, but altered so as to use the early PCI
713 * routines. */
714#define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
715#define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
716static void __init early_ehci_bios_handoff(void)
717{
718 u32 hcc_params = readl(&ehci_caps->hcc_params);
719 int offset = (hcc_params >> 8) & 0xff;
720 u32 cap;
721 int msec;
722
723 if (!offset)
724 return;
725
726 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
727 ehci_dev.func, offset);
728 dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
729
730 if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
731 dbgp_printk("dbgp: BIOS handoff\n");
732 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
733 ehci_dev.func, offset + 3, 1);
734 }
735
736 /* if boot firmware now owns EHCI, spin till it hands it over. */
737 msec = 1000;
738 while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
739 mdelay(10);
740 msec -= 10;
741 cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
742 ehci_dev.func, offset);
743 }
744
745 if (cap & EHCI_USBLEGSUP_BIOS) {
746 /* well, possibly buggy BIOS... try to shut it down,
747 * and hope nothing goes too wrong */
748 dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
749 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
750 ehci_dev.func, offset + 2, 0);
751 }
752
753 /* just in case, always disable EHCI SMIs */
754 write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
755 offset + EHCI_USBLEGCTLSTS, 0);
756}
757
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758static int __init ehci_setup(void)
759{
91777826 760 u32 ctrl, portsc, hcs_params;
df6c5169 761 u32 debug_port, new_debug_port = 0, n_ports;
df6c5169 762 int ret, i;
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763 int port_map_tried;
764 int playtimes = 3;
765
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766 early_ehci_bios_handoff();
767
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768try_next_time:
769 port_map_tried = 0;
770
771try_next_port:
772
773 hcs_params = readl(&ehci_caps->hcs_params);
774 debug_port = HCS_DEBUG_PORT(hcs_params);
91777826 775 dbgp_phys_port = debug_port;
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776 n_ports = HCS_N_PORTS(hcs_params);
777
778 dbgp_printk("debug_port: %d\n", debug_port);
779 dbgp_printk("n_ports: %d\n", n_ports);
91777826 780 dbgp_ehci_status("");
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781
782 for (i = 1; i <= n_ports; i++) {
783 portsc = readl(&ehci_regs->port_status[i-1]);
784 dbgp_printk("portstatus%d: %08x\n", i, portsc);
785 }
786
787 if (port_map_tried && (new_debug_port != debug_port)) {
788 if (--playtimes) {
789 set_debug_port(new_debug_port);
790 goto try_next_time;
791 }
792 return -1;
793 }
794
91777826
JW
795 /* Only reset the controller if it is not already in the
796 * configured state */
797 if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
798 if (dbgp_ehci_controller_reset() != 0)
799 return -1;
800 } else {
801 dbgp_ehci_status("ehci skip - already configured");
df6c5169 802 }
df6c5169 803
91777826
JW
804 ret = dbgp_external_startup();
805 if (ret == -EIO)
df6c5169 806 goto next_debug_port;
df6c5169 807
df6c5169 808 if (ret < 0) {
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JW
809 /* Things didn't work so remove my claim */
810 ctrl = readl(&ehci_debug->control);
811 ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
812 writel(ctrl, &ehci_debug->control);
813 return -1;
df6c5169 814 }
df6c5169 815 return 0;
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816
817next_debug_port:
818 port_map_tried |= (1<<(debug_port - 1));
819 new_debug_port = ((debug_port-1+1)%n_ports) + 1;
820 if (port_map_tried != ((1<<n_ports) - 1)) {
821 set_debug_port(new_debug_port);
822 goto try_next_port;
823 }
824 if (--playtimes) {
825 set_debug_port(new_debug_port);
826 goto try_next_time;
827 }
828
829 return -1;
830}
831
832int __init early_dbgp_init(char *s)
833{
834 u32 debug_port, bar, offset;
835 u32 bus, slot, func, cap;
836 void __iomem *ehci_bar;
837 u32 dbgp_num;
838 u32 bar_val;
839 char *e;
840 int ret;
841 u8 byte;
842
843 if (!early_pci_allowed())
844 return -1;
845
846 dbgp_num = 0;
847 if (*s)
848 dbgp_num = simple_strtoul(s, &e, 10);
849 dbgp_printk("dbgp_num: %d\n", dbgp_num);
850
851 cap = find_dbgp(dbgp_num, &bus, &slot, &func);
852 if (!cap)
853 return -1;
854
855 dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
856 func);
857
858 debug_port = read_pci_config(bus, slot, func, cap);
859 bar = (debug_port >> 29) & 0x7;
860 bar = (bar * 4) + 0xc;
861 offset = (debug_port >> 16) & 0xfff;
862 dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
863 if (bar != PCI_BASE_ADDRESS_0) {
864 dbgp_printk("only debug ports on bar 1 handled.\n");
865
866 return -1;
867 }
868
869 bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
870 dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
871 if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
872 dbgp_printk("only simple 32bit mmio bars supported\n");
873
874 return -1;
875 }
876
877 /* double check if the mem space is enabled */
878 byte = read_pci_config_byte(bus, slot, func, 0x04);
879 if (!(byte & 0x2)) {
880 byte |= 0x02;
881 write_pci_config_byte(bus, slot, func, 0x04, byte);
882 dbgp_printk("mmio for ehci enabled\n");
883 }
884
885 /*
886 * FIXME I don't have the bar size so just guess PAGE_SIZE is more
887 * than enough. 1K is the biggest I have seen.
888 */
889 set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
890 ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
891 ehci_bar += bar_val & ~PAGE_MASK;
892 dbgp_printk("ehci_bar: %p\n", ehci_bar);
893
894 ehci_caps = ehci_bar;
895 ehci_regs = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase));
896 ehci_debug = ehci_bar + offset;
897 ehci_dev.bus = bus;
898 ehci_dev.slot = slot;
899 ehci_dev.func = func;
900
901 detect_set_debug_port();
902
903 ret = ehci_setup();
904 if (ret < 0) {
905 dbgp_printk("ehci_setup failed\n");
906 ehci_debug = NULL;
907
908 return -1;
909 }
91777826 910 dbgp_ehci_status("early_init_complete");
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911
912 return 0;
913}
914
915static void early_dbgp_write(struct console *con, const char *str, u32 n)
916{
917 int chunk, ret;
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918 char buf[DBGP_MAX_PACKET];
919 int use_cr = 0;
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920 u32 cmd, ctrl;
921 int reset_run = 0;
df6c5169 922
91777826 923 if (!ehci_debug || dbgp_not_safe)
df6c5169 924 return;
91777826
JW
925
926 cmd = readl(&ehci_regs->command);
927 if (unlikely(!(cmd & CMD_RUN))) {
928 /* If the ehci controller is not in the run state do extended
929 * checks to see if the acpi or some other initialization also
930 * reset the ehci debug port */
931 ctrl = readl(&ehci_debug->control);
932 if (!(ctrl & DBGP_ENABLED)) {
933 dbgp_not_safe = 1;
934 dbgp_external_startup();
935 } else {
936 cmd |= CMD_RUN;
937 writel(cmd, &ehci_regs->command);
938 reset_run = 1;
939 }
940 }
df6c5169 941 while (n > 0) {
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942 for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
943 str++, chunk++, n--) {
944 if (!use_cr && *str == '\n') {
945 use_cr = 1;
946 buf[chunk] = '\r';
947 str--;
948 n++;
949 continue;
950 }
951 if (use_cr)
952 use_cr = 0;
953 buf[chunk] = *str;
954 }
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JW
955 if (chunk > 0) {
956 ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
957 dbgp_endpoint_out, buf, chunk);
958 }
959 }
960 if (unlikely(reset_run)) {
961 cmd = readl(&ehci_regs->command);
962 cmd &= ~CMD_RUN;
963 writel(cmd, &ehci_regs->command);
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964 }
965}
966
967struct console early_dbgp_console = {
968 .name = "earlydbg",
969 .write = early_dbgp_write,
970 .flags = CON_PRINTBUFFER,
971 .index = -1,
972};
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973
974int dbgp_reset_prep(void)
975{
976 u32 ctrl;
977
978 dbgp_not_safe = 1;
979 if (!ehci_debug)
980 return 0;
981
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JW
982 if ((early_dbgp_console.index != -1 &&
983 !(early_dbgp_console.flags & CON_BOOT)) ||
984 dbgp_kgdb_mode)
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985 return 1;
986 /* This means the console is not initialized, or should get
987 * shutdown so as to allow for reuse of the usb device, which
988 * means it is time to shutdown the usb debug port. */
989 ctrl = readl(&ehci_debug->control);
990 if (ctrl & DBGP_ENABLED) {
991 ctrl &= ~(DBGP_CLAIM);
992 writel(ctrl, &ehci_debug->control);
993 }
994 return 0;
995}
996EXPORT_SYMBOL_GPL(dbgp_reset_prep);
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997
998#ifdef CONFIG_KGDB
999
1000static char kgdbdbgp_buf[DBGP_MAX_PACKET];
1001static int kgdbdbgp_buf_sz;
1002static int kgdbdbgp_buf_idx;
1003static int kgdbdbgp_loop_cnt = DBGP_LOOPS;
1004
1005static int kgdbdbgp_read_char(void)
1006{
1007 int ret;
1008
1009 if (kgdbdbgp_buf_idx < kgdbdbgp_buf_sz) {
1010 char ch = kgdbdbgp_buf[kgdbdbgp_buf_idx++];
1011 return ch;
1012 }
1013
1014 ret = dbgp_bulk_read(USB_DEBUG_DEVNUM, dbgp_endpoint_in,
1015 &kgdbdbgp_buf, DBGP_MAX_PACKET,
1016 kgdbdbgp_loop_cnt);
1017 if (ret <= 0)
1018 return NO_POLL_CHAR;
1019 kgdbdbgp_buf_sz = ret;
1020 kgdbdbgp_buf_idx = 1;
1021 return kgdbdbgp_buf[0];
1022}
1023
1024static void kgdbdbgp_write_char(u8 chr)
1025{
1026 early_dbgp_write(NULL, &chr, 1);
1027}
1028
1029static struct kgdb_io kgdbdbgp_io_ops = {
1030 .name = "kgdbdbgp",
1031 .read_char = kgdbdbgp_read_char,
1032 .write_char = kgdbdbgp_write_char,
1033};
1034
1035static int kgdbdbgp_wait_time;
1036
1037static int __init kgdbdbgp_parse_config(char *str)
1038{
1039 char *ptr;
1040
1041 if (!ehci_debug) {
1042 if (early_dbgp_init(str))
1043 return -1;
1044 }
1045 ptr = strchr(str, ',');
1046 if (ptr) {
1047 ptr++;
1048 kgdbdbgp_wait_time = simple_strtoul(ptr, &ptr, 10);
1049 }
1050 kgdb_register_io_module(&kgdbdbgp_io_ops);
1051 kgdbdbgp_io_ops.is_console = early_dbgp_console.index != -1;
1052
1053 return 0;
1054}
1055early_param("kgdbdbgp", kgdbdbgp_parse_config);
1056
1057static int kgdbdbgp_reader_thread(void *ptr)
1058{
1059 int ret;
1060
1061 while (readl(&ehci_debug->control) & DBGP_ENABLED) {
1062 kgdbdbgp_loop_cnt = 1;
1063 ret = kgdbdbgp_read_char();
1064 kgdbdbgp_loop_cnt = DBGP_LOOPS;
1065 if (ret != NO_POLL_CHAR) {
1066 if (ret == 0x3 || ret == '$') {
1067 if (ret == '$')
1068 kgdbdbgp_buf_idx--;
1069 kgdb_breakpoint();
1070 }
1071 continue;
1072 }
1073 schedule_timeout_interruptible(kgdbdbgp_wait_time * HZ);
1074 }
1075 return 0;
1076}
1077
1078static int __init kgdbdbgp_start_thread(void)
1079{
1080 if (dbgp_kgdb_mode && kgdbdbgp_wait_time)
1081 kthread_run(kgdbdbgp_reader_thread, NULL, "%s", "dbgp");
1082
1083 return 0;
1084}
1085module_init(kgdbdbgp_start_thread);
1086#endif /* CONFIG_KGDB */