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ARM: 6209/2: at91: Add support for Bluewater Systems Snapper 9260/9G20 modules
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CommitLineData
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1/*
2 * at91_udc -- driver for at91-series USB peripheral controller
3 *
4 * Copyright (C) 2004 by Thomas Rathbone
5 * Copyright (C) 2005 by HP Labs
6 * Copyright (C) 2005 by David Brownell
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the
20 * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
21 * Boston, MA 02111-1307, USA.
22 */
23
f3db6e82 24#undef VERBOSE_DEBUG
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25#undef PACKET_TRACE
26
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27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/platform_device.h>
30#include <linux/delay.h>
31#include <linux/ioport.h>
bae4bd84 32#include <linux/slab.h>
bae4bd84
DB
33#include <linux/errno.h>
34#include <linux/init.h>
35#include <linux/list.h>
36#include <linux/interrupt.h>
37#include <linux/proc_fs.h>
38#include <linux/clk.h>
5f848137 39#include <linux/usb/ch9.h>
9454a57a 40#include <linux/usb/gadget.h>
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DB
41
42#include <asm/byteorder.h>
a09e64fb 43#include <mach/hardware.h>
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DB
44#include <asm/io.h>
45#include <asm/irq.h>
46#include <asm/system.h>
f3db6e82 47#include <asm/gpio.h>
bae4bd84 48
a09e64fb
RK
49#include <mach/board.h>
50#include <mach/cpu.h>
51#include <mach/at91sam9261_matrix.h>
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DB
52
53#include "at91_udc.h"
54
55
56/*
57 * This controller is simple and PIO-only. It's used in many AT91-series
8b2e7668
DB
58 * full speed USB controllers, including the at91rm9200 (arm920T, with MMU),
59 * at91sam926x (arm926ejs, with MMU), and several no-mmu versions.
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DB
60 *
61 * This driver expects the board has been wired with two GPIOs suppporting
62 * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the
8b2e7668
DB
63 * testing hasn't covered such cases.)
64 *
65 * The pullup is most important (so it's integrated on sam926x parts). It
bae4bd84 66 * provides software control over whether the host enumerates the device.
8b2e7668 67 *
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68 * The VBUS sensing helps during enumeration, and allows both USB clocks
69 * (and the transceiver) to stay gated off until they're necessary, saving
8b2e7668
DB
70 * power. During USB suspend, the 48 MHz clock is gated off in hardware;
71 * it may also be gated off by software during some Linux sleep states.
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DB
72 */
73
8b2e7668 74#define DRIVER_VERSION "3 May 2006"
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DB
75
76static const char driver_name [] = "at91_udc";
77static const char ep0name[] = "ep0";
78
bae4bd84 79
4f4c5e36
HH
80#define at91_udp_read(udc, reg) \
81 __raw_readl((udc)->udp_baseaddr + (reg))
82#define at91_udp_write(udc, reg, val) \
83 __raw_writel((val), (udc)->udp_baseaddr + (reg))
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DB
84
85/*-------------------------------------------------------------------------*/
86
87#ifdef CONFIG_USB_GADGET_DEBUG_FILES
88
89#include <linux/seq_file.h>
90
91static const char debug_filename[] = "driver/udc";
92
93#define FOURBITS "%s%s%s%s"
94#define EIGHTBITS FOURBITS FOURBITS
95
96static void proc_ep_show(struct seq_file *s, struct at91_ep *ep)
97{
98 static char *types[] = {
99 "control", "out-iso", "out-bulk", "out-int",
100 "BOGUS", "in-iso", "in-bulk", "in-int"};
101
102 u32 csr;
103 struct at91_request *req;
104 unsigned long flags;
4f4c5e36 105 struct at91_udc *udc = ep->udc;
bae4bd84 106
4f4c5e36 107 spin_lock_irqsave(&udc->lock, flags);
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DB
108
109 csr = __raw_readl(ep->creg);
110
111 /* NOTE: not collecting per-endpoint irq statistics... */
112
113 seq_printf(s, "\n");
114 seq_printf(s, "%s, maxpacket %d %s%s %s%s\n",
115 ep->ep.name, ep->ep.maxpacket,
116 ep->is_in ? "in" : "out",
117 ep->is_iso ? " iso" : "",
118 ep->is_pingpong
119 ? (ep->fifo_bank ? "pong" : "ping")
120 : "",
121 ep->stopped ? " stopped" : "");
122 seq_printf(s, "csr %08x rxbytes=%d %s %s %s" EIGHTBITS "\n",
123 csr,
124 (csr & 0x07ff0000) >> 16,
125 (csr & (1 << 15)) ? "enabled" : "disabled",
126 (csr & (1 << 11)) ? "DATA1" : "DATA0",
127 types[(csr & 0x700) >> 8],
128
129 /* iff type is control then print current direction */
130 (!(csr & 0x700))
131 ? ((csr & (1 << 7)) ? " IN" : " OUT")
132 : "",
133 (csr & (1 << 6)) ? " rxdatabk1" : "",
134 (csr & (1 << 5)) ? " forcestall" : "",
135 (csr & (1 << 4)) ? " txpktrdy" : "",
136
137 (csr & (1 << 3)) ? " stallsent" : "",
138 (csr & (1 << 2)) ? " rxsetup" : "",
139 (csr & (1 << 1)) ? " rxdatabk0" : "",
140 (csr & (1 << 0)) ? " txcomp" : "");
141 if (list_empty (&ep->queue))
142 seq_printf(s, "\t(queue empty)\n");
143
144 else list_for_each_entry (req, &ep->queue, queue) {
145 unsigned length = req->req.actual;
146
147 seq_printf(s, "\treq %p len %d/%d buf %p\n",
148 &req->req, length,
149 req->req.length, req->req.buf);
150 }
4f4c5e36 151 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
152}
153
154static void proc_irq_show(struct seq_file *s, const char *label, u32 mask)
155{
156 int i;
157
158 seq_printf(s, "%s %04x:%s%s" FOURBITS, label, mask,
159 (mask & (1 << 13)) ? " wakeup" : "",
160 (mask & (1 << 12)) ? " endbusres" : "",
161
162 (mask & (1 << 11)) ? " sofint" : "",
163 (mask & (1 << 10)) ? " extrsm" : "",
164 (mask & (1 << 9)) ? " rxrsm" : "",
165 (mask & (1 << 8)) ? " rxsusp" : "");
166 for (i = 0; i < 8; i++) {
167 if (mask & (1 << i))
168 seq_printf(s, " ep%d", i);
169 }
170 seq_printf(s, "\n");
171}
172
173static int proc_udc_show(struct seq_file *s, void *unused)
174{
175 struct at91_udc *udc = s->private;
176 struct at91_ep *ep;
177 u32 tmp;
178
179 seq_printf(s, "%s: version %s\n", driver_name, DRIVER_VERSION);
180
181 seq_printf(s, "vbus %s, pullup %s, %s powered%s, gadget %s\n\n",
182 udc->vbus ? "present" : "off",
183 udc->enabled
184 ? (udc->vbus ? "active" : "enabled")
185 : "disabled",
186 udc->selfpowered ? "self" : "VBUS",
187 udc->suspended ? ", suspended" : "",
188 udc->driver ? udc->driver->driver.name : "(none)");
189
190 /* don't access registers when interface isn't clocked */
191 if (!udc->clocked) {
192 seq_printf(s, "(not clocked)\n");
193 return 0;
194 }
195
ffd3326b 196 tmp = at91_udp_read(udc, AT91_UDP_FRM_NUM);
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DB
197 seq_printf(s, "frame %05x:%s%s frame=%d\n", tmp,
198 (tmp & AT91_UDP_FRM_OK) ? " ok" : "",
199 (tmp & AT91_UDP_FRM_ERR) ? " err" : "",
200 (tmp & AT91_UDP_NUM));
201
ffd3326b 202 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
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DB
203 seq_printf(s, "glbstate %02x:%s" FOURBITS "\n", tmp,
204 (tmp & AT91_UDP_RMWUPE) ? " rmwupe" : "",
205 (tmp & AT91_UDP_RSMINPR) ? " rsminpr" : "",
206 (tmp & AT91_UDP_ESR) ? " esr" : "",
207 (tmp & AT91_UDP_CONFG) ? " confg" : "",
208 (tmp & AT91_UDP_FADDEN) ? " fadden" : "");
209
ffd3326b 210 tmp = at91_udp_read(udc, AT91_UDP_FADDR);
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DB
211 seq_printf(s, "faddr %03x:%s fadd=%d\n", tmp,
212 (tmp & AT91_UDP_FEN) ? " fen" : "",
213 (tmp & AT91_UDP_FADD));
214
ffd3326b
AV
215 proc_irq_show(s, "imr ", at91_udp_read(udc, AT91_UDP_IMR));
216 proc_irq_show(s, "isr ", at91_udp_read(udc, AT91_UDP_ISR));
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DB
217
218 if (udc->enabled && udc->vbus) {
219 proc_ep_show(s, &udc->ep[0]);
220 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
221 if (ep->desc)
222 proc_ep_show(s, ep);
223 }
224 }
225 return 0;
226}
227
228static int proc_udc_open(struct inode *inode, struct file *file)
229{
230 return single_open(file, proc_udc_show, PDE(inode)->data);
231}
232
066202dd 233static const struct file_operations proc_ops = {
cdefa185 234 .owner = THIS_MODULE,
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235 .open = proc_udc_open,
236 .read = seq_read,
237 .llseek = seq_lseek,
238 .release = single_release,
239};
240
241static void create_debug_file(struct at91_udc *udc)
242{
cdefa185 243 udc->pde = proc_create_data(debug_filename, 0, NULL, &proc_ops, udc);
bae4bd84
DB
244}
245
246static void remove_debug_file(struct at91_udc *udc)
247{
248 if (udc->pde)
249 remove_proc_entry(debug_filename, NULL);
250}
251
252#else
253
254static inline void create_debug_file(struct at91_udc *udc) {}
255static inline void remove_debug_file(struct at91_udc *udc) {}
256
257#endif
258
259
260/*-------------------------------------------------------------------------*/
261
262static void done(struct at91_ep *ep, struct at91_request *req, int status)
263{
264 unsigned stopped = ep->stopped;
ffd3326b 265 struct at91_udc *udc = ep->udc;
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DB
266
267 list_del_init(&req->queue);
268 if (req->req.status == -EINPROGRESS)
269 req->req.status = status;
270 else
271 status = req->req.status;
272 if (status && status != -ESHUTDOWN)
273 VDBG("%s done %p, status %d\n", ep->ep.name, req, status);
274
275 ep->stopped = 1;
4f4c5e36 276 spin_unlock(&udc->lock);
bae4bd84 277 req->req.complete(&ep->ep, &req->req);
4f4c5e36 278 spin_lock(&udc->lock);
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DB
279 ep->stopped = stopped;
280
281 /* ep0 is always ready; other endpoints need a non-empty queue */
282 if (list_empty(&ep->queue) && ep->int_mask != (1 << 0))
ffd3326b 283 at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask);
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DB
284}
285
286/*-------------------------------------------------------------------------*/
287
288/* bits indicating OUT fifo has data ready */
289#define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1)
290
291/*
292 * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write
293 * back most of the value you just read (because of side effects, including
294 * bits that may change after reading and before writing).
295 *
296 * Except when changing a specific bit, always write values which:
297 * - clear SET_FX bits (setting them could change something)
298 * - set CLR_FX bits (clearing them could change something)
299 *
300 * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE
301 * that shouldn't normally be changed.
8b2e7668
DB
302 *
303 * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains,
304 * implying a need to wait for one write to complete (test relevant bits)
305 * before starting the next write. This shouldn't be an issue given how
306 * infrequently we write, except maybe for write-then-read idioms.
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DB
307 */
308#define SET_FX (AT91_UDP_TXPKTRDY)
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DB
309#define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \
310 | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)
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311
312/* pull OUT packet data from the endpoint's fifo */
313static int read_fifo (struct at91_ep *ep, struct at91_request *req)
314{
315 u32 __iomem *creg = ep->creg;
316 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
317 u32 csr;
318 u8 *buf;
319 unsigned int count, bufferspace, is_done;
320
321 buf = req->req.buf + req->req.actual;
322 bufferspace = req->req.length - req->req.actual;
323
324 /*
325 * there might be nothing to read if ep_queue() calls us,
326 * or if we already emptied both pingpong buffers
327 */
328rescan:
329 csr = __raw_readl(creg);
330 if ((csr & RX_DATA_READY) == 0)
331 return 0;
332
333 count = (csr & AT91_UDP_RXBYTECNT) >> 16;
334 if (count > ep->ep.maxpacket)
335 count = ep->ep.maxpacket;
336 if (count > bufferspace) {
337 DBG("%s buffer overflow\n", ep->ep.name);
338 req->req.status = -EOVERFLOW;
339 count = bufferspace;
340 }
341 __raw_readsb(dreg, buf, count);
342
343 /* release and swap pingpong mem bank */
344 csr |= CLR_FX;
345 if (ep->is_pingpong) {
346 if (ep->fifo_bank == 0) {
347 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
348 ep->fifo_bank = 1;
349 } else {
350 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1);
351 ep->fifo_bank = 0;
352 }
353 } else
354 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
355 __raw_writel(csr, creg);
356
357 req->req.actual += count;
358 is_done = (count < ep->ep.maxpacket);
359 if (count == bufferspace)
360 is_done = 1;
361
362 PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count,
363 is_done ? " (done)" : "");
364
365 /*
366 * avoid extra trips through IRQ logic for packets already in
367 * the fifo ... maybe preventing an extra (expensive) OUT-NAK
368 */
369 if (is_done)
370 done(ep, req, 0);
371 else if (ep->is_pingpong) {
76225374
HH
372 /*
373 * One dummy read to delay the code because of a HW glitch:
374 * CSR returns bad RXCOUNT when read too soon after updating
375 * RX_DATA_BK flags.
376 */
377 csr = __raw_readl(creg);
378
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DB
379 bufferspace -= count;
380 buf += count;
381 goto rescan;
382 }
383
384 return is_done;
385}
386
387/* load fifo for an IN packet */
388static int write_fifo(struct at91_ep *ep, struct at91_request *req)
389{
390 u32 __iomem *creg = ep->creg;
391 u32 csr = __raw_readl(creg);
392 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
393 unsigned total, count, is_last;
3cf27234 394 u8 *buf;
bae4bd84
DB
395
396 /*
397 * TODO: allow for writing two packets to the fifo ... that'll
398 * reduce the amount of IN-NAKing, but probably won't affect
399 * throughput much. (Unlike preventing OUT-NAKing!)
400 */
401
402 /*
403 * If ep_queue() calls us, the queue is empty and possibly in
404 * odd states like TXCOMP not yet cleared (we do it, saving at
405 * least one IRQ) or the fifo not yet being free. Those aren't
406 * issues normally (IRQ handler fast path).
407 */
408 if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) {
409 if (csr & AT91_UDP_TXCOMP) {
410 csr |= CLR_FX;
411 csr &= ~(SET_FX | AT91_UDP_TXCOMP);
412 __raw_writel(csr, creg);
413 csr = __raw_readl(creg);
414 }
415 if (csr & AT91_UDP_TXPKTRDY)
416 return 0;
417 }
418
3cf27234
DB
419 buf = req->req.buf + req->req.actual;
420 prefetch(buf);
bae4bd84
DB
421 total = req->req.length - req->req.actual;
422 if (ep->ep.maxpacket < total) {
423 count = ep->ep.maxpacket;
424 is_last = 0;
425 } else {
426 count = total;
427 is_last = (count < ep->ep.maxpacket) || !req->req.zero;
428 }
429
430 /*
431 * Write the packet, maybe it's a ZLP.
432 *
433 * NOTE: incrementing req->actual before we receive the ACK means
434 * gadget driver IN bytecounts can be wrong in fault cases. That's
435 * fixable with PIO drivers like this one (save "count" here, and
436 * do the increment later on TX irq), but not for most DMA hardware.
437 *
438 * So all gadget drivers must accept that potential error. Some
439 * hardware supports precise fifo status reporting, letting them
440 * recover when the actual bytecount matters (e.g. for USB Test
441 * and Measurement Class devices).
442 */
3cf27234 443 __raw_writesb(dreg, buf, count);
bae4bd84
DB
444 csr &= ~SET_FX;
445 csr |= CLR_FX | AT91_UDP_TXPKTRDY;
446 __raw_writel(csr, creg);
447 req->req.actual += count;
448
449 PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count,
450 is_last ? " (done)" : "");
451 if (is_last)
452 done(ep, req, 0);
453 return is_last;
454}
455
456static void nuke(struct at91_ep *ep, int status)
457{
458 struct at91_request *req;
459
460 // terminer chaque requete dans la queue
461 ep->stopped = 1;
462 if (list_empty(&ep->queue))
463 return;
464
441b62c1 465 VDBG("%s %s\n", __func__, ep->ep.name);
bae4bd84
DB
466 while (!list_empty(&ep->queue)) {
467 req = list_entry(ep->queue.next, struct at91_request, queue);
468 done(ep, req, status);
469 }
470}
471
472/*-------------------------------------------------------------------------*/
473
8b2e7668
DB
474static int at91_ep_enable(struct usb_ep *_ep,
475 const struct usb_endpoint_descriptor *desc)
bae4bd84
DB
476{
477 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
4f4c5e36 478 struct at91_udc *udc = ep->udc;
bae4bd84
DB
479 u16 maxpacket;
480 u32 tmp;
481 unsigned long flags;
482
483 if (!_ep || !ep
484 || !desc || ep->desc
485 || _ep->name == ep0name
486 || desc->bDescriptorType != USB_DT_ENDPOINT
487 || (maxpacket = le16_to_cpu(desc->wMaxPacketSize)) == 0
488 || maxpacket > ep->maxpacket) {
489 DBG("bad ep or descriptor\n");
490 return -EINVAL;
491 }
492
4f4c5e36 493 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
bae4bd84
DB
494 DBG("bogus device state\n");
495 return -ESHUTDOWN;
496 }
497
81c8d8d2 498 tmp = usb_endpoint_type(desc);
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DB
499 switch (tmp) {
500 case USB_ENDPOINT_XFER_CONTROL:
501 DBG("only one control endpoint\n");
502 return -EINVAL;
503 case USB_ENDPOINT_XFER_INT:
504 if (maxpacket > 64)
505 goto bogus_max;
506 break;
507 case USB_ENDPOINT_XFER_BULK:
508 switch (maxpacket) {
509 case 8:
510 case 16:
511 case 32:
512 case 64:
513 goto ok;
514 }
515bogus_max:
516 DBG("bogus maxpacket %d\n", maxpacket);
517 return -EINVAL;
518 case USB_ENDPOINT_XFER_ISOC:
519 if (!ep->is_pingpong) {
520 DBG("iso requires double buffering\n");
521 return -EINVAL;
522 }
523 break;
524 }
525
526ok:
4f4c5e36 527 spin_lock_irqsave(&udc->lock, flags);
bae4bd84
DB
528
529 /* initialize endpoint to match this descriptor */
81c8d8d2 530 ep->is_in = usb_endpoint_dir_in(desc);
bae4bd84
DB
531 ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC);
532 ep->stopped = 0;
533 if (ep->is_in)
534 tmp |= 0x04;
535 tmp <<= 8;
536 tmp |= AT91_UDP_EPEDS;
537 __raw_writel(tmp, ep->creg);
538
539 ep->desc = desc;
540 ep->ep.maxpacket = maxpacket;
541
542 /*
543 * reset/init endpoint fifo. NOTE: leaves fifo_bank alone,
544 * since endpoint resets don't reset hw pingpong state.
545 */
4f4c5e36
HH
546 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
547 at91_udp_write(udc, AT91_UDP_RST_EP, 0);
bae4bd84 548
4f4c5e36 549 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
550 return 0;
551}
552
553static int at91_ep_disable (struct usb_ep * _ep)
554{
555 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
ffd3326b 556 struct at91_udc *udc = ep->udc;
bae4bd84
DB
557 unsigned long flags;
558
559 if (ep == &ep->udc->ep[0])
560 return -EINVAL;
561
4f4c5e36 562 spin_lock_irqsave(&udc->lock, flags);
bae4bd84
DB
563
564 nuke(ep, -ESHUTDOWN);
565
566 /* restore the endpoint's pristine config */
567 ep->desc = NULL;
568 ep->ep.maxpacket = ep->maxpacket;
569
570 /* reset fifos and endpoint */
571 if (ep->udc->clocked) {
ffd3326b
AV
572 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
573 at91_udp_write(udc, AT91_UDP_RST_EP, 0);
bae4bd84
DB
574 __raw_writel(0, ep->creg);
575 }
576
4f4c5e36 577 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
578 return 0;
579}
580
581/*
582 * this is a PIO-only driver, so there's nothing
583 * interesting for request or buffer allocation.
584 */
585
8b2e7668 586static struct usb_request *
f3db6e82 587at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
bae4bd84
DB
588{
589 struct at91_request *req;
590
cd861280 591 req = kzalloc(sizeof (struct at91_request), gfp_flags);
bae4bd84
DB
592 if (!req)
593 return NULL;
594
595 INIT_LIST_HEAD(&req->queue);
596 return &req->req;
597}
598
599static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
600{
601 struct at91_request *req;
602
603 req = container_of(_req, struct at91_request, req);
604 BUG_ON(!list_empty(&req->queue));
605 kfree(req);
606}
607
bae4bd84
DB
608static int at91_ep_queue(struct usb_ep *_ep,
609 struct usb_request *_req, gfp_t gfp_flags)
610{
611 struct at91_request *req;
612 struct at91_ep *ep;
4f4c5e36 613 struct at91_udc *udc;
bae4bd84
DB
614 int status;
615 unsigned long flags;
616
617 req = container_of(_req, struct at91_request, req);
618 ep = container_of(_ep, struct at91_ep, ep);
619
620 if (!_req || !_req->complete
621 || !_req->buf || !list_empty(&req->queue)) {
622 DBG("invalid request\n");
623 return -EINVAL;
624 }
625
626 if (!_ep || (!ep->desc && ep->ep.name != ep0name)) {
627 DBG("invalid ep\n");
628 return -EINVAL;
629 }
630
4f4c5e36 631 udc = ep->udc;
bae4bd84 632
4f4c5e36 633 if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
bae4bd84
DB
634 DBG("invalid device\n");
635 return -EINVAL;
636 }
637
638 _req->status = -EINPROGRESS;
639 _req->actual = 0;
640
4f4c5e36 641 spin_lock_irqsave(&udc->lock, flags);
bae4bd84
DB
642
643 /* try to kickstart any empty and idle queue */
644 if (list_empty(&ep->queue) && !ep->stopped) {
645 int is_ep0;
646
647 /*
648 * If this control request has a non-empty DATA stage, this
649 * will start that stage. It works just like a non-control
650 * request (until the status stage starts, maybe early).
651 *
652 * If the data stage is empty, then this starts a successful
653 * IN/STATUS stage. (Unsuccessful ones use set_halt.)
654 */
655 is_ep0 = (ep->ep.name == ep0name);
656 if (is_ep0) {
657 u32 tmp;
658
4f4c5e36 659 if (!udc->req_pending) {
bae4bd84
DB
660 status = -EINVAL;
661 goto done;
662 }
663
664 /*
665 * defer changing CONFG until after the gadget driver
666 * reconfigures the endpoints.
667 */
4f4c5e36
HH
668 if (udc->wait_for_config_ack) {
669 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
bae4bd84
DB
670 tmp ^= AT91_UDP_CONFG;
671 VDBG("toggle config\n");
4f4c5e36 672 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
bae4bd84
DB
673 }
674 if (req->req.length == 0) {
675ep0_in_status:
676 PACKET("ep0 in/status\n");
677 status = 0;
678 tmp = __raw_readl(ep->creg);
679 tmp &= ~SET_FX;
680 tmp |= CLR_FX | AT91_UDP_TXPKTRDY;
681 __raw_writel(tmp, ep->creg);
4f4c5e36 682 udc->req_pending = 0;
bae4bd84
DB
683 goto done;
684 }
685 }
686
687 if (ep->is_in)
688 status = write_fifo(ep, req);
689 else {
690 status = read_fifo(ep, req);
691
692 /* IN/STATUS stage is otherwise triggered by irq */
693 if (status && is_ep0)
694 goto ep0_in_status;
695 }
696 } else
697 status = 0;
698
699 if (req && !status) {
700 list_add_tail (&req->queue, &ep->queue);
4f4c5e36 701 at91_udp_write(udc, AT91_UDP_IER, ep->int_mask);
bae4bd84
DB
702 }
703done:
4f4c5e36 704 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
705 return (status < 0) ? status : 0;
706}
707
708static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
709{
4f4c5e36 710 struct at91_ep *ep;
bae4bd84 711 struct at91_request *req;
4f4c5e36
HH
712 unsigned long flags;
713 struct at91_udc *udc;
bae4bd84
DB
714
715 ep = container_of(_ep, struct at91_ep, ep);
716 if (!_ep || ep->ep.name == ep0name)
717 return -EINVAL;
718
4f4c5e36
HH
719 udc = ep->udc;
720
721 spin_lock_irqsave(&udc->lock, flags);
722
bae4bd84
DB
723 /* make sure it's actually queued on this endpoint */
724 list_for_each_entry (req, &ep->queue, queue) {
725 if (&req->req == _req)
726 break;
727 }
4f4c5e36
HH
728 if (&req->req != _req) {
729 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84 730 return -EINVAL;
4f4c5e36 731 }
bae4bd84
DB
732
733 done(ep, req, -ECONNRESET);
4f4c5e36 734 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
735 return 0;
736}
737
738static int at91_ep_set_halt(struct usb_ep *_ep, int value)
739{
740 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
ffd3326b 741 struct at91_udc *udc = ep->udc;
bae4bd84
DB
742 u32 __iomem *creg;
743 u32 csr;
744 unsigned long flags;
745 int status = 0;
746
747 if (!_ep || ep->is_iso || !ep->udc->clocked)
748 return -EINVAL;
749
750 creg = ep->creg;
4f4c5e36 751 spin_lock_irqsave(&udc->lock, flags);
bae4bd84
DB
752
753 csr = __raw_readl(creg);
754
755 /*
756 * fail with still-busy IN endpoints, ensuring correct sequencing
757 * of data tx then stall. note that the fifo rx bytecount isn't
758 * completely accurate as a tx bytecount.
759 */
760 if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0))
761 status = -EAGAIN;
762 else {
763 csr |= CLR_FX;
764 csr &= ~SET_FX;
765 if (value) {
766 csr |= AT91_UDP_FORCESTALL;
767 VDBG("halt %s\n", ep->ep.name);
768 } else {
ffd3326b
AV
769 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
770 at91_udp_write(udc, AT91_UDP_RST_EP, 0);
bae4bd84
DB
771 csr &= ~AT91_UDP_FORCESTALL;
772 }
773 __raw_writel(csr, creg);
774 }
775
4f4c5e36 776 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
777 return status;
778}
779
398acce7 780static const struct usb_ep_ops at91_ep_ops = {
bae4bd84
DB
781 .enable = at91_ep_enable,
782 .disable = at91_ep_disable,
783 .alloc_request = at91_ep_alloc_request,
784 .free_request = at91_ep_free_request,
bae4bd84
DB
785 .queue = at91_ep_queue,
786 .dequeue = at91_ep_dequeue,
787 .set_halt = at91_ep_set_halt,
788 // there's only imprecise fifo status reporting
789};
790
791/*-------------------------------------------------------------------------*/
792
793static int at91_get_frame(struct usb_gadget *gadget)
794{
ffd3326b
AV
795 struct at91_udc *udc = to_udc(gadget);
796
bae4bd84
DB
797 if (!to_udc(gadget)->clocked)
798 return -EINVAL;
ffd3326b 799 return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM;
bae4bd84
DB
800}
801
802static int at91_wakeup(struct usb_gadget *gadget)
803{
804 struct at91_udc *udc = to_udc(gadget);
805 u32 glbstate;
806 int status = -EINVAL;
807 unsigned long flags;
808
441b62c1 809 DBG("%s\n", __func__ );
4f4c5e36 810 spin_lock_irqsave(&udc->lock, flags);
bae4bd84
DB
811
812 if (!udc->clocked || !udc->suspended)
813 goto done;
814
815 /* NOTE: some "early versions" handle ESR differently ... */
816
ffd3326b 817 glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT);
bae4bd84
DB
818 if (!(glbstate & AT91_UDP_ESR))
819 goto done;
820 glbstate |= AT91_UDP_ESR;
ffd3326b 821 at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate);
bae4bd84
DB
822
823done:
4f4c5e36 824 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
825 return status;
826}
827
828/* reinit == restore inital software state */
829static void udc_reinit(struct at91_udc *udc)
830{
831 u32 i;
832
833 INIT_LIST_HEAD(&udc->gadget.ep_list);
834 INIT_LIST_HEAD(&udc->gadget.ep0->ep_list);
835
836 for (i = 0; i < NUM_ENDPOINTS; i++) {
837 struct at91_ep *ep = &udc->ep[i];
838
839 if (i != 0)
840 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
841 ep->desc = NULL;
842 ep->stopped = 0;
843 ep->fifo_bank = 0;
844 ep->ep.maxpacket = ep->maxpacket;
ffd3326b 845 ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i);
bae4bd84
DB
846 // initialiser une queue par endpoint
847 INIT_LIST_HEAD(&ep->queue);
848 }
849}
850
851static void stop_activity(struct at91_udc *udc)
852{
853 struct usb_gadget_driver *driver = udc->driver;
854 int i;
855
856 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
857 driver = NULL;
858 udc->gadget.speed = USB_SPEED_UNKNOWN;
8b2e7668 859 udc->suspended = 0;
bae4bd84
DB
860
861 for (i = 0; i < NUM_ENDPOINTS; i++) {
862 struct at91_ep *ep = &udc->ep[i];
863 ep->stopped = 1;
864 nuke(ep, -ESHUTDOWN);
865 }
4f4c5e36
HH
866 if (driver) {
867 spin_unlock(&udc->lock);
bae4bd84 868 driver->disconnect(&udc->gadget);
4f4c5e36
HH
869 spin_lock(&udc->lock);
870 }
bae4bd84
DB
871
872 udc_reinit(udc);
873}
874
875static void clk_on(struct at91_udc *udc)
876{
877 if (udc->clocked)
878 return;
879 udc->clocked = 1;
880 clk_enable(udc->iclk);
881 clk_enable(udc->fclk);
882}
883
884static void clk_off(struct at91_udc *udc)
885{
886 if (!udc->clocked)
887 return;
888 udc->clocked = 0;
889 udc->gadget.speed = USB_SPEED_UNKNOWN;
bae4bd84 890 clk_disable(udc->fclk);
8b2e7668 891 clk_disable(udc->iclk);
bae4bd84
DB
892}
893
894/*
895 * activate/deactivate link with host; minimize power usage for
896 * inactive links by cutting clocks and transceiver power.
897 */
898static void pullup(struct at91_udc *udc, int is_on)
899{
f3db6e82
DB
900 int active = !udc->board.pullup_active_low;
901
bae4bd84
DB
902 if (!udc->enabled || !udc->vbus)
903 is_on = 0;
904 DBG("%sactive\n", is_on ? "" : "in");
ffd3326b 905
bae4bd84
DB
906 if (is_on) {
907 clk_on(udc);
08cbc706 908 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
ffd3326b 909 at91_udp_write(udc, AT91_UDP_TXVC, 0);
29ba4b53 910 if (cpu_is_at91rm9200())
f3db6e82 911 gpio_set_value(udc->board.pullup_pin, active);
61352667 912 else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) {
29ba4b53
AV
913 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
914
915 txvc |= AT91_UDP_TXVC_PUON;
916 at91_udp_write(udc, AT91_UDP_TXVC, txvc);
23f6d914 917 } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
29ba4b53
AV
918 u32 usbpucr;
919
920 usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
921 usbpucr |= AT91_MATRIX_USBPUCR_PUON;
922 at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
923 }
ffd3326b 924 } else {
bae4bd84 925 stop_activity(udc);
08cbc706 926 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
ffd3326b 927 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
29ba4b53 928 if (cpu_is_at91rm9200())
f3db6e82 929 gpio_set_value(udc->board.pullup_pin, !active);
61352667 930 else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) {
29ba4b53
AV
931 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
932
933 txvc &= ~AT91_UDP_TXVC_PUON;
934 at91_udp_write(udc, AT91_UDP_TXVC, txvc);
23f6d914 935 } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
29ba4b53
AV
936 u32 usbpucr;
937
938 usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
939 usbpucr &= ~AT91_MATRIX_USBPUCR_PUON;
940 at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
941 }
bae4bd84 942 clk_off(udc);
bae4bd84
DB
943 }
944}
945
946/* vbus is here! turn everything on that's ready */
947static int at91_vbus_session(struct usb_gadget *gadget, int is_active)
948{
949 struct at91_udc *udc = to_udc(gadget);
950 unsigned long flags;
951
952 // VDBG("vbus %s\n", is_active ? "on" : "off");
4f4c5e36 953 spin_lock_irqsave(&udc->lock, flags);
bae4bd84 954 udc->vbus = (is_active != 0);
bfb7fb79
WK
955 if (udc->driver)
956 pullup(udc, is_active);
957 else
958 pullup(udc, 0);
4f4c5e36 959 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
960 return 0;
961}
962
963static int at91_pullup(struct usb_gadget *gadget, int is_on)
964{
965 struct at91_udc *udc = to_udc(gadget);
966 unsigned long flags;
967
4f4c5e36 968 spin_lock_irqsave(&udc->lock, flags);
bae4bd84
DB
969 udc->enabled = is_on = !!is_on;
970 pullup(udc, is_on);
4f4c5e36 971 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
972 return 0;
973}
974
975static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on)
976{
977 struct at91_udc *udc = to_udc(gadget);
978 unsigned long flags;
979
4f4c5e36 980 spin_lock_irqsave(&udc->lock, flags);
bae4bd84 981 udc->selfpowered = (is_on != 0);
4f4c5e36 982 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
983 return 0;
984}
985
986static const struct usb_gadget_ops at91_udc_ops = {
987 .get_frame = at91_get_frame,
988 .wakeup = at91_wakeup,
989 .set_selfpowered = at91_set_selfpowered,
990 .vbus_session = at91_vbus_session,
991 .pullup = at91_pullup,
992
993 /*
994 * VBUS-powered devices may also also want to support bigger
995 * power budgets after an appropriate SET_CONFIGURATION.
996 */
997 // .vbus_power = at91_vbus_power,
998};
999
1000/*-------------------------------------------------------------------------*/
1001
1002static int handle_ep(struct at91_ep *ep)
1003{
1004 struct at91_request *req;
1005 u32 __iomem *creg = ep->creg;
1006 u32 csr = __raw_readl(creg);
1007
1008 if (!list_empty(&ep->queue))
1009 req = list_entry(ep->queue.next,
1010 struct at91_request, queue);
1011 else
1012 req = NULL;
1013
1014 if (ep->is_in) {
1015 if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) {
1016 csr |= CLR_FX;
1017 csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP);
1018 __raw_writel(csr, creg);
1019 }
1020 if (req)
1021 return write_fifo(ep, req);
1022
1023 } else {
1024 if (csr & AT91_UDP_STALLSENT) {
1025 /* STALLSENT bit == ISOERR */
1026 if (ep->is_iso && req)
1027 req->req.status = -EILSEQ;
1028 csr |= CLR_FX;
1029 csr &= ~(SET_FX | AT91_UDP_STALLSENT);
1030 __raw_writel(csr, creg);
1031 csr = __raw_readl(creg);
1032 }
1033 if (req && (csr & RX_DATA_READY))
1034 return read_fifo(ep, req);
1035 }
1036 return 0;
1037}
1038
1039union setup {
1040 u8 raw[8];
1041 struct usb_ctrlrequest r;
1042};
1043
1044static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
1045{
1046 u32 __iomem *creg = ep->creg;
1047 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
1048 unsigned rxcount, i = 0;
1049 u32 tmp;
1050 union setup pkt;
1051 int status = 0;
1052
1053 /* read and ack SETUP; hard-fail for bogus packets */
1054 rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16;
1055 if (likely(rxcount == 8)) {
1056 while (rxcount--)
1057 pkt.raw[i++] = __raw_readb(dreg);
1058 if (pkt.r.bRequestType & USB_DIR_IN) {
1059 csr |= AT91_UDP_DIR;
1060 ep->is_in = 1;
1061 } else {
1062 csr &= ~AT91_UDP_DIR;
1063 ep->is_in = 0;
1064 }
1065 } else {
1066 // REVISIT this happens sometimes under load; why??
1067 ERR("SETUP len %d, csr %08x\n", rxcount, csr);
1068 status = -EINVAL;
1069 }
1070 csr |= CLR_FX;
1071 csr &= ~(SET_FX | AT91_UDP_RXSETUP);
1072 __raw_writel(csr, creg);
1073 udc->wait_for_addr_ack = 0;
1074 udc->wait_for_config_ack = 0;
1075 ep->stopped = 0;
1076 if (unlikely(status != 0))
1077 goto stall;
1078
1079#define w_index le16_to_cpu(pkt.r.wIndex)
1080#define w_value le16_to_cpu(pkt.r.wValue)
1081#define w_length le16_to_cpu(pkt.r.wLength)
1082
1083 VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1084 pkt.r.bRequestType, pkt.r.bRequest,
1085 w_value, w_index, w_length);
1086
1087 /*
1088 * A few standard requests get handled here, ones that touch
1089 * hardware ... notably for device and endpoint features.
1090 */
1091 udc->req_pending = 1;
1092 csr = __raw_readl(creg);
1093 csr |= CLR_FX;
1094 csr &= ~SET_FX;
1095 switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) {
1096
1097 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1098 | USB_REQ_SET_ADDRESS:
1099 __raw_writel(csr | AT91_UDP_TXPKTRDY, creg);
1100 udc->addr = w_value;
1101 udc->wait_for_addr_ack = 1;
1102 udc->req_pending = 0;
1103 /* FADDR is set later, when we ack host STATUS */
1104 return;
1105
1106 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1107 | USB_REQ_SET_CONFIGURATION:
ffd3326b 1108 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG;
bae4bd84
DB
1109 if (pkt.r.wValue)
1110 udc->wait_for_config_ack = (tmp == 0);
1111 else
1112 udc->wait_for_config_ack = (tmp != 0);
1113 if (udc->wait_for_config_ack)
1114 VDBG("wait for config\n");
1115 /* CONFG is toggled later, if gadget driver succeeds */
1116 break;
1117
1118 /*
1119 * Hosts may set or clear remote wakeup status, and
1120 * devices may report they're VBUS powered.
1121 */
1122 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1123 | USB_REQ_GET_STATUS:
1124 tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED);
ffd3326b 1125 if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR)
bae4bd84
DB
1126 tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1127 PACKET("get device status\n");
1128 __raw_writeb(tmp, dreg);
1129 __raw_writeb(0, dreg);
1130 goto write_in;
1131 /* then STATUS starts later, automatically */
1132 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1133 | USB_REQ_SET_FEATURE:
1134 if (w_value != USB_DEVICE_REMOTE_WAKEUP)
1135 goto stall;
ffd3326b 1136 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
bae4bd84 1137 tmp |= AT91_UDP_ESR;
ffd3326b 1138 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
bae4bd84
DB
1139 goto succeed;
1140 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
1141 | USB_REQ_CLEAR_FEATURE:
1142 if (w_value != USB_DEVICE_REMOTE_WAKEUP)
1143 goto stall;
ffd3326b 1144 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
bae4bd84 1145 tmp &= ~AT91_UDP_ESR;
ffd3326b 1146 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
bae4bd84
DB
1147 goto succeed;
1148
1149 /*
1150 * Interfaces have no feature settings; this is pretty useless.
1151 * we won't even insist the interface exists...
1152 */
1153 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
1154 | USB_REQ_GET_STATUS:
1155 PACKET("get interface status\n");
1156 __raw_writeb(0, dreg);
1157 __raw_writeb(0, dreg);
1158 goto write_in;
1159 /* then STATUS starts later, automatically */
1160 case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
1161 | USB_REQ_SET_FEATURE:
1162 case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
1163 | USB_REQ_CLEAR_FEATURE:
1164 goto stall;
1165
1166 /*
1167 * Hosts may clear bulk/intr endpoint halt after the gadget
1168 * driver sets it (not widely used); or set it (for testing)
1169 */
1170 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
1171 | USB_REQ_GET_STATUS:
1172 tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
1173 ep = &udc->ep[tmp];
1440e096 1174 if (tmp >= NUM_ENDPOINTS || (tmp && !ep->desc))
bae4bd84
DB
1175 goto stall;
1176
1177 if (tmp) {
1178 if ((w_index & USB_DIR_IN)) {
1179 if (!ep->is_in)
1180 goto stall;
1181 } else if (ep->is_in)
1182 goto stall;
1183 }
1184 PACKET("get %s status\n", ep->ep.name);
1185 if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL)
1186 tmp = (1 << USB_ENDPOINT_HALT);
1187 else
1188 tmp = 0;
1189 __raw_writeb(tmp, dreg);
1190 __raw_writeb(0, dreg);
1191 goto write_in;
1192 /* then STATUS starts later, automatically */
1193 case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
1194 | USB_REQ_SET_FEATURE:
1195 tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
1196 ep = &udc->ep[tmp];
1440e096 1197 if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS)
bae4bd84
DB
1198 goto stall;
1199 if (!ep->desc || ep->is_iso)
1200 goto stall;
1201 if ((w_index & USB_DIR_IN)) {
1202 if (!ep->is_in)
1203 goto stall;
1204 } else if (ep->is_in)
1205 goto stall;
1206
1207 tmp = __raw_readl(ep->creg);
1208 tmp &= ~SET_FX;
1209 tmp |= CLR_FX | AT91_UDP_FORCESTALL;
1210 __raw_writel(tmp, ep->creg);
1211 goto succeed;
1212 case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
1213 | USB_REQ_CLEAR_FEATURE:
1214 tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
1215 ep = &udc->ep[tmp];
1440e096 1216 if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS)
bae4bd84
DB
1217 goto stall;
1218 if (tmp == 0)
1219 goto succeed;
1220 if (!ep->desc || ep->is_iso)
1221 goto stall;
1222 if ((w_index & USB_DIR_IN)) {
1223 if (!ep->is_in)
1224 goto stall;
1225 } else if (ep->is_in)
1226 goto stall;
1227
ffd3326b
AV
1228 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
1229 at91_udp_write(udc, AT91_UDP_RST_EP, 0);
bae4bd84
DB
1230 tmp = __raw_readl(ep->creg);
1231 tmp |= CLR_FX;
1232 tmp &= ~(SET_FX | AT91_UDP_FORCESTALL);
1233 __raw_writel(tmp, ep->creg);
1234 if (!list_empty(&ep->queue))
1235 handle_ep(ep);
1236 goto succeed;
1237 }
1238
1239#undef w_value
1240#undef w_index
1241#undef w_length
1242
1243 /* pass request up to the gadget driver */
4f4c5e36
HH
1244 if (udc->driver) {
1245 spin_unlock(&udc->lock);
bfb7fb79 1246 status = udc->driver->setup(&udc->gadget, &pkt.r);
4f4c5e36
HH
1247 spin_lock(&udc->lock);
1248 }
bfb7fb79
WK
1249 else
1250 status = -ENODEV;
bae4bd84
DB
1251 if (status < 0) {
1252stall:
1253 VDBG("req %02x.%02x protocol STALL; stat %d\n",
1254 pkt.r.bRequestType, pkt.r.bRequest, status);
1255 csr |= AT91_UDP_FORCESTALL;
1256 __raw_writel(csr, creg);
1257 udc->req_pending = 0;
1258 }
1259 return;
1260
1261succeed:
1262 /* immediate successful (IN) STATUS after zero length DATA */
1263 PACKET("ep0 in/status\n");
1264write_in:
1265 csr |= AT91_UDP_TXPKTRDY;
1266 __raw_writel(csr, creg);
1267 udc->req_pending = 0;
1268 return;
1269}
1270
1271static void handle_ep0(struct at91_udc *udc)
1272{
1273 struct at91_ep *ep0 = &udc->ep[0];
1274 u32 __iomem *creg = ep0->creg;
1275 u32 csr = __raw_readl(creg);
1276 struct at91_request *req;
1277
1278 if (unlikely(csr & AT91_UDP_STALLSENT)) {
1279 nuke(ep0, -EPROTO);
1280 udc->req_pending = 0;
1281 csr |= CLR_FX;
1282 csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL);
1283 __raw_writel(csr, creg);
1284 VDBG("ep0 stalled\n");
1285 csr = __raw_readl(creg);
1286 }
1287 if (csr & AT91_UDP_RXSETUP) {
1288 nuke(ep0, 0);
1289 udc->req_pending = 0;
1290 handle_setup(udc, ep0, csr);
1291 return;
1292 }
1293
1294 if (list_empty(&ep0->queue))
1295 req = NULL;
1296 else
1297 req = list_entry(ep0->queue.next, struct at91_request, queue);
1298
1299 /* host ACKed an IN packet that we sent */
1300 if (csr & AT91_UDP_TXCOMP) {
1301 csr |= CLR_FX;
1302 csr &= ~(SET_FX | AT91_UDP_TXCOMP);
1303
1304 /* write more IN DATA? */
1305 if (req && ep0->is_in) {
1306 if (handle_ep(ep0))
1307 udc->req_pending = 0;
1308
1309 /*
1310 * Ack after:
1311 * - last IN DATA packet (including GET_STATUS)
1312 * - IN/STATUS for OUT DATA
1313 * - IN/STATUS for any zero-length DATA stage
1314 * except for the IN DATA case, the host should send
1315 * an OUT status later, which we'll ack.
1316 */
1317 } else {
1318 udc->req_pending = 0;
1319 __raw_writel(csr, creg);
1320
1321 /*
1322 * SET_ADDRESS takes effect only after the STATUS
1323 * (to the original address) gets acked.
1324 */
1325 if (udc->wait_for_addr_ack) {
1326 u32 tmp;
1327
ffd3326b 1328 at91_udp_write(udc, AT91_UDP_FADDR,
8b2e7668 1329 AT91_UDP_FEN | udc->addr);
ffd3326b 1330 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
bae4bd84
DB
1331 tmp &= ~AT91_UDP_FADDEN;
1332 if (udc->addr)
1333 tmp |= AT91_UDP_FADDEN;
ffd3326b 1334 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
bae4bd84
DB
1335
1336 udc->wait_for_addr_ack = 0;
1337 VDBG("address %d\n", udc->addr);
1338 }
1339 }
1340 }
1341
1342 /* OUT packet arrived ... */
1343 else if (csr & AT91_UDP_RX_DATA_BK0) {
1344 csr |= CLR_FX;
1345 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
1346
1347 /* OUT DATA stage */
1348 if (!ep0->is_in) {
1349 if (req) {
1350 if (handle_ep(ep0)) {
1351 /* send IN/STATUS */
1352 PACKET("ep0 in/status\n");
1353 csr = __raw_readl(creg);
1354 csr &= ~SET_FX;
1355 csr |= CLR_FX | AT91_UDP_TXPKTRDY;
1356 __raw_writel(csr, creg);
1357 udc->req_pending = 0;
1358 }
1359 } else if (udc->req_pending) {
1360 /*
1361 * AT91 hardware has a hard time with this
1362 * "deferred response" mode for control-OUT
1363 * transfers. (For control-IN it's fine.)
1364 *
1365 * The normal solution leaves OUT data in the
1366 * fifo until the gadget driver is ready.
1367 * We couldn't do that here without disabling
1368 * the IRQ that tells about SETUP packets,
1369 * e.g. when the host gets impatient...
1370 *
1371 * Working around it by copying into a buffer
1372 * would almost be a non-deferred response,
1373 * except that it wouldn't permit reliable
1374 * stalling of the request. Instead, demand
1375 * that gadget drivers not use this mode.
1376 */
1377 DBG("no control-OUT deferred responses!\n");
1378 __raw_writel(csr | AT91_UDP_FORCESTALL, creg);
1379 udc->req_pending = 0;
1380 }
1381
1382 /* STATUS stage for control-IN; ack. */
1383 } else {
1384 PACKET("ep0 out/status ACK\n");
1385 __raw_writel(csr, creg);
1386
1387 /* "early" status stage */
1388 if (req)
1389 done(ep0, req, 0);
1390 }
1391 }
1392}
1393
7d12e780 1394static irqreturn_t at91_udc_irq (int irq, void *_udc)
bae4bd84
DB
1395{
1396 struct at91_udc *udc = _udc;
1397 u32 rescans = 5;
c6c35237 1398 int disable_clock = 0;
4f4c5e36
HH
1399 unsigned long flags;
1400
1401 spin_lock_irqsave(&udc->lock, flags);
c6c35237
HH
1402
1403 if (!udc->clocked) {
1404 clk_on(udc);
1405 disable_clock = 1;
1406 }
bae4bd84
DB
1407
1408 while (rescans--) {
8b2e7668 1409 u32 status;
bae4bd84 1410
ffd3326b
AV
1411 status = at91_udp_read(udc, AT91_UDP_ISR)
1412 & at91_udp_read(udc, AT91_UDP_IMR);
bae4bd84
DB
1413 if (!status)
1414 break;
1415
1416 /* USB reset irq: not maskable */
1417 if (status & AT91_UDP_ENDBUSRES) {
ffd3326b
AV
1418 at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS);
1419 at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS);
bae4bd84 1420 /* Atmel code clears this irq twice */
ffd3326b
AV
1421 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES);
1422 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES);
bae4bd84
DB
1423 VDBG("end bus reset\n");
1424 udc->addr = 0;
1425 stop_activity(udc);
1426
1427 /* enable ep0 */
ffd3326b 1428 at91_udp_write(udc, AT91_UDP_CSR(0),
8b2e7668 1429 AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL);
bae4bd84
DB
1430 udc->gadget.speed = USB_SPEED_FULL;
1431 udc->suspended = 0;
ffd3326b 1432 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0));
bae4bd84
DB
1433
1434 /*
1435 * NOTE: this driver keeps clocks off unless the
8b2e7668
DB
1436 * USB host is present. That saves power, but for
1437 * boards that don't support VBUS detection, both
1438 * clocks need to be active most of the time.
bae4bd84
DB
1439 */
1440
1441 /* host initiated suspend (3+ms bus idle) */
1442 } else if (status & AT91_UDP_RXSUSP) {
ffd3326b
AV
1443 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP);
1444 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM);
1445 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP);
bae4bd84
DB
1446 // VDBG("bus suspend\n");
1447 if (udc->suspended)
1448 continue;
1449 udc->suspended = 1;
1450
1451 /*
1452 * NOTE: when suspending a VBUS-powered device, the
1453 * gadget driver should switch into slow clock mode
1454 * and then into standby to avoid drawing more than
1455 * 500uA power (2500uA for some high-power configs).
1456 */
4f4c5e36
HH
1457 if (udc->driver && udc->driver->suspend) {
1458 spin_unlock(&udc->lock);
bae4bd84 1459 udc->driver->suspend(&udc->gadget);
4f4c5e36
HH
1460 spin_lock(&udc->lock);
1461 }
bae4bd84
DB
1462
1463 /* host initiated resume */
1464 } else if (status & AT91_UDP_RXRSM) {
ffd3326b
AV
1465 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
1466 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP);
1467 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
bae4bd84
DB
1468 // VDBG("bus resume\n");
1469 if (!udc->suspended)
1470 continue;
1471 udc->suspended = 0;
1472
1473 /*
1474 * NOTE: for a VBUS-powered device, the gadget driver
1475 * would normally want to switch out of slow clock
1476 * mode into normal mode.
1477 */
4f4c5e36
HH
1478 if (udc->driver && udc->driver->resume) {
1479 spin_unlock(&udc->lock);
bae4bd84 1480 udc->driver->resume(&udc->gadget);
4f4c5e36
HH
1481 spin_lock(&udc->lock);
1482 }
bae4bd84
DB
1483
1484 /* endpoint IRQs are cleared by handling them */
1485 } else {
1486 int i;
1487 unsigned mask = 1;
1488 struct at91_ep *ep = &udc->ep[1];
1489
1490 if (status & mask)
1491 handle_ep0(udc);
1492 for (i = 1; i < NUM_ENDPOINTS; i++) {
1493 mask <<= 1;
1494 if (status & mask)
1495 handle_ep(ep);
1496 ep++;
1497 }
1498 }
1499 }
1500
c6c35237
HH
1501 if (disable_clock)
1502 clk_off(udc);
1503
4f4c5e36
HH
1504 spin_unlock_irqrestore(&udc->lock, flags);
1505
bae4bd84
DB
1506 return IRQ_HANDLED;
1507}
1508
1509/*-------------------------------------------------------------------------*/
1510
8b2e7668
DB
1511static void nop_release(struct device *dev)
1512{
1513 /* nothing to free */
1514}
1515
bae4bd84
DB
1516static struct at91_udc controller = {
1517 .gadget = {
8b2e7668
DB
1518 .ops = &at91_udc_ops,
1519 .ep0 = &controller.ep[0].ep,
1520 .name = driver_name,
1521 .dev = {
c682b170 1522 .init_name = "gadget",
8b2e7668 1523 .release = nop_release,
bae4bd84
DB
1524 }
1525 },
1526 .ep[0] = {
1527 .ep = {
1528 .name = ep0name,
1529 .ops = &at91_ep_ops,
1530 },
1531 .udc = &controller,
1532 .maxpacket = 8,
bae4bd84
DB
1533 .int_mask = 1 << 0,
1534 },
1535 .ep[1] = {
1536 .ep = {
1537 .name = "ep1",
1538 .ops = &at91_ep_ops,
1539 },
1540 .udc = &controller,
1541 .is_pingpong = 1,
1542 .maxpacket = 64,
bae4bd84
DB
1543 .int_mask = 1 << 1,
1544 },
1545 .ep[2] = {
1546 .ep = {
1547 .name = "ep2",
1548 .ops = &at91_ep_ops,
1549 },
1550 .udc = &controller,
1551 .is_pingpong = 1,
1552 .maxpacket = 64,
bae4bd84
DB
1553 .int_mask = 1 << 2,
1554 },
1555 .ep[3] = {
1556 .ep = {
1557 /* could actually do bulk too */
1558 .name = "ep3-int",
1559 .ops = &at91_ep_ops,
1560 },
1561 .udc = &controller,
1562 .maxpacket = 8,
bae4bd84
DB
1563 .int_mask = 1 << 3,
1564 },
1565 .ep[4] = {
1566 .ep = {
1567 .name = "ep4",
1568 .ops = &at91_ep_ops,
1569 },
1570 .udc = &controller,
1571 .is_pingpong = 1,
1572 .maxpacket = 256,
bae4bd84
DB
1573 .int_mask = 1 << 4,
1574 },
1575 .ep[5] = {
1576 .ep = {
1577 .name = "ep5",
1578 .ops = &at91_ep_ops,
1579 },
1580 .udc = &controller,
1581 .is_pingpong = 1,
1582 .maxpacket = 256,
bae4bd84
DB
1583 .int_mask = 1 << 5,
1584 },
8b2e7668 1585 /* ep6 and ep7 are also reserved (custom silicon might use them) */
bae4bd84
DB
1586};
1587
7d12e780 1588static irqreturn_t at91_vbus_irq(int irq, void *_udc)
bae4bd84
DB
1589{
1590 struct at91_udc *udc = _udc;
1591 unsigned value;
1592
1593 /* vbus needs at least brief debouncing */
1594 udelay(10);
f3db6e82 1595 value = gpio_get_value(udc->board.vbus_pin);
bae4bd84
DB
1596 if (value != udc->vbus)
1597 at91_vbus_session(&udc->gadget, value);
1598
1599 return IRQ_HANDLED;
1600}
1601
1602int usb_gadget_register_driver (struct usb_gadget_driver *driver)
1603{
1604 struct at91_udc *udc = &controller;
1605 int retval;
4f4c5e36 1606 unsigned long flags;
bae4bd84
DB
1607
1608 if (!driver
bc92c32a 1609 || driver->speed < USB_SPEED_FULL
bae4bd84 1610 || !driver->bind
bae4bd84
DB
1611 || !driver->setup) {
1612 DBG("bad parameter.\n");
1613 return -EINVAL;
1614 }
1615
1616 if (udc->driver) {
1617 DBG("UDC already has a gadget driver\n");
1618 return -EBUSY;
1619 }
1620
1621 udc->driver = driver;
1622 udc->gadget.dev.driver = &driver->driver;
839214ae 1623 dev_set_drvdata(&udc->gadget.dev, &driver->driver);
bae4bd84
DB
1624 udc->enabled = 1;
1625 udc->selfpowered = 1;
1626
1627 retval = driver->bind(&udc->gadget);
1628 if (retval) {
1629 DBG("driver->bind() returned %d\n", retval);
1630 udc->driver = NULL;
943c4419 1631 udc->gadget.dev.driver = NULL;
839214ae 1632 dev_set_drvdata(&udc->gadget.dev, NULL);
943c4419
WK
1633 udc->enabled = 0;
1634 udc->selfpowered = 0;
bae4bd84
DB
1635 return retval;
1636 }
1637
4f4c5e36 1638 spin_lock_irqsave(&udc->lock, flags);
bae4bd84 1639 pullup(udc, 1);
4f4c5e36 1640 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
1641
1642 DBG("bound to %s\n", driver->driver.name);
1643 return 0;
1644}
1645EXPORT_SYMBOL (usb_gadget_register_driver);
1646
1647int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
1648{
1649 struct at91_udc *udc = &controller;
4f4c5e36 1650 unsigned long flags;
bae4bd84 1651
6bea476c 1652 if (!driver || driver != udc->driver || !driver->unbind)
bae4bd84
DB
1653 return -EINVAL;
1654
4f4c5e36 1655 spin_lock_irqsave(&udc->lock, flags);
bae4bd84 1656 udc->enabled = 0;
ffd3326b 1657 at91_udp_write(udc, AT91_UDP_IDR, ~0);
bae4bd84 1658 pullup(udc, 0);
4f4c5e36 1659 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
1660
1661 driver->unbind(&udc->gadget);
eb0be47d 1662 udc->gadget.dev.driver = NULL;
839214ae 1663 dev_set_drvdata(&udc->gadget.dev, NULL);
bae4bd84
DB
1664 udc->driver = NULL;
1665
1666 DBG("unbound from %s\n", driver->driver.name);
1667 return 0;
1668}
1669EXPORT_SYMBOL (usb_gadget_unregister_driver);
1670
1671/*-------------------------------------------------------------------------*/
1672
1673static void at91udc_shutdown(struct platform_device *dev)
1674{
4f4c5e36
HH
1675 struct at91_udc *udc = platform_get_drvdata(dev);
1676 unsigned long flags;
1677
bae4bd84 1678 /* force disconnect on reboot */
4f4c5e36 1679 spin_lock_irqsave(&udc->lock, flags);
bae4bd84 1680 pullup(platform_get_drvdata(dev), 0);
4f4c5e36 1681 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84
DB
1682}
1683
398acce7 1684static int __init at91udc_probe(struct platform_device *pdev)
bae4bd84
DB
1685{
1686 struct device *dev = &pdev->dev;
1687 struct at91_udc *udc;
1688 int retval;
ffd3326b 1689 struct resource *res;
bae4bd84
DB
1690
1691 if (!dev->platform_data) {
1692 /* small (so we copy it) but critical! */
1693 DBG("missing platform_data\n");
1694 return -ENODEV;
1695 }
1696
8b2e7668 1697 if (pdev->num_resources != 2) {
f3db6e82 1698 DBG("invalid num_resources\n");
8b2e7668
DB
1699 return -ENODEV;
1700 }
1701 if ((pdev->resource[0].flags != IORESOURCE_MEM)
1702 || (pdev->resource[1].flags != IORESOURCE_IRQ)) {
f3db6e82 1703 DBG("invalid resource type\n");
8b2e7668
DB
1704 return -ENODEV;
1705 }
1706
ffd3326b
AV
1707 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1708 if (!res)
1709 return -ENXIO;
1710
d8bb0fd2 1711 if (!request_mem_region(res->start, resource_size(res), driver_name)) {
bae4bd84
DB
1712 DBG("someone's using UDC memory\n");
1713 return -EBUSY;
1714 }
1715
1716 /* init software state */
1717 udc = &controller;
1718 udc->gadget.dev.parent = dev;
1719 udc->board = *(struct at91_udc_data *) dev->platform_data;
1720 udc->pdev = pdev;
bae4bd84 1721 udc->enabled = 0;
4f4c5e36 1722 spin_lock_init(&udc->lock);
bae4bd84 1723
f3db6e82
DB
1724 /* rm9200 needs manual D+ pullup; off by default */
1725 if (cpu_is_at91rm9200()) {
1726 if (udc->board.pullup_pin <= 0) {
1727 DBG("no D+ pullup?\n");
1728 retval = -ENODEV;
1729 goto fail0;
1730 }
1731 retval = gpio_request(udc->board.pullup_pin, "udc_pullup");
1732 if (retval) {
1733 DBG("D+ pullup is busy\n");
1734 goto fail0;
1735 }
1736 gpio_direction_output(udc->board.pullup_pin,
1737 udc->board.pullup_active_low);
1738 }
1739
bb24280f
DB
1740 /* newer chips have more FIFO memory than rm9200 */
1741 if (cpu_is_at91sam9260()) {
1742 udc->ep[0].maxpacket = 64;
1743 udc->ep[3].maxpacket = 64;
1744 udc->ep[4].maxpacket = 512;
1745 udc->ep[5].maxpacket = 512;
23f6d914 1746 } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
bb24280f
DB
1747 udc->ep[3].maxpacket = 64;
1748 } else if (cpu_is_at91sam9263()) {
1749 udc->ep[0].maxpacket = 64;
1750 udc->ep[3].maxpacket = 64;
1751 }
1752
d8bb0fd2 1753 udc->udp_baseaddr = ioremap(res->start, resource_size(res));
ffd3326b 1754 if (!udc->udp_baseaddr) {
f3db6e82
DB
1755 retval = -ENOMEM;
1756 goto fail0a;
ffd3326b
AV
1757 }
1758
1759 udc_reinit(udc);
1760
bae4bd84
DB
1761 /* get interface and function clocks */
1762 udc->iclk = clk_get(dev, "udc_clk");
1763 udc->fclk = clk_get(dev, "udpck");
1764 if (IS_ERR(udc->iclk) || IS_ERR(udc->fclk)) {
1765 DBG("clocks missing\n");
29ba4b53 1766 retval = -ENODEV;
f3db6e82
DB
1767 /* NOTE: we "know" here that refcounts on these are NOPs */
1768 goto fail0b;
bae4bd84
DB
1769 }
1770
1771 retval = device_register(&udc->gadget.dev);
1772 if (retval < 0)
f3db6e82 1773 goto fail0b;
bae4bd84 1774
8b2e7668
DB
1775 /* don't do anything until we have both gadget driver and VBUS */
1776 clk_enable(udc->iclk);
ffd3326b
AV
1777 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
1778 at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff);
29ba4b53
AV
1779 /* Clear all pending interrupts - UDP may be used by bootloader. */
1780 at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff);
8b2e7668 1781 clk_disable(udc->iclk);
bae4bd84
DB
1782
1783 /* request UDC and maybe VBUS irqs */
8b2e7668 1784 udc->udp_irq = platform_get_irq(pdev, 0);
f3db6e82
DB
1785 retval = request_irq(udc->udp_irq, at91_udc_irq,
1786 IRQF_DISABLED, driver_name, udc);
1787 if (retval < 0) {
8b2e7668 1788 DBG("request irq %d failed\n", udc->udp_irq);
bae4bd84
DB
1789 goto fail1;
1790 }
1791 if (udc->board.vbus_pin > 0) {
f3db6e82
DB
1792 retval = gpio_request(udc->board.vbus_pin, "udc_vbus");
1793 if (retval < 0) {
1794 DBG("request vbus pin failed\n");
1795 goto fail2;
1796 }
1797 gpio_direction_input(udc->board.vbus_pin);
1798
29ba4b53
AV
1799 /*
1800 * Get the initial state of VBUS - we cannot expect
1801 * a pending interrupt.
1802 */
f3db6e82 1803 udc->vbus = gpio_get_value(udc->board.vbus_pin);
8b2e7668
DB
1804 if (request_irq(udc->board.vbus_pin, at91_vbus_irq,
1805 IRQF_DISABLED, driver_name, udc)) {
1806 DBG("request vbus irq %d failed\n",
1807 udc->board.vbus_pin);
bae4bd84 1808 retval = -EBUSY;
f3db6e82 1809 goto fail3;
bae4bd84
DB
1810 }
1811 } else {
1812 DBG("no VBUS detection, assuming always-on\n");
1813 udc->vbus = 1;
1814 }
1815 dev_set_drvdata(dev, udc);
8b2e7668 1816 device_init_wakeup(dev, 1);
bae4bd84
DB
1817 create_debug_file(udc);
1818
1819 INFO("%s version %s\n", driver_name, DRIVER_VERSION);
1820 return 0;
1821
f3db6e82
DB
1822fail3:
1823 if (udc->board.vbus_pin > 0)
1824 gpio_free(udc->board.vbus_pin);
1825fail2:
1826 free_irq(udc->udp_irq, udc);
bae4bd84
DB
1827fail1:
1828 device_unregister(&udc->gadget.dev);
f3db6e82
DB
1829fail0b:
1830 iounmap(udc->udp_baseaddr);
1831fail0a:
1832 if (cpu_is_at91rm9200())
1833 gpio_free(udc->board.pullup_pin);
bae4bd84 1834fail0:
d8bb0fd2 1835 release_mem_region(res->start, resource_size(res));
bae4bd84
DB
1836 DBG("%s probe failed, %d\n", driver_name, retval);
1837 return retval;
1838}
1839
398acce7 1840static int __exit at91udc_remove(struct platform_device *pdev)
bae4bd84 1841{
8b2e7668 1842 struct at91_udc *udc = platform_get_drvdata(pdev);
ffd3326b 1843 struct resource *res;
4f4c5e36 1844 unsigned long flags;
bae4bd84
DB
1845
1846 DBG("remove\n");
1847
6bea476c
DB
1848 if (udc->driver)
1849 return -EBUSY;
bae4bd84 1850
4f4c5e36 1851 spin_lock_irqsave(&udc->lock, flags);
6bea476c 1852 pullup(udc, 0);
4f4c5e36 1853 spin_unlock_irqrestore(&udc->lock, flags);
bae4bd84 1854
8b2e7668 1855 device_init_wakeup(&pdev->dev, 0);
bae4bd84 1856 remove_debug_file(udc);
f3db6e82 1857 if (udc->board.vbus_pin > 0) {
bae4bd84 1858 free_irq(udc->board.vbus_pin, udc);
f3db6e82
DB
1859 gpio_free(udc->board.vbus_pin);
1860 }
8b2e7668 1861 free_irq(udc->udp_irq, udc);
bae4bd84 1862 device_unregister(&udc->gadget.dev);
ffd3326b
AV
1863
1864 iounmap(udc->udp_baseaddr);
f3db6e82
DB
1865
1866 if (cpu_is_at91rm9200())
1867 gpio_free(udc->board.pullup_pin);
1868
ffd3326b 1869 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
d8bb0fd2 1870 release_mem_region(res->start, resource_size(res));
bae4bd84
DB
1871
1872 clk_put(udc->iclk);
1873 clk_put(udc->fclk);
1874
1875 return 0;
1876}
1877
1878#ifdef CONFIG_PM
8b2e7668 1879static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg)
bae4bd84 1880{
8b2e7668
DB
1881 struct at91_udc *udc = platform_get_drvdata(pdev);
1882 int wake = udc->driver && device_may_wakeup(&pdev->dev);
4f4c5e36 1883 unsigned long flags;
bae4bd84 1884
8b2e7668
DB
1885 /* Unless we can act normally to the host (letting it wake us up
1886 * whenever it has work for us) force disconnect. Wakeup requires
1887 * PLLB for USB events (signaling for reset, wakeup, or incoming
1888 * tokens) and VBUS irqs (on systems which support them).
bae4bd84 1889 */
8b2e7668
DB
1890 if ((!udc->suspended && udc->addr)
1891 || !wake
1892 || at91_suspend_entering_slow_clock()) {
4f4c5e36 1893 spin_lock_irqsave(&udc->lock, flags);
bae4bd84 1894 pullup(udc, 0);
66e56ce7 1895 wake = 0;
4f4c5e36 1896 spin_unlock_irqrestore(&udc->lock, flags);
8b2e7668
DB
1897 } else
1898 enable_irq_wake(udc->udp_irq);
1899
66e56ce7
DB
1900 udc->active_suspend = wake;
1901 if (udc->board.vbus_pin > 0 && wake)
1902 enable_irq_wake(udc->board.vbus_pin);
bae4bd84
DB
1903 return 0;
1904}
1905
8b2e7668 1906static int at91udc_resume(struct platform_device *pdev)
bae4bd84 1907{
8b2e7668 1908 struct at91_udc *udc = platform_get_drvdata(pdev);
4f4c5e36 1909 unsigned long flags;
bae4bd84 1910
66e56ce7
DB
1911 if (udc->board.vbus_pin > 0 && udc->active_suspend)
1912 disable_irq_wake(udc->board.vbus_pin);
1913
bae4bd84 1914 /* maybe reconnect to host; if so, clocks on */
66e56ce7
DB
1915 if (udc->active_suspend)
1916 disable_irq_wake(udc->udp_irq);
4f4c5e36
HH
1917 else {
1918 spin_lock_irqsave(&udc->lock, flags);
66e56ce7 1919 pullup(udc, 1);
4f4c5e36
HH
1920 spin_unlock_irqrestore(&udc->lock, flags);
1921 }
bae4bd84
DB
1922 return 0;
1923}
1924#else
1925#define at91udc_suspend NULL
1926#define at91udc_resume NULL
1927#endif
1928
dee497df 1929static struct platform_driver at91_udc_driver = {
398acce7 1930 .remove = __exit_p(at91udc_remove),
bae4bd84
DB
1931 .shutdown = at91udc_shutdown,
1932 .suspend = at91udc_suspend,
8b2e7668 1933 .resume = at91udc_resume,
bae4bd84
DB
1934 .driver = {
1935 .name = (char *) driver_name,
1936 .owner = THIS_MODULE,
1937 },
1938};
1939
398acce7 1940static int __init udc_init_module(void)
bae4bd84 1941{
dee497df 1942 return platform_driver_probe(&at91_udc_driver, at91udc_probe);
bae4bd84
DB
1943}
1944module_init(udc_init_module);
1945
398acce7 1946static void __exit udc_exit_module(void)
bae4bd84 1947{
dee497df 1948 platform_driver_unregister(&at91_udc_driver);
bae4bd84
DB
1949}
1950module_exit(udc_exit_module);
1951
8b2e7668 1952MODULE_DESCRIPTION("AT91 udc driver");
bae4bd84
DB
1953MODULE_AUTHOR("Thomas Rathbone, David Brownell");
1954MODULE_LICENSE("GPL");
f34c32f1 1955MODULE_ALIAS("platform:at91_udc");