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atmel_usba_udc: move endpoint declarations into platform data.
[mirror_ubuntu-bionic-kernel.git] / drivers / usb / gadget / atmel_usba_udc.c
CommitLineData
914a3f3b
HS		 1/*
2 * Driver for the Atmel USBA high speed USB device controller
3 *
4 * Copyright (C) 2005-2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/clk.h>
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/device.h>
16#include <linux/dma-mapping.h>
17#include <linux/list.h>
18#include <linux/platform_device.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
8d855317 21#include <linux/usb/atmel_usba_udc.h>
914a3f3b
HS		 22#include <linux/delay.h>
23
24#include <asm/gpio.h>
25#include <asm/arch/board.h>
26
27#include "atmel_usba_udc.h"
28
29
30static struct usba_udc the_udc;
8d855317 31static struct usba_ep *usba_ep;
914a3f3b
HS		 32
33#ifdef CONFIG_USB_GADGET_DEBUG_FS
34#include <linux/debugfs.h>
35#include <linux/uaccess.h>
36
37static int queue_dbg_open(struct inode *inode, struct file *file)
38{
39 struct usba_ep *ep = inode->i_private;
40 struct usba_request *req, *req_copy;
41 struct list_head *queue_data;
42
43 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
44 if (!queue_data)
45 return -ENOMEM;
46 INIT_LIST_HEAD(queue_data);
47
48 spin_lock_irq(&ep->udc->lock);
49 list_for_each_entry(req, &ep->queue, queue) {
50 req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
51 if (!req_copy)
52 goto fail;
53 memcpy(req_copy, req, sizeof(*req_copy));
54 list_add_tail(&req_copy->queue, queue_data);
55 }
56 spin_unlock_irq(&ep->udc->lock);
57
58 file->private_data = queue_data;
59 return 0;
60
61fail:
62 spin_unlock_irq(&ep->udc->lock);
63 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
64 list_del(&req->queue);
65 kfree(req);
66 }
67 kfree(queue_data);
68 return -ENOMEM;
69}
70
71/*
72 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
73 *
74 * b: buffer address
75 * l: buffer length
76 * I/i: interrupt/no interrupt
77 * Z/z: zero/no zero
78 * S/s: short ok/short not ok
79 * s: status
80 * n: nr_packets
81 * F/f: submitted/not submitted to FIFO
82 * D/d: using/not using DMA
83 * L/l: last transaction/not last transaction
84 */
85static ssize_t queue_dbg_read(struct file *file, char __user *buf,
86 size_t nbytes, loff_t *ppos)
87{
88 struct list_head *queue = file->private_data;
89 struct usba_request *req, *tmp_req;
90 size_t len, remaining, actual = 0;
91 char tmpbuf[38];
92
93 if (!access_ok(VERIFY_WRITE, buf, nbytes))
94 return -EFAULT;
95
96 mutex_lock(&file->f_dentry->d_inode->i_mutex);
97 list_for_each_entry_safe(req, tmp_req, queue, queue) {
98 len = snprintf(tmpbuf, sizeof(tmpbuf),
99 "%8p %08x %c%c%c %5d %c%c%c\n",
100 req->req.buf, req->req.length,
101 req->req.no_interrupt ? 'i' : 'I',
102 req->req.zero ? 'Z' : 'z',
103 req->req.short_not_ok ? 's' : 'S',
104 req->req.status,
105 req->submitted ? 'F' : 'f',
106 req->using_dma ? 'D' : 'd',
107 req->last_transaction ? 'L' : 'l');
108 len = min(len, sizeof(tmpbuf));
109 if (len > nbytes)
110 break;
111
112 list_del(&req->queue);
113 kfree(req);
114
115 remaining = __copy_to_user(buf, tmpbuf, len);
116 actual += len - remaining;
117 if (remaining)
118 break;
119
120 nbytes -= len;
121 buf += len;
122 }
123 mutex_unlock(&file->f_dentry->d_inode->i_mutex);
124
125 return actual;
126}
127
128static int queue_dbg_release(struct inode *inode, struct file *file)
129{
130 struct list_head *queue_data = file->private_data;
131 struct usba_request *req, *tmp_req;
132
133 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
134 list_del(&req->queue);
135 kfree(req);
136 }
137 kfree(queue_data);
138 return 0;
139}
140
141static int regs_dbg_open(struct inode *inode, struct file *file)
142{
143 struct usba_udc *udc;
144 unsigned int i;
145 u32 *data;
146 int ret = -ENOMEM;
147
148 mutex_lock(&inode->i_mutex);
149 udc = inode->i_private;
150 data = kmalloc(inode->i_size, GFP_KERNEL);
151 if (!data)
152 goto out;
153
154 spin_lock_irq(&udc->lock);
155 for (i = 0; i < inode->i_size / 4; i++)
156 data[i] = __raw_readl(udc->regs + i * 4);
157 spin_unlock_irq(&udc->lock);
158
159 file->private_data = data;
160 ret = 0;
161
162out:
163 mutex_unlock(&inode->i_mutex);
164
165 return ret;
166}
167
168static ssize_t regs_dbg_read(struct file *file, char __user *buf,
169 size_t nbytes, loff_t *ppos)
170{
171 struct inode *inode = file->f_dentry->d_inode;
172 int ret;
173
174 mutex_lock(&inode->i_mutex);
175 ret = simple_read_from_buffer(buf, nbytes, ppos,
176 file->private_data,
177 file->f_dentry->d_inode->i_size);
178 mutex_unlock(&inode->i_mutex);
179
180 return ret;
181}
182
183static int regs_dbg_release(struct inode *inode, struct file *file)
184{
185 kfree(file->private_data);
186 return 0;
187}
188
189const struct file_operations queue_dbg_fops = {
190 .owner = THIS_MODULE,
191 .open = queue_dbg_open,
192 .llseek = no_llseek,
193 .read = queue_dbg_read,
194 .release = queue_dbg_release,
195};
196
197const struct file_operations regs_dbg_fops = {
198 .owner = THIS_MODULE,
199 .open = regs_dbg_open,
200 .llseek = generic_file_llseek,
201 .read = regs_dbg_read,
202 .release = regs_dbg_release,
203};
204
205static void usba_ep_init_debugfs(struct usba_udc *udc,
206 struct usba_ep *ep)
207{
208 struct dentry *ep_root;
209
210 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
211 if (!ep_root)
212 goto err_root;
213 ep->debugfs_dir = ep_root;
214
215 ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
216 ep, &queue_dbg_fops);
217 if (!ep->debugfs_queue)
218 goto err_queue;
219
220 if (ep->can_dma) {
221 ep->debugfs_dma_status
222 = debugfs_create_u32("dma_status", 0400, ep_root,
223 &ep->last_dma_status);
224 if (!ep->debugfs_dma_status)
225 goto err_dma_status;
226 }
227 if (ep_is_control(ep)) {
228 ep->debugfs_state
229 = debugfs_create_u32("state", 0400, ep_root,
230 &ep->state);
231 if (!ep->debugfs_state)
232 goto err_state;
233 }
234
235 return;
236
237err_state:
238 if (ep->can_dma)
239 debugfs_remove(ep->debugfs_dma_status);
240err_dma_status:
241 debugfs_remove(ep->debugfs_queue);
242err_queue:
243 debugfs_remove(ep_root);
244err_root:
245 dev_err(&ep->udc->pdev->dev,
246 "failed to create debugfs directory for %s\n", ep->ep.name);
247}
248
249static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
250{
251 debugfs_remove(ep->debugfs_queue);
252 debugfs_remove(ep->debugfs_dma_status);
253 debugfs_remove(ep->debugfs_state);
254 debugfs_remove(ep->debugfs_dir);
255 ep->debugfs_dma_status = NULL;
256 ep->debugfs_dir = NULL;
257}
258
259static void usba_init_debugfs(struct usba_udc *udc)
260{
261 struct dentry *root, *regs;
262 struct resource *regs_resource;
263
264 root = debugfs_create_dir(udc->gadget.name, NULL);
265 if (IS_ERR(root) || !root)
266 goto err_root;
267 udc->debugfs_root = root;
268
269 regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
270 if (!regs)
271 goto err_regs;
272
273 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
274 CTRL_IOMEM_ID);
275 regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
276 udc->debugfs_regs = regs;
277
278 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
279
280 return;
281
282err_regs:
283 debugfs_remove(root);
284err_root:
285 udc->debugfs_root = NULL;
286 dev_err(&udc->pdev->dev, "debugfs is not available\n");
287}
288
289static void usba_cleanup_debugfs(struct usba_udc *udc)
290{
291 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
292 debugfs_remove(udc->debugfs_regs);
293 debugfs_remove(udc->debugfs_root);
294 udc->debugfs_regs = NULL;
295 udc->debugfs_root = NULL;
296}
297#else
298static inline void usba_ep_init_debugfs(struct usba_udc *udc,
299 struct usba_ep *ep)
300{
301
302}
303
304static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
305{
306
307}
308
309static inline void usba_init_debugfs(struct usba_udc *udc)
310{
311
312}
313
314static inline void usba_cleanup_debugfs(struct usba_udc *udc)
315{
316
317}
318#endif
319
320static int vbus_is_present(struct usba_udc *udc)
321{
322 if (udc->vbus_pin != -1)
323 return gpio_get_value(udc->vbus_pin);
324
325 /* No Vbus detection: Assume always present */
326 return 1;
327}
328
914a3f3b
HS		 329static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
330{
331 unsigned int transaction_len;
332
333 transaction_len = req->req.length - req->req.actual;
334 req->last_transaction = 1;
335 if (transaction_len > ep->ep.maxpacket) {
336 transaction_len = ep->ep.maxpacket;
337 req->last_transaction = 0;
338 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
339 req->last_transaction = 0;
340
341 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
342 ep->ep.name, req, transaction_len,
343 req->last_transaction ? ", done" : "");
344
5d4c2707 345 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
914a3f3b
HS		 346 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
347 req->req.actual += transaction_len;
348}
349
350static void submit_request(struct usba_ep *ep, struct usba_request *req)
351{
352 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
353 ep->ep.name, req, req->req.length);
354
355 req->req.actual = 0;
356 req->submitted = 1;
357
358 if (req->using_dma) {
359 if (req->req.length == 0) {
360 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
361 return;
362 }
363
364 if (req->req.zero)
365 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
366 else
367 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
368
369 usba_dma_writel(ep, ADDRESS, req->req.dma);
370 usba_dma_writel(ep, CONTROL, req->ctrl);
371 } else {
372 next_fifo_transaction(ep, req);
373 if (req->last_transaction) {
374 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
375 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
376 } else {
377 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
378 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
379 }
380 }
381}
382
383static void submit_next_request(struct usba_ep *ep)
384{
385 struct usba_request *req;
386
387 if (list_empty(&ep->queue)) {
388 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
389 return;
390 }
391
392 req = list_entry(ep->queue.next, struct usba_request, queue);
393 if (!req->submitted)
394 submit_request(ep, req);
395}
396
397static void send_status(struct usba_udc *udc, struct usba_ep *ep)
398{
399 ep->state = STATUS_STAGE_IN;
400 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
401 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
402}
403
404static void receive_data(struct usba_ep *ep)
405{
406 struct usba_udc *udc = ep->udc;
407 struct usba_request *req;
408 unsigned long status;
409 unsigned int bytecount, nr_busy;
410 int is_complete = 0;
411
412 status = usba_ep_readl(ep, STA);
413 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
414
415 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
416
417 while (nr_busy > 0) {
418 if (list_empty(&ep->queue)) {
419 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
420 break;
421 }
422 req = list_entry(ep->queue.next,
423 struct usba_request, queue);
424
425 bytecount = USBA_BFEXT(BYTE_COUNT, status);
426
427 if (status & (1 << 31))
428 is_complete = 1;
429 if (req->req.actual + bytecount >= req->req.length) {
430 is_complete = 1;
431 bytecount = req->req.length - req->req.actual;
432 }
433
5d4c2707 434 memcpy_fromio(req->req.buf + req->req.actual,
914a3f3b
HS		 435 ep->fifo, bytecount);
436 req->req.actual += bytecount;
437
438 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
439
440 if (is_complete) {
441 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
442 req->req.status = 0;
443 list_del_init(&req->queue);
444 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
445 spin_unlock(&udc->lock);
446 req->req.complete(&ep->ep, &req->req);
447 spin_lock(&udc->lock);
448 }
449
450 status = usba_ep_readl(ep, STA);
451 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
452
453 if (is_complete && ep_is_control(ep)) {
454 send_status(udc, ep);
455 break;
456 }
457 }
458}
459
460static void
461request_complete(struct usba_ep *ep, struct usba_request *req, int status)
462{
463 struct usba_udc *udc = ep->udc;
464
465 WARN_ON(!list_empty(&req->queue));
466
467 if (req->req.status == -EINPROGRESS)
468 req->req.status = status;
469
470 if (req->mapped) {
471 dma_unmap_single(
472 &udc->pdev->dev, req->req.dma, req->req.length,
473 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
474 req->req.dma = DMA_ADDR_INVALID;
475 req->mapped = 0;
476 }
477
478 DBG(DBG_GADGET | DBG_REQ,
479 "%s: req %p complete: status %d, actual %u\n",
480 ep->ep.name, req, req->req.status, req->req.actual);
481
482 spin_unlock(&udc->lock);
483 req->req.complete(&ep->ep, &req->req);
484 spin_lock(&udc->lock);
485}
486
487static void
488request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
489{
490 struct usba_request *req, *tmp_req;
491
492 list_for_each_entry_safe(req, tmp_req, list, queue) {
493 list_del_init(&req->queue);
494 request_complete(ep, req, status);
495 }
496}
497
498static int
499usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
500{
501 struct usba_ep *ep = to_usba_ep(_ep);
502 struct usba_udc *udc = ep->udc;
503 unsigned long flags, ept_cfg, maxpacket;
504 unsigned int nr_trans;
505
506 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
507
508 maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff;
509
510 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
511 || ep->index == 0
512 || desc->bDescriptorType != USB_DT_ENDPOINT
513 || maxpacket == 0
514 || maxpacket > ep->fifo_size) {
515 DBG(DBG_ERR, "ep_enable: Invalid argument");
516 return -EINVAL;
517 }
518
519 ep->is_isoc = 0;
520 ep->is_in = 0;
521
522 if (maxpacket <= 8)
523 ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
524 else
525 /* LSB is bit 1, not 0 */
526 ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
527
528 DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
529 ep->ep.name, ept_cfg, maxpacket);
530
531 if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
532 ep->is_in = 1;
533 ept_cfg |= USBA_EPT_DIR_IN;
534 }
535
536 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
537 case USB_ENDPOINT_XFER_CONTROL:
538 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
539 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
540 break;
541 case USB_ENDPOINT_XFER_ISOC:
542 if (!ep->can_isoc) {
543 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
544 ep->ep.name);
545 return -EINVAL;
546 }
547
548 /*
549 * Bits 11:12 specify number of _additional_
550 * transactions per microframe.
551 */
552 nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1;
553 if (nr_trans > 3)
554 return -EINVAL;
555
556 ep->is_isoc = 1;
557 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
558
559 /*
560 * Do triple-buffering on high-bandwidth iso endpoints.
561 */
562 if (nr_trans > 1 && ep->nr_banks == 3)
563 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
564 else
565 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
566 ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
567 break;
568 case USB_ENDPOINT_XFER_BULK:
569 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
570 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
571 break;
572 case USB_ENDPOINT_XFER_INT:
573 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
574 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
575 break;
576 }
577
578 spin_lock_irqsave(&ep->udc->lock, flags);
579
580 if (ep->desc) {
581 spin_unlock_irqrestore(&ep->udc->lock, flags);
582 DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
583 return -EBUSY;
584 }
585
586 ep->desc = desc;
587 ep->ep.maxpacket = maxpacket;
588
589 usba_ep_writel(ep, CFG, ept_cfg);
590 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
591
592 if (ep->can_dma) {
593 u32 ctrl;
594
595 usba_writel(udc, INT_ENB,
596 (usba_readl(udc, INT_ENB)
597 | USBA_BF(EPT_INT, 1 << ep->index)
598 | USBA_BF(DMA_INT, 1 << ep->index)));
599 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
600 usba_ep_writel(ep, CTL_ENB, ctrl);
601 } else {
602 usba_writel(udc, INT_ENB,
603 (usba_readl(udc, INT_ENB)
604 | USBA_BF(EPT_INT, 1 << ep->index)));
605 }
606
607 spin_unlock_irqrestore(&udc->lock, flags);
608
609 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
610 (unsigned long)usba_ep_readl(ep, CFG));
611 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
612 (unsigned long)usba_readl(udc, INT_ENB));
613
614 return 0;
615}
616
617static int usba_ep_disable(struct usb_ep *_ep)
618{
619 struct usba_ep *ep = to_usba_ep(_ep);
620 struct usba_udc *udc = ep->udc;
621 LIST_HEAD(req_list);
622 unsigned long flags;
623
624 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
625
626 spin_lock_irqsave(&udc->lock, flags);
627
628 if (!ep->desc) {
629 spin_unlock_irqrestore(&udc->lock, flags);
630 DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name);
631 return -EINVAL;
632 }
633 ep->desc = NULL;
634
635 list_splice_init(&ep->queue, &req_list);
636 if (ep->can_dma) {
637 usba_dma_writel(ep, CONTROL, 0);
638 usba_dma_writel(ep, ADDRESS, 0);
639 usba_dma_readl(ep, STATUS);
640 }
641 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
642 usba_writel(udc, INT_ENB,
643 usba_readl(udc, INT_ENB)
644 & ~USBA_BF(EPT_INT, 1 << ep->index));
645
646 request_complete_list(ep, &req_list, -ESHUTDOWN);
647
648 spin_unlock_irqrestore(&udc->lock, flags);
649
650 return 0;
651}
652
653static struct usb_request *
654usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
655{
656 struct usba_request *req;
657
658 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
659
660 req = kzalloc(sizeof(*req), gfp_flags);
661 if (!req)
662 return NULL;
663
664 INIT_LIST_HEAD(&req->queue);
665 req->req.dma = DMA_ADDR_INVALID;
666
667 return &req->req;
668}
669
670static void
671usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
672{
673 struct usba_request *req = to_usba_req(_req);
674
675 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
676
677 kfree(req);
678}
679
680static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
681 struct usba_request *req, gfp_t gfp_flags)
682{
683 unsigned long flags;
684 int ret;
685
686 DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
687 ep->ep.name, req->req.length, req->req.dma,
688 req->req.zero ? 'Z' : 'z',
689 req->req.short_not_ok ? 'S' : 's',
690 req->req.no_interrupt ? 'I' : 'i');
691
692 if (req->req.length > 0x10000) {
693 /* Lengths from 0 to 65536 (inclusive) are supported */
694 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
695 return -EINVAL;
696 }
697
698 req->using_dma = 1;
699
700 if (req->req.dma == DMA_ADDR_INVALID) {
701 req->req.dma = dma_map_single(
702 &udc->pdev->dev, req->req.buf, req->req.length,
703 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
704 req->mapped = 1;
705 } else {
706 dma_sync_single_for_device(
707 &udc->pdev->dev, req->req.dma, req->req.length,
708 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
709 req->mapped = 0;
710 }
711
712 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
713 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
714 | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
715
716 if (ep->is_in)
717 req->ctrl |= USBA_DMA_END_BUF_EN;
718
719 /*
720 * Add this request to the queue and submit for DMA if
721 * possible. Check if we're still alive first -- we may have
722 * received a reset since last time we checked.
723 */
724 ret = -ESHUTDOWN;
725 spin_lock_irqsave(&udc->lock, flags);
726 if (ep->desc) {
727 if (list_empty(&ep->queue))
728 submit_request(ep, req);
729
730 list_add_tail(&req->queue, &ep->queue);
731 ret = 0;
732 }
733 spin_unlock_irqrestore(&udc->lock, flags);
734
735 return ret;
736}
737
738static int
739usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
740{
741 struct usba_request *req = to_usba_req(_req);
742 struct usba_ep *ep = to_usba_ep(_ep);
743 struct usba_udc *udc = ep->udc;
744 unsigned long flags;
745 int ret;
746
747 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
748 ep->ep.name, req, _req->length);
749
750 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
751 return -ESHUTDOWN;
752
753 req->submitted = 0;
754 req->using_dma = 0;
755 req->last_transaction = 0;
756
757 _req->status = -EINPROGRESS;
758 _req->actual = 0;
759
760 if (ep->can_dma)
761 return queue_dma(udc, ep, req, gfp_flags);
762
763 /* May have received a reset since last time we checked */
764 ret = -ESHUTDOWN;
765 spin_lock_irqsave(&udc->lock, flags);
766 if (ep->desc) {
767 list_add_tail(&req->queue, &ep->queue);
768
769 if (ep->is_in || (ep_is_control(ep)
770 && (ep->state == DATA_STAGE_IN
771 || ep->state == STATUS_STAGE_IN)))
772 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
773 else
774 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
775 ret = 0;
776 }
777 spin_unlock_irqrestore(&udc->lock, flags);
778
779 return ret;
780}
781
782static void
783usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
784{
785 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
786}
787
788static int stop_dma(struct usba_ep *ep, u32 *pstatus)
789{
790 unsigned int timeout;
791 u32 status;
792
793 /*
794 * Stop the DMA controller. When writing both CH_EN
795 * and LINK to 0, the other bits are not affected.
796 */
797 usba_dma_writel(ep, CONTROL, 0);
798
799 /* Wait for the FIFO to empty */
800 for (timeout = 40; timeout; --timeout) {
801 status = usba_dma_readl(ep, STATUS);
802 if (!(status & USBA_DMA_CH_EN))
803 break;
804 udelay(1);
805 }
806
807 if (pstatus)
808 *pstatus = status;
809
810 if (timeout == 0) {
811 dev_err(&ep->udc->pdev->dev,
812 "%s: timed out waiting for DMA FIFO to empty\n",
813 ep->ep.name);
814 return -ETIMEDOUT;
815 }
816
817 return 0;
818}
819
820static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
821{
822 struct usba_ep *ep = to_usba_ep(_ep);
823 struct usba_udc *udc = ep->udc;
824 struct usba_request *req = to_usba_req(_req);
825 unsigned long flags;
826 u32 status;
827
828 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
829 ep->ep.name, req);
830
831 spin_lock_irqsave(&udc->lock, flags);
832
833 if (req->using_dma) {
834 /*
835 * If this request is currently being transferred,
836 * stop the DMA controller and reset the FIFO.
837 */
838 if (ep->queue.next == &req->queue) {
839 status = usba_dma_readl(ep, STATUS);
840 if (status & USBA_DMA_CH_EN)
841 stop_dma(ep, &status);
842
843#ifdef CONFIG_USB_GADGET_DEBUG_FS
844 ep->last_dma_status = status;
845#endif
846
847 usba_writel(udc, EPT_RST, 1 << ep->index);
848
849 usba_update_req(ep, req, status);
850 }
851 }
852
853 /*
854 * Errors should stop the queue from advancing until the
855 * completion function returns.
856 */
857 list_del_init(&req->queue);
858
859 request_complete(ep, req, -ECONNRESET);
860
861 /* Process the next request if any */
862 submit_next_request(ep);
863 spin_unlock_irqrestore(&udc->lock, flags);
864
865 return 0;
866}
867
868static int usba_ep_set_halt(struct usb_ep *_ep, int value)
869{
870 struct usba_ep *ep = to_usba_ep(_ep);
871 struct usba_udc *udc = ep->udc;
872 unsigned long flags;
873 int ret = 0;
874
875 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
876 value ? "set" : "clear");
877
878 if (!ep->desc) {
879 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
880 ep->ep.name);
881 return -ENODEV;
882 }
883 if (ep->is_isoc) {
884 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
885 ep->ep.name);
886 return -ENOTTY;
887 }
888
889 spin_lock_irqsave(&udc->lock, flags);
890
891 /*
892 * We can't halt IN endpoints while there are still data to be
893 * transferred
894 */
895 if (!list_empty(&ep->queue)
896 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
897 & USBA_BF(BUSY_BANKS, -1L))))) {
898 ret = -EAGAIN;
899 } else {
900 if (value)
901 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
902 else
903 usba_ep_writel(ep, CLR_STA,
904 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
905 usba_ep_readl(ep, STA);
906 }
907
908 spin_unlock_irqrestore(&udc->lock, flags);
909
910 return ret;
911}
912
913static int usba_ep_fifo_status(struct usb_ep *_ep)
914{
915 struct usba_ep *ep = to_usba_ep(_ep);
916
917 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
918}
919
920static void usba_ep_fifo_flush(struct usb_ep *_ep)
921{
922 struct usba_ep *ep = to_usba_ep(_ep);
923 struct usba_udc *udc = ep->udc;
924
925 usba_writel(udc, EPT_RST, 1 << ep->index);
926}
927
928static const struct usb_ep_ops usba_ep_ops = {
929 .enable = usba_ep_enable,
930 .disable = usba_ep_disable,
931 .alloc_request = usba_ep_alloc_request,
932 .free_request = usba_ep_free_request,
933 .queue = usba_ep_queue,
934 .dequeue = usba_ep_dequeue,
935 .set_halt = usba_ep_set_halt,
936 .fifo_status = usba_ep_fifo_status,
937 .fifo_flush = usba_ep_fifo_flush,
938};
939
940static int usba_udc_get_frame(struct usb_gadget *gadget)
941{
942 struct usba_udc *udc = to_usba_udc(gadget);
943
944 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
945}
946
58ed7b94
HS		 947static int usba_udc_wakeup(struct usb_gadget *gadget)
948{
949 struct usba_udc *udc = to_usba_udc(gadget);
950 unsigned long flags;
951 u32 ctrl;
952 int ret = -EINVAL;
953
954 spin_lock_irqsave(&udc->lock, flags);
955 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
956 ctrl = usba_readl(udc, CTRL);
957 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
958 ret = 0;
959 }
960 spin_unlock_irqrestore(&udc->lock, flags);
961
962 return ret;
963}
964
965static int
966usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
967{
968 struct usba_udc *udc = to_usba_udc(gadget);
969 unsigned long flags;
970
971 spin_lock_irqsave(&udc->lock, flags);
972 if (is_selfpowered)
973 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
974 else
975 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
976 spin_unlock_irqrestore(&udc->lock, flags);
977
978 return 0;
979}
980
914a3f3b 981static const struct usb_gadget_ops usba_udc_ops = {
58ed7b94
HS		 982 .get_frame = usba_udc_get_frame,
983 .wakeup = usba_udc_wakeup,
984 .set_selfpowered = usba_udc_set_selfpowered,
914a3f3b
HS		 985};
986
914a3f3b
HS		 987static struct usb_endpoint_descriptor usba_ep0_desc = {
988 .bLength = USB_DT_ENDPOINT_SIZE,
989 .bDescriptorType = USB_DT_ENDPOINT,
990 .bEndpointAddress = 0,
991 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
992 .wMaxPacketSize = __constant_cpu_to_le16(64),
993 /* FIXME: I have no idea what to put here */
994 .bInterval = 1,
995};
996
997static void nop_release(struct device *dev)
998{
999
1000}
1001
1002static struct usba_udc the_udc = {
1003 .gadget = {
1004 .ops = &usba_udc_ops,
914a3f3b
HS		 1005 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
1006 .is_dualspeed = 1,
1007 .name = "atmel_usba_udc",
1008 .dev = {
1009 .bus_id = "gadget",
1010 .release = nop_release,
1011 },
1012 },
1013
1014 .lock = SPIN_LOCK_UNLOCKED,
1015};
1016
1017/*
1018 * Called with interrupts disabled and udc->lock held.
1019 */
1020static void reset_all_endpoints(struct usba_udc *udc)
1021{
1022 struct usba_ep *ep;
1023 struct usba_request *req, *tmp_req;
1024
1025 usba_writel(udc, EPT_RST, ~0UL);
1026
1027 ep = to_usba_ep(udc->gadget.ep0);
1028 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1029 list_del_init(&req->queue);
1030 request_complete(ep, req, -ECONNRESET);
1031 }
1032
1033 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
58ed7b94
HS		 1034 if (ep->desc) {
1035 spin_unlock(&udc->lock);
914a3f3b 1036 usba_ep_disable(&ep->ep);
58ed7b94
HS		 1037 spin_lock(&udc->lock);
1038 }
914a3f3b
HS		 1039 }
1040}
1041
1042static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1043{
1044 struct usba_ep *ep;
1045
1046 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1047 return to_usba_ep(udc->gadget.ep0);
1048
1049 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1050 u8 bEndpointAddress;
1051
1052 if (!ep->desc)
1053 continue;
1054 bEndpointAddress = ep->desc->bEndpointAddress;
1055 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1056 continue;
1057 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1058 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1059 return ep;
1060 }
1061
1062 return NULL;
1063}
1064
1065/* Called with interrupts disabled and udc->lock held */
1066static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1067{
1068 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1069 ep->state = WAIT_FOR_SETUP;
1070}
1071
1072static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1073{
1074 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1075 return 1;
1076 return 0;
1077}
1078
1079static inline void set_address(struct usba_udc *udc, unsigned int addr)
1080{
1081 u32 regval;
1082
1083 DBG(DBG_BUS, "setting address %u...\n", addr);
1084 regval = usba_readl(udc, CTRL);
1085 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1086 usba_writel(udc, CTRL, regval);
1087}
1088
1089static int do_test_mode(struct usba_udc *udc)
1090{
1091 static const char test_packet_buffer[] = {
1092 /* JKJKJKJK * 9 */
1093 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1094 /* JJKKJJKK * 8 */
1095 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1096 /* JJKKJJKK * 8 */
1097 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1098 /* JJJJJJJKKKKKKK * 8 */
1099 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1100 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1101 /* JJJJJJJK * 8 */
1102 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1103 /* {JKKKKKKK * 10}, JK */
1104 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1105 };
1106 struct usba_ep *ep;
1107 struct device *dev = &udc->pdev->dev;
1108 int test_mode;
1109
1110 test_mode = udc->test_mode;
1111
1112 /* Start from a clean slate */
1113 reset_all_endpoints(udc);
1114
1115 switch (test_mode) {
1116 case 0x0100:
1117 /* Test_J */
1118 usba_writel(udc, TST, USBA_TST_J_MODE);
1119 dev_info(dev, "Entering Test_J mode...\n");
1120 break;
1121 case 0x0200:
1122 /* Test_K */
1123 usba_writel(udc, TST, USBA_TST_K_MODE);
1124 dev_info(dev, "Entering Test_K mode...\n");
1125 break;
1126 case 0x0300:
1127 /*
1128 * Test_SE0_NAK: Force high-speed mode and set up ep0
1129 * for Bulk IN transfers
1130 */
1131 ep = &usba_ep[0];
1132 usba_writel(udc, TST,
1133 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1134 usba_ep_writel(ep, CFG,
1135 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1136 | USBA_EPT_DIR_IN
1137 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1138 | USBA_BF(BK_NUMBER, 1));
1139 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1140 set_protocol_stall(udc, ep);
1141 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1142 } else {
1143 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1144 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1145 }
1146 break;
1147 case 0x0400:
1148 /* Test_Packet */
1149 ep = &usba_ep[0];
1150 usba_ep_writel(ep, CFG,
1151 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1152 | USBA_EPT_DIR_IN
1153 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1154 | USBA_BF(BK_NUMBER, 1));
1155 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1156 set_protocol_stall(udc, ep);
1157 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1158 } else {
1159 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1160 usba_writel(udc, TST, USBA_TST_PKT_MODE);
5d4c2707 1161 memcpy_toio(ep->fifo, test_packet_buffer,
914a3f3b
HS		 1162 sizeof(test_packet_buffer));
1163 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1164 dev_info(dev, "Entering Test_Packet mode...\n");
1165 }
1166 break;
1167 default:
1168 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1169 return -EINVAL;
1170 }
1171
1172 return 0;
1173}
1174
1175/* Avoid overly long expressions */
1176static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1177{
1178 if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1179 return true;
1180 return false;
1181}
1182
1183static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1184{
1185 if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
1186 return true;
1187 return false;
1188}
1189
1190static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1191{
1192 if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
1193 return true;
1194 return false;
1195}
1196
1197static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1198 struct usb_ctrlrequest *crq)
1199{
1200 int retval = 0;;
1201
1202 switch (crq->bRequest) {
1203 case USB_REQ_GET_STATUS: {
1204 u16 status;
1205
1206 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
58ed7b94 1207 status = cpu_to_le16(udc->devstatus);
914a3f3b
HS		 1208 } else if (crq->bRequestType
1209 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1210 status = __constant_cpu_to_le16(0);
1211 } else if (crq->bRequestType
1212 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1213 struct usba_ep *target;
1214
1215 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1216 if (!target)
1217 goto stall;
1218
1219 status = 0;
1220 if (is_stalled(udc, target))
1221 status |= __constant_cpu_to_le16(1);
1222 } else
1223 goto delegate;
1224
1225 /* Write directly to the FIFO. No queueing is done. */
1226 if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
1227 goto stall;
1228 ep->state = DATA_STAGE_IN;
1229 __raw_writew(status, ep->fifo);
1230 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1231 break;
1232 }
1233
1234 case USB_REQ_CLEAR_FEATURE: {
1235 if (crq->bRequestType == USB_RECIP_DEVICE) {
58ed7b94
HS		 1236 if (feature_is_dev_remote_wakeup(crq))
1237 udc->devstatus
1238 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1239 else
914a3f3b
HS		 1240 /* Can't CLEAR_FEATURE TEST_MODE */
1241 goto stall;
914a3f3b
HS		 1242 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1243 struct usba_ep *target;
1244
1245 if (crq->wLength != __constant_cpu_to_le16(0)
1246 || !feature_is_ep_halt(crq))
1247 goto stall;
1248 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1249 if (!target)
1250 goto stall;
1251
1252 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1253 if (target->index != 0)
1254 usba_ep_writel(target, CLR_STA,
1255 USBA_TOGGLE_CLR);
1256 } else {
1257 goto delegate;
1258 }
1259
1260 send_status(udc, ep);
1261 break;
1262 }
1263
1264 case USB_REQ_SET_FEATURE: {
1265 if (crq->bRequestType == USB_RECIP_DEVICE) {
1266 if (feature_is_dev_test_mode(crq)) {
1267 send_status(udc, ep);
1268 ep->state = STATUS_STAGE_TEST;
1269 udc->test_mode = le16_to_cpu(crq->wIndex);
1270 return 0;
1271 } else if (feature_is_dev_remote_wakeup(crq)) {
58ed7b94 1272 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
914a3f3b
HS		 1273 } else {
1274 goto stall;
1275 }
1276 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1277 struct usba_ep *target;
1278
1279 if (crq->wLength != __constant_cpu_to_le16(0)
1280 || !feature_is_ep_halt(crq))
1281 goto stall;
1282
1283 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1284 if (!target)
1285 goto stall;
1286
1287 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1288 } else
1289 goto delegate;
1290
1291 send_status(udc, ep);
1292 break;
1293 }
1294
1295 case USB_REQ_SET_ADDRESS:
1296 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1297 goto delegate;
1298
1299 set_address(udc, le16_to_cpu(crq->wValue));
1300 send_status(udc, ep);
1301 ep->state = STATUS_STAGE_ADDR;
1302 break;
1303
1304 default:
1305delegate:
1306 spin_unlock(&udc->lock);
1307 retval = udc->driver->setup(&udc->gadget, crq);
1308 spin_lock(&udc->lock);
1309 }
1310
1311 return retval;
1312
1313stall:
00274921 1314 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
914a3f3b
HS		 1315 "halting endpoint...\n",
1316 ep->ep.name, crq->bRequestType, crq->bRequest,
1317 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1318 le16_to_cpu(crq->wLength));
1319 set_protocol_stall(udc, ep);
1320 return -1;
1321}
1322
1323static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1324{
1325 struct usba_request *req;
1326 u32 epstatus;
1327 u32 epctrl;
1328
1329restart:
1330 epstatus = usba_ep_readl(ep, STA);
1331 epctrl = usba_ep_readl(ep, CTL);
1332
1333 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1334 ep->ep.name, ep->state, epstatus, epctrl);
1335
1336 req = NULL;
1337 if (!list_empty(&ep->queue))
1338 req = list_entry(ep->queue.next,
1339 struct usba_request, queue);
1340
1341 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1342 if (req->submitted)
1343 next_fifo_transaction(ep, req);
1344 else
1345 submit_request(ep, req);
1346
1347 if (req->last_transaction) {
1348 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1349 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1350 }
1351 goto restart;
1352 }
1353 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1354 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1355
1356 switch (ep->state) {
1357 case DATA_STAGE_IN:
1358 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1359 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1360 ep->state = STATUS_STAGE_OUT;
1361 break;
1362 case STATUS_STAGE_ADDR:
1363 /* Activate our new address */
1364 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1365 | USBA_FADDR_EN));
1366 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1367 ep->state = WAIT_FOR_SETUP;
1368 break;
1369 case STATUS_STAGE_IN:
1370 if (req) {
1371 list_del_init(&req->queue);
1372 request_complete(ep, req, 0);
1373 submit_next_request(ep);
1374 }
1375 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1376 ep->state = WAIT_FOR_SETUP;
1377 break;
1378 case STATUS_STAGE_TEST:
1379 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1380 ep->state = WAIT_FOR_SETUP;
1381 if (do_test_mode(udc))
1382 set_protocol_stall(udc, ep);
1383 break;
1384 default:
00274921 1385 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
914a3f3b
HS		 1386 "halting endpoint...\n",
1387 ep->ep.name, ep->state);
1388 set_protocol_stall(udc, ep);
1389 break;
1390 }
1391
1392 goto restart;
1393 }
1394 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1395 switch (ep->state) {
1396 case STATUS_STAGE_OUT:
1397 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1398 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1399
1400 if (req) {
1401 list_del_init(&req->queue);
1402 request_complete(ep, req, 0);
1403 }
1404 ep->state = WAIT_FOR_SETUP;
1405 break;
1406
1407 case DATA_STAGE_OUT:
1408 receive_data(ep);
1409 break;
1410
1411 default:
1412 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1413 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
00274921 1414 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
914a3f3b
HS		 1415 "halting endpoint...\n",
1416 ep->ep.name, ep->state);
1417 set_protocol_stall(udc, ep);
1418 break;
1419 }
1420
1421 goto restart;
1422 }
1423 if (epstatus & USBA_RX_SETUP) {
1424 union {
1425 struct usb_ctrlrequest crq;
1426 unsigned long data[2];
1427 } crq;
1428 unsigned int pkt_len;
1429 int ret;
1430
1431 if (ep->state != WAIT_FOR_SETUP) {
1432 /*
1433 * Didn't expect a SETUP packet at this
1434 * point. Clean up any pending requests (which
1435 * may be successful).
1436 */
1437 int status = -EPROTO;
1438
1439 /*
1440 * RXRDY and TXCOMP are dropped when SETUP
1441 * packets arrive. Just pretend we received
1442 * the status packet.
1443 */
1444 if (ep->state == STATUS_STAGE_OUT
1445 || ep->state == STATUS_STAGE_IN) {
1446 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1447 status = 0;
1448 }
1449
1450 if (req) {
1451 list_del_init(&req->queue);
1452 request_complete(ep, req, status);
1453 }
1454 }
1455
1456 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1457 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1458 if (pkt_len != sizeof(crq)) {
00274921 1459 pr_warning("udc: Invalid packet length %u "
914a3f3b
HS		 1460 "(expected %lu)\n", pkt_len, sizeof(crq));
1461 set_protocol_stall(udc, ep);
1462 return;
1463 }
1464
1465 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
5d4c2707 1466 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
914a3f3b
HS		 1467
1468 /* Free up one bank in the FIFO so that we can
1469 * generate or receive a reply right away. */
1470 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1471
1472 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1473 ep->state, crq.crq.bRequestType,
1474 crq.crq.bRequest); */
1475
1476 if (crq.crq.bRequestType & USB_DIR_IN) {
1477 /*
1478 * The USB 2.0 spec states that "if wLength is
1479 * zero, there is no data transfer phase."
1480 * However, testusb #14 seems to actually
1481 * expect a data phase even if wLength = 0...
1482 */
1483 ep->state = DATA_STAGE_IN;
1484 } else {
1485 if (crq.crq.wLength != __constant_cpu_to_le16(0))
1486 ep->state = DATA_STAGE_OUT;
1487 else
1488 ep->state = STATUS_STAGE_IN;
1489 }
1490
1491 ret = -1;
1492 if (ep->index == 0)
1493 ret = handle_ep0_setup(udc, ep, &crq.crq);
1494 else {
1495 spin_unlock(&udc->lock);
1496 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1497 spin_lock(&udc->lock);
1498 }
1499
1500 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1501 crq.crq.bRequestType, crq.crq.bRequest,
1502 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1503
1504 if (ret < 0) {
1505 /* Let the host know that we failed */
1506 set_protocol_stall(udc, ep);
1507 }
1508 }
1509}
1510
1511static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1512{
1513 struct usba_request *req;
1514 u32 epstatus;
1515 u32 epctrl;
1516
1517 epstatus = usba_ep_readl(ep, STA);
1518 epctrl = usba_ep_readl(ep, CTL);
1519
1520 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1521
1522 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1523 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1524
1525 if (list_empty(&ep->queue)) {
1526 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1527 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1528 return;
1529 }
1530
1531 req = list_entry(ep->queue.next, struct usba_request, queue);
1532
1533 if (req->using_dma) {
1534 /* Send a zero-length packet */
1535 usba_ep_writel(ep, SET_STA,
1536 USBA_TX_PK_RDY);
1537 usba_ep_writel(ep, CTL_DIS,
1538 USBA_TX_PK_RDY);
1539 list_del_init(&req->queue);
1540 submit_next_request(ep);
1541 request_complete(ep, req, 0);
1542 } else {
1543 if (req->submitted)
1544 next_fifo_transaction(ep, req);
1545 else
1546 submit_request(ep, req);
1547
1548 if (req->last_transaction) {
1549 list_del_init(&req->queue);
1550 submit_next_request(ep);
1551 request_complete(ep, req, 0);
1552 }
1553 }
1554
1555 epstatus = usba_ep_readl(ep, STA);
1556 epctrl = usba_ep_readl(ep, CTL);
1557 }
1558 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1559 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1560 receive_data(ep);
1561 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1562 }
1563}
1564
1565static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1566{
1567 struct usba_request *req;
1568 u32 status, control, pending;
1569
1570 status = usba_dma_readl(ep, STATUS);
1571 control = usba_dma_readl(ep, CONTROL);
1572#ifdef CONFIG_USB_GADGET_DEBUG_FS
1573 ep->last_dma_status = status;
1574#endif
1575 pending = status & control;
1576 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1577
1578 if (status & USBA_DMA_CH_EN) {
1579 dev_err(&udc->pdev->dev,
1580 "DMA_CH_EN is set after transfer is finished!\n");
1581 dev_err(&udc->pdev->dev,
1582 "status=%#08x, pending=%#08x, control=%#08x\n",
1583 status, pending, control);
1584
1585 /*
1586 * try to pretend nothing happened. We might have to
1587 * do something here...
1588 */
1589 }
1590
1591 if (list_empty(&ep->queue))
1592 /* Might happen if a reset comes along at the right moment */
1593 return;
1594
1595 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1596 req = list_entry(ep->queue.next, struct usba_request, queue);
1597 usba_update_req(ep, req, status);
1598
1599 list_del_init(&req->queue);
1600 submit_next_request(ep);
1601 request_complete(ep, req, 0);
1602 }
1603}
1604
1605static irqreturn_t usba_udc_irq(int irq, void *devid)
1606{
1607 struct usba_udc *udc = devid;
1608 u32 status;
1609 u32 dma_status;
1610 u32 ep_status;
1611
1612 spin_lock(&udc->lock);
1613
1614 status = usba_readl(udc, INT_STA);
1615 DBG(DBG_INT, "irq, status=%#08x\n", status);
1616
1617 if (status & USBA_DET_SUSPEND) {
1618 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1619 DBG(DBG_BUS, "Suspend detected\n");
1620 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1621 && udc->driver && udc->driver->suspend) {
1622 spin_unlock(&udc->lock);
1623 udc->driver->suspend(&udc->gadget);
1624 spin_lock(&udc->lock);
1625 }
1626 }
1627
1628 if (status & USBA_WAKE_UP) {
1629 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1630 DBG(DBG_BUS, "Wake Up CPU detected\n");
1631 }
1632
1633 if (status & USBA_END_OF_RESUME) {
1634 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1635 DBG(DBG_BUS, "Resume detected\n");
1636 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1637 && udc->driver && udc->driver->resume) {
1638 spin_unlock(&udc->lock);
1639 udc->driver->resume(&udc->gadget);
1640 spin_lock(&udc->lock);
1641 }
1642 }
1643
1644 dma_status = USBA_BFEXT(DMA_INT, status);
1645 if (dma_status) {
1646 int i;
1647
1648 for (i = 1; i < USBA_NR_ENDPOINTS; i++)
1649 if (dma_status & (1 << i))
1650 usba_dma_irq(udc, &usba_ep[i]);
1651 }
1652
1653 ep_status = USBA_BFEXT(EPT_INT, status);
1654 if (ep_status) {
1655 int i;
1656
1657 for (i = 0; i < USBA_NR_ENDPOINTS; i++)
1658 if (ep_status & (1 << i)) {
1659 if (ep_is_control(&usba_ep[i]))
1660 usba_control_irq(udc, &usba_ep[i]);
1661 else
1662 usba_ep_irq(udc, &usba_ep[i]);
1663 }
1664 }
1665
1666 if (status & USBA_END_OF_RESET) {
1667 struct usba_ep *ep0;
1668
1669 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1670 reset_all_endpoints(udc);
1671
1672 if (status & USBA_HIGH_SPEED) {
1673 DBG(DBG_BUS, "High-speed bus reset detected\n");
1674 udc->gadget.speed = USB_SPEED_HIGH;
1675 } else {
1676 DBG(DBG_BUS, "Full-speed bus reset detected\n");
1677 udc->gadget.speed = USB_SPEED_FULL;
1678 }
1679
1680 ep0 = &usba_ep[0];
1681 ep0->desc = &usba_ep0_desc;
1682 ep0->state = WAIT_FOR_SETUP;
1683 usba_ep_writel(ep0, CFG,
1684 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1685 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1686 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1687 usba_ep_writel(ep0, CTL_ENB,
1688 USBA_EPT_ENABLE | USBA_RX_SETUP);
1689 usba_writel(udc, INT_ENB,
1690 (usba_readl(udc, INT_ENB)
1691 | USBA_BF(EPT_INT, 1)
1692 | USBA_DET_SUSPEND
1693 | USBA_END_OF_RESUME));
1694
1695 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1696 dev_warn(&udc->pdev->dev,
1697 "WARNING: EP0 configuration is invalid!\n");
1698 }
1699
1700 spin_unlock(&udc->lock);
1701
1702 return IRQ_HANDLED;
1703}
1704
1705static irqreturn_t usba_vbus_irq(int irq, void *devid)
1706{
1707 struct usba_udc *udc = devid;
1708 int vbus;
1709
1710 /* debounce */
1711 udelay(10);
1712
1713 spin_lock(&udc->lock);
1714
1715 /* May happen if Vbus pin toggles during probe() */
1716 if (!udc->driver)
1717 goto out;
1718
1719 vbus = gpio_get_value(udc->vbus_pin);
1720 if (vbus != udc->vbus_prev) {
1721 if (vbus) {
1722 usba_writel(udc, CTRL, USBA_EN_USBA);
1723 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1724 } else {
1725 udc->gadget.speed = USB_SPEED_UNKNOWN;
1726 reset_all_endpoints(udc);
1727 usba_writel(udc, CTRL, 0);
1728 spin_unlock(&udc->lock);
1729 udc->driver->disconnect(&udc->gadget);
1730 spin_lock(&udc->lock);
1731 }
1732 udc->vbus_prev = vbus;
1733 }
1734
1735out:
1736 spin_unlock(&udc->lock);
1737
1738 return IRQ_HANDLED;
1739}
1740
1741int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1742{
1743 struct usba_udc *udc = &the_udc;
1744 unsigned long flags;
1745 int ret;
1746
1747 if (!udc->pdev)
1748 return -ENODEV;
1749
1750 spin_lock_irqsave(&udc->lock, flags);
1751 if (udc->driver) {
1752 spin_unlock_irqrestore(&udc->lock, flags);
1753 return -EBUSY;
1754 }
1755
58ed7b94 1756 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
914a3f3b
HS		 1757 udc->driver = driver;
1758 udc->gadget.dev.driver = &driver->driver;
1759 spin_unlock_irqrestore(&udc->lock, flags);
1760
1761 clk_enable(udc->pclk);
1762 clk_enable(udc->hclk);
1763
1764 ret = driver->bind(&udc->gadget);
1765 if (ret) {
1766 DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
1767 driver->driver.name, ret);
1768 goto err_driver_bind;
1769 }
1770
1771 DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
1772
1773 udc->vbus_prev = 0;
1774 if (udc->vbus_pin != -1)
1775 enable_irq(gpio_to_irq(udc->vbus_pin));
1776
1777 /* If Vbus is present, enable the controller and wait for reset */
1778 spin_lock_irqsave(&udc->lock, flags);
1779 if (vbus_is_present(udc) && udc->vbus_prev == 0) {
1780 usba_writel(udc, CTRL, USBA_EN_USBA);
1781 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1782 }
1783 spin_unlock_irqrestore(&udc->lock, flags);
1784
1785 return 0;
1786
1787err_driver_bind:
1788 udc->driver = NULL;
1789 udc->gadget.dev.driver = NULL;
1790 return ret;
1791}
1792EXPORT_SYMBOL(usb_gadget_register_driver);
1793
1794int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1795{
1796 struct usba_udc *udc = &the_udc;
1797 unsigned long flags;
1798
1799 if (!udc->pdev)
1800 return -ENODEV;
1801 if (driver != udc->driver)
1802 return -EINVAL;
1803
1804 if (udc->vbus_pin != -1)
1805 disable_irq(gpio_to_irq(udc->vbus_pin));
1806
1807 spin_lock_irqsave(&udc->lock, flags);
1808 udc->gadget.speed = USB_SPEED_UNKNOWN;
1809 reset_all_endpoints(udc);
1810 spin_unlock_irqrestore(&udc->lock, flags);
1811
1812 /* This will also disable the DP pullup */
1813 usba_writel(udc, CTRL, 0);
1814
1815 driver->unbind(&udc->gadget);
1816 udc->gadget.dev.driver = NULL;
1817 udc->driver = NULL;
1818
1819 clk_disable(udc->hclk);
1820 clk_disable(udc->pclk);
1821
1822 DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
1823
1824 return 0;
1825}
1826EXPORT_SYMBOL(usb_gadget_unregister_driver);
1827
1828static int __init usba_udc_probe(struct platform_device *pdev)
1829{
1830 struct usba_platform_data *pdata = pdev->dev.platform_data;
1831 struct resource *regs, *fifo;
1832 struct clk *pclk, *hclk;
1833 struct usba_udc *udc = &the_udc;
1834 int irq, ret, i;
1835
1836 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
1837 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
8d855317 1838 if (!regs || !fifo || !pdata)
914a3f3b
HS		 1839 return -ENXIO;
1840
1841 irq = platform_get_irq(pdev, 0);
1842 if (irq < 0)
1843 return irq;
1844
1845 pclk = clk_get(&pdev->dev, "pclk");
1846 if (IS_ERR(pclk))
1847 return PTR_ERR(pclk);
1848 hclk = clk_get(&pdev->dev, "hclk");
1849 if (IS_ERR(hclk)) {
1850 ret = PTR_ERR(hclk);
1851 goto err_get_hclk;
1852 }
1853
1854 udc->pdev = pdev;
1855 udc->pclk = pclk;
1856 udc->hclk = hclk;
1857 udc->vbus_pin = -1;
1858
1859 ret = -ENOMEM;
1860 udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
1861 if (!udc->regs) {
1862 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
1863 goto err_map_regs;
1864 }
1865 dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
1866 (unsigned long)regs->start, udc->regs);
1867 udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
1868 if (!udc->fifo) {
1869 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
1870 goto err_map_fifo;
1871 }
1872 dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
1873 (unsigned long)fifo->start, udc->fifo);
1874
1875 device_initialize(&udc->gadget.dev);
1876 udc->gadget.dev.parent = &pdev->dev;
1877 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1878
1879 platform_set_drvdata(pdev, udc);
1880
1881 /* Make sure we start from a clean slate */
1882 clk_enable(pclk);
1883 usba_writel(udc, CTRL, 0);
1884 clk_disable(pclk);
1885
8d855317
SP		 1886 usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep,
1887 GFP_KERNEL);
1888 if (!usba_ep)
1889 goto err_alloc_ep;
1890
1891 the_udc.gadget.ep0 = &usba_ep[0].ep;
1892
914a3f3b
HS		 1893 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
1894 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
1895 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
1896 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
8d855317
SP		 1897 usba_ep[0].ep.ops = &usba_ep_ops;
1898 usba_ep[0].ep.name = pdata->ep[0].name;
1899 usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
1900 usba_ep[0].udc = &the_udc;
1901 INIT_LIST_HEAD(&usba_ep[0].queue);
1902 usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
1903 usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
1904 usba_ep[0].index = pdata->ep[0].index;
1905 usba_ep[0].can_dma = pdata->ep[0].can_dma;
1906 usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
1907
1908 for (i = 1; i < pdata->num_ep; i++) {
914a3f3b
HS		 1909 struct usba_ep *ep = &usba_ep[i];
1910
1911 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1912 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
1913 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
8d855317
SP		 1914 ep->ep.ops = &usba_ep_ops;
1915 ep->ep.name = pdata->ep[i].name;
1916 ep->ep.maxpacket = pdata->ep[i].fifo_size;
1917 ep->udc = &the_udc;
1918 INIT_LIST_HEAD(&ep->queue);
1919 ep->fifo_size = pdata->ep[i].fifo_size;
1920 ep->nr_banks = pdata->ep[i].nr_banks;
1921 ep->index = pdata->ep[i].index;
1922 ep->can_dma = pdata->ep[i].can_dma;
1923 ep->can_isoc = pdata->ep[i].can_isoc;
914a3f3b
HS		 1924
1925 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
1926 }
1927
1928 ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
1929 if (ret) {
1930 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
1931 irq, ret);
1932 goto err_request_irq;
1933 }
1934 udc->irq = irq;
1935
1936 ret = device_add(&udc->gadget.dev);
1937 if (ret) {
1938 dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
1939 goto err_device_add;
1940 }
1941
8d855317 1942 if (pdata->vbus_pin >= 0) {
914a3f3b
HS		 1943 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
1944 udc->vbus_pin = pdata->vbus_pin;
1945
1946 ret = request_irq(gpio_to_irq(udc->vbus_pin),
1947 usba_vbus_irq, 0,
1948 "atmel_usba_udc", udc);
1949 if (ret) {
1950 gpio_free(udc->vbus_pin);
1951 udc->vbus_pin = -1;
1952 dev_warn(&udc->pdev->dev,
1953 "failed to request vbus irq; "
1954 "assuming always on\n");
1955 } else {
1956 disable_irq(gpio_to_irq(udc->vbus_pin));
1957 }
1958 }
1959 }
1960
1961 usba_init_debugfs(udc);
8d855317 1962 for (i = 1; i < pdata->num_ep; i++)
914a3f3b
HS		 1963 usba_ep_init_debugfs(udc, &usba_ep[i]);
1964
1965 return 0;
1966
1967err_device_add:
1968 free_irq(irq, udc);
1969err_request_irq:
8d855317
SP		 1970 kfree(usba_ep);
1971err_alloc_ep:
914a3f3b
HS		 1972 iounmap(udc->fifo);
1973err_map_fifo:
1974 iounmap(udc->regs);
1975err_map_regs:
1976 clk_put(hclk);
1977err_get_hclk:
1978 clk_put(pclk);
1979
1980 platform_set_drvdata(pdev, NULL);
1981
1982 return ret;
1983}
1984
1985static int __exit usba_udc_remove(struct platform_device *pdev)
1986{
1987 struct usba_udc *udc;
1988 int i;
8d855317 1989 struct usba_platform_data *pdata = pdev->dev.platform_data;
914a3f3b
HS		 1990
1991 udc = platform_get_drvdata(pdev);
1992
8d855317 1993 for (i = 1; i < pdata->num_ep; i++)
914a3f3b
HS		 1994 usba_ep_cleanup_debugfs(&usba_ep[i]);
1995 usba_cleanup_debugfs(udc);
1996
1997 if (udc->vbus_pin != -1)
1998 gpio_free(udc->vbus_pin);
1999
2000 free_irq(udc->irq, udc);
2001 iounmap(udc->fifo);
2002 iounmap(udc->regs);
2003 clk_put(udc->hclk);
2004 clk_put(udc->pclk);
2005
2006 device_unregister(&udc->gadget.dev);
2007
2008 return 0;
2009}
2010
2011static struct platform_driver udc_driver = {
2012 .remove = __exit_p(usba_udc_remove),
2013 .driver = {
2014 .name = "atmel_usba_udc",
2015 },
2016};
2017
2018static int __init udc_init(void)
2019{
2020 return platform_driver_probe(&udc_driver, usba_udc_probe);
2021}
2022module_init(udc_init);
2023
2024static void __exit udc_exit(void)
2025{
2026 platform_driver_unregister(&udc_driver);
2027}
2028module_exit(udc_exit);
2029
2030MODULE_DESCRIPTION("Atmel USBA UDC driver");
2031MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
2032MODULE_LICENSE("GPL");
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