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1da177e4 LT |
1 | /* |
2 | * linux/drivers/usb/gadget/pxa2xx_udc.h | |
3 | * Intel PXA2xx on-chip full speed USB device controller | |
4 | * | |
5 | * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix | |
6 | * Copyright (C) 2003 David Brownell | |
7 | * | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef __LINUX_USB_GADGET_PXA2XX_H | |
25 | #define __LINUX_USB_GADGET_PXA2XX_H | |
26 | ||
27 | #include <linux/types.h> | |
28 | ||
29 | /*-------------------------------------------------------------------------*/ | |
30 | ||
31 | /* pxa2xx has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */ | |
32 | #define UFNRH_SIR (1 << 7) /* SOF interrupt request */ | |
33 | #define UFNRH_SIM (1 << 6) /* SOF interrupt mask */ | |
34 | #define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */ | |
35 | #define UFNRH_IPE9 (1 << 4) /* ISO packet error, ep9 */ | |
36 | #define UFNRH_IPE4 (1 << 3) /* ISO packet error, ep4 */ | |
37 | ||
38 | /* pxa255 has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */ | |
39 | #define UDCCFR UDC_RES2 /* UDC Control Function Register */ | |
40 | #define UDCCFR_AREN (1 << 7) /* ACK response enable (now) */ | |
41 | #define UDCCFR_ACM (1 << 2) /* ACK control mode (wait for AREN) */ | |
42 | ||
43 | /* latest pxa255 errata define new "must be one" bits in UDCCFR */ | |
44 | #define UDCCFR_MB1 (0xff & ~(UDCCFR_AREN|UDCCFR_ACM)) | |
45 | ||
46 | /*-------------------------------------------------------------------------*/ | |
47 | ||
48 | struct pxa2xx_udc; | |
49 | ||
50 | struct pxa2xx_ep { | |
51 | struct usb_ep ep; | |
52 | struct pxa2xx_udc *dev; | |
53 | ||
54 | const struct usb_endpoint_descriptor *desc; | |
55 | struct list_head queue; | |
56 | unsigned long pio_irqs; | |
1da177e4 LT |
57 | |
58 | unsigned short fifo_size; | |
59 | u8 bEndpointAddress; | |
60 | u8 bmAttributes; | |
61 | ||
62 | unsigned stopped : 1; | |
63 | unsigned dma_fixup : 1; | |
ad8c623f | 64 | |
1da177e4 LT |
65 | /* UDCCS = UDC Control/Status for this EP |
66 | * UBCR = UDC Byte Count Remaining (contents of OUT fifo) | |
67 | * UDDR = UDC Endpoint Data Register (the fifo) | |
68 | * DRCM = DMA Request Channel Map | |
69 | */ | |
63a4b52c IC |
70 | volatile u32 *reg_udccs; |
71 | volatile u32 *reg_ubcr; | |
72 | volatile u32 *reg_uddr; | |
1da177e4 LT |
73 | }; |
74 | ||
75 | struct pxa2xx_request { | |
76 | struct usb_request req; | |
77 | struct list_head queue; | |
78 | }; | |
79 | ||
ad8c623f | 80 | enum ep0_state { |
1da177e4 LT |
81 | EP0_IDLE, |
82 | EP0_IN_DATA_PHASE, | |
83 | EP0_OUT_DATA_PHASE, | |
84 | EP0_END_XFER, | |
85 | EP0_STALL, | |
86 | }; | |
87 | ||
88 | #define EP0_FIFO_SIZE ((unsigned)16) | |
89 | #define BULK_FIFO_SIZE ((unsigned)64) | |
90 | #define ISO_FIFO_SIZE ((unsigned)256) | |
91 | #define INT_FIFO_SIZE ((unsigned)8) | |
92 | ||
93 | struct udc_stats { | |
94 | struct ep0stats { | |
95 | unsigned long ops; | |
96 | unsigned long bytes; | |
97 | } read, write; | |
98 | unsigned long irqs; | |
99 | }; | |
100 | ||
101 | #ifdef CONFIG_USB_PXA2XX_SMALL | |
102 | /* when memory's tight, SMALL config saves code+data. */ | |
1da177e4 LT |
103 | #define PXA_UDC_NUM_ENDPOINTS 3 |
104 | #endif | |
105 | ||
106 | #ifndef PXA_UDC_NUM_ENDPOINTS | |
107 | #define PXA_UDC_NUM_ENDPOINTS 16 | |
108 | #endif | |
109 | ||
110 | struct pxa2xx_udc { | |
111 | struct usb_gadget gadget; | |
112 | struct usb_gadget_driver *driver; | |
113 | ||
114 | enum ep0_state ep0state; | |
115 | struct udc_stats stats; | |
116 | unsigned got_irq : 1, | |
117 | vbus : 1, | |
118 | pullup : 1, | |
119 | has_cfr : 1, | |
120 | req_pending : 1, | |
121 | req_std : 1, | |
122 | req_config : 1; | |
123 | ||
124 | #define start_watchdog(dev) mod_timer(&dev->timer, jiffies + (HZ/200)) | |
125 | struct timer_list timer; | |
126 | ||
127 | struct device *dev; | |
6549e6c9 | 128 | struct clk *clk; |
1da177e4 LT |
129 | struct pxa2xx_udc_mach_info *mach; |
130 | u64 dma_mask; | |
131 | struct pxa2xx_ep ep [PXA_UDC_NUM_ENDPOINTS]; | |
132 | }; | |
133 | ||
134 | /*-------------------------------------------------------------------------*/ | |
135 | ||
136 | #ifdef CONFIG_ARCH_LUBBOCK | |
137 | #include <asm/arch/lubbock.h> | |
138 | /* lubbock can also report usb connect/disconnect irqs */ | |
1da177e4 LT |
139 | #endif |
140 | ||
1da177e4 LT |
141 | static struct pxa2xx_udc *the_controller; |
142 | ||
1da177e4 LT |
143 | /*-------------------------------------------------------------------------*/ |
144 | ||
145 | /* | |
146 | * Debugging support vanishes in non-debug builds. DBG_NORMAL should be | |
147 | * mostly silent during normal use/testing, with no timing side-effects. | |
148 | */ | |
149 | #define DBG_NORMAL 1 /* error paths, device state transitions */ | |
150 | #define DBG_VERBOSE 2 /* add some success path trace info */ | |
151 | #define DBG_NOISY 3 /* ... even more: request level */ | |
152 | #define DBG_VERY_NOISY 4 /* ... even more: packet level */ | |
153 | ||
154 | #ifdef DEBUG | |
155 | ||
156 | static const char *state_name[] = { | |
157 | "EP0_IDLE", | |
158 | "EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE", | |
159 | "EP0_END_XFER", "EP0_STALL" | |
160 | }; | |
161 | ||
162 | #define DMSG(stuff...) printk(KERN_DEBUG "udc: " stuff) | |
163 | ||
164 | #ifdef VERBOSE | |
165 | # define UDC_DEBUG DBG_VERBOSE | |
166 | #else | |
167 | # define UDC_DEBUG DBG_NORMAL | |
168 | #endif | |
169 | ||
8234509c | 170 | static void __maybe_unused |
1da177e4 LT |
171 | dump_udccr(const char *label) |
172 | { | |
173 | u32 udccr = UDCCR; | |
174 | DMSG("%s %02X =%s%s%s%s%s%s%s%s\n", | |
175 | label, udccr, | |
176 | (udccr & UDCCR_REM) ? " rem" : "", | |
177 | (udccr & UDCCR_RSTIR) ? " rstir" : "", | |
178 | (udccr & UDCCR_SRM) ? " srm" : "", | |
179 | (udccr & UDCCR_SUSIR) ? " susir" : "", | |
180 | (udccr & UDCCR_RESIR) ? " resir" : "", | |
181 | (udccr & UDCCR_RSM) ? " rsm" : "", | |
182 | (udccr & UDCCR_UDA) ? " uda" : "", | |
183 | (udccr & UDCCR_UDE) ? " ude" : ""); | |
184 | } | |
185 | ||
8234509c | 186 | static void __maybe_unused |
1da177e4 LT |
187 | dump_udccs0(const char *label) |
188 | { | |
189 | u32 udccs0 = UDCCS0; | |
190 | ||
191 | DMSG("%s %s %02X =%s%s%s%s%s%s%s%s\n", | |
192 | label, state_name[the_controller->ep0state], udccs0, | |
193 | (udccs0 & UDCCS0_SA) ? " sa" : "", | |
194 | (udccs0 & UDCCS0_RNE) ? " rne" : "", | |
195 | (udccs0 & UDCCS0_FST) ? " fst" : "", | |
196 | (udccs0 & UDCCS0_SST) ? " sst" : "", | |
197 | (udccs0 & UDCCS0_DRWF) ? " dwrf" : "", | |
198 | (udccs0 & UDCCS0_FTF) ? " ftf" : "", | |
199 | (udccs0 & UDCCS0_IPR) ? " ipr" : "", | |
200 | (udccs0 & UDCCS0_OPR) ? " opr" : ""); | |
201 | } | |
202 | ||
8234509c | 203 | static void __maybe_unused |
1da177e4 LT |
204 | dump_state(struct pxa2xx_udc *dev) |
205 | { | |
206 | u32 tmp; | |
207 | unsigned i; | |
208 | ||
209 | DMSG("%s %s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", | |
210 | is_usb_connected() ? "host " : "disconnected", | |
211 | state_name[dev->ep0state], | |
212 | UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL); | |
213 | dump_udccr("udccr"); | |
214 | if (dev->has_cfr) { | |
215 | tmp = UDCCFR; | |
216 | DMSG("udccfr %02X =%s%s\n", tmp, | |
217 | (tmp & UDCCFR_AREN) ? " aren" : "", | |
218 | (tmp & UDCCFR_ACM) ? " acm" : ""); | |
219 | } | |
220 | ||
221 | if (!dev->driver) { | |
222 | DMSG("no gadget driver bound\n"); | |
223 | return; | |
224 | } else | |
225 | DMSG("ep0 driver '%s'\n", dev->driver->driver.name); | |
226 | ||
227 | if (!is_usb_connected()) | |
228 | return; | |
229 | ||
230 | dump_udccs0 ("udccs0"); | |
231 | DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n", | |
232 | dev->stats.write.bytes, dev->stats.write.ops, | |
233 | dev->stats.read.bytes, dev->stats.read.ops); | |
234 | ||
235 | for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) { | |
236 | if (dev->ep [i].desc == 0) | |
237 | continue; | |
238 | DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccs); | |
239 | } | |
240 | } | |
241 | ||
242 | #else | |
243 | ||
244 | #define DMSG(stuff...) do{}while(0) | |
245 | ||
246 | #define dump_udccr(x) do{}while(0) | |
247 | #define dump_udccs0(x) do{}while(0) | |
248 | #define dump_state(x) do{}while(0) | |
249 | ||
250 | #define UDC_DEBUG ((unsigned)0) | |
251 | ||
252 | #endif | |
253 | ||
254 | #define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0) | |
255 | ||
256 | #define WARN(stuff...) printk(KERN_WARNING "udc: " stuff) | |
257 | #define INFO(stuff...) printk(KERN_INFO "udc: " stuff) | |
258 | ||
259 | ||
260 | #endif /* __LINUX_USB_GADGET_PXA2XX_H */ |