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3fc154b6 AP |
1 | /* |
2 | * linux/drivers/usb/gadget/s3c2410_udc.c | |
3 | * | |
4 | * Samsung S3C24xx series on-chip full speed USB device controllers | |
5 | * | |
d36b6910 | 6 | * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard |
3fc154b6 AP |
7 | * Additional cleanups by Ben Dooks <ben-linux@fluff.org> |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
3fc154b6 AP |
13 | */ |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/ioport.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/slab.h> | |
3fc154b6 AP |
21 | #include <linux/errno.h> |
22 | #include <linux/init.h> | |
23 | #include <linux/timer.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/platform_device.h> | |
3fc154b6 | 27 | #include <linux/clk.h> |
ea99ecfd | 28 | #include <linux/gpio.h> |
b38b03b3 | 29 | #include <linux/prefetch.h> |
2e8e25b8 | 30 | #include <linux/io.h> |
3fc154b6 AP |
31 | |
32 | #include <linux/debugfs.h> | |
33 | #include <linux/seq_file.h> | |
34 | ||
35 | #include <linux/usb.h> | |
9454a57a | 36 | #include <linux/usb/gadget.h> |
3fc154b6 AP |
37 | |
38 | #include <asm/byteorder.h> | |
3fc154b6 | 39 | #include <asm/irq.h> |
3fc154b6 | 40 | #include <asm/unaligned.h> |
a09e64fb | 41 | #include <mach/irqs.h> |
3fc154b6 | 42 | |
a09e64fb | 43 | #include <mach/hardware.h> |
899d566a | 44 | |
57bd4b91 BD |
45 | #include <plat/regs-udc.h> |
46 | #include <plat/udc.h> | |
3fc154b6 | 47 | |
3fc154b6 AP |
48 | |
49 | #include "s3c2410_udc.h" | |
50 | ||
51 | #define DRIVER_DESC "S3C2410 USB Device Controller Gadget" | |
52 | #define DRIVER_VERSION "29 Apr 2007" | |
d36b6910 | 53 | #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \ |
3fc154b6 AP |
54 | "Arnaud Patard <arnaud.patard@rtp-net.org>" |
55 | ||
56 | static const char gadget_name[] = "s3c2410_udc"; | |
57 | static const char driver_desc[] = DRIVER_DESC; | |
58 | ||
59 | static struct s3c2410_udc *the_controller; | |
60 | static struct clk *udc_clock; | |
61 | static struct clk *usb_bus_clock; | |
62 | static void __iomem *base_addr; | |
63 | static u64 rsrc_start; | |
64 | static u64 rsrc_len; | |
65 | static struct dentry *s3c2410_udc_debugfs_root; | |
66 | ||
67 | static inline u32 udc_read(u32 reg) | |
68 | { | |
69 | return readb(base_addr + reg); | |
70 | } | |
71 | ||
72 | static inline void udc_write(u32 value, u32 reg) | |
73 | { | |
74 | writeb(value, base_addr + reg); | |
75 | } | |
76 | ||
77 | static inline void udc_writeb(void __iomem *base, u32 value, u32 reg) | |
78 | { | |
79 | writeb(value, base + reg); | |
80 | } | |
81 | ||
82 | static struct s3c2410_udc_mach_info *udc_info; | |
83 | ||
84 | /*************************** DEBUG FUNCTION ***************************/ | |
85 | #define DEBUG_NORMAL 1 | |
86 | #define DEBUG_VERBOSE 2 | |
87 | ||
88 | #ifdef CONFIG_USB_S3C2410_DEBUG | |
89 | #define USB_S3C2410_DEBUG_LEVEL 0 | |
90 | ||
91 | static uint32_t s3c2410_ticks = 0; | |
92 | ||
93 | static int dprintk(int level, const char *fmt, ...) | |
94 | { | |
95 | static char printk_buf[1024]; | |
96 | static long prevticks; | |
97 | static int invocation; | |
98 | va_list args; | |
99 | int len; | |
100 | ||
101 | if (level > USB_S3C2410_DEBUG_LEVEL) | |
102 | return 0; | |
103 | ||
104 | if (s3c2410_ticks != prevticks) { | |
105 | prevticks = s3c2410_ticks; | |
106 | invocation = 0; | |
107 | } | |
108 | ||
109 | len = scnprintf(printk_buf, | |
110 | sizeof(printk_buf), "%1lu.%02d USB: ", | |
111 | prevticks, invocation++); | |
112 | ||
113 | va_start(args, fmt); | |
114 | len = vscnprintf(printk_buf+len, | |
115 | sizeof(printk_buf)-len, fmt, args); | |
116 | va_end(args); | |
117 | ||
118 | return printk(KERN_DEBUG "%s", printk_buf); | |
119 | } | |
120 | #else | |
121 | static int dprintk(int level, const char *fmt, ...) | |
122 | { | |
123 | return 0; | |
124 | } | |
125 | #endif | |
126 | static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p) | |
127 | { | |
128 | u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg; | |
129 | u32 ep_int_en_reg, usb_int_en_reg, ep0_csr; | |
130 | u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2; | |
131 | u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2; | |
132 | ||
133 | addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG); | |
134 | pwr_reg = udc_read(S3C2410_UDC_PWR_REG); | |
135 | ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG); | |
136 | usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG); | |
137 | ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); | |
138 | usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG); | |
139 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
140 | ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
141 | udc_write(1, S3C2410_UDC_INDEX_REG); | |
142 | ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
143 | ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); | |
144 | ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
145 | ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); | |
146 | udc_write(2, S3C2410_UDC_INDEX_REG); | |
147 | ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
148 | ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); | |
149 | ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
150 | ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); | |
151 | ||
152 | seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n" | |
153 | "PWR_REG : 0x%04X\n" | |
154 | "EP_INT_REG : 0x%04X\n" | |
155 | "USB_INT_REG : 0x%04X\n" | |
156 | "EP_INT_EN_REG : 0x%04X\n" | |
157 | "USB_INT_EN_REG : 0x%04X\n" | |
158 | "EP0_CSR : 0x%04X\n" | |
159 | "EP1_I_CSR1 : 0x%04X\n" | |
160 | "EP1_I_CSR2 : 0x%04X\n" | |
161 | "EP1_O_CSR1 : 0x%04X\n" | |
162 | "EP1_O_CSR2 : 0x%04X\n" | |
163 | "EP2_I_CSR1 : 0x%04X\n" | |
164 | "EP2_I_CSR2 : 0x%04X\n" | |
165 | "EP2_O_CSR1 : 0x%04X\n" | |
166 | "EP2_O_CSR2 : 0x%04X\n", | |
167 | addr_reg,pwr_reg,ep_int_reg,usb_int_reg, | |
168 | ep_int_en_reg, usb_int_en_reg, ep0_csr, | |
169 | ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2, | |
170 | ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2 | |
171 | ); | |
172 | ||
173 | return 0; | |
174 | } | |
175 | ||
176 | static int s3c2410_udc_debugfs_fops_open(struct inode *inode, | |
177 | struct file *file) | |
178 | { | |
179 | return single_open(file, s3c2410_udc_debugfs_seq_show, NULL); | |
180 | } | |
181 | ||
182 | static const struct file_operations s3c2410_udc_debugfs_fops = { | |
183 | .open = s3c2410_udc_debugfs_fops_open, | |
184 | .read = seq_read, | |
185 | .llseek = seq_lseek, | |
186 | .release = single_release, | |
187 | .owner = THIS_MODULE, | |
188 | }; | |
189 | ||
190 | /* io macros */ | |
191 | ||
192 | static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base) | |
193 | { | |
194 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
195 | udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY, | |
196 | S3C2410_UDC_EP0_CSR_REG); | |
197 | } | |
198 | ||
199 | static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base) | |
200 | { | |
201 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
202 | writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG); | |
203 | } | |
204 | ||
205 | static inline void s3c2410_udc_clear_ep0_se(void __iomem *base) | |
206 | { | |
207 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
208 | udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG); | |
209 | } | |
210 | ||
211 | static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base) | |
212 | { | |
213 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
214 | udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG); | |
215 | } | |
216 | ||
217 | static inline void s3c2410_udc_set_ep0_de(void __iomem *base) | |
218 | { | |
219 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
220 | udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG); | |
221 | } | |
222 | ||
223 | inline void s3c2410_udc_set_ep0_ss(void __iomem *b) | |
224 | { | |
225 | udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
226 | udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG); | |
227 | } | |
228 | ||
229 | static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base) | |
230 | { | |
231 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
232 | ||
233 | udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY | |
234 | | S3C2410_UDC_EP0_CSR_DE), | |
235 | S3C2410_UDC_EP0_CSR_REG); | |
236 | } | |
237 | ||
238 | static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base) | |
239 | { | |
240 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
241 | udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY | |
242 | | S3C2410_UDC_EP0_CSR_SSE), | |
243 | S3C2410_UDC_EP0_CSR_REG); | |
244 | } | |
245 | ||
246 | static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base) | |
247 | { | |
248 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
249 | udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY | |
250 | | S3C2410_UDC_EP0_CSR_DE), | |
251 | S3C2410_UDC_EP0_CSR_REG); | |
252 | } | |
253 | ||
254 | /*------------------------- I/O ----------------------------------*/ | |
255 | ||
256 | /* | |
257 | * s3c2410_udc_done | |
258 | */ | |
259 | static void s3c2410_udc_done(struct s3c2410_ep *ep, | |
260 | struct s3c2410_request *req, int status) | |
261 | { | |
262 | unsigned halted = ep->halted; | |
263 | ||
264 | list_del_init(&req->queue); | |
265 | ||
266 | if (likely (req->req.status == -EINPROGRESS)) | |
267 | req->req.status = status; | |
268 | else | |
269 | status = req->req.status; | |
270 | ||
271 | ep->halted = 1; | |
272 | req->req.complete(&ep->ep, &req->req); | |
273 | ep->halted = halted; | |
274 | } | |
275 | ||
276 | static void s3c2410_udc_nuke(struct s3c2410_udc *udc, | |
277 | struct s3c2410_ep *ep, int status) | |
278 | { | |
279 | /* Sanity check */ | |
280 | if (&ep->queue == NULL) | |
281 | return; | |
282 | ||
283 | while (!list_empty (&ep->queue)) { | |
284 | struct s3c2410_request *req; | |
285 | req = list_entry (ep->queue.next, struct s3c2410_request, | |
286 | queue); | |
287 | s3c2410_udc_done(ep, req, status); | |
288 | } | |
289 | } | |
290 | ||
291 | static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev) | |
292 | { | |
293 | unsigned i; | |
294 | ||
295 | /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint | |
296 | * fifos, and pending transactions mustn't be continued in any case. | |
297 | */ | |
298 | ||
299 | for (i = 1; i < S3C2410_ENDPOINTS; i++) | |
300 | s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED); | |
301 | } | |
302 | ||
303 | static inline int s3c2410_udc_fifo_count_out(void) | |
304 | { | |
305 | int tmp; | |
306 | ||
307 | tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8; | |
308 | tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG); | |
309 | return tmp; | |
310 | } | |
311 | ||
312 | /* | |
313 | * s3c2410_udc_write_packet | |
314 | */ | |
315 | static inline int s3c2410_udc_write_packet(int fifo, | |
316 | struct s3c2410_request *req, | |
317 | unsigned max) | |
318 | { | |
319 | unsigned len = min(req->req.length - req->req.actual, max); | |
320 | u8 *buf = req->req.buf + req->req.actual; | |
321 | ||
322 | prefetch(buf); | |
323 | ||
324 | dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__, | |
325 | req->req.actual, req->req.length, len, req->req.actual + len); | |
326 | ||
327 | req->req.actual += len; | |
328 | ||
329 | udelay(5); | |
330 | writesb(base_addr + fifo, buf, len); | |
331 | return len; | |
332 | } | |
333 | ||
334 | /* | |
335 | * s3c2410_udc_write_fifo | |
336 | * | |
337 | * return: 0 = still running, 1 = completed, negative = errno | |
338 | */ | |
339 | static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep, | |
340 | struct s3c2410_request *req) | |
341 | { | |
342 | unsigned count; | |
343 | int is_last; | |
344 | u32 idx; | |
345 | int fifo_reg; | |
346 | u32 ep_csr; | |
347 | ||
348 | idx = ep->bEndpointAddress & 0x7F; | |
349 | switch (idx) { | |
350 | default: | |
351 | idx = 0; | |
352 | case 0: | |
353 | fifo_reg = S3C2410_UDC_EP0_FIFO_REG; | |
354 | break; | |
355 | case 1: | |
356 | fifo_reg = S3C2410_UDC_EP1_FIFO_REG; | |
357 | break; | |
358 | case 2: | |
359 | fifo_reg = S3C2410_UDC_EP2_FIFO_REG; | |
360 | break; | |
361 | case 3: | |
362 | fifo_reg = S3C2410_UDC_EP3_FIFO_REG; | |
363 | break; | |
364 | case 4: | |
365 | fifo_reg = S3C2410_UDC_EP4_FIFO_REG; | |
366 | break; | |
367 | } | |
368 | ||
369 | count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket); | |
370 | ||
371 | /* last packet is often short (sometimes a zlp) */ | |
372 | if (count != ep->ep.maxpacket) | |
373 | is_last = 1; | |
374 | else if (req->req.length != req->req.actual || req->req.zero) | |
375 | is_last = 0; | |
376 | else | |
377 | is_last = 2; | |
378 | ||
379 | /* Only ep0 debug messages are interesting */ | |
380 | if (idx == 0) | |
381 | dprintk(DEBUG_NORMAL, | |
382 | "Written ep%d %d.%d of %d b [last %d,z %d]\n", | |
383 | idx, count, req->req.actual, req->req.length, | |
384 | is_last, req->req.zero); | |
385 | ||
386 | if (is_last) { | |
387 | /* The order is important. It prevents sending 2 packets | |
388 | * at the same time */ | |
389 | ||
390 | if (idx == 0) { | |
391 | /* Reset signal => no need to say 'data sent' */ | |
392 | if (! (udc_read(S3C2410_UDC_USB_INT_REG) | |
393 | & S3C2410_UDC_USBINT_RESET)) | |
394 | s3c2410_udc_set_ep0_de_in(base_addr); | |
395 | ep->dev->ep0state=EP0_IDLE; | |
396 | } else { | |
397 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
398 | ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
399 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
400 | udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, | |
401 | S3C2410_UDC_IN_CSR1_REG); | |
402 | } | |
403 | ||
404 | s3c2410_udc_done(ep, req, 0); | |
405 | is_last = 1; | |
406 | } else { | |
407 | if (idx == 0) { | |
408 | /* Reset signal => no need to say 'data sent' */ | |
409 | if (! (udc_read(S3C2410_UDC_USB_INT_REG) | |
410 | & S3C2410_UDC_USBINT_RESET)) | |
411 | s3c2410_udc_set_ep0_ipr(base_addr); | |
412 | } else { | |
413 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
414 | ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
415 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
416 | udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, | |
417 | S3C2410_UDC_IN_CSR1_REG); | |
418 | } | |
419 | } | |
420 | ||
421 | return is_last; | |
422 | } | |
423 | ||
424 | static inline int s3c2410_udc_read_packet(int fifo, u8 *buf, | |
425 | struct s3c2410_request *req, unsigned avail) | |
426 | { | |
427 | unsigned len; | |
428 | ||
429 | len = min(req->req.length - req->req.actual, avail); | |
430 | req->req.actual += len; | |
431 | ||
432 | readsb(fifo + base_addr, buf, len); | |
433 | return len; | |
434 | } | |
435 | ||
436 | /* | |
437 | * return: 0 = still running, 1 = queue empty, negative = errno | |
438 | */ | |
439 | static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep, | |
440 | struct s3c2410_request *req) | |
441 | { | |
442 | u8 *buf; | |
443 | u32 ep_csr; | |
444 | unsigned bufferspace; | |
445 | int is_last=1; | |
446 | unsigned avail; | |
447 | int fifo_count = 0; | |
448 | u32 idx; | |
449 | int fifo_reg; | |
450 | ||
451 | idx = ep->bEndpointAddress & 0x7F; | |
452 | ||
453 | switch (idx) { | |
454 | default: | |
455 | idx = 0; | |
456 | case 0: | |
457 | fifo_reg = S3C2410_UDC_EP0_FIFO_REG; | |
458 | break; | |
459 | case 1: | |
460 | fifo_reg = S3C2410_UDC_EP1_FIFO_REG; | |
461 | break; | |
462 | case 2: | |
463 | fifo_reg = S3C2410_UDC_EP2_FIFO_REG; | |
464 | break; | |
465 | case 3: | |
466 | fifo_reg = S3C2410_UDC_EP3_FIFO_REG; | |
467 | break; | |
468 | case 4: | |
469 | fifo_reg = S3C2410_UDC_EP4_FIFO_REG; | |
470 | break; | |
471 | } | |
472 | ||
473 | if (!req->req.length) | |
474 | return 1; | |
475 | ||
476 | buf = req->req.buf + req->req.actual; | |
477 | bufferspace = req->req.length - req->req.actual; | |
478 | if (!bufferspace) { | |
479 | dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__); | |
480 | return -1; | |
481 | } | |
482 | ||
483 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
484 | ||
485 | fifo_count = s3c2410_udc_fifo_count_out(); | |
486 | dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count); | |
487 | ||
488 | if (fifo_count > ep->ep.maxpacket) | |
489 | avail = ep->ep.maxpacket; | |
490 | else | |
491 | avail = fifo_count; | |
492 | ||
493 | fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail); | |
494 | ||
495 | /* checking this with ep0 is not accurate as we already | |
496 | * read a control request | |
497 | **/ | |
498 | if (idx != 0 && fifo_count < ep->ep.maxpacket) { | |
499 | is_last = 1; | |
500 | /* overflowed this request? flush extra data */ | |
501 | if (fifo_count != avail) | |
502 | req->req.status = -EOVERFLOW; | |
503 | } else { | |
504 | is_last = (req->req.length <= req->req.actual) ? 1 : 0; | |
505 | } | |
506 | ||
507 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
508 | fifo_count = s3c2410_udc_fifo_count_out(); | |
509 | ||
510 | /* Only ep0 debug messages are interesting */ | |
511 | if (idx == 0) | |
512 | dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n", | |
513 | __func__, fifo_count,is_last); | |
514 | ||
515 | if (is_last) { | |
516 | if (idx == 0) { | |
517 | s3c2410_udc_set_ep0_de_out(base_addr); | |
518 | ep->dev->ep0state = EP0_IDLE; | |
519 | } else { | |
520 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
521 | ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); | |
522 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
523 | udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, | |
524 | S3C2410_UDC_OUT_CSR1_REG); | |
525 | } | |
526 | ||
527 | s3c2410_udc_done(ep, req, 0); | |
528 | } else { | |
529 | if (idx == 0) { | |
530 | s3c2410_udc_clear_ep0_opr(base_addr); | |
531 | } else { | |
532 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
533 | ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); | |
534 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
535 | udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, | |
536 | S3C2410_UDC_OUT_CSR1_REG); | |
537 | } | |
538 | } | |
539 | ||
540 | return is_last; | |
541 | } | |
542 | ||
543 | static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq) | |
544 | { | |
545 | unsigned char *outbuf = (unsigned char*)crq; | |
546 | int bytes_read = 0; | |
547 | ||
548 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
549 | ||
550 | bytes_read = s3c2410_udc_fifo_count_out(); | |
551 | ||
552 | dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read); | |
553 | ||
554 | if (bytes_read > sizeof(struct usb_ctrlrequest)) | |
555 | bytes_read = sizeof(struct usb_ctrlrequest); | |
556 | ||
557 | readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read); | |
558 | ||
559 | dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__, | |
560 | bytes_read, crq->bRequest, crq->bRequestType, | |
561 | crq->wValue, crq->wIndex, crq->wLength); | |
562 | ||
563 | return bytes_read; | |
564 | } | |
565 | ||
566 | static int s3c2410_udc_get_status(struct s3c2410_udc *dev, | |
567 | struct usb_ctrlrequest *crq) | |
568 | { | |
569 | u16 status = 0; | |
570 | u8 ep_num = crq->wIndex & 0x7F; | |
571 | u8 is_in = crq->wIndex & USB_DIR_IN; | |
572 | ||
573 | switch (crq->bRequestType & USB_RECIP_MASK) { | |
574 | case USB_RECIP_INTERFACE: | |
575 | break; | |
576 | ||
577 | case USB_RECIP_DEVICE: | |
578 | status = dev->devstatus; | |
579 | break; | |
580 | ||
581 | case USB_RECIP_ENDPOINT: | |
582 | if (ep_num > 4 || crq->wLength > 2) | |
583 | return 1; | |
584 | ||
585 | if (ep_num == 0) { | |
586 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
587 | status = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
588 | status = status & S3C2410_UDC_EP0_CSR_SENDSTL; | |
589 | } else { | |
590 | udc_write(ep_num, S3C2410_UDC_INDEX_REG); | |
591 | if (is_in) { | |
592 | status = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
593 | status = status & S3C2410_UDC_ICSR1_SENDSTL; | |
594 | } else { | |
595 | status = udc_read(S3C2410_UDC_OUT_CSR1_REG); | |
596 | status = status & S3C2410_UDC_OCSR1_SENDSTL; | |
597 | } | |
598 | } | |
599 | ||
600 | status = status ? 1 : 0; | |
601 | break; | |
602 | ||
603 | default: | |
604 | return 1; | |
605 | } | |
606 | ||
607 | /* Seems to be needed to get it working. ouch :( */ | |
608 | udelay(5); | |
609 | udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG); | |
610 | udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG); | |
611 | s3c2410_udc_set_ep0_de_in(base_addr); | |
612 | ||
613 | return 0; | |
614 | } | |
615 | /*------------------------- usb state machine -------------------------------*/ | |
616 | static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value); | |
617 | ||
618 | static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev, | |
619 | struct s3c2410_ep *ep, | |
620 | struct usb_ctrlrequest *crq, | |
621 | u32 ep0csr) | |
622 | { | |
623 | int len, ret, tmp; | |
624 | ||
625 | /* start control request? */ | |
626 | if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY)) | |
627 | return; | |
628 | ||
629 | s3c2410_udc_nuke(dev, ep, -EPROTO); | |
630 | ||
631 | len = s3c2410_udc_read_fifo_crq(crq); | |
632 | if (len != sizeof(*crq)) { | |
633 | dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR" | |
634 | " wanted %d bytes got %d. Stalling out...\n", | |
635 | sizeof(*crq), len); | |
636 | s3c2410_udc_set_ep0_ss(base_addr); | |
637 | return; | |
638 | } | |
639 | ||
640 | dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n", | |
641 | crq->bRequest, crq->bRequestType, crq->wLength); | |
642 | ||
643 | /* cope with automagic for some standard requests. */ | |
644 | dev->req_std = (crq->bRequestType & USB_TYPE_MASK) | |
645 | == USB_TYPE_STANDARD; | |
646 | dev->req_config = 0; | |
647 | dev->req_pending = 1; | |
648 | ||
649 | switch (crq->bRequest) { | |
650 | case USB_REQ_SET_CONFIGURATION: | |
651 | dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n"); | |
652 | ||
653 | if (crq->bRequestType == USB_RECIP_DEVICE) { | |
654 | dev->req_config = 1; | |
655 | s3c2410_udc_set_ep0_de_out(base_addr); | |
656 | } | |
657 | break; | |
658 | ||
659 | case USB_REQ_SET_INTERFACE: | |
660 | dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n"); | |
661 | ||
662 | if (crq->bRequestType == USB_RECIP_INTERFACE) { | |
663 | dev->req_config = 1; | |
664 | s3c2410_udc_set_ep0_de_out(base_addr); | |
665 | } | |
666 | break; | |
667 | ||
668 | case USB_REQ_SET_ADDRESS: | |
669 | dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n"); | |
670 | ||
671 | if (crq->bRequestType == USB_RECIP_DEVICE) { | |
672 | tmp = crq->wValue & 0x7F; | |
673 | dev->address = tmp; | |
674 | udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE), | |
675 | S3C2410_UDC_FUNC_ADDR_REG); | |
676 | s3c2410_udc_set_ep0_de_out(base_addr); | |
677 | return; | |
678 | } | |
679 | break; | |
680 | ||
681 | case USB_REQ_GET_STATUS: | |
682 | dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n"); | |
683 | s3c2410_udc_clear_ep0_opr(base_addr); | |
684 | ||
685 | if (dev->req_std) { | |
686 | if (!s3c2410_udc_get_status(dev, crq)) { | |
687 | return; | |
688 | } | |
689 | } | |
690 | break; | |
691 | ||
692 | case USB_REQ_CLEAR_FEATURE: | |
693 | s3c2410_udc_clear_ep0_opr(base_addr); | |
694 | ||
695 | if (crq->bRequestType != USB_RECIP_ENDPOINT) | |
696 | break; | |
697 | ||
698 | if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) | |
699 | break; | |
700 | ||
701 | s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0); | |
702 | s3c2410_udc_set_ep0_de_out(base_addr); | |
703 | return; | |
704 | ||
705 | case USB_REQ_SET_FEATURE: | |
706 | s3c2410_udc_clear_ep0_opr(base_addr); | |
707 | ||
708 | if (crq->bRequestType != USB_RECIP_ENDPOINT) | |
709 | break; | |
710 | ||
711 | if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) | |
712 | break; | |
713 | ||
714 | s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1); | |
715 | s3c2410_udc_set_ep0_de_out(base_addr); | |
716 | return; | |
717 | ||
718 | default: | |
719 | s3c2410_udc_clear_ep0_opr(base_addr); | |
720 | break; | |
721 | } | |
722 | ||
723 | if (crq->bRequestType & USB_DIR_IN) | |
724 | dev->ep0state = EP0_IN_DATA_PHASE; | |
725 | else | |
726 | dev->ep0state = EP0_OUT_DATA_PHASE; | |
727 | ||
00c05aab VZ |
728 | if (!dev->driver) |
729 | return; | |
730 | ||
731 | /* deliver the request to the gadget driver */ | |
3fc154b6 AP |
732 | ret = dev->driver->setup(&dev->gadget, crq); |
733 | if (ret < 0) { | |
734 | if (dev->req_config) { | |
735 | dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n", | |
736 | crq->bRequest, ret); | |
737 | return; | |
738 | } | |
739 | ||
740 | if (ret == -EOPNOTSUPP) | |
741 | dprintk(DEBUG_NORMAL, "Operation not supported\n"); | |
742 | else | |
743 | dprintk(DEBUG_NORMAL, | |
744 | "dev->driver->setup failed. (%d)\n", ret); | |
745 | ||
746 | udelay(5); | |
747 | s3c2410_udc_set_ep0_ss(base_addr); | |
748 | s3c2410_udc_set_ep0_de_out(base_addr); | |
749 | dev->ep0state = EP0_IDLE; | |
750 | /* deferred i/o == no response yet */ | |
751 | } else if (dev->req_pending) { | |
752 | dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n"); | |
753 | dev->req_pending=0; | |
754 | } | |
755 | ||
756 | dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]); | |
757 | } | |
758 | ||
759 | static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev) | |
760 | { | |
761 | u32 ep0csr; | |
762 | struct s3c2410_ep *ep = &dev->ep[0]; | |
763 | struct s3c2410_request *req; | |
764 | struct usb_ctrlrequest crq; | |
765 | ||
766 | if (list_empty(&ep->queue)) | |
767 | req = NULL; | |
768 | else | |
769 | req = list_entry(ep->queue.next, struct s3c2410_request, queue); | |
770 | ||
771 | /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to | |
772 | * S3C2410_UDC_EP0_CSR_REG when index is zero */ | |
773 | ||
774 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
775 | ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
776 | ||
777 | dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n", | |
778 | ep0csr, ep0states[dev->ep0state]); | |
779 | ||
780 | /* clear stall status */ | |
781 | if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) { | |
782 | s3c2410_udc_nuke(dev, ep, -EPIPE); | |
783 | dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n"); | |
784 | s3c2410_udc_clear_ep0_sst(base_addr); | |
785 | dev->ep0state = EP0_IDLE; | |
786 | return; | |
787 | } | |
788 | ||
789 | /* clear setup end */ | |
790 | if (ep0csr & S3C2410_UDC_EP0_CSR_SE) { | |
791 | dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n"); | |
792 | s3c2410_udc_nuke(dev, ep, 0); | |
793 | s3c2410_udc_clear_ep0_se(base_addr); | |
794 | dev->ep0state = EP0_IDLE; | |
795 | } | |
796 | ||
797 | switch (dev->ep0state) { | |
798 | case EP0_IDLE: | |
799 | s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr); | |
800 | break; | |
801 | ||
802 | case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ | |
803 | dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n"); | |
804 | if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) { | |
805 | s3c2410_udc_write_fifo(ep, req); | |
806 | } | |
807 | break; | |
808 | ||
809 | case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ | |
810 | dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n"); | |
811 | if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) { | |
812 | s3c2410_udc_read_fifo(ep,req); | |
813 | } | |
814 | break; | |
815 | ||
816 | case EP0_END_XFER: | |
817 | dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n"); | |
818 | dev->ep0state = EP0_IDLE; | |
819 | break; | |
820 | ||
821 | case EP0_STALL: | |
822 | dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n"); | |
823 | dev->ep0state = EP0_IDLE; | |
824 | break; | |
825 | } | |
826 | } | |
827 | ||
828 | /* | |
829 | * handle_ep - Manage I/O endpoints | |
830 | */ | |
831 | ||
832 | static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep) | |
833 | { | |
834 | struct s3c2410_request *req; | |
835 | int is_in = ep->bEndpointAddress & USB_DIR_IN; | |
836 | u32 ep_csr1; | |
837 | u32 idx; | |
838 | ||
839 | if (likely (!list_empty(&ep->queue))) | |
840 | req = list_entry(ep->queue.next, | |
841 | struct s3c2410_request, queue); | |
842 | else | |
843 | req = NULL; | |
844 | ||
845 | idx = ep->bEndpointAddress & 0x7F; | |
846 | ||
847 | if (is_in) { | |
848 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
849 | ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
850 | dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n", | |
851 | idx, ep_csr1, req ? 1 : 0); | |
852 | ||
853 | if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) { | |
854 | dprintk(DEBUG_VERBOSE, "st\n"); | |
855 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
856 | udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL, | |
857 | S3C2410_UDC_IN_CSR1_REG); | |
858 | return; | |
859 | } | |
860 | ||
861 | if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) { | |
862 | s3c2410_udc_write_fifo(ep,req); | |
863 | } | |
864 | } else { | |
865 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
866 | ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG); | |
867 | dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1); | |
868 | ||
869 | if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) { | |
870 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
871 | udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL, | |
872 | S3C2410_UDC_OUT_CSR1_REG); | |
873 | return; | |
874 | } | |
875 | ||
876 | if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) { | |
877 | s3c2410_udc_read_fifo(ep,req); | |
878 | } | |
879 | } | |
880 | } | |
881 | ||
a09e64fb | 882 | #include <mach/regs-irq.h> |
3fc154b6 AP |
883 | |
884 | /* | |
885 | * s3c2410_udc_irq - interrupt handler | |
886 | */ | |
d8d42233 | 887 | static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev) |
3fc154b6 AP |
888 | { |
889 | struct s3c2410_udc *dev = _dev; | |
890 | int usb_status; | |
891 | int usbd_status; | |
892 | int pwr_reg; | |
893 | int ep0csr; | |
894 | int i; | |
16f08a08 | 895 | u32 idx, idx2; |
3fc154b6 AP |
896 | unsigned long flags; |
897 | ||
898 | spin_lock_irqsave(&dev->lock, flags); | |
899 | ||
900 | /* Driver connected ? */ | |
901 | if (!dev->driver) { | |
902 | /* Clear interrupts */ | |
903 | udc_write(udc_read(S3C2410_UDC_USB_INT_REG), | |
904 | S3C2410_UDC_USB_INT_REG); | |
905 | udc_write(udc_read(S3C2410_UDC_EP_INT_REG), | |
906 | S3C2410_UDC_EP_INT_REG); | |
907 | } | |
908 | ||
909 | /* Save index */ | |
910 | idx = udc_read(S3C2410_UDC_INDEX_REG); | |
911 | ||
912 | /* Read status registers */ | |
913 | usb_status = udc_read(S3C2410_UDC_USB_INT_REG); | |
914 | usbd_status = udc_read(S3C2410_UDC_EP_INT_REG); | |
915 | pwr_reg = udc_read(S3C2410_UDC_PWR_REG); | |
916 | ||
917 | udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
918 | ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
919 | ||
920 | dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n", | |
921 | usb_status, usbd_status, pwr_reg, ep0csr); | |
922 | ||
923 | /* | |
924 | * Now, handle interrupts. There's two types : | |
925 | * - Reset, Resume, Suspend coming -> usb_int_reg | |
926 | * - EP -> ep_int_reg | |
927 | */ | |
928 | ||
929 | /* RESET */ | |
930 | if (usb_status & S3C2410_UDC_USBINT_RESET) { | |
931 | /* two kind of reset : | |
932 | * - reset start -> pwr reg = 8 | |
933 | * - reset end -> pwr reg = 0 | |
934 | **/ | |
935 | dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n", | |
936 | ep0csr, pwr_reg); | |
937 | ||
938 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
939 | udc_write(0x00, S3C2410_UDC_INDEX_REG); | |
940 | udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3, | |
941 | S3C2410_UDC_MAXP_REG); | |
942 | dev->address = 0; | |
943 | ||
944 | dev->ep0state = EP0_IDLE; | |
945 | dev->gadget.speed = USB_SPEED_FULL; | |
946 | ||
947 | /* clear interrupt */ | |
948 | udc_write(S3C2410_UDC_USBINT_RESET, | |
949 | S3C2410_UDC_USB_INT_REG); | |
950 | ||
951 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
952 | spin_unlock_irqrestore(&dev->lock, flags); | |
953 | return IRQ_HANDLED; | |
954 | } | |
955 | ||
956 | /* RESUME */ | |
957 | if (usb_status & S3C2410_UDC_USBINT_RESUME) { | |
958 | dprintk(DEBUG_NORMAL, "USB resume\n"); | |
959 | ||
960 | /* clear interrupt */ | |
961 | udc_write(S3C2410_UDC_USBINT_RESUME, | |
962 | S3C2410_UDC_USB_INT_REG); | |
963 | ||
964 | if (dev->gadget.speed != USB_SPEED_UNKNOWN | |
965 | && dev->driver | |
966 | && dev->driver->resume) | |
967 | dev->driver->resume(&dev->gadget); | |
968 | } | |
969 | ||
970 | /* SUSPEND */ | |
971 | if (usb_status & S3C2410_UDC_USBINT_SUSPEND) { | |
972 | dprintk(DEBUG_NORMAL, "USB suspend\n"); | |
973 | ||
974 | /* clear interrupt */ | |
975 | udc_write(S3C2410_UDC_USBINT_SUSPEND, | |
976 | S3C2410_UDC_USB_INT_REG); | |
977 | ||
978 | if (dev->gadget.speed != USB_SPEED_UNKNOWN | |
979 | && dev->driver | |
980 | && dev->driver->suspend) | |
981 | dev->driver->suspend(&dev->gadget); | |
982 | ||
983 | dev->ep0state = EP0_IDLE; | |
984 | } | |
985 | ||
986 | /* EP */ | |
987 | /* control traffic */ | |
988 | /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready | |
989 | * generate an interrupt | |
990 | */ | |
991 | if (usbd_status & S3C2410_UDC_INT_EP0) { | |
992 | dprintk(DEBUG_VERBOSE, "USB ep0 irq\n"); | |
993 | /* Clear the interrupt bit by setting it to 1 */ | |
994 | udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG); | |
995 | s3c2410_udc_handle_ep0(dev); | |
996 | } | |
997 | ||
998 | /* endpoint data transfers */ | |
999 | for (i = 1; i < S3C2410_ENDPOINTS; i++) { | |
1000 | u32 tmp = 1 << i; | |
1001 | if (usbd_status & tmp) { | |
1002 | dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i); | |
1003 | ||
1004 | /* Clear the interrupt bit by setting it to 1 */ | |
1005 | udc_write(tmp, S3C2410_UDC_EP_INT_REG); | |
1006 | s3c2410_udc_handle_ep(&dev->ep[i]); | |
1007 | } | |
1008 | } | |
1009 | ||
16f08a08 FG |
1010 | /* what else causes this interrupt? a receive! who is it? */ |
1011 | if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) { | |
1012 | for (i = 1; i < S3C2410_ENDPOINTS; i++) { | |
1013 | idx2 = udc_read(S3C2410_UDC_INDEX_REG); | |
1014 | udc_write(i, S3C2410_UDC_INDEX_REG); | |
1015 | ||
1016 | if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1) | |
1017 | s3c2410_udc_handle_ep(&dev->ep[i]); | |
1018 | ||
1019 | /* restore index */ | |
1020 | udc_write(idx2, S3C2410_UDC_INDEX_REG); | |
1021 | } | |
1022 | } | |
1023 | ||
d8d42233 | 1024 | dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD); |
3fc154b6 AP |
1025 | |
1026 | /* Restore old index */ | |
1027 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
1028 | ||
1029 | spin_unlock_irqrestore(&dev->lock, flags); | |
1030 | ||
1031 | return IRQ_HANDLED; | |
1032 | } | |
1033 | /*------------------------- s3c2410_ep_ops ----------------------------------*/ | |
1034 | ||
1035 | static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep) | |
1036 | { | |
1037 | return container_of(ep, struct s3c2410_ep, ep); | |
1038 | } | |
1039 | ||
1040 | static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget) | |
1041 | { | |
1042 | return container_of(gadget, struct s3c2410_udc, gadget); | |
1043 | } | |
1044 | ||
1045 | static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req) | |
1046 | { | |
1047 | return container_of(req, struct s3c2410_request, req); | |
1048 | } | |
1049 | ||
1050 | /* | |
1051 | * s3c2410_udc_ep_enable | |
1052 | */ | |
1053 | static int s3c2410_udc_ep_enable(struct usb_ep *_ep, | |
1054 | const struct usb_endpoint_descriptor *desc) | |
1055 | { | |
1056 | struct s3c2410_udc *dev; | |
1057 | struct s3c2410_ep *ep; | |
1058 | u32 max, tmp; | |
1059 | unsigned long flags; | |
1060 | u32 csr1,csr2; | |
1061 | u32 int_en_reg; | |
1062 | ||
1063 | ep = to_s3c2410_ep(_ep); | |
1064 | ||
0561ed44 | 1065 | if (!_ep || !desc |
3fc154b6 AP |
1066 | || _ep->name == ep0name |
1067 | || desc->bDescriptorType != USB_DT_ENDPOINT) | |
1068 | return -EINVAL; | |
1069 | ||
1070 | dev = ep->dev; | |
1071 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) | |
1072 | return -ESHUTDOWN; | |
1073 | ||
29cc8897 | 1074 | max = usb_endpoint_maxp(desc) & 0x1fff; |
3fc154b6 AP |
1075 | |
1076 | local_irq_save (flags); | |
1077 | _ep->maxpacket = max & 0x7ff; | |
fa42e52b | 1078 | ep->ep.desc = desc; |
3fc154b6 AP |
1079 | ep->halted = 0; |
1080 | ep->bEndpointAddress = desc->bEndpointAddress; | |
1081 | ||
1082 | /* set max packet */ | |
1083 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1084 | udc_write(max >> 3, S3C2410_UDC_MAXP_REG); | |
1085 | ||
1086 | /* set type, direction, address; reset fifo counters */ | |
1087 | if (desc->bEndpointAddress & USB_DIR_IN) { | |
1088 | csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT; | |
1089 | csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN; | |
1090 | ||
1091 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1092 | udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); | |
1093 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1094 | udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); | |
1095 | } else { | |
1096 | /* don't flush in fifo or it will cause endpoint interrupt */ | |
1097 | csr1 = S3C2410_UDC_ICSR1_CLRDT; | |
1098 | csr2 = S3C2410_UDC_ICSR2_DMAIEN; | |
1099 | ||
1100 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1101 | udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); | |
1102 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1103 | udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); | |
1104 | ||
1105 | csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT; | |
1106 | csr2 = S3C2410_UDC_OCSR2_DMAIEN; | |
1107 | ||
1108 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1109 | udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG); | |
1110 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1111 | udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG); | |
1112 | } | |
1113 | ||
1114 | /* enable irqs */ | |
1115 | int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); | |
1116 | udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG); | |
1117 | ||
1118 | /* print some debug message */ | |
1119 | tmp = desc->bEndpointAddress; | |
1120 | dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n", | |
1121 | _ep->name,ep->num, tmp, | |
1122 | desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max); | |
1123 | ||
1124 | local_irq_restore (flags); | |
1125 | s3c2410_udc_set_halt(_ep, 0); | |
1126 | ||
1127 | return 0; | |
1128 | } | |
1129 | ||
1130 | /* | |
1131 | * s3c2410_udc_ep_disable | |
1132 | */ | |
1133 | static int s3c2410_udc_ep_disable(struct usb_ep *_ep) | |
1134 | { | |
1135 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1136 | unsigned long flags; | |
1137 | u32 int_en_reg; | |
1138 | ||
fa42e52b | 1139 | if (!_ep || !ep->ep.desc) { |
3fc154b6 AP |
1140 | dprintk(DEBUG_NORMAL, "%s not enabled\n", |
1141 | _ep ? ep->ep.name : NULL); | |
1142 | return -EINVAL; | |
1143 | } | |
1144 | ||
1145 | local_irq_save(flags); | |
1146 | ||
1147 | dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name); | |
1148 | ||
f9c56cdd | 1149 | ep->ep.desc = NULL; |
3fc154b6 AP |
1150 | ep->halted = 1; |
1151 | ||
1152 | s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN); | |
1153 | ||
1154 | /* disable irqs */ | |
1155 | int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); | |
1156 | udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG); | |
1157 | ||
1158 | local_irq_restore(flags); | |
1159 | ||
1160 | dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name); | |
1161 | ||
1162 | return 0; | |
1163 | } | |
1164 | ||
1165 | /* | |
1166 | * s3c2410_udc_alloc_request | |
1167 | */ | |
1168 | static struct usb_request * | |
1169 | s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags) | |
1170 | { | |
1171 | struct s3c2410_request *req; | |
1172 | ||
1173 | dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags); | |
1174 | ||
1175 | if (!_ep) | |
1176 | return NULL; | |
1177 | ||
1178 | req = kzalloc (sizeof(struct s3c2410_request), mem_flags); | |
1179 | if (!req) | |
1180 | return NULL; | |
1181 | ||
1182 | INIT_LIST_HEAD (&req->queue); | |
1183 | return &req->req; | |
1184 | } | |
1185 | ||
1186 | /* | |
1187 | * s3c2410_udc_free_request | |
1188 | */ | |
1189 | static void | |
1190 | s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1191 | { | |
1192 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1193 | struct s3c2410_request *req = to_s3c2410_req(_req); | |
1194 | ||
1195 | dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); | |
1196 | ||
fa42e52b | 1197 | if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name)) |
3fc154b6 AP |
1198 | return; |
1199 | ||
1200 | WARN_ON (!list_empty (&req->queue)); | |
1201 | kfree(req); | |
1202 | } | |
1203 | ||
3fc154b6 AP |
1204 | /* |
1205 | * s3c2410_udc_queue | |
1206 | */ | |
1207 | static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req, | |
1208 | gfp_t gfp_flags) | |
1209 | { | |
1210 | struct s3c2410_request *req = to_s3c2410_req(_req); | |
1211 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1212 | struct s3c2410_udc *dev; | |
1213 | u32 ep_csr = 0; | |
1214 | int fifo_count = 0; | |
1215 | unsigned long flags; | |
1216 | ||
fa42e52b | 1217 | if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { |
3fc154b6 AP |
1218 | dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__); |
1219 | return -EINVAL; | |
1220 | } | |
1221 | ||
1222 | dev = ep->dev; | |
1223 | if (unlikely (!dev->driver | |
1224 | || dev->gadget.speed == USB_SPEED_UNKNOWN)) { | |
1225 | return -ESHUTDOWN; | |
1226 | } | |
1227 | ||
1228 | local_irq_save (flags); | |
1229 | ||
1230 | if (unlikely(!_req || !_req->complete | |
1231 | || !_req->buf || !list_empty(&req->queue))) { | |
1232 | if (!_req) | |
1233 | dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__); | |
1234 | else { | |
1235 | dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n", | |
1236 | __func__, !_req->complete,!_req->buf, | |
1237 | !list_empty(&req->queue)); | |
1238 | } | |
1239 | ||
1240 | local_irq_restore(flags); | |
1241 | return -EINVAL; | |
1242 | } | |
1243 | ||
1244 | _req->status = -EINPROGRESS; | |
1245 | _req->actual = 0; | |
1246 | ||
1247 | dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n", | |
1248 | __func__, ep->bEndpointAddress, _req->length); | |
1249 | ||
1250 | if (ep->bEndpointAddress) { | |
1251 | udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG); | |
1252 | ||
1253 | ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN) | |
1254 | ? S3C2410_UDC_IN_CSR1_REG | |
1255 | : S3C2410_UDC_OUT_CSR1_REG); | |
1256 | fifo_count = s3c2410_udc_fifo_count_out(); | |
1257 | } else { | |
1258 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
1259 | ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
1260 | fifo_count = s3c2410_udc_fifo_count_out(); | |
1261 | } | |
1262 | ||
1263 | /* kickstart this i/o queue? */ | |
1264 | if (list_empty(&ep->queue) && !ep->halted) { | |
1265 | if (ep->bEndpointAddress == 0 /* ep0 */) { | |
1266 | switch (dev->ep0state) { | |
1267 | case EP0_IN_DATA_PHASE: | |
1268 | if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY) | |
1269 | && s3c2410_udc_write_fifo(ep, | |
1270 | req)) { | |
1271 | dev->ep0state = EP0_IDLE; | |
1272 | req = NULL; | |
1273 | } | |
1274 | break; | |
1275 | ||
1276 | case EP0_OUT_DATA_PHASE: | |
1277 | if ((!_req->length) | |
1278 | || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) | |
1279 | && s3c2410_udc_read_fifo(ep, | |
1280 | req))) { | |
1281 | dev->ep0state = EP0_IDLE; | |
1282 | req = NULL; | |
1283 | } | |
1284 | break; | |
1285 | ||
1286 | default: | |
1287 | local_irq_restore(flags); | |
1288 | return -EL2HLT; | |
1289 | } | |
1290 | } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0 | |
1291 | && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY)) | |
1292 | && s3c2410_udc_write_fifo(ep, req)) { | |
1293 | req = NULL; | |
1294 | } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) | |
1295 | && fifo_count | |
1296 | && s3c2410_udc_read_fifo(ep, req)) { | |
1297 | req = NULL; | |
1298 | } | |
1299 | } | |
1300 | ||
1301 | /* pio or dma irq handler advances the queue. */ | |
1302 | if (likely (req != 0)) | |
1303 | list_add_tail(&req->queue, &ep->queue); | |
1304 | ||
1305 | local_irq_restore(flags); | |
1306 | ||
1307 | dprintk(DEBUG_VERBOSE, "%s ok\n", __func__); | |
1308 | return 0; | |
1309 | } | |
1310 | ||
1311 | /* | |
1312 | * s3c2410_udc_dequeue | |
1313 | */ | |
1314 | static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1315 | { | |
1316 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1317 | struct s3c2410_udc *udc; | |
1318 | int retval = -EINVAL; | |
1319 | unsigned long flags; | |
1320 | struct s3c2410_request *req = NULL; | |
1321 | ||
1322 | dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); | |
1323 | ||
1324 | if (!the_controller->driver) | |
1325 | return -ESHUTDOWN; | |
1326 | ||
1327 | if (!_ep || !_req) | |
1328 | return retval; | |
1329 | ||
1330 | udc = to_s3c2410_udc(ep->gadget); | |
1331 | ||
1332 | local_irq_save (flags); | |
1333 | ||
1334 | list_for_each_entry (req, &ep->queue, queue) { | |
1335 | if (&req->req == _req) { | |
1336 | list_del_init (&req->queue); | |
1337 | _req->status = -ECONNRESET; | |
1338 | retval = 0; | |
1339 | break; | |
1340 | } | |
1341 | } | |
1342 | ||
1343 | if (retval == 0) { | |
1344 | dprintk(DEBUG_VERBOSE, | |
1345 | "dequeued req %p from %s, len %d buf %p\n", | |
1346 | req, _ep->name, _req->length, _req->buf); | |
1347 | ||
1348 | s3c2410_udc_done(ep, req, -ECONNRESET); | |
1349 | } | |
1350 | ||
1351 | local_irq_restore (flags); | |
1352 | return retval; | |
1353 | } | |
1354 | ||
1355 | /* | |
1356 | * s3c2410_udc_set_halt | |
1357 | */ | |
1358 | static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value) | |
1359 | { | |
1360 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1361 | u32 ep_csr = 0; | |
1362 | unsigned long flags; | |
1363 | u32 idx; | |
1364 | ||
fa42e52b | 1365 | if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { |
3fc154b6 AP |
1366 | dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__); |
1367 | return -EINVAL; | |
1368 | } | |
1369 | ||
1370 | local_irq_save (flags); | |
1371 | ||
1372 | idx = ep->bEndpointAddress & 0x7F; | |
1373 | ||
1374 | if (idx == 0) { | |
1375 | s3c2410_udc_set_ep0_ss(base_addr); | |
1376 | s3c2410_udc_set_ep0_de_out(base_addr); | |
1377 | } else { | |
1378 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
1379 | ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN) | |
1380 | ? S3C2410_UDC_IN_CSR1_REG | |
1381 | : S3C2410_UDC_OUT_CSR1_REG); | |
1382 | ||
1383 | if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { | |
1384 | if (value) | |
1385 | udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL, | |
1386 | S3C2410_UDC_IN_CSR1_REG); | |
1387 | else { | |
1388 | ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL; | |
1389 | udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); | |
1390 | ep_csr |= S3C2410_UDC_ICSR1_CLRDT; | |
1391 | udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); | |
1392 | } | |
1393 | } else { | |
1394 | if (value) | |
1395 | udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL, | |
1396 | S3C2410_UDC_OUT_CSR1_REG); | |
1397 | else { | |
1398 | ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL; | |
1399 | udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); | |
1400 | ep_csr |= S3C2410_UDC_OCSR1_CLRDT; | |
1401 | udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); | |
1402 | } | |
1403 | } | |
1404 | } | |
1405 | ||
1406 | ep->halted = value ? 1 : 0; | |
1407 | local_irq_restore (flags); | |
1408 | ||
1409 | return 0; | |
1410 | } | |
1411 | ||
1412 | static const struct usb_ep_ops s3c2410_ep_ops = { | |
1413 | .enable = s3c2410_udc_ep_enable, | |
1414 | .disable = s3c2410_udc_ep_disable, | |
1415 | ||
1416 | .alloc_request = s3c2410_udc_alloc_request, | |
1417 | .free_request = s3c2410_udc_free_request, | |
1418 | ||
3fc154b6 AP |
1419 | .queue = s3c2410_udc_queue, |
1420 | .dequeue = s3c2410_udc_dequeue, | |
1421 | ||
1422 | .set_halt = s3c2410_udc_set_halt, | |
1423 | }; | |
1424 | ||
1425 | /*------------------------- usb_gadget_ops ----------------------------------*/ | |
1426 | ||
1427 | /* | |
1428 | * s3c2410_udc_get_frame | |
1429 | */ | |
1430 | static int s3c2410_udc_get_frame(struct usb_gadget *_gadget) | |
1431 | { | |
1432 | int tmp; | |
1433 | ||
1434 | dprintk(DEBUG_VERBOSE, "%s()\n", __func__); | |
1435 | ||
1436 | tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8; | |
1437 | tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG); | |
1438 | return tmp; | |
1439 | } | |
1440 | ||
1441 | /* | |
1442 | * s3c2410_udc_wakeup | |
1443 | */ | |
1444 | static int s3c2410_udc_wakeup(struct usb_gadget *_gadget) | |
1445 | { | |
1446 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1447 | return 0; | |
1448 | } | |
1449 | ||
1450 | /* | |
1451 | * s3c2410_udc_set_selfpowered | |
1452 | */ | |
1453 | static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value) | |
1454 | { | |
1455 | struct s3c2410_udc *udc = to_s3c2410_udc(gadget); | |
1456 | ||
1457 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1458 | ||
1459 | if (value) | |
1460 | udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED); | |
1461 | else | |
1462 | udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); | |
1463 | ||
1464 | return 0; | |
1465 | } | |
1466 | ||
1467 | static void s3c2410_udc_disable(struct s3c2410_udc *dev); | |
1468 | static void s3c2410_udc_enable(struct s3c2410_udc *dev); | |
1469 | ||
1470 | static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on) | |
1471 | { | |
1472 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1473 | ||
a74022a5 LPC |
1474 | if (udc_info && (udc_info->udc_command || |
1475 | gpio_is_valid(udc_info->pullup_pin))) { | |
1476 | ||
3fc154b6 AP |
1477 | if (is_on) |
1478 | s3c2410_udc_enable(udc); | |
1479 | else { | |
1480 | if (udc->gadget.speed != USB_SPEED_UNKNOWN) { | |
1481 | if (udc->driver && udc->driver->disconnect) | |
1482 | udc->driver->disconnect(&udc->gadget); | |
1483 | ||
1484 | } | |
1485 | s3c2410_udc_disable(udc); | |
1486 | } | |
1487 | } | |
1488 | else | |
1489 | return -EOPNOTSUPP; | |
1490 | ||
1491 | return 0; | |
1492 | } | |
1493 | ||
1494 | static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active) | |
1495 | { | |
1496 | struct s3c2410_udc *udc = to_s3c2410_udc(gadget); | |
1497 | ||
1498 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1499 | ||
1500 | udc->vbus = (is_active != 0); | |
1501 | s3c2410_udc_set_pullup(udc, is_active); | |
1502 | return 0; | |
1503 | } | |
1504 | ||
1505 | static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on) | |
1506 | { | |
1507 | struct s3c2410_udc *udc = to_s3c2410_udc(gadget); | |
1508 | ||
1509 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1510 | ||
1511 | s3c2410_udc_set_pullup(udc, is_on ? 0 : 1); | |
1512 | return 0; | |
1513 | } | |
1514 | ||
1515 | static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev) | |
1516 | { | |
1517 | struct s3c2410_udc *dev = _dev; | |
1518 | unsigned int value; | |
1519 | ||
1520 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
5f629ad7 | 1521 | |
ea99ecfd | 1522 | value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0; |
3fc154b6 AP |
1523 | if (udc_info->vbus_pin_inverted) |
1524 | value = !value; | |
1525 | ||
1526 | if (value != dev->vbus) | |
1527 | s3c2410_udc_vbus_session(&dev->gadget, value); | |
1528 | ||
1529 | return IRQ_HANDLED; | |
1530 | } | |
1531 | ||
1532 | static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma) | |
1533 | { | |
1534 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1535 | ||
1536 | if (udc_info && udc_info->vbus_draw) { | |
1537 | udc_info->vbus_draw(ma); | |
1538 | return 0; | |
1539 | } | |
1540 | ||
1541 | return -ENOTSUPP; | |
1542 | } | |
1543 | ||
0f91349b SAS |
1544 | static int s3c2410_udc_start(struct usb_gadget_driver *driver, |
1545 | int (*bind)(struct usb_gadget *)); | |
1546 | static int s3c2410_udc_stop(struct usb_gadget_driver *driver); | |
1547 | ||
3fc154b6 AP |
1548 | static const struct usb_gadget_ops s3c2410_ops = { |
1549 | .get_frame = s3c2410_udc_get_frame, | |
1550 | .wakeup = s3c2410_udc_wakeup, | |
1551 | .set_selfpowered = s3c2410_udc_set_selfpowered, | |
1552 | .pullup = s3c2410_udc_pullup, | |
1553 | .vbus_session = s3c2410_udc_vbus_session, | |
1554 | .vbus_draw = s3c2410_vbus_draw, | |
0f91349b SAS |
1555 | .start = s3c2410_udc_start, |
1556 | .stop = s3c2410_udc_stop, | |
3fc154b6 AP |
1557 | }; |
1558 | ||
a74022a5 LPC |
1559 | static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd) |
1560 | { | |
1561 | if (!udc_info) | |
1562 | return; | |
1563 | ||
1564 | if (udc_info->udc_command) { | |
5b826138 | 1565 | udc_info->udc_command(cmd); |
a74022a5 LPC |
1566 | } else if (gpio_is_valid(udc_info->pullup_pin)) { |
1567 | int value; | |
1568 | ||
1569 | switch (cmd) { | |
1570 | case S3C2410_UDC_P_ENABLE: | |
1571 | value = 1; | |
1572 | break; | |
1573 | case S3C2410_UDC_P_DISABLE: | |
1574 | value = 0; | |
1575 | break; | |
1576 | default: | |
1577 | return; | |
1578 | } | |
1579 | value ^= udc_info->pullup_pin_inverted; | |
1580 | ||
1581 | gpio_set_value(udc_info->pullup_pin, value); | |
1582 | } | |
1583 | } | |
1584 | ||
3fc154b6 AP |
1585 | /*------------------------- gadget driver handling---------------------------*/ |
1586 | /* | |
1587 | * s3c2410_udc_disable | |
1588 | */ | |
1589 | static void s3c2410_udc_disable(struct s3c2410_udc *dev) | |
1590 | { | |
1591 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1592 | ||
1593 | /* Disable all interrupts */ | |
1594 | udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG); | |
1595 | udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG); | |
1596 | ||
1597 | /* Clear the interrupt registers */ | |
1598 | udc_write(S3C2410_UDC_USBINT_RESET | |
1599 | | S3C2410_UDC_USBINT_RESUME | |
1600 | | S3C2410_UDC_USBINT_SUSPEND, | |
1601 | S3C2410_UDC_USB_INT_REG); | |
1602 | ||
1603 | udc_write(0x1F, S3C2410_UDC_EP_INT_REG); | |
1604 | ||
1605 | /* Good bye, cruel world */ | |
a74022a5 | 1606 | s3c2410_udc_command(S3C2410_UDC_P_DISABLE); |
3fc154b6 AP |
1607 | |
1608 | /* Set speed to unknown */ | |
1609 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
1610 | } | |
1611 | ||
1612 | /* | |
1613 | * s3c2410_udc_reinit | |
1614 | */ | |
1615 | static void s3c2410_udc_reinit(struct s3c2410_udc *dev) | |
1616 | { | |
1617 | u32 i; | |
1618 | ||
1619 | /* device/ep0 records init */ | |
1620 | INIT_LIST_HEAD (&dev->gadget.ep_list); | |
1621 | INIT_LIST_HEAD (&dev->gadget.ep0->ep_list); | |
1622 | dev->ep0state = EP0_IDLE; | |
1623 | ||
1624 | for (i = 0; i < S3C2410_ENDPOINTS; i++) { | |
1625 | struct s3c2410_ep *ep = &dev->ep[i]; | |
1626 | ||
1627 | if (i != 0) | |
1628 | list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list); | |
1629 | ||
1630 | ep->dev = dev; | |
f9c56cdd | 1631 | ep->ep.desc = NULL; |
3fc154b6 AP |
1632 | ep->halted = 0; |
1633 | INIT_LIST_HEAD (&ep->queue); | |
1634 | } | |
1635 | } | |
1636 | ||
1637 | /* | |
1638 | * s3c2410_udc_enable | |
1639 | */ | |
1640 | static void s3c2410_udc_enable(struct s3c2410_udc *dev) | |
1641 | { | |
1642 | int i; | |
1643 | ||
1644 | dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n"); | |
1645 | ||
1646 | /* dev->gadget.speed = USB_SPEED_UNKNOWN; */ | |
1647 | dev->gadget.speed = USB_SPEED_FULL; | |
1648 | ||
1649 | /* Set MAXP for all endpoints */ | |
1650 | for (i = 0; i < S3C2410_ENDPOINTS; i++) { | |
1651 | udc_write(i, S3C2410_UDC_INDEX_REG); | |
1652 | udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3, | |
1653 | S3C2410_UDC_MAXP_REG); | |
1654 | } | |
1655 | ||
1656 | /* Set default power state */ | |
1657 | udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG); | |
1658 | ||
1659 | /* Enable reset and suspend interrupt interrupts */ | |
1660 | udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND, | |
1661 | S3C2410_UDC_USB_INT_EN_REG); | |
1662 | ||
1663 | /* Enable ep0 interrupt */ | |
1664 | udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG); | |
1665 | ||
1666 | /* time to say "hello, world" */ | |
a74022a5 | 1667 | s3c2410_udc_command(S3C2410_UDC_P_ENABLE); |
3fc154b6 AP |
1668 | } |
1669 | ||
0f91349b | 1670 | static int s3c2410_udc_start(struct usb_gadget_driver *driver, |
b0fca50f | 1671 | int (*bind)(struct usb_gadget *)) |
3fc154b6 AP |
1672 | { |
1673 | struct s3c2410_udc *udc = the_controller; | |
1674 | int retval; | |
1675 | ||
b0fca50f | 1676 | dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name); |
3fc154b6 AP |
1677 | |
1678 | /* Sanity checks */ | |
1679 | if (!udc) | |
1680 | return -ENODEV; | |
1681 | ||
1682 | if (udc->driver) | |
1683 | return -EBUSY; | |
1684 | ||
7177aed4 | 1685 | if (!bind || !driver->setup || driver->max_speed < USB_SPEED_FULL) { |
3fc154b6 | 1686 | printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n", |
7177aed4 | 1687 | bind, driver->setup, driver->max_speed); |
3fc154b6 AP |
1688 | return -EINVAL; |
1689 | } | |
1690 | #if defined(MODULE) | |
1691 | if (!driver->unbind) { | |
1692 | printk(KERN_ERR "Invalid driver: no unbind method\n"); | |
1693 | return -EINVAL; | |
1694 | } | |
1695 | #endif | |
1696 | ||
1697 | /* Hook the driver */ | |
1698 | udc->driver = driver; | |
1699 | udc->gadget.dev.driver = &driver->driver; | |
1700 | ||
1701 | /* Bind the driver */ | |
1702 | if ((retval = device_add(&udc->gadget.dev)) != 0) { | |
1703 | printk(KERN_ERR "Error in device_add() : %d\n",retval); | |
1704 | goto register_error; | |
1705 | } | |
1706 | ||
1707 | dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n", | |
1708 | driver->driver.name); | |
1709 | ||
b0fca50f | 1710 | if ((retval = bind(&udc->gadget)) != 0) { |
3fc154b6 AP |
1711 | device_del(&udc->gadget.dev); |
1712 | goto register_error; | |
1713 | } | |
1714 | ||
1715 | /* Enable udc */ | |
1716 | s3c2410_udc_enable(udc); | |
1717 | ||
1718 | return 0; | |
1719 | ||
1720 | register_error: | |
1721 | udc->driver = NULL; | |
1722 | udc->gadget.dev.driver = NULL; | |
1723 | return retval; | |
1724 | } | |
1725 | ||
0f91349b | 1726 | static int s3c2410_udc_stop(struct usb_gadget_driver *driver) |
3fc154b6 AP |
1727 | { |
1728 | struct s3c2410_udc *udc = the_controller; | |
1729 | ||
1730 | if (!udc) | |
1731 | return -ENODEV; | |
1732 | ||
1733 | if (!driver || driver != udc->driver || !driver->unbind) | |
1734 | return -EINVAL; | |
1735 | ||
3b49d231 | 1736 | dprintk(DEBUG_NORMAL, "usb_gadget_unregister_driver() '%s'\n", |
3fc154b6 AP |
1737 | driver->driver.name); |
1738 | ||
3b49d231 VZ |
1739 | /* report disconnect */ |
1740 | if (driver->disconnect) | |
1741 | driver->disconnect(&udc->gadget); | |
1742 | ||
823c3fd9 | 1743 | driver->unbind(&udc->gadget); |
3fc154b6 AP |
1744 | |
1745 | device_del(&udc->gadget.dev); | |
1746 | udc->driver = NULL; | |
1747 | ||
1748 | /* Disable udc */ | |
1749 | s3c2410_udc_disable(udc); | |
1750 | ||
1751 | return 0; | |
1752 | } | |
1753 | ||
1754 | /*---------------------------------------------------------------------------*/ | |
1755 | static struct s3c2410_udc memory = { | |
1756 | .gadget = { | |
1757 | .ops = &s3c2410_ops, | |
1758 | .ep0 = &memory.ep[0].ep, | |
1759 | .name = gadget_name, | |
1760 | .dev = { | |
c682b170 | 1761 | .init_name = "gadget", |
3fc154b6 AP |
1762 | }, |
1763 | }, | |
1764 | ||
1765 | /* control endpoint */ | |
1766 | .ep[0] = { | |
1767 | .num = 0, | |
1768 | .ep = { | |
1769 | .name = ep0name, | |
1770 | .ops = &s3c2410_ep_ops, | |
1771 | .maxpacket = EP0_FIFO_SIZE, | |
1772 | }, | |
1773 | .dev = &memory, | |
1774 | }, | |
1775 | ||
1776 | /* first group of endpoints */ | |
1777 | .ep[1] = { | |
1778 | .num = 1, | |
1779 | .ep = { | |
1780 | .name = "ep1-bulk", | |
1781 | .ops = &s3c2410_ep_ops, | |
1782 | .maxpacket = EP_FIFO_SIZE, | |
1783 | }, | |
1784 | .dev = &memory, | |
1785 | .fifo_size = EP_FIFO_SIZE, | |
1786 | .bEndpointAddress = 1, | |
1787 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
1788 | }, | |
1789 | .ep[2] = { | |
1790 | .num = 2, | |
1791 | .ep = { | |
1792 | .name = "ep2-bulk", | |
1793 | .ops = &s3c2410_ep_ops, | |
1794 | .maxpacket = EP_FIFO_SIZE, | |
1795 | }, | |
1796 | .dev = &memory, | |
1797 | .fifo_size = EP_FIFO_SIZE, | |
1798 | .bEndpointAddress = 2, | |
1799 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
1800 | }, | |
1801 | .ep[3] = { | |
1802 | .num = 3, | |
1803 | .ep = { | |
1804 | .name = "ep3-bulk", | |
1805 | .ops = &s3c2410_ep_ops, | |
1806 | .maxpacket = EP_FIFO_SIZE, | |
1807 | }, | |
1808 | .dev = &memory, | |
1809 | .fifo_size = EP_FIFO_SIZE, | |
1810 | .bEndpointAddress = 3, | |
1811 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
1812 | }, | |
1813 | .ep[4] = { | |
1814 | .num = 4, | |
1815 | .ep = { | |
1816 | .name = "ep4-bulk", | |
1817 | .ops = &s3c2410_ep_ops, | |
1818 | .maxpacket = EP_FIFO_SIZE, | |
1819 | }, | |
1820 | .dev = &memory, | |
1821 | .fifo_size = EP_FIFO_SIZE, | |
1822 | .bEndpointAddress = 4, | |
1823 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
1824 | } | |
1825 | ||
1826 | }; | |
1827 | ||
1828 | /* | |
1829 | * probe - binds to the platform device | |
1830 | */ | |
1831 | static int s3c2410_udc_probe(struct platform_device *pdev) | |
1832 | { | |
1833 | struct s3c2410_udc *udc = &memory; | |
1834 | struct device *dev = &pdev->dev; | |
1835 | int retval; | |
ea99ecfd | 1836 | int irq; |
3fc154b6 AP |
1837 | |
1838 | dev_dbg(dev, "%s()\n", __func__); | |
1839 | ||
1840 | usb_bus_clock = clk_get(NULL, "usb-bus-gadget"); | |
1841 | if (IS_ERR(usb_bus_clock)) { | |
1842 | dev_err(dev, "failed to get usb bus clock source\n"); | |
1843 | return PTR_ERR(usb_bus_clock); | |
1844 | } | |
1845 | ||
1846 | clk_enable(usb_bus_clock); | |
1847 | ||
1848 | udc_clock = clk_get(NULL, "usb-device"); | |
1849 | if (IS_ERR(udc_clock)) { | |
1850 | dev_err(dev, "failed to get udc clock source\n"); | |
1851 | return PTR_ERR(udc_clock); | |
1852 | } | |
1853 | ||
1854 | clk_enable(udc_clock); | |
1855 | ||
1856 | mdelay(10); | |
1857 | ||
1858 | dev_dbg(dev, "got and enabled clocks\n"); | |
1859 | ||
1860 | if (strncmp(pdev->name, "s3c2440", 7) == 0) { | |
1861 | dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n"); | |
1862 | memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE; | |
1863 | memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE; | |
1864 | memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE; | |
1865 | memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE; | |
1866 | } | |
1867 | ||
1868 | spin_lock_init (&udc->lock); | |
1869 | udc_info = pdev->dev.platform_data; | |
1870 | ||
1871 | rsrc_start = S3C2410_PA_USBDEV; | |
1872 | rsrc_len = S3C24XX_SZ_USBDEV; | |
1873 | ||
1874 | if (!request_mem_region(rsrc_start, rsrc_len, gadget_name)) | |
1875 | return -EBUSY; | |
1876 | ||
1877 | base_addr = ioremap(rsrc_start, rsrc_len); | |
1878 | if (!base_addr) { | |
1879 | retval = -ENOMEM; | |
1880 | goto err_mem; | |
1881 | } | |
1882 | ||
1883 | device_initialize(&udc->gadget.dev); | |
1884 | udc->gadget.dev.parent = &pdev->dev; | |
1885 | udc->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1886 | ||
1887 | the_controller = udc; | |
1888 | platform_set_drvdata(pdev, udc); | |
1889 | ||
1890 | s3c2410_udc_disable(udc); | |
1891 | s3c2410_udc_reinit(udc); | |
1892 | ||
1893 | /* irq setup after old hardware state is cleaned up */ | |
1894 | retval = request_irq(IRQ_USBD, s3c2410_udc_irq, | |
b5dd18d8 | 1895 | 0, gadget_name, udc); |
3fc154b6 AP |
1896 | |
1897 | if (retval != 0) { | |
1898 | dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval); | |
1899 | retval = -EBUSY; | |
1900 | goto err_map; | |
1901 | } | |
1902 | ||
1903 | dev_dbg(dev, "got irq %i\n", IRQ_USBD); | |
1904 | ||
1905 | if (udc_info && udc_info->vbus_pin > 0) { | |
ea99ecfd BD |
1906 | retval = gpio_request(udc_info->vbus_pin, "udc vbus"); |
1907 | if (retval < 0) { | |
1908 | dev_err(dev, "cannot claim vbus pin\n"); | |
1909 | goto err_int; | |
1910 | } | |
1911 | ||
1912 | irq = gpio_to_irq(udc_info->vbus_pin); | |
1913 | if (irq < 0) { | |
1914 | dev_err(dev, "no irq for gpio vbus pin\n"); | |
1915 | goto err_gpio_claim; | |
1916 | } | |
1917 | ||
3fc154b6 | 1918 | retval = request_irq(irq, s3c2410_udc_vbus_irq, |
b5dd18d8 | 1919 | IRQF_TRIGGER_RISING |
8802bca4 BD |
1920 | | IRQF_TRIGGER_FALLING | IRQF_SHARED, |
1921 | gadget_name, udc); | |
3fc154b6 AP |
1922 | |
1923 | if (retval != 0) { | |
ea99ecfd | 1924 | dev_err(dev, "can't get vbus irq %d, err %d\n", |
3fc154b6 AP |
1925 | irq, retval); |
1926 | retval = -EBUSY; | |
ea99ecfd | 1927 | goto err_gpio_claim; |
3fc154b6 AP |
1928 | } |
1929 | ||
1930 | dev_dbg(dev, "got irq %i\n", irq); | |
1931 | } else { | |
1932 | udc->vbus = 1; | |
1933 | } | |
1934 | ||
a74022a5 LPC |
1935 | if (udc_info && !udc_info->udc_command && |
1936 | gpio_is_valid(udc_info->pullup_pin)) { | |
1937 | ||
1938 | retval = gpio_request_one(udc_info->pullup_pin, | |
1939 | udc_info->vbus_pin_inverted ? | |
1940 | GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW, | |
1941 | "udc pullup"); | |
1942 | if (retval) | |
1943 | goto err_vbus_irq; | |
1944 | } | |
1945 | ||
0f91349b SAS |
1946 | retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget); |
1947 | if (retval) | |
1948 | goto err_add_udc; | |
1949 | ||
3fc154b6 AP |
1950 | if (s3c2410_udc_debugfs_root) { |
1951 | udc->regs_info = debugfs_create_file("registers", S_IRUGO, | |
1952 | s3c2410_udc_debugfs_root, | |
1953 | udc, &s3c2410_udc_debugfs_fops); | |
d66937d7 Z |
1954 | if (!udc->regs_info) |
1955 | dev_warn(dev, "debugfs file creation failed\n"); | |
3fc154b6 AP |
1956 | } |
1957 | ||
1958 | dev_dbg(dev, "probe ok\n"); | |
1959 | ||
1960 | return 0; | |
1961 | ||
0f91349b SAS |
1962 | err_add_udc: |
1963 | if (udc_info && !udc_info->udc_command && | |
1964 | gpio_is_valid(udc_info->pullup_pin)) | |
1965 | gpio_free(udc_info->pullup_pin); | |
a74022a5 LPC |
1966 | err_vbus_irq: |
1967 | if (udc_info && udc_info->vbus_pin > 0) | |
1968 | free_irq(gpio_to_irq(udc_info->vbus_pin), udc); | |
ea99ecfd BD |
1969 | err_gpio_claim: |
1970 | if (udc_info && udc_info->vbus_pin > 0) | |
1971 | gpio_free(udc_info->vbus_pin); | |
3fc154b6 AP |
1972 | err_int: |
1973 | free_irq(IRQ_USBD, udc); | |
1974 | err_map: | |
1975 | iounmap(base_addr); | |
1976 | err_mem: | |
1977 | release_mem_region(rsrc_start, rsrc_len); | |
1978 | ||
1979 | return retval; | |
1980 | } | |
1981 | ||
1982 | /* | |
1983 | * s3c2410_udc_remove | |
1984 | */ | |
1985 | static int s3c2410_udc_remove(struct platform_device *pdev) | |
1986 | { | |
1987 | struct s3c2410_udc *udc = platform_get_drvdata(pdev); | |
1988 | unsigned int irq; | |
1989 | ||
1990 | dev_dbg(&pdev->dev, "%s()\n", __func__); | |
0f91349b SAS |
1991 | |
1992 | usb_del_gadget_udc(&udc->gadget); | |
3fc154b6 AP |
1993 | if (udc->driver) |
1994 | return -EBUSY; | |
1995 | ||
1996 | debugfs_remove(udc->regs_info); | |
1997 | ||
a74022a5 LPC |
1998 | if (udc_info && !udc_info->udc_command && |
1999 | gpio_is_valid(udc_info->pullup_pin)) | |
2000 | gpio_free(udc_info->pullup_pin); | |
2001 | ||
3fc154b6 | 2002 | if (udc_info && udc_info->vbus_pin > 0) { |
ea99ecfd | 2003 | irq = gpio_to_irq(udc_info->vbus_pin); |
3fc154b6 AP |
2004 | free_irq(irq, udc); |
2005 | } | |
2006 | ||
2007 | free_irq(IRQ_USBD, udc); | |
2008 | ||
2009 | iounmap(base_addr); | |
2010 | release_mem_region(rsrc_start, rsrc_len); | |
2011 | ||
2012 | platform_set_drvdata(pdev, NULL); | |
2013 | ||
2014 | if (!IS_ERR(udc_clock) && udc_clock != NULL) { | |
2015 | clk_disable(udc_clock); | |
2016 | clk_put(udc_clock); | |
2017 | udc_clock = NULL; | |
2018 | } | |
2019 | ||
2020 | if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) { | |
2021 | clk_disable(usb_bus_clock); | |
2022 | clk_put(usb_bus_clock); | |
2023 | usb_bus_clock = NULL; | |
2024 | } | |
2025 | ||
2026 | dev_dbg(&pdev->dev, "%s: remove ok\n", __func__); | |
2027 | return 0; | |
2028 | } | |
2029 | ||
2030 | #ifdef CONFIG_PM | |
2031 | static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message) | |
2032 | { | |
a74022a5 | 2033 | s3c2410_udc_command(S3C2410_UDC_P_DISABLE); |
3fc154b6 AP |
2034 | |
2035 | return 0; | |
2036 | } | |
2037 | ||
2038 | static int s3c2410_udc_resume(struct platform_device *pdev) | |
2039 | { | |
a74022a5 | 2040 | s3c2410_udc_command(S3C2410_UDC_P_ENABLE); |
3fc154b6 AP |
2041 | |
2042 | return 0; | |
2043 | } | |
2044 | #else | |
2045 | #define s3c2410_udc_suspend NULL | |
2046 | #define s3c2410_udc_resume NULL | |
2047 | #endif | |
2048 | ||
513385a3 SAS |
2049 | static const struct platform_device_id s3c_udc_ids[] = { |
2050 | { "s3c2410-usbgadget", }, | |
2051 | { "s3c2440-usbgadget", }, | |
7e9d40f3 | 2052 | { } |
3fc154b6 | 2053 | }; |
513385a3 | 2054 | MODULE_DEVICE_TABLE(platform, s3c_udc_ids); |
3fc154b6 | 2055 | |
513385a3 | 2056 | static struct platform_driver udc_driver_24x0 = { |
3fc154b6 | 2057 | .driver = { |
513385a3 | 2058 | .name = "s3c24x0-usbgadget", |
3fc154b6 AP |
2059 | .owner = THIS_MODULE, |
2060 | }, | |
2061 | .probe = s3c2410_udc_probe, | |
2062 | .remove = s3c2410_udc_remove, | |
2063 | .suspend = s3c2410_udc_suspend, | |
2064 | .resume = s3c2410_udc_resume, | |
513385a3 | 2065 | .id_table = s3c_udc_ids, |
3fc154b6 AP |
2066 | }; |
2067 | ||
2068 | static int __init udc_init(void) | |
2069 | { | |
2070 | int retval; | |
2071 | ||
2072 | dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION); | |
2073 | ||
2074 | s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL); | |
2075 | if (IS_ERR(s3c2410_udc_debugfs_root)) { | |
2076 | printk(KERN_ERR "%s: debugfs dir creation failed %ld\n", | |
2077 | gadget_name, PTR_ERR(s3c2410_udc_debugfs_root)); | |
2078 | s3c2410_udc_debugfs_root = NULL; | |
2079 | } | |
2080 | ||
513385a3 | 2081 | retval = platform_driver_register(&udc_driver_24x0); |
3fc154b6 AP |
2082 | if (retval) |
2083 | goto err; | |
2084 | ||
2085 | return 0; | |
2086 | ||
2087 | err: | |
2088 | debugfs_remove(s3c2410_udc_debugfs_root); | |
2089 | return retval; | |
2090 | } | |
2091 | ||
2092 | static void __exit udc_exit(void) | |
2093 | { | |
513385a3 | 2094 | platform_driver_unregister(&udc_driver_24x0); |
3fc154b6 AP |
2095 | debugfs_remove(s3c2410_udc_debugfs_root); |
2096 | } | |
2097 | ||
3fc154b6 AP |
2098 | module_init(udc_init); |
2099 | module_exit(udc_exit); | |
2100 | ||
2101 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
2102 | MODULE_DESCRIPTION(DRIVER_DESC); | |
2103 | MODULE_VERSION(DRIVER_VERSION); | |
2104 | MODULE_LICENSE("GPL"); |