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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for the PLX NET2280 USB device controller. | |
3 | * Specs and errata are available from <http://www.plxtech.com>. | |
4 | * | |
901b3d75 | 5 | * PLX Technology Inc. (formerly NetChip Technology) supported the |
1da177e4 LT |
6 | * development of this driver. |
7 | * | |
8 | * | |
9 | * CODE STATUS HIGHLIGHTS | |
10 | * | |
11 | * This driver should work well with most "gadget" drivers, including | |
fa06920a | 12 | * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers |
1da177e4 LT |
13 | * as well as Gadget Zero and Gadgetfs. |
14 | * | |
90664198 | 15 | * DMA is enabled by default. |
1da177e4 | 16 | * |
adc82f77 RR |
17 | * MSI is enabled by default. The legacy IRQ is used if MSI couldn't |
18 | * be enabled. | |
19 | * | |
1da177e4 LT |
20 | * Note that almost all the errata workarounds here are only needed for |
21 | * rev1 chips. Rev1a silicon (0110) fixes almost all of them. | |
22 | */ | |
23 | ||
24 | /* | |
25 | * Copyright (C) 2003 David Brownell | |
26 | * Copyright (C) 2003-2005 PLX Technology, Inc. | |
adc82f77 | 27 | * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS |
1da177e4 | 28 | * |
901b3d75 DB |
29 | * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility |
30 | * with 2282 chip | |
950ee4c8 | 31 | * |
adc82f77 RR |
32 | * Modified Ricardo Ribalda Qtechnology AS to provide compatibility |
33 | * with usb 338x chip. Based on PLX driver | |
34 | * | |
1da177e4 LT |
35 | * This program is free software; you can redistribute it and/or modify |
36 | * it under the terms of the GNU General Public License as published by | |
37 | * the Free Software Foundation; either version 2 of the License, or | |
38 | * (at your option) any later version. | |
1da177e4 LT |
39 | */ |
40 | ||
1da177e4 LT |
41 | #include <linux/module.h> |
42 | #include <linux/pci.h> | |
682d4c80 | 43 | #include <linux/dma-mapping.h> |
1da177e4 LT |
44 | #include <linux/kernel.h> |
45 | #include <linux/delay.h> | |
46 | #include <linux/ioport.h> | |
1da177e4 | 47 | #include <linux/slab.h> |
1da177e4 LT |
48 | #include <linux/errno.h> |
49 | #include <linux/init.h> | |
50 | #include <linux/timer.h> | |
51 | #include <linux/list.h> | |
52 | #include <linux/interrupt.h> | |
53 | #include <linux/moduleparam.h> | |
54 | #include <linux/device.h> | |
5f848137 | 55 | #include <linux/usb/ch9.h> |
9454a57a | 56 | #include <linux/usb/gadget.h> |
b38b03b3 | 57 | #include <linux/prefetch.h> |
fae3c158 | 58 | #include <linux/io.h> |
1da177e4 LT |
59 | |
60 | #include <asm/byteorder.h> | |
1da177e4 | 61 | #include <asm/irq.h> |
1da177e4 LT |
62 | #include <asm/unaligned.h> |
63 | ||
adc82f77 RR |
64 | #define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller" |
65 | #define DRIVER_VERSION "2005 Sept 27/v3.0" | |
1da177e4 | 66 | |
1da177e4 LT |
67 | #define EP_DONTUSE 13 /* nonzero */ |
68 | ||
69 | #define USE_RDK_LEDS /* GPIO pins control three LEDs */ | |
70 | ||
71 | ||
fae3c158 RR |
72 | static const char driver_name[] = "net2280"; |
73 | static const char driver_desc[] = DRIVER_DESC; | |
1da177e4 | 74 | |
adc82f77 | 75 | static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 }; |
fae3c158 | 76 | static const char ep0name[] = "ep0"; |
1da177e4 | 77 | |
c23c3c3c RB |
78 | #define EP_INFO(_name, _caps) \ |
79 | { \ | |
80 | .name = _name, \ | |
81 | .caps = _caps, \ | |
82 | } | |
83 | ||
84 | static const struct { | |
85 | const char *name; | |
86 | const struct usb_ep_caps caps; | |
87 | } ep_info_dft[] = { /* Default endpoint configuration */ | |
88 | EP_INFO(ep0name, | |
89 | USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)), | |
90 | EP_INFO("ep-a", | |
91 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
92 | EP_INFO("ep-b", | |
93 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
94 | EP_INFO("ep-c", | |
95 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
96 | EP_INFO("ep-d", | |
97 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
98 | EP_INFO("ep-e", | |
99 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
100 | EP_INFO("ep-f", | |
101 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
102 | EP_INFO("ep-g", | |
103 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
104 | EP_INFO("ep-h", | |
105 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
106 | }, ep_info_adv[] = { /* Endpoints for usb3380 advance mode */ | |
107 | EP_INFO(ep0name, | |
108 | USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)), | |
109 | EP_INFO("ep1in", | |
110 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)), | |
111 | EP_INFO("ep2out", | |
112 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)), | |
113 | EP_INFO("ep3in", | |
114 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)), | |
115 | EP_INFO("ep4out", | |
116 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)), | |
117 | EP_INFO("ep1out", | |
118 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)), | |
119 | EP_INFO("ep2in", | |
120 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)), | |
121 | EP_INFO("ep3out", | |
122 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)), | |
123 | EP_INFO("ep4in", | |
124 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)), | |
a285f40d MYK |
125 | }; |
126 | ||
c23c3c3c RB |
127 | #undef EP_INFO |
128 | ||
1da177e4 LT |
129 | /* mode 0 == ep-{a,b,c,d} 1K fifo each |
130 | * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable | |
131 | * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable | |
132 | */ | |
fae3c158 | 133 | static ushort fifo_mode; |
1da177e4 LT |
134 | |
135 | /* "modprobe net2280 fifo_mode=1" etc */ | |
ae8e530a | 136 | module_param(fifo_mode, ushort, 0644); |
1da177e4 LT |
137 | |
138 | /* enable_suspend -- When enabled, the driver will respond to | |
139 | * USB suspend requests by powering down the NET2280. Otherwise, | |
25985edc | 140 | * USB suspend requests will be ignored. This is acceptable for |
950ee4c8 | 141 | * self-powered devices |
1da177e4 | 142 | */ |
00d4db0e | 143 | static bool enable_suspend; |
1da177e4 LT |
144 | |
145 | /* "modprobe net2280 enable_suspend=1" etc */ | |
ae8e530a | 146 | module_param(enable_suspend, bool, 0444); |
1da177e4 | 147 | |
1da177e4 LT |
148 | #define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out") |
149 | ||
fae3c158 | 150 | static char *type_string(u8 bmAttributes) |
1da177e4 LT |
151 | { |
152 | switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) { | |
153 | case USB_ENDPOINT_XFER_BULK: return "bulk"; | |
154 | case USB_ENDPOINT_XFER_ISOC: return "iso"; | |
155 | case USB_ENDPOINT_XFER_INT: return "intr"; | |
2b84f92b | 156 | } |
1da177e4 LT |
157 | return "control"; |
158 | } | |
1da177e4 LT |
159 | |
160 | #include "net2280.h" | |
161 | ||
3e76fdcb RR |
162 | #define valid_bit cpu_to_le32(BIT(VALID_BIT)) |
163 | #define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE)) | |
1da177e4 | 164 | |
e6ac4bb0 | 165 | static void ep_clear_seqnum(struct net2280_ep *ep); |
11bece5e MYK |
166 | static void stop_activity(struct net2280 *dev, |
167 | struct usb_gadget_driver *driver); | |
168 | static void ep0_start(struct net2280 *dev); | |
e6ac4bb0 | 169 | |
1da177e4 | 170 | /*-------------------------------------------------------------------------*/ |
adc82f77 RR |
171 | static inline void enable_pciirqenb(struct net2280_ep *ep) |
172 | { | |
173 | u32 tmp = readl(&ep->dev->regs->pciirqenb0); | |
174 | ||
2eeb0016 | 175 | if (ep->dev->quirks & PLX_LEGACY) |
3e76fdcb | 176 | tmp |= BIT(ep->num); |
adc82f77 | 177 | else |
3e76fdcb | 178 | tmp |= BIT(ep_bit[ep->num]); |
adc82f77 RR |
179 | writel(tmp, &ep->dev->regs->pciirqenb0); |
180 | ||
181 | return; | |
182 | } | |
1da177e4 LT |
183 | |
184 | static int | |
fae3c158 | 185 | net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) |
1da177e4 LT |
186 | { |
187 | struct net2280 *dev; | |
188 | struct net2280_ep *ep; | |
c65c4f05 MYK |
189 | u32 max; |
190 | u32 tmp = 0; | |
191 | u32 type; | |
1da177e4 | 192 | unsigned long flags; |
adc82f77 | 193 | static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 }; |
9ceafcc2 | 194 | int ret = 0; |
1da177e4 | 195 | |
fae3c158 | 196 | ep = container_of(_ep, struct net2280_ep, ep); |
ae8e530a | 197 | if (!_ep || !desc || ep->desc || _ep->name == ep0name || |
9ceafcc2 MYK |
198 | desc->bDescriptorType != USB_DT_ENDPOINT) { |
199 | pr_err("%s: failed at line=%d\n", __func__, __LINE__); | |
1da177e4 | 200 | return -EINVAL; |
9ceafcc2 | 201 | } |
1da177e4 | 202 | dev = ep->dev; |
9ceafcc2 MYK |
203 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { |
204 | ret = -ESHUTDOWN; | |
205 | goto print_err; | |
206 | } | |
1da177e4 LT |
207 | |
208 | /* erratum 0119 workaround ties up an endpoint number */ | |
9ceafcc2 MYK |
209 | if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) { |
210 | ret = -EDOM; | |
211 | goto print_err; | |
212 | } | |
1da177e4 | 213 | |
5185c913 | 214 | if (dev->quirks & PLX_PCIE) { |
9ceafcc2 MYK |
215 | if ((desc->bEndpointAddress & 0x0f) >= 0x0c) { |
216 | ret = -EDOM; | |
217 | goto print_err; | |
218 | } | |
adc82f77 | 219 | ep->is_in = !!usb_endpoint_dir_in(desc); |
9ceafcc2 MYK |
220 | if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) { |
221 | ret = -EINVAL; | |
222 | goto print_err; | |
223 | } | |
adc82f77 RR |
224 | } |
225 | ||
1da177e4 | 226 | /* sanity check ep-e/ep-f since their fifos are small */ |
090bdb5c | 227 | max = usb_endpoint_maxp(desc); |
9ceafcc2 MYK |
228 | if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) { |
229 | ret = -ERANGE; | |
230 | goto print_err; | |
231 | } | |
1da177e4 | 232 | |
fae3c158 | 233 | spin_lock_irqsave(&dev->lock, flags); |
090bdb5c | 234 | _ep->maxpacket = max; |
1da177e4 LT |
235 | ep->desc = desc; |
236 | ||
237 | /* ep_reset() has already been called */ | |
238 | ep->stopped = 0; | |
8066134f | 239 | ep->wedged = 0; |
1da177e4 LT |
240 | ep->out_overflow = 0; |
241 | ||
242 | /* set speed-dependent max packet; may kick in high bandwidth */ | |
adc82f77 | 243 | set_max_speed(ep, max); |
1da177e4 | 244 | |
1da177e4 | 245 | /* set type, direction, address; reset fifo counters */ |
3e76fdcb | 246 | writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat); |
c65c4f05 | 247 | |
5185c913 | 248 | if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) { |
c65c4f05 MYK |
249 | tmp = readl(&ep->cfg->ep_cfg); |
250 | /* If USB ep number doesn't match hardware ep number */ | |
251 | if ((tmp & 0xf) != usb_endpoint_num(desc)) { | |
252 | ret = -EINVAL; | |
253 | spin_unlock_irqrestore(&dev->lock, flags); | |
254 | goto print_err; | |
255 | } | |
256 | if (ep->is_in) | |
257 | tmp &= ~USB3380_EP_CFG_MASK_IN; | |
258 | else | |
259 | tmp &= ~USB3380_EP_CFG_MASK_OUT; | |
260 | } | |
261 | type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK); | |
262 | if (type == USB_ENDPOINT_XFER_INT) { | |
1da177e4 | 263 | /* erratum 0105 workaround prevents hs NYET */ |
ae8e530a RR |
264 | if (dev->chiprev == 0100 && |
265 | dev->gadget.speed == USB_SPEED_HIGH && | |
266 | !(desc->bEndpointAddress & USB_DIR_IN)) | |
3e76fdcb | 267 | writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE), |
1da177e4 | 268 | &ep->regs->ep_rsp); |
c65c4f05 | 269 | } else if (type == USB_ENDPOINT_XFER_BULK) { |
1da177e4 | 270 | /* catch some particularly blatant driver bugs */ |
adc82f77 RR |
271 | if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) || |
272 | (dev->gadget.speed == USB_SPEED_HIGH && max != 512) || | |
273 | (dev->gadget.speed == USB_SPEED_FULL && max > 64)) { | |
274 | spin_unlock_irqrestore(&dev->lock, flags); | |
9ceafcc2 MYK |
275 | ret = -ERANGE; |
276 | goto print_err; | |
1da177e4 LT |
277 | } |
278 | } | |
c65c4f05 | 279 | ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC); |
adc82f77 | 280 | /* Enable this endpoint */ |
2eeb0016 | 281 | if (dev->quirks & PLX_LEGACY) { |
c65c4f05 | 282 | tmp |= type << ENDPOINT_TYPE; |
adc82f77 RR |
283 | tmp |= desc->bEndpointAddress; |
284 | /* default full fifo lines */ | |
285 | tmp |= (4 << ENDPOINT_BYTE_COUNT); | |
3e76fdcb | 286 | tmp |= BIT(ENDPOINT_ENABLE); |
adc82f77 RR |
287 | ep->is_in = (tmp & USB_DIR_IN) != 0; |
288 | } else { | |
289 | /* In Legacy mode, only OUT endpoints are used */ | |
290 | if (dev->enhanced_mode && ep->is_in) { | |
c65c4f05 | 291 | tmp |= type << IN_ENDPOINT_TYPE; |
3e76fdcb | 292 | tmp |= BIT(IN_ENDPOINT_ENABLE); |
adc82f77 | 293 | } else { |
c65c4f05 | 294 | tmp |= type << OUT_ENDPOINT_TYPE; |
3e76fdcb | 295 | tmp |= BIT(OUT_ENDPOINT_ENABLE); |
adc82f77 RR |
296 | tmp |= (ep->is_in << ENDPOINT_DIRECTION); |
297 | } | |
298 | ||
463e104f | 299 | tmp |= (4 << ENDPOINT_BYTE_COUNT); |
c65c4f05 MYK |
300 | if (!dev->enhanced_mode) |
301 | tmp |= usb_endpoint_num(desc); | |
adc82f77 RR |
302 | tmp |= (ep->ep.maxburst << MAX_BURST_SIZE); |
303 | } | |
304 | ||
305 | /* Make sure all the registers are written before ep_rsp*/ | |
306 | wmb(); | |
1da177e4 LT |
307 | |
308 | /* for OUT transfers, block the rx fifo until a read is posted */ | |
1da177e4 | 309 | if (!ep->is_in) |
3e76fdcb | 310 | writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp); |
2eeb0016 | 311 | else if (!(dev->quirks & PLX_2280)) { |
901b3d75 DB |
312 | /* Added for 2282, Don't use nak packets on an in endpoint, |
313 | * this was ignored on 2280 | |
314 | */ | |
3e76fdcb RR |
315 | writel(BIT(CLEAR_NAK_OUT_PACKETS) | |
316 | BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp); | |
950ee4c8 | 317 | } |
1da177e4 | 318 | |
5185c913 | 319 | if (dev->quirks & PLX_PCIE) |
e6ac4bb0 | 320 | ep_clear_seqnum(ep); |
adc82f77 | 321 | writel(tmp, &ep->cfg->ep_cfg); |
1da177e4 LT |
322 | |
323 | /* enable irqs */ | |
324 | if (!ep->dma) { /* pio, per-packet */ | |
adc82f77 | 325 | enable_pciirqenb(ep); |
1da177e4 | 326 | |
3e76fdcb RR |
327 | tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) | |
328 | BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE); | |
2eeb0016 | 329 | if (dev->quirks & PLX_2280) |
fae3c158 RR |
330 | tmp |= readl(&ep->regs->ep_irqenb); |
331 | writel(tmp, &ep->regs->ep_irqenb); | |
1da177e4 | 332 | } else { /* dma, per-request */ |
3e76fdcb | 333 | tmp = BIT((8 + ep->num)); /* completion */ |
fae3c158 RR |
334 | tmp |= readl(&dev->regs->pciirqenb1); |
335 | writel(tmp, &dev->regs->pciirqenb1); | |
1da177e4 LT |
336 | |
337 | /* for short OUT transfers, dma completions can't | |
338 | * advance the queue; do it pio-style, by hand. | |
339 | * NOTE erratum 0112 workaround #2 | |
340 | */ | |
341 | if ((desc->bEndpointAddress & USB_DIR_IN) == 0) { | |
3e76fdcb | 342 | tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE); |
fae3c158 | 343 | writel(tmp, &ep->regs->ep_irqenb); |
1da177e4 | 344 | |
adc82f77 | 345 | enable_pciirqenb(ep); |
1da177e4 LT |
346 | } |
347 | } | |
348 | ||
349 | tmp = desc->bEndpointAddress; | |
e56e69cc | 350 | ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n", |
fae3c158 RR |
351 | _ep->name, tmp & 0x0f, DIR_STRING(tmp), |
352 | type_string(desc->bmAttributes), | |
1da177e4 LT |
353 | ep->dma ? "dma" : "pio", max); |
354 | ||
355 | /* pci writes may still be posted */ | |
fae3c158 | 356 | spin_unlock_irqrestore(&dev->lock, flags); |
9ceafcc2 MYK |
357 | return ret; |
358 | ||
359 | print_err: | |
360 | dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret); | |
361 | return ret; | |
1da177e4 LT |
362 | } |
363 | ||
fae3c158 | 364 | static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec) |
1da177e4 LT |
365 | { |
366 | u32 result; | |
367 | ||
368 | do { | |
fae3c158 | 369 | result = readl(ptr); |
1da177e4 LT |
370 | if (result == ~(u32)0) /* "device unplugged" */ |
371 | return -ENODEV; | |
372 | result &= mask; | |
373 | if (result == done) | |
374 | return 0; | |
fae3c158 | 375 | udelay(1); |
1da177e4 LT |
376 | usec--; |
377 | } while (usec > 0); | |
378 | return -ETIMEDOUT; | |
379 | } | |
380 | ||
901b3d75 | 381 | static const struct usb_ep_ops net2280_ep_ops; |
1da177e4 | 382 | |
adc82f77 RR |
383 | static void ep_reset_228x(struct net2280_regs __iomem *regs, |
384 | struct net2280_ep *ep) | |
1da177e4 LT |
385 | { |
386 | u32 tmp; | |
387 | ||
388 | ep->desc = NULL; | |
fae3c158 | 389 | INIT_LIST_HEAD(&ep->queue); |
1da177e4 | 390 | |
e117e742 | 391 | usb_ep_set_maxpacket_limit(&ep->ep, ~0); |
1da177e4 LT |
392 | ep->ep.ops = &net2280_ep_ops; |
393 | ||
394 | /* disable the dma, irqs, endpoint... */ | |
395 | if (ep->dma) { | |
fae3c158 | 396 | writel(0, &ep->dma->dmactl); |
3e76fdcb RR |
397 | writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) | |
398 | BIT(DMA_TRANSACTION_DONE_INTERRUPT) | | |
399 | BIT(DMA_ABORT), | |
400 | &ep->dma->dmastat); | |
1da177e4 | 401 | |
fae3c158 | 402 | tmp = readl(®s->pciirqenb0); |
3e76fdcb | 403 | tmp &= ~BIT(ep->num); |
fae3c158 | 404 | writel(tmp, ®s->pciirqenb0); |
1da177e4 | 405 | } else { |
fae3c158 | 406 | tmp = readl(®s->pciirqenb1); |
3e76fdcb | 407 | tmp &= ~BIT((8 + ep->num)); /* completion */ |
fae3c158 | 408 | writel(tmp, ®s->pciirqenb1); |
1da177e4 | 409 | } |
fae3c158 | 410 | writel(0, &ep->regs->ep_irqenb); |
1da177e4 LT |
411 | |
412 | /* init to our chosen defaults, notably so that we NAK OUT | |
413 | * packets until the driver queues a read (+note erratum 0112) | |
414 | */ | |
2eeb0016 | 415 | if (!ep->is_in || (ep->dev->quirks & PLX_2280)) { |
3e76fdcb RR |
416 | tmp = BIT(SET_NAK_OUT_PACKETS_MODE) | |
417 | BIT(SET_NAK_OUT_PACKETS) | | |
418 | BIT(CLEAR_EP_HIDE_STATUS_PHASE) | | |
419 | BIT(CLEAR_INTERRUPT_MODE); | |
950ee4c8 GL |
420 | } else { |
421 | /* added for 2282 */ | |
3e76fdcb RR |
422 | tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) | |
423 | BIT(CLEAR_NAK_OUT_PACKETS) | | |
424 | BIT(CLEAR_EP_HIDE_STATUS_PHASE) | | |
425 | BIT(CLEAR_INTERRUPT_MODE); | |
950ee4c8 | 426 | } |
1da177e4 LT |
427 | |
428 | if (ep->num != 0) { | |
3e76fdcb RR |
429 | tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) | |
430 | BIT(CLEAR_ENDPOINT_HALT); | |
1da177e4 | 431 | } |
fae3c158 | 432 | writel(tmp, &ep->regs->ep_rsp); |
1da177e4 LT |
433 | |
434 | /* scrub most status bits, and flush any fifo state */ | |
2eeb0016 | 435 | if (ep->dev->quirks & PLX_2280) |
3e76fdcb RR |
436 | tmp = BIT(FIFO_OVERFLOW) | |
437 | BIT(FIFO_UNDERFLOW); | |
950ee4c8 GL |
438 | else |
439 | tmp = 0; | |
440 | ||
3e76fdcb RR |
441 | writel(tmp | BIT(TIMEOUT) | |
442 | BIT(USB_STALL_SENT) | | |
443 | BIT(USB_IN_NAK_SENT) | | |
444 | BIT(USB_IN_ACK_RCVD) | | |
445 | BIT(USB_OUT_PING_NAK_SENT) | | |
446 | BIT(USB_OUT_ACK_SENT) | | |
447 | BIT(FIFO_FLUSH) | | |
448 | BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) | | |
449 | BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) | | |
450 | BIT(DATA_PACKET_RECEIVED_INTERRUPT) | | |
451 | BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) | | |
452 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
ae8e530a RR |
453 | BIT(DATA_IN_TOKEN_INTERRUPT), |
454 | &ep->regs->ep_stat); | |
1da177e4 LT |
455 | |
456 | /* fifo size is handled separately */ | |
457 | } | |
458 | ||
adc82f77 RR |
459 | static void ep_reset_338x(struct net2280_regs __iomem *regs, |
460 | struct net2280_ep *ep) | |
461 | { | |
462 | u32 tmp, dmastat; | |
463 | ||
464 | ep->desc = NULL; | |
465 | INIT_LIST_HEAD(&ep->queue); | |
466 | ||
467 | usb_ep_set_maxpacket_limit(&ep->ep, ~0); | |
468 | ep->ep.ops = &net2280_ep_ops; | |
469 | ||
470 | /* disable the dma, irqs, endpoint... */ | |
471 | if (ep->dma) { | |
472 | writel(0, &ep->dma->dmactl); | |
3e76fdcb RR |
473 | writel(BIT(DMA_ABORT_DONE_INTERRUPT) | |
474 | BIT(DMA_PAUSE_DONE_INTERRUPT) | | |
475 | BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) | | |
ae8e530a RR |
476 | BIT(DMA_TRANSACTION_DONE_INTERRUPT), |
477 | /* | BIT(DMA_ABORT), */ | |
478 | &ep->dma->dmastat); | |
adc82f77 RR |
479 | |
480 | dmastat = readl(&ep->dma->dmastat); | |
481 | if (dmastat == 0x5002) { | |
e56e69cc | 482 | ep_warn(ep->dev, "The dmastat return = %x!!\n", |
adc82f77 RR |
483 | dmastat); |
484 | writel(0x5a, &ep->dma->dmastat); | |
485 | } | |
486 | ||
487 | tmp = readl(®s->pciirqenb0); | |
3e76fdcb | 488 | tmp &= ~BIT(ep_bit[ep->num]); |
adc82f77 RR |
489 | writel(tmp, ®s->pciirqenb0); |
490 | } else { | |
491 | if (ep->num < 5) { | |
492 | tmp = readl(®s->pciirqenb1); | |
3e76fdcb | 493 | tmp &= ~BIT((8 + ep->num)); /* completion */ |
adc82f77 RR |
494 | writel(tmp, ®s->pciirqenb1); |
495 | } | |
496 | } | |
497 | writel(0, &ep->regs->ep_irqenb); | |
498 | ||
3e76fdcb RR |
499 | writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) | |
500 | BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) | | |
501 | BIT(FIFO_OVERFLOW) | | |
502 | BIT(DATA_PACKET_RECEIVED_INTERRUPT) | | |
503 | BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) | | |
504 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
505 | BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat); | |
971fe656 MYK |
506 | |
507 | tmp = readl(&ep->cfg->ep_cfg); | |
508 | if (ep->is_in) | |
509 | tmp &= ~USB3380_EP_CFG_MASK_IN; | |
510 | else | |
511 | tmp &= ~USB3380_EP_CFG_MASK_OUT; | |
512 | writel(tmp, &ep->cfg->ep_cfg); | |
adc82f77 RR |
513 | } |
514 | ||
fae3c158 | 515 | static void nuke(struct net2280_ep *); |
1da177e4 | 516 | |
fae3c158 | 517 | static int net2280_disable(struct usb_ep *_ep) |
1da177e4 LT |
518 | { |
519 | struct net2280_ep *ep; | |
520 | unsigned long flags; | |
521 | ||
fae3c158 | 522 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
523 | if (!_ep || !ep->desc || _ep->name == ep0name) { |
524 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 525 | return -EINVAL; |
9ceafcc2 | 526 | } |
fae3c158 RR |
527 | spin_lock_irqsave(&ep->dev->lock, flags); |
528 | nuke(ep); | |
adc82f77 | 529 | |
5185c913 | 530 | if (ep->dev->quirks & PLX_PCIE) |
adc82f77 RR |
531 | ep_reset_338x(ep->dev->regs, ep); |
532 | else | |
533 | ep_reset_228x(ep->dev->regs, ep); | |
1da177e4 | 534 | |
e56e69cc | 535 | ep_vdbg(ep->dev, "disabled %s %s\n", |
1da177e4 LT |
536 | ep->dma ? "dma" : "pio", _ep->name); |
537 | ||
538 | /* synch memory views with the device */ | |
adc82f77 | 539 | (void)readl(&ep->cfg->ep_cfg); |
1da177e4 | 540 | |
d588ff58 | 541 | if (!ep->dma && ep->num >= 1 && ep->num <= 4) |
fae3c158 | 542 | ep->dma = &ep->dev->dma[ep->num - 1]; |
1da177e4 | 543 | |
fae3c158 | 544 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
1da177e4 LT |
545 | return 0; |
546 | } | |
547 | ||
548 | /*-------------------------------------------------------------------------*/ | |
549 | ||
fae3c158 RR |
550 | static struct usb_request |
551 | *net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) | |
1da177e4 LT |
552 | { |
553 | struct net2280_ep *ep; | |
554 | struct net2280_request *req; | |
555 | ||
9ceafcc2 MYK |
556 | if (!_ep) { |
557 | pr_err("%s: Invalid ep\n", __func__); | |
1da177e4 | 558 | return NULL; |
9ceafcc2 | 559 | } |
fae3c158 | 560 | ep = container_of(_ep, struct net2280_ep, ep); |
1da177e4 | 561 | |
7039f422 | 562 | req = kzalloc(sizeof(*req), gfp_flags); |
1da177e4 LT |
563 | if (!req) |
564 | return NULL; | |
565 | ||
fae3c158 | 566 | INIT_LIST_HEAD(&req->queue); |
1da177e4 LT |
567 | |
568 | /* this dma descriptor may be swapped with the previous dummy */ | |
569 | if (ep->dma) { | |
570 | struct net2280_dma *td; | |
571 | ||
fae3c158 | 572 | td = pci_pool_alloc(ep->dev->requests, gfp_flags, |
1da177e4 LT |
573 | &req->td_dma); |
574 | if (!td) { | |
fae3c158 | 575 | kfree(req); |
1da177e4 LT |
576 | return NULL; |
577 | } | |
578 | td->dmacount = 0; /* not VALID */ | |
1da177e4 LT |
579 | td->dmadesc = td->dmaaddr; |
580 | req->td = td; | |
581 | } | |
582 | return &req->req; | |
583 | } | |
584 | ||
fae3c158 | 585 | static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req) |
1da177e4 LT |
586 | { |
587 | struct net2280_ep *ep; | |
588 | struct net2280_request *req; | |
589 | ||
fae3c158 | 590 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 | 591 | if (!_ep || !_req) { |
a00c9791 | 592 | dev_err(&ep->dev->pdev->dev, "%s: Invalid ep=%p or req=%p\n", |
9ceafcc2 | 593 | __func__, _ep, _req); |
1da177e4 | 594 | return; |
9ceafcc2 | 595 | } |
1da177e4 | 596 | |
fae3c158 RR |
597 | req = container_of(_req, struct net2280_request, req); |
598 | WARN_ON(!list_empty(&req->queue)); | |
1da177e4 | 599 | if (req->td) |
fae3c158 RR |
600 | pci_pool_free(ep->dev->requests, req->td, req->td_dma); |
601 | kfree(req); | |
1da177e4 LT |
602 | } |
603 | ||
604 | /*-------------------------------------------------------------------------*/ | |
605 | ||
1da177e4 LT |
606 | /* load a packet into the fifo we use for usb IN transfers. |
607 | * works for all endpoints. | |
608 | * | |
609 | * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo | |
610 | * at a time, but this code is simpler because it knows it only writes | |
611 | * one packet. ep-a..ep-d should use dma instead. | |
612 | */ | |
fae3c158 | 613 | static void write_fifo(struct net2280_ep *ep, struct usb_request *req) |
1da177e4 LT |
614 | { |
615 | struct net2280_ep_regs __iomem *regs = ep->regs; | |
616 | u8 *buf; | |
617 | u32 tmp; | |
618 | unsigned count, total; | |
619 | ||
620 | /* INVARIANT: fifo is currently empty. (testable) */ | |
621 | ||
622 | if (req) { | |
623 | buf = req->buf + req->actual; | |
fae3c158 | 624 | prefetch(buf); |
1da177e4 LT |
625 | total = req->length - req->actual; |
626 | } else { | |
627 | total = 0; | |
628 | buf = NULL; | |
629 | } | |
630 | ||
631 | /* write just one packet at a time */ | |
632 | count = ep->ep.maxpacket; | |
633 | if (count > total) /* min() cannot be used on a bitfield */ | |
634 | count = total; | |
635 | ||
e56e69cc | 636 | ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n", |
1da177e4 LT |
637 | ep->ep.name, count, |
638 | (count != ep->ep.maxpacket) ? " (short)" : "", | |
639 | req); | |
640 | while (count >= 4) { | |
641 | /* NOTE be careful if you try to align these. fifo lines | |
642 | * should normally be full (4 bytes) and successive partial | |
643 | * lines are ok only in certain cases. | |
644 | */ | |
fae3c158 RR |
645 | tmp = get_unaligned((u32 *)buf); |
646 | cpu_to_le32s(&tmp); | |
647 | writel(tmp, ®s->ep_data); | |
1da177e4 LT |
648 | buf += 4; |
649 | count -= 4; | |
650 | } | |
651 | ||
652 | /* last fifo entry is "short" unless we wrote a full packet. | |
653 | * also explicitly validate last word in (periodic) transfers | |
654 | * when maxpacket is not a multiple of 4 bytes. | |
655 | */ | |
656 | if (count || total < ep->ep.maxpacket) { | |
fae3c158 RR |
657 | tmp = count ? get_unaligned((u32 *)buf) : count; |
658 | cpu_to_le32s(&tmp); | |
659 | set_fifo_bytecount(ep, count & 0x03); | |
660 | writel(tmp, ®s->ep_data); | |
1da177e4 LT |
661 | } |
662 | ||
663 | /* pci writes may still be posted */ | |
664 | } | |
665 | ||
666 | /* work around erratum 0106: PCI and USB race over the OUT fifo. | |
667 | * caller guarantees chiprev 0100, out endpoint is NAKing, and | |
668 | * there's no real data in the fifo. | |
669 | * | |
670 | * NOTE: also used in cases where that erratum doesn't apply: | |
671 | * where the host wrote "too much" data to us. | |
672 | */ | |
fae3c158 | 673 | static void out_flush(struct net2280_ep *ep) |
1da177e4 LT |
674 | { |
675 | u32 __iomem *statp; | |
676 | u32 tmp; | |
677 | ||
1da177e4 | 678 | statp = &ep->regs->ep_stat; |
d82f3db2 RR |
679 | |
680 | tmp = readl(statp); | |
681 | if (tmp & BIT(NAK_OUT_PACKETS)) { | |
682 | ep_dbg(ep->dev, "%s %s %08x !NAK\n", | |
683 | ep->ep.name, __func__, tmp); | |
684 | writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp); | |
685 | } | |
686 | ||
3e76fdcb | 687 | writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | |
ae8e530a RR |
688 | BIT(DATA_PACKET_RECEIVED_INTERRUPT), |
689 | statp); | |
3e76fdcb | 690 | writel(BIT(FIFO_FLUSH), statp); |
fae3c158 RR |
691 | /* Make sure that stap is written */ |
692 | mb(); | |
693 | tmp = readl(statp); | |
ae8e530a | 694 | if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) && |
1da177e4 | 695 | /* high speed did bulk NYET; fifo isn't filling */ |
ae8e530a | 696 | ep->dev->gadget.speed == USB_SPEED_FULL) { |
1da177e4 LT |
697 | unsigned usec; |
698 | ||
699 | usec = 50; /* 64 byte bulk/interrupt */ | |
3e76fdcb RR |
700 | handshake(statp, BIT(USB_OUT_PING_NAK_SENT), |
701 | BIT(USB_OUT_PING_NAK_SENT), usec); | |
1da177e4 LT |
702 | /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */ |
703 | } | |
704 | } | |
705 | ||
706 | /* unload packet(s) from the fifo we use for usb OUT transfers. | |
707 | * returns true iff the request completed, because of short packet | |
708 | * or the request buffer having filled with full packets. | |
709 | * | |
710 | * for ep-a..ep-d this will read multiple packets out when they | |
711 | * have been accepted. | |
712 | */ | |
fae3c158 | 713 | static int read_fifo(struct net2280_ep *ep, struct net2280_request *req) |
1da177e4 LT |
714 | { |
715 | struct net2280_ep_regs __iomem *regs = ep->regs; | |
716 | u8 *buf = req->req.buf + req->req.actual; | |
717 | unsigned count, tmp, is_short; | |
718 | unsigned cleanup = 0, prevent = 0; | |
719 | ||
720 | /* erratum 0106 ... packets coming in during fifo reads might | |
721 | * be incompletely rejected. not all cases have workarounds. | |
722 | */ | |
ae8e530a RR |
723 | if (ep->dev->chiprev == 0x0100 && |
724 | ep->dev->gadget.speed == USB_SPEED_FULL) { | |
fae3c158 RR |
725 | udelay(1); |
726 | tmp = readl(&ep->regs->ep_stat); | |
3e76fdcb | 727 | if ((tmp & BIT(NAK_OUT_PACKETS))) |
1da177e4 | 728 | cleanup = 1; |
3e76fdcb | 729 | else if ((tmp & BIT(FIFO_FULL))) { |
fae3c158 | 730 | start_out_naking(ep); |
1da177e4 LT |
731 | prevent = 1; |
732 | } | |
733 | /* else: hope we don't see the problem */ | |
734 | } | |
735 | ||
736 | /* never overflow the rx buffer. the fifo reads packets until | |
737 | * it sees a short one; we might not be ready for them all. | |
738 | */ | |
fae3c158 RR |
739 | prefetchw(buf); |
740 | count = readl(®s->ep_avail); | |
741 | if (unlikely(count == 0)) { | |
742 | udelay(1); | |
743 | tmp = readl(&ep->regs->ep_stat); | |
744 | count = readl(®s->ep_avail); | |
1da177e4 | 745 | /* handled that data already? */ |
3e76fdcb | 746 | if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0) |
1da177e4 LT |
747 | return 0; |
748 | } | |
749 | ||
750 | tmp = req->req.length - req->req.actual; | |
751 | if (count > tmp) { | |
752 | /* as with DMA, data overflow gets flushed */ | |
753 | if ((tmp % ep->ep.maxpacket) != 0) { | |
e56e69cc | 754 | ep_err(ep->dev, |
1da177e4 LT |
755 | "%s out fifo %d bytes, expected %d\n", |
756 | ep->ep.name, count, tmp); | |
757 | req->req.status = -EOVERFLOW; | |
758 | cleanup = 1; | |
759 | /* NAK_OUT_PACKETS will be set, so flushing is safe; | |
760 | * the next read will start with the next packet | |
761 | */ | |
762 | } /* else it's a ZLP, no worries */ | |
763 | count = tmp; | |
764 | } | |
765 | req->req.actual += count; | |
766 | ||
767 | is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0); | |
768 | ||
e56e69cc | 769 | ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n", |
1da177e4 LT |
770 | ep->ep.name, count, is_short ? " (short)" : "", |
771 | cleanup ? " flush" : "", prevent ? " nak" : "", | |
772 | req, req->req.actual, req->req.length); | |
773 | ||
774 | while (count >= 4) { | |
fae3c158 RR |
775 | tmp = readl(®s->ep_data); |
776 | cpu_to_le32s(&tmp); | |
777 | put_unaligned(tmp, (u32 *)buf); | |
1da177e4 LT |
778 | buf += 4; |
779 | count -= 4; | |
780 | } | |
781 | if (count) { | |
fae3c158 | 782 | tmp = readl(®s->ep_data); |
1da177e4 LT |
783 | /* LE conversion is implicit here: */ |
784 | do { | |
785 | *buf++ = (u8) tmp; | |
786 | tmp >>= 8; | |
787 | } while (--count); | |
788 | } | |
789 | if (cleanup) | |
fae3c158 | 790 | out_flush(ep); |
1da177e4 | 791 | if (prevent) { |
3e76fdcb | 792 | writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp); |
fae3c158 | 793 | (void) readl(&ep->regs->ep_rsp); |
1da177e4 LT |
794 | } |
795 | ||
ae8e530a RR |
796 | return is_short || ((req->req.actual == req->req.length) && |
797 | !req->req.zero); | |
1da177e4 LT |
798 | } |
799 | ||
800 | /* fill out dma descriptor to match a given request */ | |
fae3c158 RR |
801 | static void fill_dma_desc(struct net2280_ep *ep, |
802 | struct net2280_request *req, int valid) | |
1da177e4 LT |
803 | { |
804 | struct net2280_dma *td = req->td; | |
805 | u32 dmacount = req->req.length; | |
806 | ||
807 | /* don't let DMA continue after a short OUT packet, | |
808 | * so overruns can't affect the next transfer. | |
809 | * in case of overruns on max-size packets, we can't | |
810 | * stop the fifo from filling but we can flush it. | |
811 | */ | |
812 | if (ep->is_in) | |
3e76fdcb | 813 | dmacount |= BIT(DMA_DIRECTION); |
ae8e530a | 814 | if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) || |
2eeb0016 | 815 | !(ep->dev->quirks & PLX_2280)) |
3e76fdcb | 816 | dmacount |= BIT(END_OF_CHAIN); |
1da177e4 LT |
817 | |
818 | req->valid = valid; | |
819 | if (valid) | |
3e76fdcb | 820 | dmacount |= BIT(VALID_BIT); |
90664198 | 821 | dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE); |
1da177e4 LT |
822 | |
823 | /* td->dmadesc = previously set by caller */ | |
824 | td->dmaaddr = cpu_to_le32 (req->req.dma); | |
825 | ||
826 | /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */ | |
fae3c158 | 827 | wmb(); |
da2bbdcc | 828 | td->dmacount = cpu_to_le32(dmacount); |
1da177e4 LT |
829 | } |
830 | ||
831 | static const u32 dmactl_default = | |
3e76fdcb RR |
832 | BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) | |
833 | BIT(DMA_CLEAR_COUNT_ENABLE) | | |
1da177e4 | 834 | /* erratum 0116 workaround part 1 (use POLLING) */ |
3e76fdcb RR |
835 | (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) | |
836 | BIT(DMA_VALID_BIT_POLLING_ENABLE) | | |
837 | BIT(DMA_VALID_BIT_ENABLE) | | |
838 | BIT(DMA_SCATTER_GATHER_ENABLE) | | |
1da177e4 | 839 | /* erratum 0116 workaround part 2 (no AUTOSTART) */ |
3e76fdcb | 840 | BIT(DMA_ENABLE); |
1da177e4 | 841 | |
fae3c158 | 842 | static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma) |
1da177e4 | 843 | { |
3e76fdcb | 844 | handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50); |
1da177e4 LT |
845 | } |
846 | ||
fae3c158 | 847 | static inline void stop_dma(struct net2280_dma_regs __iomem *dma) |
1da177e4 | 848 | { |
3e76fdcb | 849 | writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl); |
fae3c158 | 850 | spin_stop_dma(dma); |
1da177e4 LT |
851 | } |
852 | ||
fae3c158 | 853 | static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma) |
1da177e4 LT |
854 | { |
855 | struct net2280_dma_regs __iomem *dma = ep->dma; | |
3e76fdcb | 856 | unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION); |
1da177e4 | 857 | |
2eeb0016 | 858 | if (!(ep->dev->quirks & PLX_2280)) |
3e76fdcb | 859 | tmp |= BIT(END_OF_CHAIN); |
950ee4c8 | 860 | |
fae3c158 RR |
861 | writel(tmp, &dma->dmacount); |
862 | writel(readl(&dma->dmastat), &dma->dmastat); | |
1da177e4 | 863 | |
fae3c158 | 864 | writel(td_dma, &dma->dmadesc); |
5185c913 | 865 | if (ep->dev->quirks & PLX_PCIE) |
3e76fdcb | 866 | dmactl |= BIT(DMA_REQUEST_OUTSTANDING); |
fae3c158 | 867 | writel(dmactl, &dma->dmactl); |
1da177e4 LT |
868 | |
869 | /* erratum 0116 workaround part 3: pci arbiter away from net2280 */ | |
fae3c158 | 870 | (void) readl(&ep->dev->pci->pcimstctl); |
1da177e4 | 871 | |
3e76fdcb | 872 | writel(BIT(DMA_START), &dma->dmastat); |
1da177e4 LT |
873 | |
874 | if (!ep->is_in) | |
fae3c158 | 875 | stop_out_naking(ep); |
1da177e4 LT |
876 | } |
877 | ||
fae3c158 | 878 | static void start_dma(struct net2280_ep *ep, struct net2280_request *req) |
1da177e4 LT |
879 | { |
880 | u32 tmp; | |
881 | struct net2280_dma_regs __iomem *dma = ep->dma; | |
882 | ||
883 | /* FIXME can't use DMA for ZLPs */ | |
884 | ||
885 | /* on this path we "know" there's no dma active (yet) */ | |
3e76fdcb | 886 | WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE)); |
fae3c158 | 887 | writel(0, &ep->dma->dmactl); |
1da177e4 LT |
888 | |
889 | /* previous OUT packet might have been short */ | |
fae3c158 RR |
890 | if (!ep->is_in && (readl(&ep->regs->ep_stat) & |
891 | BIT(NAK_OUT_PACKETS))) { | |
3e76fdcb | 892 | writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT), |
1da177e4 LT |
893 | &ep->regs->ep_stat); |
894 | ||
fae3c158 | 895 | tmp = readl(&ep->regs->ep_avail); |
1da177e4 | 896 | if (tmp) { |
fae3c158 | 897 | writel(readl(&dma->dmastat), &dma->dmastat); |
1da177e4 LT |
898 | |
899 | /* transfer all/some fifo data */ | |
fae3c158 RR |
900 | writel(req->req.dma, &dma->dmaaddr); |
901 | tmp = min(tmp, req->req.length); | |
1da177e4 LT |
902 | |
903 | /* dma irq, faking scatterlist status */ | |
fae3c158 | 904 | req->td->dmacount = cpu_to_le32(req->req.length - tmp); |
ae8e530a RR |
905 | writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp, |
906 | &dma->dmacount); | |
1da177e4 LT |
907 | req->td->dmadesc = 0; |
908 | req->valid = 1; | |
909 | ||
3e76fdcb RR |
910 | writel(BIT(DMA_ENABLE), &dma->dmactl); |
911 | writel(BIT(DMA_START), &dma->dmastat); | |
1da177e4 LT |
912 | return; |
913 | } | |
914 | } | |
915 | ||
916 | tmp = dmactl_default; | |
917 | ||
918 | /* force packet boundaries between dma requests, but prevent the | |
919 | * controller from automagically writing a last "short" packet | |
920 | * (zero length) unless the driver explicitly said to do that. | |
921 | */ | |
922 | if (ep->is_in) { | |
fae3c158 RR |
923 | if (likely((req->req.length % ep->ep.maxpacket) || |
924 | req->req.zero)){ | |
3e76fdcb | 925 | tmp |= BIT(DMA_FIFO_VALIDATE); |
1da177e4 LT |
926 | ep->in_fifo_validate = 1; |
927 | } else | |
928 | ep->in_fifo_validate = 0; | |
929 | } | |
930 | ||
931 | /* init req->td, pointing to the current dummy */ | |
932 | req->td->dmadesc = cpu_to_le32 (ep->td_dma); | |
fae3c158 | 933 | fill_dma_desc(ep, req, 1); |
1da177e4 | 934 | |
90664198 | 935 | req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN)); |
1da177e4 | 936 | |
fae3c158 | 937 | start_queue(ep, tmp, req->td_dma); |
1da177e4 LT |
938 | } |
939 | ||
940 | static inline void | |
fae3c158 | 941 | queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid) |
1da177e4 LT |
942 | { |
943 | struct net2280_dma *end; | |
944 | dma_addr_t tmp; | |
945 | ||
946 | /* swap new dummy for old, link; fill and maybe activate */ | |
947 | end = ep->dummy; | |
948 | ep->dummy = req->td; | |
949 | req->td = end; | |
950 | ||
951 | tmp = ep->td_dma; | |
952 | ep->td_dma = req->td_dma; | |
953 | req->td_dma = tmp; | |
954 | ||
955 | end->dmadesc = cpu_to_le32 (ep->td_dma); | |
956 | ||
fae3c158 | 957 | fill_dma_desc(ep, req, valid); |
1da177e4 LT |
958 | } |
959 | ||
960 | static void | |
fae3c158 | 961 | done(struct net2280_ep *ep, struct net2280_request *req, int status) |
1da177e4 LT |
962 | { |
963 | struct net2280 *dev; | |
964 | unsigned stopped = ep->stopped; | |
965 | ||
fae3c158 | 966 | list_del_init(&req->queue); |
1da177e4 LT |
967 | |
968 | if (req->req.status == -EINPROGRESS) | |
969 | req->req.status = status; | |
970 | else | |
971 | status = req->req.status; | |
972 | ||
973 | dev = ep->dev; | |
ae4d7933 FB |
974 | if (ep->dma) |
975 | usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in); | |
1da177e4 LT |
976 | |
977 | if (status && status != -ESHUTDOWN) | |
e56e69cc | 978 | ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n", |
1da177e4 LT |
979 | ep->ep.name, &req->req, status, |
980 | req->req.actual, req->req.length); | |
981 | ||
982 | /* don't modify queue heads during completion callback */ | |
983 | ep->stopped = 1; | |
fae3c158 | 984 | spin_unlock(&dev->lock); |
304f7e5e | 985 | usb_gadget_giveback_request(&ep->ep, &req->req); |
fae3c158 | 986 | spin_lock(&dev->lock); |
1da177e4 LT |
987 | ep->stopped = stopped; |
988 | } | |
989 | ||
990 | /*-------------------------------------------------------------------------*/ | |
991 | ||
992 | static int | |
fae3c158 | 993 | net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) |
1da177e4 LT |
994 | { |
995 | struct net2280_request *req; | |
996 | struct net2280_ep *ep; | |
997 | struct net2280 *dev; | |
998 | unsigned long flags; | |
9ceafcc2 | 999 | int ret = 0; |
1da177e4 LT |
1000 | |
1001 | /* we always require a cpu-view buffer, so that we can | |
1002 | * always use pio (as fallback or whatever). | |
1003 | */ | |
fae3c158 | 1004 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1005 | if (!_ep || (!ep->desc && ep->num != 0)) { |
1006 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 1007 | return -EINVAL; |
9ceafcc2 MYK |
1008 | } |
1009 | req = container_of(_req, struct net2280_request, req); | |
1010 | if (!_req || !_req->complete || !_req->buf || | |
1011 | !list_empty(&req->queue)) { | |
1012 | ret = -EINVAL; | |
1013 | goto print_err; | |
1014 | } | |
1015 | if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) { | |
1016 | ret = -EDOM; | |
1017 | goto print_err; | |
1018 | } | |
1da177e4 | 1019 | dev = ep->dev; |
9ceafcc2 MYK |
1020 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { |
1021 | ret = -ESHUTDOWN; | |
1022 | goto print_err; | |
1023 | } | |
1da177e4 LT |
1024 | |
1025 | /* FIXME implement PIO fallback for ZLPs with DMA */ | |
9ceafcc2 MYK |
1026 | if (ep->dma && _req->length == 0) { |
1027 | ret = -EOPNOTSUPP; | |
1028 | goto print_err; | |
1029 | } | |
1da177e4 LT |
1030 | |
1031 | /* set up dma mapping in case the caller didn't */ | |
ae4d7933 | 1032 | if (ep->dma) { |
ae4d7933 FB |
1033 | ret = usb_gadget_map_request(&dev->gadget, _req, |
1034 | ep->is_in); | |
1035 | if (ret) | |
9ceafcc2 | 1036 | goto print_err; |
1da177e4 LT |
1037 | } |
1038 | ||
e56e69cc | 1039 | ep_vdbg(dev, "%s queue req %p, len %d buf %p\n", |
1da177e4 | 1040 | _ep->name, _req, _req->length, _req->buf); |
1da177e4 | 1041 | |
fae3c158 | 1042 | spin_lock_irqsave(&dev->lock, flags); |
1da177e4 LT |
1043 | |
1044 | _req->status = -EINPROGRESS; | |
1045 | _req->actual = 0; | |
1046 | ||
1047 | /* kickstart this i/o queue? */ | |
485f44d0 | 1048 | if (list_empty(&ep->queue) && !ep->stopped && |
5185c913 | 1049 | !((dev->quirks & PLX_PCIE) && ep->dma && |
485f44d0 RR |
1050 | (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) { |
1051 | ||
1da177e4 | 1052 | /* use DMA if the endpoint supports it, else pio */ |
485f44d0 | 1053 | if (ep->dma) |
fae3c158 | 1054 | start_dma(ep, req); |
1da177e4 LT |
1055 | else { |
1056 | /* maybe there's no control data, just status ack */ | |
1057 | if (ep->num == 0 && _req->length == 0) { | |
fae3c158 RR |
1058 | allow_status(ep); |
1059 | done(ep, req, 0); | |
e56e69cc | 1060 | ep_vdbg(dev, "%s status ack\n", ep->ep.name); |
1da177e4 LT |
1061 | goto done; |
1062 | } | |
1063 | ||
1064 | /* PIO ... stuff the fifo, or unblock it. */ | |
1065 | if (ep->is_in) | |
fae3c158 RR |
1066 | write_fifo(ep, _req); |
1067 | else if (list_empty(&ep->queue)) { | |
1da177e4 LT |
1068 | u32 s; |
1069 | ||
1070 | /* OUT FIFO might have packet(s) buffered */ | |
fae3c158 | 1071 | s = readl(&ep->regs->ep_stat); |
3e76fdcb | 1072 | if ((s & BIT(FIFO_EMPTY)) == 0) { |
1da177e4 LT |
1073 | /* note: _req->short_not_ok is |
1074 | * ignored here since PIO _always_ | |
1075 | * stops queue advance here, and | |
1076 | * _req->status doesn't change for | |
1077 | * short reads (only _req->actual) | |
1078 | */ | |
fae3c158 RR |
1079 | if (read_fifo(ep, req) && |
1080 | ep->num == 0) { | |
1081 | done(ep, req, 0); | |
1082 | allow_status(ep); | |
1da177e4 LT |
1083 | /* don't queue it */ |
1084 | req = NULL; | |
fae3c158 RR |
1085 | } else if (read_fifo(ep, req) && |
1086 | ep->num != 0) { | |
1087 | done(ep, req, 0); | |
1088 | req = NULL; | |
1da177e4 | 1089 | } else |
fae3c158 | 1090 | s = readl(&ep->regs->ep_stat); |
1da177e4 LT |
1091 | } |
1092 | ||
1093 | /* don't NAK, let the fifo fill */ | |
3e76fdcb RR |
1094 | if (req && (s & BIT(NAK_OUT_PACKETS))) |
1095 | writel(BIT(CLEAR_NAK_OUT_PACKETS), | |
1da177e4 LT |
1096 | &ep->regs->ep_rsp); |
1097 | } | |
1098 | } | |
1099 | ||
1100 | } else if (ep->dma) { | |
1101 | int valid = 1; | |
1102 | ||
1103 | if (ep->is_in) { | |
1104 | int expect; | |
1105 | ||
1106 | /* preventing magic zlps is per-engine state, not | |
1107 | * per-transfer; irq logic must recover hiccups. | |
1108 | */ | |
fae3c158 RR |
1109 | expect = likely(req->req.zero || |
1110 | (req->req.length % ep->ep.maxpacket)); | |
1da177e4 LT |
1111 | if (expect != ep->in_fifo_validate) |
1112 | valid = 0; | |
1113 | } | |
fae3c158 | 1114 | queue_dma(ep, req, valid); |
1da177e4 LT |
1115 | |
1116 | } /* else the irq handler advances the queue. */ | |
1117 | ||
1f26e28d | 1118 | ep->responded = 1; |
1da177e4 | 1119 | if (req) |
fae3c158 | 1120 | list_add_tail(&req->queue, &ep->queue); |
1da177e4 | 1121 | done: |
fae3c158 | 1122 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1123 | |
1124 | /* pci writes may still be posted */ | |
9ceafcc2 MYK |
1125 | return ret; |
1126 | ||
1127 | print_err: | |
1128 | dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret); | |
1129 | return ret; | |
1da177e4 LT |
1130 | } |
1131 | ||
1132 | static inline void | |
fae3c158 RR |
1133 | dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount, |
1134 | int status) | |
1da177e4 LT |
1135 | { |
1136 | req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount); | |
fae3c158 | 1137 | done(ep, req, status); |
1da177e4 LT |
1138 | } |
1139 | ||
1de2ebfb | 1140 | static int scan_dma_completions(struct net2280_ep *ep) |
1da177e4 | 1141 | { |
1de2ebfb JK |
1142 | int num_completed = 0; |
1143 | ||
1da177e4 LT |
1144 | /* only look at descriptors that were "naturally" retired, |
1145 | * so fifo and list head state won't matter | |
1146 | */ | |
fae3c158 | 1147 | while (!list_empty(&ep->queue)) { |
1da177e4 | 1148 | struct net2280_request *req; |
ef5e2fa9 | 1149 | u32 req_dma_count; |
1da177e4 | 1150 | |
fae3c158 | 1151 | req = list_entry(ep->queue.next, |
1da177e4 LT |
1152 | struct net2280_request, queue); |
1153 | if (!req->valid) | |
1154 | break; | |
fae3c158 | 1155 | rmb(); |
ef5e2fa9 RM |
1156 | req_dma_count = le32_to_cpup(&req->td->dmacount); |
1157 | if ((req_dma_count & BIT(VALID_BIT)) != 0) | |
1da177e4 LT |
1158 | break; |
1159 | ||
1160 | /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short" | |
1161 | * cases where DMA must be aborted; this code handles | |
1162 | * all non-abort DMA completions. | |
1163 | */ | |
fae3c158 | 1164 | if (unlikely(req->td->dmadesc == 0)) { |
1da177e4 | 1165 | /* paranoia */ |
ef5e2fa9 RM |
1166 | u32 const ep_dmacount = readl(&ep->dma->dmacount); |
1167 | ||
1168 | if (ep_dmacount & DMA_BYTE_COUNT_MASK) | |
1da177e4 LT |
1169 | break; |
1170 | /* single transfer mode */ | |
ef5e2fa9 | 1171 | dma_done(ep, req, req_dma_count, 0); |
1de2ebfb | 1172 | num_completed++; |
1da177e4 | 1173 | break; |
ae8e530a | 1174 | } else if (!ep->is_in && |
43780aaa | 1175 | (req->req.length % ep->ep.maxpacket) && |
5185c913 | 1176 | !(ep->dev->quirks & PLX_PCIE)) { |
1da177e4 | 1177 | |
ef5e2fa9 | 1178 | u32 const ep_stat = readl(&ep->regs->ep_stat); |
1da177e4 LT |
1179 | /* AVOID TROUBLE HERE by not issuing short reads from |
1180 | * your gadget driver. That helps avoids errata 0121, | |
1181 | * 0122, and 0124; not all cases trigger the warning. | |
1182 | */ | |
ef5e2fa9 | 1183 | if ((ep_stat & BIT(NAK_OUT_PACKETS)) == 0) { |
e56e69cc | 1184 | ep_warn(ep->dev, "%s lost packet sync!\n", |
1da177e4 LT |
1185 | ep->ep.name); |
1186 | req->req.status = -EOVERFLOW; | |
fae3c158 | 1187 | } else { |
ef5e2fa9 RM |
1188 | u32 const ep_avail = readl(&ep->regs->ep_avail); |
1189 | if (ep_avail) { | |
fae3c158 RR |
1190 | /* fifo gets flushed later */ |
1191 | ep->out_overflow = 1; | |
e56e69cc | 1192 | ep_dbg(ep->dev, |
fae3c158 | 1193 | "%s dma, discard %d len %d\n", |
ef5e2fa9 | 1194 | ep->ep.name, ep_avail, |
1da177e4 | 1195 | req->req.length); |
fae3c158 RR |
1196 | req->req.status = -EOVERFLOW; |
1197 | } | |
1da177e4 LT |
1198 | } |
1199 | } | |
ef5e2fa9 | 1200 | dma_done(ep, req, req_dma_count, 0); |
1de2ebfb | 1201 | num_completed++; |
1da177e4 | 1202 | } |
1de2ebfb JK |
1203 | |
1204 | return num_completed; | |
1da177e4 LT |
1205 | } |
1206 | ||
fae3c158 | 1207 | static void restart_dma(struct net2280_ep *ep) |
1da177e4 LT |
1208 | { |
1209 | struct net2280_request *req; | |
1da177e4 LT |
1210 | |
1211 | if (ep->stopped) | |
1212 | return; | |
fae3c158 | 1213 | req = list_entry(ep->queue.next, struct net2280_request, queue); |
1da177e4 | 1214 | |
90664198 | 1215 | start_dma(ep, req); |
1da177e4 LT |
1216 | } |
1217 | ||
e721c457 | 1218 | static void abort_dma(struct net2280_ep *ep) |
1da177e4 LT |
1219 | { |
1220 | /* abort the current transfer */ | |
fae3c158 | 1221 | if (likely(!list_empty(&ep->queue))) { |
1da177e4 | 1222 | /* FIXME work around errata 0121, 0122, 0124 */ |
3e76fdcb | 1223 | writel(BIT(DMA_ABORT), &ep->dma->dmastat); |
fae3c158 | 1224 | spin_stop_dma(ep->dma); |
1da177e4 | 1225 | } else |
fae3c158 RR |
1226 | stop_dma(ep->dma); |
1227 | scan_dma_completions(ep); | |
1da177e4 LT |
1228 | } |
1229 | ||
1230 | /* dequeue ALL requests */ | |
fae3c158 | 1231 | static void nuke(struct net2280_ep *ep) |
1da177e4 LT |
1232 | { |
1233 | struct net2280_request *req; | |
1234 | ||
1235 | /* called with spinlock held */ | |
1236 | ep->stopped = 1; | |
1237 | if (ep->dma) | |
fae3c158 RR |
1238 | abort_dma(ep); |
1239 | while (!list_empty(&ep->queue)) { | |
1240 | req = list_entry(ep->queue.next, | |
1da177e4 LT |
1241 | struct net2280_request, |
1242 | queue); | |
fae3c158 | 1243 | done(ep, req, -ESHUTDOWN); |
1da177e4 LT |
1244 | } |
1245 | } | |
1246 | ||
1247 | /* dequeue JUST ONE request */ | |
fae3c158 | 1248 | static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req) |
1da177e4 LT |
1249 | { |
1250 | struct net2280_ep *ep; | |
1251 | struct net2280_request *req; | |
1252 | unsigned long flags; | |
1253 | u32 dmactl; | |
1254 | int stopped; | |
1255 | ||
fae3c158 | 1256 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1257 | if (!_ep || (!ep->desc && ep->num != 0) || !_req) { |
1258 | pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n", | |
1259 | __func__, _ep, _req); | |
1da177e4 | 1260 | return -EINVAL; |
9ceafcc2 | 1261 | } |
1da177e4 | 1262 | |
fae3c158 | 1263 | spin_lock_irqsave(&ep->dev->lock, flags); |
1da177e4 LT |
1264 | stopped = ep->stopped; |
1265 | ||
1266 | /* quiesce dma while we patch the queue */ | |
1267 | dmactl = 0; | |
1268 | ep->stopped = 1; | |
1269 | if (ep->dma) { | |
fae3c158 | 1270 | dmactl = readl(&ep->dma->dmactl); |
1da177e4 | 1271 | /* WARNING erratum 0127 may kick in ... */ |
fae3c158 RR |
1272 | stop_dma(ep->dma); |
1273 | scan_dma_completions(ep); | |
1da177e4 LT |
1274 | } |
1275 | ||
1276 | /* make sure it's still queued on this endpoint */ | |
fae3c158 | 1277 | list_for_each_entry(req, &ep->queue, queue) { |
1da177e4 LT |
1278 | if (&req->req == _req) |
1279 | break; | |
1280 | } | |
1281 | if (&req->req != _req) { | |
fae3c158 | 1282 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
9ceafcc2 MYK |
1283 | dev_err(&ep->dev->pdev->dev, "%s: Request mismatch\n", |
1284 | __func__); | |
1da177e4 LT |
1285 | return -EINVAL; |
1286 | } | |
1287 | ||
1288 | /* queue head may be partially complete. */ | |
1289 | if (ep->queue.next == &req->queue) { | |
1290 | if (ep->dma) { | |
e56e69cc | 1291 | ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name); |
1da177e4 | 1292 | _req->status = -ECONNRESET; |
fae3c158 RR |
1293 | abort_dma(ep); |
1294 | if (likely(ep->queue.next == &req->queue)) { | |
1295 | /* NOTE: misreports single-transfer mode*/ | |
1da177e4 | 1296 | req->td->dmacount = 0; /* invalidate */ |
fae3c158 RR |
1297 | dma_done(ep, req, |
1298 | readl(&ep->dma->dmacount), | |
1da177e4 LT |
1299 | -ECONNRESET); |
1300 | } | |
1301 | } else { | |
e56e69cc | 1302 | ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name); |
fae3c158 | 1303 | done(ep, req, -ECONNRESET); |
1da177e4 LT |
1304 | } |
1305 | req = NULL; | |
1da177e4 LT |
1306 | } |
1307 | ||
1308 | if (req) | |
fae3c158 | 1309 | done(ep, req, -ECONNRESET); |
1da177e4 LT |
1310 | ep->stopped = stopped; |
1311 | ||
1312 | if (ep->dma) { | |
1313 | /* turn off dma on inactive queues */ | |
fae3c158 RR |
1314 | if (list_empty(&ep->queue)) |
1315 | stop_dma(ep->dma); | |
1da177e4 LT |
1316 | else if (!ep->stopped) { |
1317 | /* resume current request, or start new one */ | |
1318 | if (req) | |
fae3c158 | 1319 | writel(dmactl, &ep->dma->dmactl); |
1da177e4 | 1320 | else |
fae3c158 | 1321 | start_dma(ep, list_entry(ep->queue.next, |
1da177e4 LT |
1322 | struct net2280_request, queue)); |
1323 | } | |
1324 | } | |
1325 | ||
fae3c158 | 1326 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
1da177e4 LT |
1327 | return 0; |
1328 | } | |
1329 | ||
1330 | /*-------------------------------------------------------------------------*/ | |
1331 | ||
fae3c158 | 1332 | static int net2280_fifo_status(struct usb_ep *_ep); |
1da177e4 LT |
1333 | |
1334 | static int | |
8066134f | 1335 | net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged) |
1da177e4 LT |
1336 | { |
1337 | struct net2280_ep *ep; | |
1338 | unsigned long flags; | |
1339 | int retval = 0; | |
1340 | ||
fae3c158 | 1341 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1342 | if (!_ep || (!ep->desc && ep->num != 0)) { |
1343 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 1344 | return -EINVAL; |
9ceafcc2 MYK |
1345 | } |
1346 | if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
1347 | retval = -ESHUTDOWN; | |
1348 | goto print_err; | |
1349 | } | |
1da177e4 | 1350 | if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03) |
9ceafcc2 MYK |
1351 | == USB_ENDPOINT_XFER_ISOC) { |
1352 | retval = -EINVAL; | |
1353 | goto print_err; | |
1354 | } | |
1da177e4 | 1355 | |
fae3c158 | 1356 | spin_lock_irqsave(&ep->dev->lock, flags); |
9ceafcc2 | 1357 | if (!list_empty(&ep->queue)) { |
1da177e4 | 1358 | retval = -EAGAIN; |
9ceafcc2 MYK |
1359 | goto print_unlock; |
1360 | } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) { | |
1da177e4 | 1361 | retval = -EAGAIN; |
9ceafcc2 MYK |
1362 | goto print_unlock; |
1363 | } else { | |
e56e69cc | 1364 | ep_vdbg(ep->dev, "%s %s %s\n", _ep->name, |
8066134f AS |
1365 | value ? "set" : "clear", |
1366 | wedged ? "wedge" : "halt"); | |
1da177e4 LT |
1367 | /* set/clear, then synch memory views with the device */ |
1368 | if (value) { | |
1369 | if (ep->num == 0) | |
1370 | ep->dev->protocol_stall = 1; | |
1371 | else | |
fae3c158 | 1372 | set_halt(ep); |
8066134f AS |
1373 | if (wedged) |
1374 | ep->wedged = 1; | |
1375 | } else { | |
fae3c158 | 1376 | clear_halt(ep); |
5185c913 | 1377 | if (ep->dev->quirks & PLX_PCIE && |
adc82f77 RR |
1378 | !list_empty(&ep->queue) && ep->td_dma) |
1379 | restart_dma(ep); | |
8066134f AS |
1380 | ep->wedged = 0; |
1381 | } | |
fae3c158 | 1382 | (void) readl(&ep->regs->ep_rsp); |
1da177e4 | 1383 | } |
fae3c158 | 1384 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
1da177e4 LT |
1385 | |
1386 | return retval; | |
9ceafcc2 MYK |
1387 | |
1388 | print_unlock: | |
1389 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1390 | print_err: | |
1391 | dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval); | |
1392 | return retval; | |
1da177e4 LT |
1393 | } |
1394 | ||
fae3c158 | 1395 | static int net2280_set_halt(struct usb_ep *_ep, int value) |
8066134f AS |
1396 | { |
1397 | return net2280_set_halt_and_wedge(_ep, value, 0); | |
1398 | } | |
1399 | ||
fae3c158 | 1400 | static int net2280_set_wedge(struct usb_ep *_ep) |
8066134f | 1401 | { |
9ceafcc2 MYK |
1402 | if (!_ep || _ep->name == ep0name) { |
1403 | pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep); | |
8066134f | 1404 | return -EINVAL; |
9ceafcc2 | 1405 | } |
8066134f AS |
1406 | return net2280_set_halt_and_wedge(_ep, 1, 1); |
1407 | } | |
1408 | ||
fae3c158 | 1409 | static int net2280_fifo_status(struct usb_ep *_ep) |
1da177e4 LT |
1410 | { |
1411 | struct net2280_ep *ep; | |
1412 | u32 avail; | |
1413 | ||
fae3c158 | 1414 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1415 | if (!_ep || (!ep->desc && ep->num != 0)) { |
1416 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 1417 | return -ENODEV; |
9ceafcc2 MYK |
1418 | } |
1419 | if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
1420 | dev_err(&ep->dev->pdev->dev, | |
1421 | "%s: Invalid driver=%p or speed=%d\n", | |
1422 | __func__, ep->dev->driver, ep->dev->gadget.speed); | |
1da177e4 | 1423 | return -ESHUTDOWN; |
9ceafcc2 | 1424 | } |
1da177e4 | 1425 | |
3e76fdcb | 1426 | avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1); |
9ceafcc2 MYK |
1427 | if (avail > ep->fifo_size) { |
1428 | dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__); | |
1da177e4 | 1429 | return -EOVERFLOW; |
9ceafcc2 | 1430 | } |
1da177e4 LT |
1431 | if (ep->is_in) |
1432 | avail = ep->fifo_size - avail; | |
1433 | return avail; | |
1434 | } | |
1435 | ||
fae3c158 | 1436 | static void net2280_fifo_flush(struct usb_ep *_ep) |
1da177e4 LT |
1437 | { |
1438 | struct net2280_ep *ep; | |
1439 | ||
fae3c158 | 1440 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1441 | if (!_ep || (!ep->desc && ep->num != 0)) { |
1442 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 1443 | return; |
9ceafcc2 MYK |
1444 | } |
1445 | if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
1446 | dev_err(&ep->dev->pdev->dev, | |
1447 | "%s: Invalid driver=%p or speed=%d\n", | |
1448 | __func__, ep->dev->driver, ep->dev->gadget.speed); | |
1da177e4 | 1449 | return; |
9ceafcc2 | 1450 | } |
1da177e4 | 1451 | |
3e76fdcb | 1452 | writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat); |
fae3c158 | 1453 | (void) readl(&ep->regs->ep_rsp); |
1da177e4 LT |
1454 | } |
1455 | ||
901b3d75 | 1456 | static const struct usb_ep_ops net2280_ep_ops = { |
1da177e4 LT |
1457 | .enable = net2280_enable, |
1458 | .disable = net2280_disable, | |
1459 | ||
1460 | .alloc_request = net2280_alloc_request, | |
1461 | .free_request = net2280_free_request, | |
1462 | ||
1da177e4 LT |
1463 | .queue = net2280_queue, |
1464 | .dequeue = net2280_dequeue, | |
1465 | ||
1466 | .set_halt = net2280_set_halt, | |
8066134f | 1467 | .set_wedge = net2280_set_wedge, |
1da177e4 LT |
1468 | .fifo_status = net2280_fifo_status, |
1469 | .fifo_flush = net2280_fifo_flush, | |
1470 | }; | |
1471 | ||
1472 | /*-------------------------------------------------------------------------*/ | |
1473 | ||
fae3c158 | 1474 | static int net2280_get_frame(struct usb_gadget *_gadget) |
1da177e4 LT |
1475 | { |
1476 | struct net2280 *dev; | |
1477 | unsigned long flags; | |
1478 | u16 retval; | |
1479 | ||
1480 | if (!_gadget) | |
1481 | return -ENODEV; | |
fae3c158 RR |
1482 | dev = container_of(_gadget, struct net2280, gadget); |
1483 | spin_lock_irqsave(&dev->lock, flags); | |
1484 | retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff; | |
1485 | spin_unlock_irqrestore(&dev->lock, flags); | |
1da177e4 LT |
1486 | return retval; |
1487 | } | |
1488 | ||
fae3c158 | 1489 | static int net2280_wakeup(struct usb_gadget *_gadget) |
1da177e4 LT |
1490 | { |
1491 | struct net2280 *dev; | |
1492 | u32 tmp; | |
1493 | unsigned long flags; | |
1494 | ||
1495 | if (!_gadget) | |
1496 | return 0; | |
fae3c158 | 1497 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 1498 | |
fae3c158 RR |
1499 | spin_lock_irqsave(&dev->lock, flags); |
1500 | tmp = readl(&dev->usb->usbctl); | |
3e76fdcb RR |
1501 | if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE)) |
1502 | writel(BIT(GENERATE_RESUME), &dev->usb->usbstat); | |
fae3c158 | 1503 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1504 | |
1505 | /* pci writes may still be posted */ | |
1506 | return 0; | |
1507 | } | |
1508 | ||
fae3c158 | 1509 | static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value) |
1da177e4 LT |
1510 | { |
1511 | struct net2280 *dev; | |
1512 | u32 tmp; | |
1513 | unsigned long flags; | |
1514 | ||
1515 | if (!_gadget) | |
1516 | return 0; | |
fae3c158 | 1517 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 1518 | |
fae3c158 RR |
1519 | spin_lock_irqsave(&dev->lock, flags); |
1520 | tmp = readl(&dev->usb->usbctl); | |
adc82f77 | 1521 | if (value) { |
3e76fdcb | 1522 | tmp |= BIT(SELF_POWERED_STATUS); |
c8678d9f | 1523 | _gadget->is_selfpowered = 1; |
adc82f77 | 1524 | } else { |
3e76fdcb | 1525 | tmp &= ~BIT(SELF_POWERED_STATUS); |
c8678d9f | 1526 | _gadget->is_selfpowered = 0; |
adc82f77 | 1527 | } |
fae3c158 RR |
1528 | writel(tmp, &dev->usb->usbctl); |
1529 | spin_unlock_irqrestore(&dev->lock, flags); | |
1da177e4 LT |
1530 | |
1531 | return 0; | |
1532 | } | |
1533 | ||
1534 | static int net2280_pullup(struct usb_gadget *_gadget, int is_on) | |
1535 | { | |
1536 | struct net2280 *dev; | |
1537 | u32 tmp; | |
1538 | unsigned long flags; | |
1539 | ||
1540 | if (!_gadget) | |
1541 | return -ENODEV; | |
fae3c158 | 1542 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 1543 | |
fae3c158 RR |
1544 | spin_lock_irqsave(&dev->lock, flags); |
1545 | tmp = readl(&dev->usb->usbctl); | |
1da177e4 | 1546 | dev->softconnect = (is_on != 0); |
11bece5e MYK |
1547 | if (is_on) { |
1548 | ep0_start(dev); | |
1549 | writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl); | |
1550 | } else { | |
1551 | writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl); | |
1552 | stop_activity(dev, dev->driver); | |
1553 | } | |
1554 | ||
fae3c158 | 1555 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1556 | |
1557 | return 0; | |
1558 | } | |
1559 | ||
3e8b2318 RB |
1560 | static struct usb_ep *net2280_match_ep(struct usb_gadget *_gadget, |
1561 | struct usb_endpoint_descriptor *desc, | |
1562 | struct usb_ss_ep_comp_descriptor *ep_comp) | |
1563 | { | |
1564 | char name[8]; | |
1565 | struct usb_ep *ep; | |
1566 | ||
1567 | if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT) { | |
1568 | /* ep-e, ep-f are PIO with only 64 byte fifos */ | |
1569 | ep = gadget_find_ep_by_name(_gadget, "ep-e"); | |
1570 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1571 | return ep; | |
1572 | ep = gadget_find_ep_by_name(_gadget, "ep-f"); | |
1573 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1574 | return ep; | |
1575 | } | |
1576 | ||
17f6ed62 JK |
1577 | /* USB3380: Only first four endpoints have DMA channels. Allocate |
1578 | * slower interrupt endpoints from PIO hw endpoints, to allow bulk/isoc | |
1579 | * endpoints use DMA hw endpoints. | |
1580 | */ | |
1581 | if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT && | |
1582 | usb_endpoint_dir_in(desc)) { | |
1583 | ep = gadget_find_ep_by_name(_gadget, "ep2in"); | |
1584 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1585 | return ep; | |
1586 | ep = gadget_find_ep_by_name(_gadget, "ep4in"); | |
1587 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1588 | return ep; | |
1589 | } else if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT && | |
1590 | !usb_endpoint_dir_in(desc)) { | |
1591 | ep = gadget_find_ep_by_name(_gadget, "ep1out"); | |
1592 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1593 | return ep; | |
1594 | ep = gadget_find_ep_by_name(_gadget, "ep3out"); | |
1595 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1596 | return ep; | |
1597 | } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK && | |
1598 | usb_endpoint_dir_in(desc)) { | |
1599 | ep = gadget_find_ep_by_name(_gadget, "ep1in"); | |
1600 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1601 | return ep; | |
1602 | ep = gadget_find_ep_by_name(_gadget, "ep3in"); | |
1603 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1604 | return ep; | |
1605 | } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK && | |
1606 | !usb_endpoint_dir_in(desc)) { | |
1607 | ep = gadget_find_ep_by_name(_gadget, "ep2out"); | |
1608 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1609 | return ep; | |
1610 | ep = gadget_find_ep_by_name(_gadget, "ep4out"); | |
1611 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1612 | return ep; | |
1613 | } | |
1614 | ||
3e8b2318 RB |
1615 | /* USB3380: use same address for usb and hardware endpoints */ |
1616 | snprintf(name, sizeof(name), "ep%d%s", usb_endpoint_num(desc), | |
1617 | usb_endpoint_dir_in(desc) ? "in" : "out"); | |
1618 | ep = gadget_find_ep_by_name(_gadget, name); | |
1619 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1620 | return ep; | |
1621 | ||
1622 | return NULL; | |
1623 | } | |
1624 | ||
4cf5e00b FB |
1625 | static int net2280_start(struct usb_gadget *_gadget, |
1626 | struct usb_gadget_driver *driver); | |
22835b80 | 1627 | static int net2280_stop(struct usb_gadget *_gadget); |
0f91349b | 1628 | |
1da177e4 LT |
1629 | static const struct usb_gadget_ops net2280_ops = { |
1630 | .get_frame = net2280_get_frame, | |
1631 | .wakeup = net2280_wakeup, | |
1632 | .set_selfpowered = net2280_set_selfpowered, | |
1633 | .pullup = net2280_pullup, | |
4cf5e00b FB |
1634 | .udc_start = net2280_start, |
1635 | .udc_stop = net2280_stop, | |
3e8b2318 | 1636 | .match_ep = net2280_match_ep, |
1da177e4 LT |
1637 | }; |
1638 | ||
1639 | /*-------------------------------------------------------------------------*/ | |
1640 | ||
b99b406c | 1641 | #ifdef CONFIG_USB_GADGET_DEBUG_FILES |
1da177e4 LT |
1642 | |
1643 | /* FIXME move these into procfs, and use seq_file. | |
1644 | * Sysfs _still_ doesn't behave for arbitrarily sized files, | |
1645 | * and also doesn't help products using this with 2.4 kernels. | |
1646 | */ | |
1647 | ||
1648 | /* "function" sysfs attribute */ | |
ce26bd23 GKH |
1649 | static ssize_t function_show(struct device *_dev, struct device_attribute *attr, |
1650 | char *buf) | |
1da177e4 | 1651 | { |
fae3c158 | 1652 | struct net2280 *dev = dev_get_drvdata(_dev); |
1da177e4 | 1653 | |
fae3c158 RR |
1654 | if (!dev->driver || !dev->driver->function || |
1655 | strlen(dev->driver->function) > PAGE_SIZE) | |
1da177e4 | 1656 | return 0; |
fae3c158 | 1657 | return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function); |
1da177e4 | 1658 | } |
ce26bd23 | 1659 | static DEVICE_ATTR_RO(function); |
1da177e4 | 1660 | |
ce26bd23 GKH |
1661 | static ssize_t registers_show(struct device *_dev, |
1662 | struct device_attribute *attr, char *buf) | |
1da177e4 LT |
1663 | { |
1664 | struct net2280 *dev; | |
1665 | char *next; | |
1666 | unsigned size, t; | |
1667 | unsigned long flags; | |
1668 | int i; | |
1669 | u32 t1, t2; | |
30e69598 | 1670 | const char *s; |
1da177e4 | 1671 | |
fae3c158 | 1672 | dev = dev_get_drvdata(_dev); |
1da177e4 LT |
1673 | next = buf; |
1674 | size = PAGE_SIZE; | |
fae3c158 | 1675 | spin_lock_irqsave(&dev->lock, flags); |
1da177e4 LT |
1676 | |
1677 | if (dev->driver) | |
1678 | s = dev->driver->driver.name; | |
1679 | else | |
1680 | s = "(none)"; | |
1681 | ||
1682 | /* Main Control Registers */ | |
fae3c158 | 1683 | t = scnprintf(next, size, "%s version " DRIVER_VERSION |
d588ff58 | 1684 | ", chiprev %04x\n\n" |
1da177e4 LT |
1685 | "devinit %03x fifoctl %08x gadget '%s'\n" |
1686 | "pci irqenb0 %02x irqenb1 %08x " | |
1687 | "irqstat0 %04x irqstat1 %08x\n", | |
1688 | driver_name, dev->chiprev, | |
fae3c158 RR |
1689 | readl(&dev->regs->devinit), |
1690 | readl(&dev->regs->fifoctl), | |
1da177e4 | 1691 | s, |
fae3c158 RR |
1692 | readl(&dev->regs->pciirqenb0), |
1693 | readl(&dev->regs->pciirqenb1), | |
1694 | readl(&dev->regs->irqstat0), | |
1695 | readl(&dev->regs->irqstat1)); | |
1da177e4 LT |
1696 | size -= t; |
1697 | next += t; | |
1698 | ||
1699 | /* USB Control Registers */ | |
fae3c158 RR |
1700 | t1 = readl(&dev->usb->usbctl); |
1701 | t2 = readl(&dev->usb->usbstat); | |
3e76fdcb RR |
1702 | if (t1 & BIT(VBUS_PIN)) { |
1703 | if (t2 & BIT(HIGH_SPEED)) | |
1da177e4 LT |
1704 | s = "high speed"; |
1705 | else if (dev->gadget.speed == USB_SPEED_UNKNOWN) | |
1706 | s = "powered"; | |
1707 | else | |
1708 | s = "full speed"; | |
1709 | /* full speed bit (6) not working?? */ | |
1710 | } else | |
1711 | s = "not attached"; | |
fae3c158 | 1712 | t = scnprintf(next, size, |
1da177e4 LT |
1713 | "stdrsp %08x usbctl %08x usbstat %08x " |
1714 | "addr 0x%02x (%s)\n", | |
fae3c158 RR |
1715 | readl(&dev->usb->stdrsp), t1, t2, |
1716 | readl(&dev->usb->ouraddr), s); | |
1da177e4 LT |
1717 | size -= t; |
1718 | next += t; | |
1719 | ||
1720 | /* PCI Master Control Registers */ | |
1721 | ||
1722 | /* DMA Control Registers */ | |
1723 | ||
1724 | /* Configurable EP Control Registers */ | |
adc82f77 | 1725 | for (i = 0; i < dev->n_ep; i++) { |
1da177e4 LT |
1726 | struct net2280_ep *ep; |
1727 | ||
fae3c158 | 1728 | ep = &dev->ep[i]; |
1da177e4 LT |
1729 | if (i && !ep->desc) |
1730 | continue; | |
1731 | ||
adc82f77 | 1732 | t1 = readl(&ep->cfg->ep_cfg); |
fae3c158 RR |
1733 | t2 = readl(&ep->regs->ep_rsp) & 0xff; |
1734 | t = scnprintf(next, size, | |
1da177e4 LT |
1735 | "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s" |
1736 | "irqenb %02x\n", | |
1737 | ep->ep.name, t1, t2, | |
3e76fdcb | 1738 | (t2 & BIT(CLEAR_NAK_OUT_PACKETS)) |
1da177e4 | 1739 | ? "NAK " : "", |
3e76fdcb | 1740 | (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE)) |
1da177e4 | 1741 | ? "hide " : "", |
3e76fdcb | 1742 | (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR)) |
1da177e4 | 1743 | ? "CRC " : "", |
3e76fdcb | 1744 | (t2 & BIT(CLEAR_INTERRUPT_MODE)) |
1da177e4 | 1745 | ? "interrupt " : "", |
3e76fdcb | 1746 | (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE)) |
1da177e4 | 1747 | ? "status " : "", |
3e76fdcb | 1748 | (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE)) |
1da177e4 | 1749 | ? "NAKmode " : "", |
3e76fdcb | 1750 | (t2 & BIT(CLEAR_ENDPOINT_TOGGLE)) |
1da177e4 | 1751 | ? "DATA1 " : "DATA0 ", |
3e76fdcb | 1752 | (t2 & BIT(CLEAR_ENDPOINT_HALT)) |
1da177e4 | 1753 | ? "HALT " : "", |
fae3c158 | 1754 | readl(&ep->regs->ep_irqenb)); |
1da177e4 LT |
1755 | size -= t; |
1756 | next += t; | |
1757 | ||
fae3c158 | 1758 | t = scnprintf(next, size, |
1da177e4 LT |
1759 | "\tstat %08x avail %04x " |
1760 | "(ep%d%s-%s)%s\n", | |
fae3c158 RR |
1761 | readl(&ep->regs->ep_stat), |
1762 | readl(&ep->regs->ep_avail), | |
1763 | t1 & 0x0f, DIR_STRING(t1), | |
1764 | type_string(t1 >> 8), | |
1da177e4 LT |
1765 | ep->stopped ? "*" : ""); |
1766 | size -= t; | |
1767 | next += t; | |
1768 | ||
1769 | if (!ep->dma) | |
1770 | continue; | |
1771 | ||
fae3c158 | 1772 | t = scnprintf(next, size, |
1da177e4 LT |
1773 | " dma\tctl %08x stat %08x count %08x\n" |
1774 | "\taddr %08x desc %08x\n", | |
fae3c158 RR |
1775 | readl(&ep->dma->dmactl), |
1776 | readl(&ep->dma->dmastat), | |
1777 | readl(&ep->dma->dmacount), | |
1778 | readl(&ep->dma->dmaaddr), | |
1779 | readl(&ep->dma->dmadesc)); | |
1da177e4 LT |
1780 | size -= t; |
1781 | next += t; | |
1782 | ||
1783 | } | |
1784 | ||
fae3c158 | 1785 | /* Indexed Registers (none yet) */ |
1da177e4 LT |
1786 | |
1787 | /* Statistics */ | |
fae3c158 | 1788 | t = scnprintf(next, size, "\nirqs: "); |
1da177e4 LT |
1789 | size -= t; |
1790 | next += t; | |
adc82f77 | 1791 | for (i = 0; i < dev->n_ep; i++) { |
1da177e4 LT |
1792 | struct net2280_ep *ep; |
1793 | ||
fae3c158 | 1794 | ep = &dev->ep[i]; |
1da177e4 LT |
1795 | if (i && !ep->irqs) |
1796 | continue; | |
fae3c158 | 1797 | t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs); |
1da177e4 LT |
1798 | size -= t; |
1799 | next += t; | |
1800 | ||
1801 | } | |
fae3c158 | 1802 | t = scnprintf(next, size, "\n"); |
1da177e4 LT |
1803 | size -= t; |
1804 | next += t; | |
1805 | ||
fae3c158 | 1806 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1807 | |
1808 | return PAGE_SIZE - size; | |
1809 | } | |
ce26bd23 | 1810 | static DEVICE_ATTR_RO(registers); |
1da177e4 | 1811 | |
ce26bd23 GKH |
1812 | static ssize_t queues_show(struct device *_dev, struct device_attribute *attr, |
1813 | char *buf) | |
1da177e4 LT |
1814 | { |
1815 | struct net2280 *dev; | |
1816 | char *next; | |
1817 | unsigned size; | |
1818 | unsigned long flags; | |
1819 | int i; | |
1820 | ||
fae3c158 | 1821 | dev = dev_get_drvdata(_dev); |
1da177e4 LT |
1822 | next = buf; |
1823 | size = PAGE_SIZE; | |
fae3c158 | 1824 | spin_lock_irqsave(&dev->lock, flags); |
1da177e4 | 1825 | |
adc82f77 | 1826 | for (i = 0; i < dev->n_ep; i++) { |
fae3c158 | 1827 | struct net2280_ep *ep = &dev->ep[i]; |
1da177e4 LT |
1828 | struct net2280_request *req; |
1829 | int t; | |
1830 | ||
1831 | if (i != 0) { | |
1832 | const struct usb_endpoint_descriptor *d; | |
1833 | ||
1834 | d = ep->desc; | |
1835 | if (!d) | |
1836 | continue; | |
1837 | t = d->bEndpointAddress; | |
fae3c158 | 1838 | t = scnprintf(next, size, |
1da177e4 LT |
1839 | "\n%s (ep%d%s-%s) max %04x %s fifo %d\n", |
1840 | ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK, | |
1841 | (t & USB_DIR_IN) ? "in" : "out", | |
a27f37a1 | 1842 | type_string(d->bmAttributes), |
090bdb5c | 1843 | usb_endpoint_maxp(d), |
1da177e4 LT |
1844 | ep->dma ? "dma" : "pio", ep->fifo_size |
1845 | ); | |
1846 | } else /* ep0 should only have one transfer queued */ | |
fae3c158 | 1847 | t = scnprintf(next, size, "ep0 max 64 pio %s\n", |
1da177e4 LT |
1848 | ep->is_in ? "in" : "out"); |
1849 | if (t <= 0 || t > size) | |
1850 | goto done; | |
1851 | size -= t; | |
1852 | next += t; | |
1853 | ||
fae3c158 RR |
1854 | if (list_empty(&ep->queue)) { |
1855 | t = scnprintf(next, size, "\t(nothing queued)\n"); | |
1da177e4 LT |
1856 | if (t <= 0 || t > size) |
1857 | goto done; | |
1858 | size -= t; | |
1859 | next += t; | |
1860 | continue; | |
1861 | } | |
fae3c158 RR |
1862 | list_for_each_entry(req, &ep->queue, queue) { |
1863 | if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc)) | |
1864 | t = scnprintf(next, size, | |
1da177e4 LT |
1865 | "\treq %p len %d/%d " |
1866 | "buf %p (dmacount %08x)\n", | |
1867 | &req->req, req->req.actual, | |
1868 | req->req.length, req->req.buf, | |
fae3c158 | 1869 | readl(&ep->dma->dmacount)); |
1da177e4 | 1870 | else |
fae3c158 | 1871 | t = scnprintf(next, size, |
1da177e4 LT |
1872 | "\treq %p len %d/%d buf %p\n", |
1873 | &req->req, req->req.actual, | |
1874 | req->req.length, req->req.buf); | |
1875 | if (t <= 0 || t > size) | |
1876 | goto done; | |
1877 | size -= t; | |
1878 | next += t; | |
1879 | ||
1880 | if (ep->dma) { | |
1881 | struct net2280_dma *td; | |
1882 | ||
1883 | td = req->td; | |
fae3c158 | 1884 | t = scnprintf(next, size, "\t td %08x " |
1da177e4 LT |
1885 | " count %08x buf %08x desc %08x\n", |
1886 | (u32) req->td_dma, | |
fae3c158 RR |
1887 | le32_to_cpu(td->dmacount), |
1888 | le32_to_cpu(td->dmaaddr), | |
1889 | le32_to_cpu(td->dmadesc)); | |
1da177e4 LT |
1890 | if (t <= 0 || t > size) |
1891 | goto done; | |
1892 | size -= t; | |
1893 | next += t; | |
1894 | } | |
1895 | } | |
1896 | } | |
1897 | ||
1898 | done: | |
fae3c158 | 1899 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1900 | return PAGE_SIZE - size; |
1901 | } | |
ce26bd23 | 1902 | static DEVICE_ATTR_RO(queues); |
1da177e4 LT |
1903 | |
1904 | ||
1905 | #else | |
1906 | ||
fae3c158 RR |
1907 | #define device_create_file(a, b) (0) |
1908 | #define device_remove_file(a, b) do { } while (0) | |
1da177e4 LT |
1909 | |
1910 | #endif | |
1911 | ||
1912 | /*-------------------------------------------------------------------------*/ | |
1913 | ||
1914 | /* another driver-specific mode might be a request type doing dma | |
1915 | * to/from another device fifo instead of to/from memory. | |
1916 | */ | |
1917 | ||
fae3c158 | 1918 | static void set_fifo_mode(struct net2280 *dev, int mode) |
1da177e4 LT |
1919 | { |
1920 | /* keeping high bits preserves BAR2 */ | |
fae3c158 | 1921 | writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl); |
1da177e4 LT |
1922 | |
1923 | /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */ | |
fae3c158 RR |
1924 | INIT_LIST_HEAD(&dev->gadget.ep_list); |
1925 | list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list); | |
1926 | list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list); | |
1da177e4 LT |
1927 | switch (mode) { |
1928 | case 0: | |
fae3c158 RR |
1929 | list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list); |
1930 | list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list); | |
1931 | dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024; | |
1da177e4 LT |
1932 | break; |
1933 | case 1: | |
fae3c158 | 1934 | dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048; |
1da177e4 LT |
1935 | break; |
1936 | case 2: | |
fae3c158 RR |
1937 | list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list); |
1938 | dev->ep[1].fifo_size = 2048; | |
1939 | dev->ep[2].fifo_size = 1024; | |
1da177e4 LT |
1940 | break; |
1941 | } | |
1942 | /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */ | |
fae3c158 RR |
1943 | list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list); |
1944 | list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list); | |
1da177e4 LT |
1945 | } |
1946 | ||
adc82f77 RR |
1947 | static void defect7374_disable_data_eps(struct net2280 *dev) |
1948 | { | |
1949 | /* | |
1950 | * For Defect 7374, disable data EPs (and more): | |
1951 | * - This phase undoes the earlier phase of the Defect 7374 workaround, | |
1952 | * returing ep regs back to normal. | |
1953 | */ | |
1954 | struct net2280_ep *ep; | |
1955 | int i; | |
1956 | unsigned char ep_sel; | |
1957 | u32 tmp_reg; | |
1958 | ||
1959 | for (i = 1; i < 5; i++) { | |
1960 | ep = &dev->ep[i]; | |
81e9d14a | 1961 | writel(i, &ep->cfg->ep_cfg); |
adc82f77 RR |
1962 | } |
1963 | ||
1964 | /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */ | |
1965 | for (i = 0; i < 6; i++) | |
1966 | writel(0, &dev->dep[i].dep_cfg); | |
1967 | ||
1968 | for (ep_sel = 0; ep_sel <= 21; ep_sel++) { | |
1969 | /* Select an endpoint for subsequent operations: */ | |
1970 | tmp_reg = readl(&dev->plregs->pl_ep_ctrl); | |
1971 | writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl); | |
1972 | ||
1973 | if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) || | |
1974 | ep_sel == 18 || ep_sel == 20) | |
1975 | continue; | |
1976 | ||
1977 | /* Change settings on some selected endpoints */ | |
1978 | tmp_reg = readl(&dev->plregs->pl_ep_cfg_4); | |
3e76fdcb | 1979 | tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR); |
adc82f77 RR |
1980 | writel(tmp_reg, &dev->plregs->pl_ep_cfg_4); |
1981 | tmp_reg = readl(&dev->plregs->pl_ep_ctrl); | |
3e76fdcb | 1982 | tmp_reg |= BIT(EP_INITIALIZED); |
adc82f77 RR |
1983 | writel(tmp_reg, &dev->plregs->pl_ep_ctrl); |
1984 | } | |
1985 | } | |
1986 | ||
1987 | static void defect7374_enable_data_eps_zero(struct net2280 *dev) | |
1988 | { | |
1989 | u32 tmp = 0, tmp_reg; | |
5517525e | 1990 | u32 scratch; |
adc82f77 RR |
1991 | int i; |
1992 | unsigned char ep_sel; | |
1993 | ||
1994 | scratch = get_idx_reg(dev->regs, SCRATCH); | |
5517525e RR |
1995 | |
1996 | WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD)) | |
1997 | == DEFECT7374_FSM_SS_CONTROL_READ); | |
1998 | ||
adc82f77 RR |
1999 | scratch &= ~(0xf << DEFECT7374_FSM_FIELD); |
2000 | ||
5517525e RR |
2001 | ep_warn(dev, "Operate Defect 7374 workaround soft this time"); |
2002 | ep_warn(dev, "It will operate on cold-reboot and SS connect"); | |
adc82f77 | 2003 | |
5517525e RR |
2004 | /*GPEPs:*/ |
2005 | tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) | | |
2006 | (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) | | |
2007 | ((dev->enhanced_mode) ? | |
25d40ee8 MYK |
2008 | BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) : |
2009 | BIT(ENDPOINT_ENABLE))); | |
adc82f77 | 2010 | |
5517525e RR |
2011 | for (i = 1; i < 5; i++) |
2012 | writel(tmp, &dev->ep[i].cfg->ep_cfg); | |
adc82f77 | 2013 | |
5517525e RR |
2014 | /* CSRIN, PCIIN, STATIN, RCIN*/ |
2015 | tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE)); | |
2016 | writel(tmp, &dev->dep[1].dep_cfg); | |
2017 | writel(tmp, &dev->dep[3].dep_cfg); | |
2018 | writel(tmp, &dev->dep[4].dep_cfg); | |
2019 | writel(tmp, &dev->dep[5].dep_cfg); | |
adc82f77 | 2020 | |
5517525e RR |
2021 | /*Implemented for development and debug. |
2022 | * Can be refined/tuned later.*/ | |
2023 | for (ep_sel = 0; ep_sel <= 21; ep_sel++) { | |
2024 | /* Select an endpoint for subsequent operations: */ | |
2025 | tmp_reg = readl(&dev->plregs->pl_ep_ctrl); | |
2026 | writel(((tmp_reg & ~0x1f) | ep_sel), | |
2027 | &dev->plregs->pl_ep_ctrl); | |
2028 | ||
2029 | if (ep_sel == 1) { | |
2030 | tmp = | |
2031 | (readl(&dev->plregs->pl_ep_ctrl) | | |
2032 | BIT(CLEAR_ACK_ERROR_CODE) | 0); | |
2033 | writel(tmp, &dev->plregs->pl_ep_ctrl); | |
2034 | continue; | |
adc82f77 RR |
2035 | } |
2036 | ||
5517525e RR |
2037 | if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) || |
2038 | ep_sel == 18 || ep_sel == 20) | |
2039 | continue; | |
2040 | ||
2041 | tmp = (readl(&dev->plregs->pl_ep_cfg_4) | | |
2042 | BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0); | |
2043 | writel(tmp, &dev->plregs->pl_ep_cfg_4); | |
2044 | ||
2045 | tmp = readl(&dev->plregs->pl_ep_ctrl) & | |
2046 | ~BIT(EP_INITIALIZED); | |
2047 | writel(tmp, &dev->plregs->pl_ep_ctrl); | |
adc82f77 | 2048 | |
adc82f77 | 2049 | } |
5517525e RR |
2050 | |
2051 | /* Set FSM to focus on the first Control Read: | |
2052 | * - Tip: Connection speed is known upon the first | |
2053 | * setup request.*/ | |
2054 | scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ; | |
2055 | set_idx_reg(dev->regs, SCRATCH, scratch); | |
2056 | ||
adc82f77 RR |
2057 | } |
2058 | ||
1da177e4 LT |
2059 | /* keeping it simple: |
2060 | * - one bus driver, initted first; | |
2061 | * - one function driver, initted second | |
2062 | * | |
2063 | * most of the work to support multiple net2280 controllers would | |
2064 | * be to associate this gadget driver (yes?) with all of them, or | |
2065 | * perhaps to bind specific drivers to specific devices. | |
2066 | */ | |
2067 | ||
adc82f77 | 2068 | static void usb_reset_228x(struct net2280 *dev) |
1da177e4 LT |
2069 | { |
2070 | u32 tmp; | |
2071 | ||
2072 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
fae3c158 | 2073 | (void) readl(&dev->usb->usbctl); |
1da177e4 | 2074 | |
fae3c158 | 2075 | net2280_led_init(dev); |
1da177e4 LT |
2076 | |
2077 | /* disable automatic responses, and irqs */ | |
fae3c158 RR |
2078 | writel(0, &dev->usb->stdrsp); |
2079 | writel(0, &dev->regs->pciirqenb0); | |
2080 | writel(0, &dev->regs->pciirqenb1); | |
1da177e4 LT |
2081 | |
2082 | /* clear old dma and irq state */ | |
2083 | for (tmp = 0; tmp < 4; tmp++) { | |
adc82f77 | 2084 | struct net2280_ep *ep = &dev->ep[tmp + 1]; |
1da177e4 | 2085 | if (ep->dma) |
adc82f77 | 2086 | abort_dma(ep); |
1da177e4 | 2087 | } |
adc82f77 | 2088 | |
fae3c158 | 2089 | writel(~0, &dev->regs->irqstat0), |
3e76fdcb | 2090 | writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1), |
1da177e4 LT |
2091 | |
2092 | /* reset, and enable pci */ | |
3e76fdcb RR |
2093 | tmp = readl(&dev->regs->devinit) | |
2094 | BIT(PCI_ENABLE) | | |
2095 | BIT(FIFO_SOFT_RESET) | | |
2096 | BIT(USB_SOFT_RESET) | | |
2097 | BIT(M8051_RESET); | |
fae3c158 | 2098 | writel(tmp, &dev->regs->devinit); |
1da177e4 LT |
2099 | |
2100 | /* standard fifo and endpoint allocations */ | |
fae3c158 | 2101 | set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0); |
1da177e4 LT |
2102 | } |
2103 | ||
adc82f77 RR |
2104 | static void usb_reset_338x(struct net2280 *dev) |
2105 | { | |
2106 | u32 tmp; | |
adc82f77 RR |
2107 | |
2108 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
2109 | (void)readl(&dev->usb->usbctl); | |
2110 | ||
2111 | net2280_led_init(dev); | |
2112 | ||
5517525e | 2113 | if (dev->bug7734_patched) { |
adc82f77 RR |
2114 | /* disable automatic responses, and irqs */ |
2115 | writel(0, &dev->usb->stdrsp); | |
2116 | writel(0, &dev->regs->pciirqenb0); | |
2117 | writel(0, &dev->regs->pciirqenb1); | |
2118 | } | |
2119 | ||
2120 | /* clear old dma and irq state */ | |
2121 | for (tmp = 0; tmp < 4; tmp++) { | |
2122 | struct net2280_ep *ep = &dev->ep[tmp + 1]; | |
3fc0a7c3 | 2123 | struct net2280_dma_regs __iomem *dma; |
adc82f77 | 2124 | |
3fc0a7c3 | 2125 | if (ep->dma) { |
adc82f77 | 2126 | abort_dma(ep); |
3fc0a7c3 MYK |
2127 | } else { |
2128 | dma = &dev->dma[tmp]; | |
2129 | writel(BIT(DMA_ABORT), &dma->dmastat); | |
2130 | writel(0, &dma->dmactl); | |
2131 | } | |
adc82f77 RR |
2132 | } |
2133 | ||
2134 | writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1); | |
2135 | ||
5517525e | 2136 | if (dev->bug7734_patched) { |
adc82f77 RR |
2137 | /* reset, and enable pci */ |
2138 | tmp = readl(&dev->regs->devinit) | | |
3e76fdcb RR |
2139 | BIT(PCI_ENABLE) | |
2140 | BIT(FIFO_SOFT_RESET) | | |
2141 | BIT(USB_SOFT_RESET) | | |
2142 | BIT(M8051_RESET); | |
adc82f77 RR |
2143 | |
2144 | writel(tmp, &dev->regs->devinit); | |
2145 | } | |
2146 | ||
2147 | /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */ | |
2148 | INIT_LIST_HEAD(&dev->gadget.ep_list); | |
2149 | ||
2150 | for (tmp = 1; tmp < dev->n_ep; tmp++) | |
2151 | list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list); | |
2152 | ||
2153 | } | |
2154 | ||
2155 | static void usb_reset(struct net2280 *dev) | |
2156 | { | |
2eeb0016 | 2157 | if (dev->quirks & PLX_LEGACY) |
adc82f77 RR |
2158 | return usb_reset_228x(dev); |
2159 | return usb_reset_338x(dev); | |
2160 | } | |
2161 | ||
2162 | static void usb_reinit_228x(struct net2280 *dev) | |
1da177e4 LT |
2163 | { |
2164 | u32 tmp; | |
1da177e4 LT |
2165 | |
2166 | /* basic endpoint init */ | |
2167 | for (tmp = 0; tmp < 7; tmp++) { | |
fae3c158 | 2168 | struct net2280_ep *ep = &dev->ep[tmp]; |
1da177e4 | 2169 | |
c23c3c3c RB |
2170 | ep->ep.name = ep_info_dft[tmp].name; |
2171 | ep->ep.caps = ep_info_dft[tmp].caps; | |
1da177e4 LT |
2172 | ep->dev = dev; |
2173 | ep->num = tmp; | |
2174 | ||
2175 | if (tmp > 0 && tmp <= 4) { | |
2176 | ep->fifo_size = 1024; | |
d588ff58 | 2177 | ep->dma = &dev->dma[tmp - 1]; |
1da177e4 LT |
2178 | } else |
2179 | ep->fifo_size = 64; | |
fae3c158 | 2180 | ep->regs = &dev->epregs[tmp]; |
adc82f77 RR |
2181 | ep->cfg = &dev->epregs[tmp]; |
2182 | ep_reset_228x(dev->regs, ep); | |
1da177e4 | 2183 | } |
fae3c158 RR |
2184 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64); |
2185 | usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64); | |
2186 | usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64); | |
1da177e4 | 2187 | |
fae3c158 RR |
2188 | dev->gadget.ep0 = &dev->ep[0].ep; |
2189 | dev->ep[0].stopped = 0; | |
2190 | INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); | |
1da177e4 LT |
2191 | |
2192 | /* we want to prevent lowlevel/insecure access from the USB host, | |
2193 | * but erratum 0119 means this enable bit is ignored | |
2194 | */ | |
2195 | for (tmp = 0; tmp < 5; tmp++) | |
fae3c158 | 2196 | writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg); |
1da177e4 LT |
2197 | } |
2198 | ||
adc82f77 RR |
2199 | static void usb_reinit_338x(struct net2280 *dev) |
2200 | { | |
adc82f77 RR |
2201 | int i; |
2202 | u32 tmp, val; | |
adc82f77 RR |
2203 | static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 }; |
2204 | static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00, | |
2205 | 0x00, 0xC0, 0x00, 0xC0 }; | |
2206 | ||
adc82f77 RR |
2207 | /* basic endpoint init */ |
2208 | for (i = 0; i < dev->n_ep; i++) { | |
2209 | struct net2280_ep *ep = &dev->ep[i]; | |
2210 | ||
c23c3c3c RB |
2211 | ep->ep.name = dev->enhanced_mode ? ep_info_adv[i].name : |
2212 | ep_info_dft[i].name; | |
2213 | ep->ep.caps = dev->enhanced_mode ? ep_info_adv[i].caps : | |
2214 | ep_info_dft[i].caps; | |
adc82f77 RR |
2215 | ep->dev = dev; |
2216 | ep->num = i; | |
2217 | ||
d588ff58 | 2218 | if (i > 0 && i <= 4) |
adc82f77 RR |
2219 | ep->dma = &dev->dma[i - 1]; |
2220 | ||
2221 | if (dev->enhanced_mode) { | |
2222 | ep->cfg = &dev->epregs[ne[i]]; | |
c65c4f05 MYK |
2223 | /* |
2224 | * Set USB endpoint number, hardware allows same number | |
2225 | * in both directions. | |
2226 | */ | |
2227 | if (i > 0 && i < 5) | |
2228 | writel(ne[i], &ep->cfg->ep_cfg); | |
adc82f77 | 2229 | ep->regs = (struct net2280_ep_regs __iomem *) |
c43e97b2 | 2230 | (((void __iomem *)&dev->epregs[ne[i]]) + |
adc82f77 | 2231 | ep_reg_addr[i]); |
adc82f77 RR |
2232 | } else { |
2233 | ep->cfg = &dev->epregs[i]; | |
2234 | ep->regs = &dev->epregs[i]; | |
adc82f77 RR |
2235 | } |
2236 | ||
2237 | ep->fifo_size = (i != 0) ? 2048 : 512; | |
2238 | ||
2239 | ep_reset_338x(dev->regs, ep); | |
2240 | } | |
2241 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512); | |
2242 | ||
2243 | dev->gadget.ep0 = &dev->ep[0].ep; | |
2244 | dev->ep[0].stopped = 0; | |
2245 | ||
2246 | /* Link layer set up */ | |
5517525e | 2247 | if (dev->bug7734_patched) { |
adc82f77 | 2248 | tmp = readl(&dev->usb_ext->usbctl2) & |
3e76fdcb | 2249 | ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE)); |
adc82f77 RR |
2250 | writel(tmp, &dev->usb_ext->usbctl2); |
2251 | } | |
2252 | ||
2253 | /* Hardware Defect and Workaround */ | |
2254 | val = readl(&dev->ll_lfps_regs->ll_lfps_5); | |
2255 | val &= ~(0xf << TIMER_LFPS_6US); | |
2256 | val |= 0x5 << TIMER_LFPS_6US; | |
2257 | writel(val, &dev->ll_lfps_regs->ll_lfps_5); | |
2258 | ||
2259 | val = readl(&dev->ll_lfps_regs->ll_lfps_6); | |
2260 | val &= ~(0xffff << TIMER_LFPS_80US); | |
2261 | val |= 0x0100 << TIMER_LFPS_80US; | |
2262 | writel(val, &dev->ll_lfps_regs->ll_lfps_6); | |
2263 | ||
2264 | /* | |
2265 | * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB | |
2266 | * Hot Reset Exit Handshake may Fail in Specific Case using | |
2267 | * Default Register Settings. Workaround for Enumeration test. | |
2268 | */ | |
2269 | val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2); | |
2270 | val &= ~(0x1f << HOT_TX_NORESET_TS2); | |
2271 | val |= 0x10 << HOT_TX_NORESET_TS2; | |
2272 | writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2); | |
2273 | ||
2274 | val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3); | |
2275 | val &= ~(0x1f << HOT_RX_RESET_TS2); | |
2276 | val |= 0x3 << HOT_RX_RESET_TS2; | |
2277 | writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3); | |
2278 | ||
2279 | /* | |
2280 | * Set Recovery Idle to Recover bit: | |
2281 | * - On SS connections, setting Recovery Idle to Recover Fmw improves | |
2282 | * link robustness with various hosts and hubs. | |
2283 | * - It is safe to set for all connection speeds; all chip revisions. | |
2284 | * - R-M-W to leave other bits undisturbed. | |
2285 | * - Reference PLX TT-7372 | |
2286 | */ | |
2287 | val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit); | |
3e76fdcb | 2288 | val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW); |
adc82f77 RR |
2289 | writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit); |
2290 | ||
2291 | INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); | |
2292 | ||
2293 | /* disable dedicated endpoints */ | |
2294 | writel(0x0D, &dev->dep[0].dep_cfg); | |
2295 | writel(0x0D, &dev->dep[1].dep_cfg); | |
2296 | writel(0x0E, &dev->dep[2].dep_cfg); | |
2297 | writel(0x0E, &dev->dep[3].dep_cfg); | |
2298 | writel(0x0F, &dev->dep[4].dep_cfg); | |
2299 | writel(0x0C, &dev->dep[5].dep_cfg); | |
2300 | } | |
2301 | ||
2302 | static void usb_reinit(struct net2280 *dev) | |
2303 | { | |
2eeb0016 | 2304 | if (dev->quirks & PLX_LEGACY) |
adc82f77 RR |
2305 | return usb_reinit_228x(dev); |
2306 | return usb_reinit_338x(dev); | |
2307 | } | |
2308 | ||
2309 | static void ep0_start_228x(struct net2280 *dev) | |
1da177e4 | 2310 | { |
3e76fdcb RR |
2311 | writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) | |
2312 | BIT(CLEAR_NAK_OUT_PACKETS) | | |
ae8e530a RR |
2313 | BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), |
2314 | &dev->epregs[0].ep_rsp); | |
1da177e4 LT |
2315 | |
2316 | /* | |
2317 | * hardware optionally handles a bunch of standard requests | |
2318 | * that the API hides from drivers anyway. have it do so. | |
2319 | * endpoint status/features are handled in software, to | |
2320 | * help pass tests for some dubious behavior. | |
2321 | */ | |
3e76fdcb RR |
2322 | writel(BIT(SET_TEST_MODE) | |
2323 | BIT(SET_ADDRESS) | | |
2324 | BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) | | |
2325 | BIT(GET_DEVICE_STATUS) | | |
ae8e530a RR |
2326 | BIT(GET_INTERFACE_STATUS), |
2327 | &dev->usb->stdrsp); | |
3e76fdcb RR |
2328 | writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) | |
2329 | BIT(SELF_POWERED_USB_DEVICE) | | |
2330 | BIT(REMOTE_WAKEUP_SUPPORT) | | |
2331 | (dev->softconnect << USB_DETECT_ENABLE) | | |
2332 | BIT(SELF_POWERED_STATUS), | |
2333 | &dev->usb->usbctl); | |
1da177e4 LT |
2334 | |
2335 | /* enable irqs so we can see ep0 and general operation */ | |
3e76fdcb RR |
2336 | writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) | |
2337 | BIT(ENDPOINT_0_INTERRUPT_ENABLE), | |
2338 | &dev->regs->pciirqenb0); | |
2339 | writel(BIT(PCI_INTERRUPT_ENABLE) | | |
2340 | BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) | | |
2341 | BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) | | |
2342 | BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) | | |
2343 | BIT(VBUS_INTERRUPT_ENABLE) | | |
2344 | BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) | | |
2345 | BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE), | |
2346 | &dev->regs->pciirqenb1); | |
1da177e4 LT |
2347 | |
2348 | /* don't leave any writes posted */ | |
fae3c158 | 2349 | (void) readl(&dev->usb->usbctl); |
1da177e4 LT |
2350 | } |
2351 | ||
adc82f77 RR |
2352 | static void ep0_start_338x(struct net2280 *dev) |
2353 | { | |
adc82f77 | 2354 | |
5517525e | 2355 | if (dev->bug7734_patched) |
3e76fdcb RR |
2356 | writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) | |
2357 | BIT(SET_EP_HIDE_STATUS_PHASE), | |
adc82f77 RR |
2358 | &dev->epregs[0].ep_rsp); |
2359 | ||
2360 | /* | |
2361 | * hardware optionally handles a bunch of standard requests | |
2362 | * that the API hides from drivers anyway. have it do so. | |
2363 | * endpoint status/features are handled in software, to | |
2364 | * help pass tests for some dubious behavior. | |
2365 | */ | |
3e76fdcb RR |
2366 | writel(BIT(SET_ISOCHRONOUS_DELAY) | |
2367 | BIT(SET_SEL) | | |
2368 | BIT(SET_TEST_MODE) | | |
2369 | BIT(SET_ADDRESS) | | |
2370 | BIT(GET_INTERFACE_STATUS) | | |
2371 | BIT(GET_DEVICE_STATUS), | |
adc82f77 RR |
2372 | &dev->usb->stdrsp); |
2373 | dev->wakeup_enable = 1; | |
3e76fdcb | 2374 | writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) | |
adc82f77 | 2375 | (dev->softconnect << USB_DETECT_ENABLE) | |
3e76fdcb | 2376 | BIT(DEVICE_REMOTE_WAKEUP_ENABLE), |
adc82f77 RR |
2377 | &dev->usb->usbctl); |
2378 | ||
2379 | /* enable irqs so we can see ep0 and general operation */ | |
3e76fdcb | 2380 | writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) | |
ae8e530a RR |
2381 | BIT(ENDPOINT_0_INTERRUPT_ENABLE), |
2382 | &dev->regs->pciirqenb0); | |
3e76fdcb RR |
2383 | writel(BIT(PCI_INTERRUPT_ENABLE) | |
2384 | BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) | | |
2385 | BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) | | |
2386 | BIT(VBUS_INTERRUPT_ENABLE), | |
adc82f77 RR |
2387 | &dev->regs->pciirqenb1); |
2388 | ||
2389 | /* don't leave any writes posted */ | |
2390 | (void)readl(&dev->usb->usbctl); | |
2391 | } | |
2392 | ||
2393 | static void ep0_start(struct net2280 *dev) | |
2394 | { | |
2eeb0016 | 2395 | if (dev->quirks & PLX_LEGACY) |
adc82f77 RR |
2396 | return ep0_start_228x(dev); |
2397 | return ep0_start_338x(dev); | |
2398 | } | |
2399 | ||
1da177e4 LT |
2400 | /* when a driver is successfully registered, it will receive |
2401 | * control requests including set_configuration(), which enables | |
2402 | * non-control requests. then usb traffic follows until a | |
2403 | * disconnect is reported. then a host may connect again, or | |
2404 | * the driver might get unbound. | |
2405 | */ | |
4cf5e00b FB |
2406 | static int net2280_start(struct usb_gadget *_gadget, |
2407 | struct usb_gadget_driver *driver) | |
1da177e4 | 2408 | { |
4cf5e00b | 2409 | struct net2280 *dev; |
1da177e4 LT |
2410 | int retval; |
2411 | unsigned i; | |
2412 | ||
2413 | /* insist on high speed support from the driver, since | |
2414 | * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE) | |
2415 | * "must not be used in normal operation" | |
2416 | */ | |
ae8e530a RR |
2417 | if (!driver || driver->max_speed < USB_SPEED_HIGH || |
2418 | !driver->setup) | |
1da177e4 | 2419 | return -EINVAL; |
4cf5e00b | 2420 | |
fae3c158 | 2421 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 2422 | |
adc82f77 | 2423 | for (i = 0; i < dev->n_ep; i++) |
fae3c158 | 2424 | dev->ep[i].irqs = 0; |
1da177e4 LT |
2425 | |
2426 | /* hook up the driver ... */ | |
1da177e4 LT |
2427 | driver->driver.bus = NULL; |
2428 | dev->driver = driver; | |
1da177e4 | 2429 | |
fae3c158 RR |
2430 | retval = device_create_file(&dev->pdev->dev, &dev_attr_function); |
2431 | if (retval) | |
2432 | goto err_unbind; | |
2433 | retval = device_create_file(&dev->pdev->dev, &dev_attr_queues); | |
2434 | if (retval) | |
2435 | goto err_func; | |
1da177e4 | 2436 | |
7a74c481 | 2437 | /* enable host detection and ep0; and we're ready |
1da177e4 LT |
2438 | * for set_configuration as well as eventual disconnect. |
2439 | */ | |
fae3c158 | 2440 | net2280_led_active(dev, 1); |
adc82f77 | 2441 | |
5185c913 | 2442 | if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched) |
adc82f77 RR |
2443 | defect7374_enable_data_eps_zero(dev); |
2444 | ||
fae3c158 | 2445 | ep0_start(dev); |
1da177e4 | 2446 | |
1da177e4 LT |
2447 | /* pci writes may still be posted */ |
2448 | return 0; | |
b3899dac JG |
2449 | |
2450 | err_func: | |
fae3c158 | 2451 | device_remove_file(&dev->pdev->dev, &dev_attr_function); |
b3899dac | 2452 | err_unbind: |
b3899dac JG |
2453 | dev->driver = NULL; |
2454 | return retval; | |
1da177e4 | 2455 | } |
1da177e4 | 2456 | |
fae3c158 | 2457 | static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver) |
1da177e4 LT |
2458 | { |
2459 | int i; | |
2460 | ||
2461 | /* don't disconnect if it's not connected */ | |
2462 | if (dev->gadget.speed == USB_SPEED_UNKNOWN) | |
2463 | driver = NULL; | |
2464 | ||
2465 | /* stop hardware; prevent new request submissions; | |
2466 | * and kill any outstanding requests. | |
2467 | */ | |
fae3c158 | 2468 | usb_reset(dev); |
adc82f77 | 2469 | for (i = 0; i < dev->n_ep; i++) |
fae3c158 | 2470 | nuke(&dev->ep[i]); |
1da177e4 | 2471 | |
699412d9 FB |
2472 | /* report disconnect; the driver is already quiesced */ |
2473 | if (driver) { | |
2474 | spin_unlock(&dev->lock); | |
2475 | driver->disconnect(&dev->gadget); | |
2476 | spin_lock(&dev->lock); | |
2477 | } | |
2478 | ||
fae3c158 | 2479 | usb_reinit(dev); |
1da177e4 LT |
2480 | } |
2481 | ||
22835b80 | 2482 | static int net2280_stop(struct usb_gadget *_gadget) |
1da177e4 | 2483 | { |
4cf5e00b | 2484 | struct net2280 *dev; |
1da177e4 LT |
2485 | unsigned long flags; |
2486 | ||
fae3c158 | 2487 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 2488 | |
fae3c158 | 2489 | spin_lock_irqsave(&dev->lock, flags); |
bfd0ed57 | 2490 | stop_activity(dev, NULL); |
fae3c158 | 2491 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 | 2492 | |
fae3c158 | 2493 | net2280_led_active(dev, 0); |
2f076077 | 2494 | |
fae3c158 RR |
2495 | device_remove_file(&dev->pdev->dev, &dev_attr_function); |
2496 | device_remove_file(&dev->pdev->dev, &dev_attr_queues); | |
1da177e4 | 2497 | |
bfd0ed57 | 2498 | dev->driver = NULL; |
84237bfb | 2499 | |
1da177e4 LT |
2500 | return 0; |
2501 | } | |
1da177e4 LT |
2502 | |
2503 | /*-------------------------------------------------------------------------*/ | |
2504 | ||
2505 | /* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq. | |
2506 | * also works for dma-capable endpoints, in pio mode or just | |
2507 | * to manually advance the queue after short OUT transfers. | |
2508 | */ | |
fae3c158 | 2509 | static void handle_ep_small(struct net2280_ep *ep) |
1da177e4 LT |
2510 | { |
2511 | struct net2280_request *req; | |
2512 | u32 t; | |
2513 | /* 0 error, 1 mid-data, 2 done */ | |
2514 | int mode = 1; | |
2515 | ||
fae3c158 RR |
2516 | if (!list_empty(&ep->queue)) |
2517 | req = list_entry(ep->queue.next, | |
1da177e4 LT |
2518 | struct net2280_request, queue); |
2519 | else | |
2520 | req = NULL; | |
2521 | ||
2522 | /* ack all, and handle what we care about */ | |
fae3c158 | 2523 | t = readl(&ep->regs->ep_stat); |
1da177e4 | 2524 | ep->irqs++; |
cb442ee1 | 2525 | |
e56e69cc | 2526 | ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n", |
fc12c68b | 2527 | ep->ep.name, t, req ? &req->req : NULL); |
cb442ee1 | 2528 | |
2eeb0016 | 2529 | if (!ep->is_in || (ep->dev->quirks & PLX_2280)) |
3e76fdcb | 2530 | writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat); |
950ee4c8 GL |
2531 | else |
2532 | /* Added for 2282 */ | |
fae3c158 | 2533 | writel(t, &ep->regs->ep_stat); |
1da177e4 LT |
2534 | |
2535 | /* for ep0, monitor token irqs to catch data stage length errors | |
2536 | * and to synchronize on status. | |
2537 | * | |
2538 | * also, to defer reporting of protocol stalls ... here's where | |
2539 | * data or status first appears, handling stalls here should never | |
2540 | * cause trouble on the host side.. | |
2541 | * | |
2542 | * control requests could be slightly faster without token synch for | |
2543 | * status, but status can jam up that way. | |
2544 | */ | |
fae3c158 | 2545 | if (unlikely(ep->num == 0)) { |
1da177e4 LT |
2546 | if (ep->is_in) { |
2547 | /* status; stop NAKing */ | |
3e76fdcb | 2548 | if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) { |
1da177e4 LT |
2549 | if (ep->dev->protocol_stall) { |
2550 | ep->stopped = 1; | |
fae3c158 | 2551 | set_halt(ep); |
1da177e4 LT |
2552 | } |
2553 | if (!req) | |
fae3c158 | 2554 | allow_status(ep); |
1da177e4 LT |
2555 | mode = 2; |
2556 | /* reply to extra IN data tokens with a zlp */ | |
3e76fdcb | 2557 | } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) { |
1da177e4 LT |
2558 | if (ep->dev->protocol_stall) { |
2559 | ep->stopped = 1; | |
fae3c158 | 2560 | set_halt(ep); |
1da177e4 | 2561 | mode = 2; |
1f26e28d AS |
2562 | } else if (ep->responded && |
2563 | !req && !ep->stopped) | |
fae3c158 | 2564 | write_fifo(ep, NULL); |
1da177e4 LT |
2565 | } |
2566 | } else { | |
2567 | /* status; stop NAKing */ | |
3e76fdcb | 2568 | if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) { |
1da177e4 LT |
2569 | if (ep->dev->protocol_stall) { |
2570 | ep->stopped = 1; | |
fae3c158 | 2571 | set_halt(ep); |
1da177e4 LT |
2572 | } |
2573 | mode = 2; | |
2574 | /* an extra OUT token is an error */ | |
ae8e530a RR |
2575 | } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) && |
2576 | req && | |
2577 | req->req.actual == req->req.length) || | |
2578 | (ep->responded && !req)) { | |
1da177e4 | 2579 | ep->dev->protocol_stall = 1; |
fae3c158 | 2580 | set_halt(ep); |
1da177e4 LT |
2581 | ep->stopped = 1; |
2582 | if (req) | |
fae3c158 | 2583 | done(ep, req, -EOVERFLOW); |
1da177e4 LT |
2584 | req = NULL; |
2585 | } | |
2586 | } | |
2587 | } | |
2588 | ||
fae3c158 | 2589 | if (unlikely(!req)) |
1da177e4 LT |
2590 | return; |
2591 | ||
2592 | /* manual DMA queue advance after short OUT */ | |
fae3c158 | 2593 | if (likely(ep->dma)) { |
3e76fdcb | 2594 | if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) { |
1de2ebfb | 2595 | struct net2280_request *stuck_req = NULL; |
1da177e4 | 2596 | int stopped = ep->stopped; |
1de2ebfb JK |
2597 | int num_completed; |
2598 | int stuck = 0; | |
2599 | u32 count; | |
1da177e4 LT |
2600 | |
2601 | /* TRANSFERRED works around OUT_DONE erratum 0112. | |
2602 | * we expect (N <= maxpacket) bytes; host wrote M. | |
2603 | * iff (M < N) we won't ever see a DMA interrupt. | |
2604 | */ | |
2605 | ep->stopped = 1; | |
fae3c158 | 2606 | for (count = 0; ; t = readl(&ep->regs->ep_stat)) { |
1da177e4 LT |
2607 | |
2608 | /* any preceding dma transfers must finish. | |
2609 | * dma handles (M >= N), may empty the queue | |
2610 | */ | |
1de2ebfb | 2611 | num_completed = scan_dma_completions(ep); |
ae8e530a RR |
2612 | if (unlikely(list_empty(&ep->queue) || |
2613 | ep->out_overflow)) { | |
1da177e4 LT |
2614 | req = NULL; |
2615 | break; | |
2616 | } | |
fae3c158 | 2617 | req = list_entry(ep->queue.next, |
1da177e4 LT |
2618 | struct net2280_request, queue); |
2619 | ||
2620 | /* here either (M < N), a "real" short rx; | |
2621 | * or (M == N) and the queue didn't empty | |
2622 | */ | |
3e76fdcb | 2623 | if (likely(t & BIT(FIFO_EMPTY))) { |
fae3c158 | 2624 | count = readl(&ep->dma->dmacount); |
1da177e4 | 2625 | count &= DMA_BYTE_COUNT_MASK; |
fae3c158 | 2626 | if (readl(&ep->dma->dmadesc) |
1da177e4 LT |
2627 | != req->td_dma) |
2628 | req = NULL; | |
2629 | break; | |
2630 | } | |
1de2ebfb JK |
2631 | |
2632 | /* Escape loop if no dma transfers completed | |
2633 | * after few retries. | |
2634 | */ | |
2635 | if (num_completed == 0) { | |
2636 | if (stuck_req == req && | |
2637 | readl(&ep->dma->dmadesc) != | |
2638 | req->td_dma && stuck++ > 5) { | |
2639 | count = readl( | |
2640 | &ep->dma->dmacount); | |
2641 | count &= DMA_BYTE_COUNT_MASK; | |
2642 | req = NULL; | |
2643 | ep_dbg(ep->dev, "%s escape stuck %d, count %u\n", | |
2644 | ep->ep.name, stuck, | |
2645 | count); | |
2646 | break; | |
2647 | } else if (stuck_req != req) { | |
2648 | stuck_req = req; | |
2649 | stuck = 0; | |
2650 | } | |
2651 | } else { | |
2652 | stuck_req = NULL; | |
2653 | stuck = 0; | |
2654 | } | |
2655 | ||
1da177e4 LT |
2656 | udelay(1); |
2657 | } | |
2658 | ||
2659 | /* stop DMA, leave ep NAKing */ | |
3e76fdcb | 2660 | writel(BIT(DMA_ABORT), &ep->dma->dmastat); |
fae3c158 | 2661 | spin_stop_dma(ep->dma); |
1da177e4 | 2662 | |
fae3c158 | 2663 | if (likely(req)) { |
1da177e4 | 2664 | req->td->dmacount = 0; |
fae3c158 RR |
2665 | t = readl(&ep->regs->ep_avail); |
2666 | dma_done(ep, req, count, | |
901b3d75 DB |
2667 | (ep->out_overflow || t) |
2668 | ? -EOVERFLOW : 0); | |
1da177e4 LT |
2669 | } |
2670 | ||
2671 | /* also flush to prevent erratum 0106 trouble */ | |
ae8e530a RR |
2672 | if (unlikely(ep->out_overflow || |
2673 | (ep->dev->chiprev == 0x0100 && | |
2674 | ep->dev->gadget.speed | |
2675 | == USB_SPEED_FULL))) { | |
fae3c158 | 2676 | out_flush(ep); |
1da177e4 LT |
2677 | ep->out_overflow = 0; |
2678 | } | |
2679 | ||
2680 | /* (re)start dma if needed, stop NAKing */ | |
2681 | ep->stopped = stopped; | |
fae3c158 RR |
2682 | if (!list_empty(&ep->queue)) |
2683 | restart_dma(ep); | |
1da177e4 | 2684 | } else |
e56e69cc | 2685 | ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n", |
1da177e4 LT |
2686 | ep->ep.name, t); |
2687 | return; | |
2688 | ||
2689 | /* data packet(s) received (in the fifo, OUT) */ | |
3e76fdcb | 2690 | } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) { |
fae3c158 | 2691 | if (read_fifo(ep, req) && ep->num != 0) |
1da177e4 LT |
2692 | mode = 2; |
2693 | ||
2694 | /* data packet(s) transmitted (IN) */ | |
3e76fdcb | 2695 | } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) { |
1da177e4 LT |
2696 | unsigned len; |
2697 | ||
2698 | len = req->req.length - req->req.actual; | |
2699 | if (len > ep->ep.maxpacket) | |
2700 | len = ep->ep.maxpacket; | |
2701 | req->req.actual += len; | |
2702 | ||
2703 | /* if we wrote it all, we're usually done */ | |
fae3c158 RR |
2704 | /* send zlps until the status stage */ |
2705 | if ((req->req.actual == req->req.length) && | |
2706 | (!req->req.zero || len != ep->ep.maxpacket) && ep->num) | |
1da177e4 | 2707 | mode = 2; |
1da177e4 LT |
2708 | |
2709 | /* there was nothing to do ... */ | |
2710 | } else if (mode == 1) | |
2711 | return; | |
2712 | ||
2713 | /* done */ | |
2714 | if (mode == 2) { | |
2715 | /* stream endpoints often resubmit/unlink in completion */ | |
fae3c158 | 2716 | done(ep, req, 0); |
1da177e4 LT |
2717 | |
2718 | /* maybe advance queue to next request */ | |
2719 | if (ep->num == 0) { | |
2720 | /* NOTE: net2280 could let gadget driver start the | |
2721 | * status stage later. since not all controllers let | |
2722 | * them control that, the api doesn't (yet) allow it. | |
2723 | */ | |
2724 | if (!ep->stopped) | |
fae3c158 | 2725 | allow_status(ep); |
1da177e4 LT |
2726 | req = NULL; |
2727 | } else { | |
fae3c158 RR |
2728 | if (!list_empty(&ep->queue) && !ep->stopped) |
2729 | req = list_entry(ep->queue.next, | |
1da177e4 LT |
2730 | struct net2280_request, queue); |
2731 | else | |
2732 | req = NULL; | |
2733 | if (req && !ep->is_in) | |
fae3c158 | 2734 | stop_out_naking(ep); |
1da177e4 LT |
2735 | } |
2736 | } | |
2737 | ||
2738 | /* is there a buffer for the next packet? | |
2739 | * for best streaming performance, make sure there is one. | |
2740 | */ | |
2741 | if (req && !ep->stopped) { | |
2742 | ||
2743 | /* load IN fifo with next packet (may be zlp) */ | |
3e76fdcb | 2744 | if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) |
fae3c158 | 2745 | write_fifo(ep, &req->req); |
1da177e4 LT |
2746 | } |
2747 | } | |
2748 | ||
fae3c158 | 2749 | static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex) |
1da177e4 LT |
2750 | { |
2751 | struct net2280_ep *ep; | |
2752 | ||
2753 | if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) | |
fae3c158 RR |
2754 | return &dev->ep[0]; |
2755 | list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) { | |
1da177e4 LT |
2756 | u8 bEndpointAddress; |
2757 | ||
2758 | if (!ep->desc) | |
2759 | continue; | |
2760 | bEndpointAddress = ep->desc->bEndpointAddress; | |
2761 | if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) | |
2762 | continue; | |
2763 | if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f)) | |
2764 | return ep; | |
2765 | } | |
2766 | return NULL; | |
2767 | } | |
2768 | ||
adc82f77 RR |
2769 | static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r) |
2770 | { | |
2771 | u32 scratch, fsmvalue; | |
2772 | u32 ack_wait_timeout, state; | |
2773 | ||
2774 | /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */ | |
2775 | scratch = get_idx_reg(dev->regs, SCRATCH); | |
2776 | fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD); | |
2777 | scratch &= ~(0xf << DEFECT7374_FSM_FIELD); | |
2778 | ||
2779 | if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) && | |
2780 | (r.bRequestType & USB_DIR_IN))) | |
2781 | return; | |
2782 | ||
2783 | /* This is the first Control Read for this connection: */ | |
3e76fdcb | 2784 | if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) { |
adc82f77 RR |
2785 | /* |
2786 | * Connection is NOT SS: | |
2787 | * - Connection must be FS or HS. | |
2788 | * - This FSM state should allow workaround software to | |
2789 | * run after the next USB connection. | |
2790 | */ | |
2791 | scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ; | |
5517525e | 2792 | dev->bug7734_patched = 1; |
adc82f77 RR |
2793 | goto restore_data_eps; |
2794 | } | |
2795 | ||
2796 | /* Connection is SS: */ | |
2797 | for (ack_wait_timeout = 0; | |
2798 | ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS; | |
2799 | ack_wait_timeout++) { | |
2800 | ||
2801 | state = readl(&dev->plregs->pl_ep_status_1) | |
2802 | & (0xff << STATE); | |
2803 | if ((state >= (ACK_GOOD_NORMAL << STATE)) && | |
2804 | (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) { | |
2805 | scratch |= DEFECT7374_FSM_SS_CONTROL_READ; | |
5517525e | 2806 | dev->bug7734_patched = 1; |
adc82f77 RR |
2807 | break; |
2808 | } | |
2809 | ||
2810 | /* | |
2811 | * We have not yet received host's Data Phase ACK | |
2812 | * - Wait and try again. | |
2813 | */ | |
2814 | udelay(DEFECT_7374_PROCESSOR_WAIT_TIME); | |
2815 | ||
2816 | continue; | |
2817 | } | |
2818 | ||
2819 | ||
2820 | if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) { | |
e56e69cc | 2821 | ep_err(dev, "FAIL: Defect 7374 workaround waited but failed " |
adc82f77 | 2822 | "to detect SS host's data phase ACK."); |
e56e69cc | 2823 | ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16" |
adc82f77 RR |
2824 | "got 0x%2.2x.\n", state >> STATE); |
2825 | } else { | |
e56e69cc | 2826 | ep_warn(dev, "INFO: Defect 7374 workaround waited about\n" |
adc82f77 RR |
2827 | "%duSec for Control Read Data Phase ACK\n", |
2828 | DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout); | |
2829 | } | |
2830 | ||
2831 | restore_data_eps: | |
2832 | /* | |
2833 | * Restore data EPs to their pre-workaround settings (disabled, | |
2834 | * initialized, and other details). | |
2835 | */ | |
2836 | defect7374_disable_data_eps(dev); | |
2837 | ||
2838 | set_idx_reg(dev->regs, SCRATCH, scratch); | |
2839 | ||
2840 | return; | |
2841 | } | |
2842 | ||
e0cbb046 | 2843 | static void ep_clear_seqnum(struct net2280_ep *ep) |
adc82f77 RR |
2844 | { |
2845 | struct net2280 *dev = ep->dev; | |
2846 | u32 val; | |
2847 | static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 }; | |
2848 | ||
e0cbb046 RR |
2849 | val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f; |
2850 | val |= ep_pl[ep->num]; | |
2851 | writel(val, &dev->plregs->pl_ep_ctrl); | |
2852 | val |= BIT(SEQUENCE_NUMBER_RESET); | |
2853 | writel(val, &dev->plregs->pl_ep_ctrl); | |
adc82f77 | 2854 | |
e0cbb046 | 2855 | return; |
adc82f77 RR |
2856 | } |
2857 | ||
adc82f77 RR |
2858 | static void handle_stat0_irqs_superspeed(struct net2280 *dev, |
2859 | struct net2280_ep *ep, struct usb_ctrlrequest r) | |
2860 | { | |
2861 | int tmp = 0; | |
2862 | ||
2863 | #define w_value le16_to_cpu(r.wValue) | |
2864 | #define w_index le16_to_cpu(r.wIndex) | |
2865 | #define w_length le16_to_cpu(r.wLength) | |
2866 | ||
2867 | switch (r.bRequest) { | |
2868 | struct net2280_ep *e; | |
2869 | u16 status; | |
2870 | ||
2871 | case USB_REQ_SET_CONFIGURATION: | |
2872 | dev->addressed_state = !w_value; | |
2873 | goto usb3_delegate; | |
2874 | ||
2875 | case USB_REQ_GET_STATUS: | |
2876 | switch (r.bRequestType) { | |
2877 | case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE): | |
2878 | status = dev->wakeup_enable ? 0x02 : 0x00; | |
c8678d9f | 2879 | if (dev->gadget.is_selfpowered) |
3e76fdcb | 2880 | status |= BIT(0); |
adc82f77 RR |
2881 | status |= (dev->u1_enable << 2 | dev->u2_enable << 3 | |
2882 | dev->ltm_enable << 4); | |
2883 | writel(0, &dev->epregs[0].ep_irqenb); | |
2884 | set_fifo_bytecount(ep, sizeof(status)); | |
2885 | writel((__force u32) status, &dev->epregs[0].ep_data); | |
2886 | allow_status_338x(ep); | |
2887 | break; | |
2888 | ||
2889 | case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT): | |
2890 | e = get_ep_by_addr(dev, w_index); | |
2891 | if (!e) | |
2892 | goto do_stall3; | |
2893 | status = readl(&e->regs->ep_rsp) & | |
3e76fdcb | 2894 | BIT(CLEAR_ENDPOINT_HALT); |
adc82f77 RR |
2895 | writel(0, &dev->epregs[0].ep_irqenb); |
2896 | set_fifo_bytecount(ep, sizeof(status)); | |
2897 | writel((__force u32) status, &dev->epregs[0].ep_data); | |
2898 | allow_status_338x(ep); | |
2899 | break; | |
2900 | ||
2901 | default: | |
2902 | goto usb3_delegate; | |
2903 | } | |
2904 | break; | |
2905 | ||
2906 | case USB_REQ_CLEAR_FEATURE: | |
2907 | switch (r.bRequestType) { | |
2908 | case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE): | |
2909 | if (!dev->addressed_state) { | |
2910 | switch (w_value) { | |
2911 | case USB_DEVICE_U1_ENABLE: | |
2912 | dev->u1_enable = 0; | |
2913 | writel(readl(&dev->usb_ext->usbctl2) & | |
3e76fdcb | 2914 | ~BIT(U1_ENABLE), |
adc82f77 RR |
2915 | &dev->usb_ext->usbctl2); |
2916 | allow_status_338x(ep); | |
2917 | goto next_endpoints3; | |
2918 | ||
2919 | case USB_DEVICE_U2_ENABLE: | |
2920 | dev->u2_enable = 0; | |
2921 | writel(readl(&dev->usb_ext->usbctl2) & | |
3e76fdcb | 2922 | ~BIT(U2_ENABLE), |
adc82f77 RR |
2923 | &dev->usb_ext->usbctl2); |
2924 | allow_status_338x(ep); | |
2925 | goto next_endpoints3; | |
2926 | ||
2927 | case USB_DEVICE_LTM_ENABLE: | |
2928 | dev->ltm_enable = 0; | |
2929 | writel(readl(&dev->usb_ext->usbctl2) & | |
3e76fdcb | 2930 | ~BIT(LTM_ENABLE), |
adc82f77 RR |
2931 | &dev->usb_ext->usbctl2); |
2932 | allow_status_338x(ep); | |
2933 | goto next_endpoints3; | |
2934 | ||
2935 | default: | |
2936 | break; | |
2937 | } | |
2938 | } | |
2939 | if (w_value == USB_DEVICE_REMOTE_WAKEUP) { | |
2940 | dev->wakeup_enable = 0; | |
2941 | writel(readl(&dev->usb->usbctl) & | |
3e76fdcb | 2942 | ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE), |
adc82f77 RR |
2943 | &dev->usb->usbctl); |
2944 | allow_status_338x(ep); | |
2945 | break; | |
2946 | } | |
2947 | goto usb3_delegate; | |
2948 | ||
2949 | case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT): | |
2950 | e = get_ep_by_addr(dev, w_index); | |
2951 | if (!e) | |
2952 | goto do_stall3; | |
2953 | if (w_value != USB_ENDPOINT_HALT) | |
2954 | goto do_stall3; | |
e56e69cc | 2955 | ep_vdbg(dev, "%s clear halt\n", e->ep.name); |
e0cbb046 RR |
2956 | /* |
2957 | * Workaround for SS SeqNum not cleared via | |
2958 | * Endpoint Halt (Clear) bit. select endpoint | |
2959 | */ | |
2960 | ep_clear_seqnum(e); | |
2961 | clear_halt(e); | |
adc82f77 RR |
2962 | if (!list_empty(&e->queue) && e->td_dma) |
2963 | restart_dma(e); | |
2964 | allow_status(ep); | |
2965 | ep->stopped = 1; | |
2966 | break; | |
2967 | ||
2968 | default: | |
2969 | goto usb3_delegate; | |
2970 | } | |
2971 | break; | |
2972 | case USB_REQ_SET_FEATURE: | |
2973 | switch (r.bRequestType) { | |
2974 | case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE): | |
2975 | if (!dev->addressed_state) { | |
2976 | switch (w_value) { | |
2977 | case USB_DEVICE_U1_ENABLE: | |
2978 | dev->u1_enable = 1; | |
2979 | writel(readl(&dev->usb_ext->usbctl2) | | |
3e76fdcb | 2980 | BIT(U1_ENABLE), |
adc82f77 RR |
2981 | &dev->usb_ext->usbctl2); |
2982 | allow_status_338x(ep); | |
2983 | goto next_endpoints3; | |
2984 | ||
2985 | case USB_DEVICE_U2_ENABLE: | |
2986 | dev->u2_enable = 1; | |
2987 | writel(readl(&dev->usb_ext->usbctl2) | | |
3e76fdcb | 2988 | BIT(U2_ENABLE), |
adc82f77 RR |
2989 | &dev->usb_ext->usbctl2); |
2990 | allow_status_338x(ep); | |
2991 | goto next_endpoints3; | |
2992 | ||
2993 | case USB_DEVICE_LTM_ENABLE: | |
2994 | dev->ltm_enable = 1; | |
2995 | writel(readl(&dev->usb_ext->usbctl2) | | |
3e76fdcb | 2996 | BIT(LTM_ENABLE), |
adc82f77 RR |
2997 | &dev->usb_ext->usbctl2); |
2998 | allow_status_338x(ep); | |
2999 | goto next_endpoints3; | |
3000 | default: | |
3001 | break; | |
3002 | } | |
3003 | } | |
3004 | ||
3005 | if (w_value == USB_DEVICE_REMOTE_WAKEUP) { | |
3006 | dev->wakeup_enable = 1; | |
3007 | writel(readl(&dev->usb->usbctl) | | |
3e76fdcb | 3008 | BIT(DEVICE_REMOTE_WAKEUP_ENABLE), |
adc82f77 RR |
3009 | &dev->usb->usbctl); |
3010 | allow_status_338x(ep); | |
3011 | break; | |
3012 | } | |
3013 | goto usb3_delegate; | |
3014 | ||
3015 | case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT): | |
3016 | e = get_ep_by_addr(dev, w_index); | |
3017 | if (!e || (w_value != USB_ENDPOINT_HALT)) | |
3018 | goto do_stall3; | |
cf8b1cde RR |
3019 | ep->stopped = 1; |
3020 | if (ep->num == 0) | |
3021 | ep->dev->protocol_stall = 1; | |
3022 | else { | |
3023 | if (ep->dma) | |
e721c457 | 3024 | abort_dma(ep); |
e0cbb046 | 3025 | set_halt(ep); |
cf8b1cde | 3026 | } |
adc82f77 RR |
3027 | allow_status_338x(ep); |
3028 | break; | |
3029 | ||
3030 | default: | |
3031 | goto usb3_delegate; | |
3032 | } | |
3033 | ||
3034 | break; | |
3035 | default: | |
3036 | ||
3037 | usb3_delegate: | |
e56e69cc | 3038 | ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n", |
adc82f77 RR |
3039 | r.bRequestType, r.bRequest, |
3040 | w_value, w_index, w_length, | |
3041 | readl(&ep->cfg->ep_cfg)); | |
3042 | ||
3043 | ep->responded = 0; | |
3044 | spin_unlock(&dev->lock); | |
3045 | tmp = dev->driver->setup(&dev->gadget, &r); | |
3046 | spin_lock(&dev->lock); | |
3047 | } | |
3048 | do_stall3: | |
3049 | if (tmp < 0) { | |
e56e69cc | 3050 | ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n", |
adc82f77 RR |
3051 | r.bRequestType, r.bRequest, tmp); |
3052 | dev->protocol_stall = 1; | |
3053 | /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */ | |
e0cbb046 | 3054 | set_halt(ep); |
adc82f77 RR |
3055 | } |
3056 | ||
3057 | next_endpoints3: | |
3058 | ||
3059 | #undef w_value | |
3060 | #undef w_index | |
3061 | #undef w_length | |
3062 | ||
3063 | return; | |
3064 | } | |
3065 | ||
a09e23f5 MYK |
3066 | static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0) |
3067 | { | |
3068 | u32 index; | |
3069 | u32 bit; | |
3070 | ||
3071 | for (index = 0; index < ARRAY_SIZE(ep_bit); index++) { | |
3072 | bit = BIT(ep_bit[index]); | |
3073 | ||
3074 | if (!stat0) | |
3075 | break; | |
3076 | ||
3077 | if (!(stat0 & bit)) | |
3078 | continue; | |
3079 | ||
3080 | stat0 &= ~bit; | |
3081 | ||
3082 | handle_ep_small(&dev->ep[index]); | |
3083 | } | |
3084 | } | |
3085 | ||
fae3c158 | 3086 | static void handle_stat0_irqs(struct net2280 *dev, u32 stat) |
1da177e4 LT |
3087 | { |
3088 | struct net2280_ep *ep; | |
3089 | u32 num, scratch; | |
3090 | ||
3091 | /* most of these don't need individual acks */ | |
3e76fdcb | 3092 | stat &= ~BIT(INTA_ASSERTED); |
1da177e4 LT |
3093 | if (!stat) |
3094 | return; | |
e56e69cc | 3095 | /* ep_dbg(dev, "irqstat0 %04x\n", stat); */ |
1da177e4 LT |
3096 | |
3097 | /* starting a control request? */ | |
3e76fdcb | 3098 | if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) { |
1da177e4 | 3099 | union { |
fae3c158 | 3100 | u32 raw[2]; |
1da177e4 LT |
3101 | struct usb_ctrlrequest r; |
3102 | } u; | |
950ee4c8 | 3103 | int tmp; |
1da177e4 LT |
3104 | struct net2280_request *req; |
3105 | ||
3106 | if (dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
adc82f77 | 3107 | u32 val = readl(&dev->usb->usbstat); |
3e76fdcb | 3108 | if (val & BIT(SUPER_SPEED)) { |
adc82f77 RR |
3109 | dev->gadget.speed = USB_SPEED_SUPER; |
3110 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, | |
3111 | EP0_SS_MAX_PACKET_SIZE); | |
3e76fdcb | 3112 | } else if (val & BIT(HIGH_SPEED)) { |
1da177e4 | 3113 | dev->gadget.speed = USB_SPEED_HIGH; |
adc82f77 RR |
3114 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, |
3115 | EP0_HS_MAX_PACKET_SIZE); | |
3116 | } else { | |
1da177e4 | 3117 | dev->gadget.speed = USB_SPEED_FULL; |
adc82f77 RR |
3118 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, |
3119 | EP0_HS_MAX_PACKET_SIZE); | |
3120 | } | |
fae3c158 | 3121 | net2280_led_speed(dev, dev->gadget.speed); |
e56e69cc | 3122 | ep_dbg(dev, "%s\n", |
fae3c158 | 3123 | usb_speed_string(dev->gadget.speed)); |
1da177e4 LT |
3124 | } |
3125 | ||
fae3c158 | 3126 | ep = &dev->ep[0]; |
1da177e4 LT |
3127 | ep->irqs++; |
3128 | ||
3129 | /* make sure any leftover request state is cleared */ | |
3e76fdcb | 3130 | stat &= ~BIT(ENDPOINT_0_INTERRUPT); |
fae3c158 RR |
3131 | while (!list_empty(&ep->queue)) { |
3132 | req = list_entry(ep->queue.next, | |
1da177e4 | 3133 | struct net2280_request, queue); |
fae3c158 | 3134 | done(ep, req, (req->req.actual == req->req.length) |
1da177e4 LT |
3135 | ? 0 : -EPROTO); |
3136 | } | |
3137 | ep->stopped = 0; | |
3138 | dev->protocol_stall = 0; | |
5185c913 | 3139 | if (!(dev->quirks & PLX_PCIE)) { |
2eeb0016 | 3140 | if (ep->dev->quirks & PLX_2280) |
3e76fdcb RR |
3141 | tmp = BIT(FIFO_OVERFLOW) | |
3142 | BIT(FIFO_UNDERFLOW); | |
adc82f77 RR |
3143 | else |
3144 | tmp = 0; | |
3145 | ||
3e76fdcb RR |
3146 | writel(tmp | BIT(TIMEOUT) | |
3147 | BIT(USB_STALL_SENT) | | |
3148 | BIT(USB_IN_NAK_SENT) | | |
3149 | BIT(USB_IN_ACK_RCVD) | | |
3150 | BIT(USB_OUT_PING_NAK_SENT) | | |
3151 | BIT(USB_OUT_ACK_SENT) | | |
3152 | BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) | | |
3153 | BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) | | |
3154 | BIT(DATA_PACKET_RECEIVED_INTERRUPT) | | |
3155 | BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) | | |
3156 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
ae8e530a RR |
3157 | BIT(DATA_IN_TOKEN_INTERRUPT), |
3158 | &ep->regs->ep_stat); | |
adc82f77 RR |
3159 | } |
3160 | u.raw[0] = readl(&dev->usb->setup0123); | |
3161 | u.raw[1] = readl(&dev->usb->setup4567); | |
901b3d75 | 3162 | |
fae3c158 RR |
3163 | cpu_to_le32s(&u.raw[0]); |
3164 | cpu_to_le32s(&u.raw[1]); | |
1da177e4 | 3165 | |
5185c913 | 3166 | if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched) |
adc82f77 RR |
3167 | defect7374_workaround(dev, u.r); |
3168 | ||
950ee4c8 GL |
3169 | tmp = 0; |
3170 | ||
01ee7d70 DB |
3171 | #define w_value le16_to_cpu(u.r.wValue) |
3172 | #define w_index le16_to_cpu(u.r.wIndex) | |
3173 | #define w_length le16_to_cpu(u.r.wLength) | |
1da177e4 LT |
3174 | |
3175 | /* ack the irq */ | |
3e76fdcb RR |
3176 | writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0); |
3177 | stat ^= BIT(SETUP_PACKET_INTERRUPT); | |
1da177e4 LT |
3178 | |
3179 | /* watch control traffic at the token level, and force | |
3180 | * synchronization before letting the status stage happen. | |
3181 | * FIXME ignore tokens we'll NAK, until driver responds. | |
3182 | * that'll mean a lot less irqs for some drivers. | |
3183 | */ | |
3184 | ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0; | |
3185 | if (ep->is_in) { | |
3e76fdcb RR |
3186 | scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) | |
3187 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
3188 | BIT(DATA_IN_TOKEN_INTERRUPT); | |
fae3c158 | 3189 | stop_out_naking(ep); |
1da177e4 | 3190 | } else |
3e76fdcb RR |
3191 | scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) | |
3192 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
3193 | BIT(DATA_IN_TOKEN_INTERRUPT); | |
fae3c158 | 3194 | writel(scratch, &dev->epregs[0].ep_irqenb); |
1da177e4 LT |
3195 | |
3196 | /* we made the hardware handle most lowlevel requests; | |
3197 | * everything else goes uplevel to the gadget code. | |
3198 | */ | |
1f26e28d | 3199 | ep->responded = 1; |
adc82f77 RR |
3200 | |
3201 | if (dev->gadget.speed == USB_SPEED_SUPER) { | |
3202 | handle_stat0_irqs_superspeed(dev, ep, u.r); | |
3203 | goto next_endpoints; | |
3204 | } | |
3205 | ||
1da177e4 LT |
3206 | switch (u.r.bRequest) { |
3207 | case USB_REQ_GET_STATUS: { | |
3208 | struct net2280_ep *e; | |
320f3459 | 3209 | __le32 status; |
1da177e4 LT |
3210 | |
3211 | /* hw handles device and interface status */ | |
3212 | if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT)) | |
3213 | goto delegate; | |
fae3c158 RR |
3214 | e = get_ep_by_addr(dev, w_index); |
3215 | if (!e || w_length > 2) | |
1da177e4 LT |
3216 | goto do_stall; |
3217 | ||
3e76fdcb | 3218 | if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT)) |
fae3c158 | 3219 | status = cpu_to_le32(1); |
1da177e4 | 3220 | else |
fae3c158 | 3221 | status = cpu_to_le32(0); |
1da177e4 LT |
3222 | |
3223 | /* don't bother with a request object! */ | |
fae3c158 RR |
3224 | writel(0, &dev->epregs[0].ep_irqenb); |
3225 | set_fifo_bytecount(ep, w_length); | |
3226 | writel((__force u32)status, &dev->epregs[0].ep_data); | |
3227 | allow_status(ep); | |
e56e69cc | 3228 | ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status); |
1da177e4 LT |
3229 | goto next_endpoints; |
3230 | } | |
3231 | break; | |
3232 | case USB_REQ_CLEAR_FEATURE: { | |
3233 | struct net2280_ep *e; | |
3234 | ||
3235 | /* hw handles device features */ | |
3236 | if (u.r.bRequestType != USB_RECIP_ENDPOINT) | |
3237 | goto delegate; | |
ae8e530a | 3238 | if (w_value != USB_ENDPOINT_HALT || w_length != 0) |
1da177e4 | 3239 | goto do_stall; |
fae3c158 RR |
3240 | e = get_ep_by_addr(dev, w_index); |
3241 | if (!e) | |
1da177e4 | 3242 | goto do_stall; |
8066134f | 3243 | if (e->wedged) { |
e56e69cc | 3244 | ep_vdbg(dev, "%s wedged, halt not cleared\n", |
8066134f AS |
3245 | ep->ep.name); |
3246 | } else { | |
e56e69cc | 3247 | ep_vdbg(dev, "%s clear halt\n", e->ep.name); |
8066134f | 3248 | clear_halt(e); |
5185c913 | 3249 | if ((ep->dev->quirks & PLX_PCIE) && |
adc82f77 RR |
3250 | !list_empty(&e->queue) && e->td_dma) |
3251 | restart_dma(e); | |
8066134f | 3252 | } |
fae3c158 | 3253 | allow_status(ep); |
1da177e4 LT |
3254 | goto next_endpoints; |
3255 | } | |
3256 | break; | |
3257 | case USB_REQ_SET_FEATURE: { | |
3258 | struct net2280_ep *e; | |
3259 | ||
3260 | /* hw handles device features */ | |
3261 | if (u.r.bRequestType != USB_RECIP_ENDPOINT) | |
3262 | goto delegate; | |
ae8e530a | 3263 | if (w_value != USB_ENDPOINT_HALT || w_length != 0) |
1da177e4 | 3264 | goto do_stall; |
fae3c158 RR |
3265 | e = get_ep_by_addr(dev, w_index); |
3266 | if (!e) | |
1da177e4 | 3267 | goto do_stall; |
8066134f AS |
3268 | if (e->ep.name == ep0name) |
3269 | goto do_stall; | |
fae3c158 | 3270 | set_halt(e); |
5185c913 | 3271 | if ((dev->quirks & PLX_PCIE) && e->dma) |
adc82f77 | 3272 | abort_dma(e); |
fae3c158 | 3273 | allow_status(ep); |
e56e69cc | 3274 | ep_vdbg(dev, "%s set halt\n", ep->ep.name); |
1da177e4 LT |
3275 | goto next_endpoints; |
3276 | } | |
3277 | break; | |
3278 | default: | |
3279 | delegate: | |
e56e69cc | 3280 | ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x " |
1da177e4 LT |
3281 | "ep_cfg %08x\n", |
3282 | u.r.bRequestType, u.r.bRequest, | |
320f3459 | 3283 | w_value, w_index, w_length, |
adc82f77 | 3284 | readl(&ep->cfg->ep_cfg)); |
1f26e28d | 3285 | ep->responded = 0; |
fae3c158 RR |
3286 | spin_unlock(&dev->lock); |
3287 | tmp = dev->driver->setup(&dev->gadget, &u.r); | |
3288 | spin_lock(&dev->lock); | |
1da177e4 LT |
3289 | } |
3290 | ||
3291 | /* stall ep0 on error */ | |
3292 | if (tmp < 0) { | |
3293 | do_stall: | |
e56e69cc | 3294 | ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n", |
1da177e4 LT |
3295 | u.r.bRequestType, u.r.bRequest, tmp); |
3296 | dev->protocol_stall = 1; | |
3297 | } | |
3298 | ||
3299 | /* some in/out token irq should follow; maybe stall then. | |
3300 | * driver must queue a request (even zlp) or halt ep0 | |
3301 | * before the host times out. | |
3302 | */ | |
3303 | } | |
3304 | ||
320f3459 DB |
3305 | #undef w_value |
3306 | #undef w_index | |
3307 | #undef w_length | |
3308 | ||
1da177e4 | 3309 | next_endpoints: |
5185c913 | 3310 | if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) { |
a09e23f5 MYK |
3311 | u32 mask = (BIT(ENDPOINT_0_INTERRUPT) | |
3312 | USB3380_IRQSTAT0_EP_INTR_MASK_IN | | |
3313 | USB3380_IRQSTAT0_EP_INTR_MASK_OUT); | |
3314 | ||
3315 | if (stat & mask) { | |
3316 | usb338x_handle_ep_intr(dev, stat & mask); | |
3317 | stat &= ~mask; | |
3318 | } | |
3319 | } else { | |
3320 | /* endpoint data irq ? */ | |
3321 | scratch = stat & 0x7f; | |
3322 | stat &= ~0x7f; | |
3323 | for (num = 0; scratch; num++) { | |
3324 | u32 t; | |
3325 | ||
3326 | /* do this endpoint's FIFO and queue need tending? */ | |
3327 | t = BIT(num); | |
3328 | if ((scratch & t) == 0) | |
3329 | continue; | |
3330 | scratch ^= t; | |
1da177e4 | 3331 | |
a09e23f5 MYK |
3332 | ep = &dev->ep[num]; |
3333 | handle_ep_small(ep); | |
3334 | } | |
1da177e4 LT |
3335 | } |
3336 | ||
3337 | if (stat) | |
e56e69cc | 3338 | ep_dbg(dev, "unhandled irqstat0 %08x\n", stat); |
1da177e4 LT |
3339 | } |
3340 | ||
3e76fdcb RR |
3341 | #define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \ |
3342 | BIT(DMA_C_INTERRUPT) | \ | |
3343 | BIT(DMA_B_INTERRUPT) | \ | |
3344 | BIT(DMA_A_INTERRUPT)) | |
1da177e4 | 3345 | #define PCI_ERROR_INTERRUPTS ( \ |
3e76fdcb RR |
3346 | BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \ |
3347 | BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \ | |
3348 | BIT(PCI_RETRY_ABORT_INTERRUPT)) | |
1da177e4 | 3349 | |
fae3c158 | 3350 | static void handle_stat1_irqs(struct net2280 *dev, u32 stat) |
ccf5fb69 FB |
3351 | __releases(dev->lock) |
3352 | __acquires(dev->lock) | |
1da177e4 LT |
3353 | { |
3354 | struct net2280_ep *ep; | |
3355 | u32 tmp, num, mask, scratch; | |
3356 | ||
3357 | /* after disconnect there's nothing else to do! */ | |
3e76fdcb RR |
3358 | tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT); |
3359 | mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED); | |
1da177e4 LT |
3360 | |
3361 | /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set. | |
fb914ebf | 3362 | * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and |
901b3d75 | 3363 | * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT |
1da177e4 LT |
3364 | * only indicates a change in the reset state). |
3365 | */ | |
3366 | if (stat & tmp) { | |
b611e424 AS |
3367 | bool reset = false; |
3368 | bool disconnect = false; | |
3369 | ||
3370 | /* | |
3371 | * Ignore disconnects and resets if the speed hasn't been set. | |
3372 | * VBUS can bounce and there's always an initial reset. | |
3373 | */ | |
fae3c158 | 3374 | writel(tmp, &dev->regs->irqstat1); |
b611e424 AS |
3375 | if (dev->gadget.speed != USB_SPEED_UNKNOWN) { |
3376 | if ((stat & BIT(VBUS_INTERRUPT)) && | |
3377 | (readl(&dev->usb->usbctl) & | |
3378 | BIT(VBUS_PIN)) == 0) { | |
3379 | disconnect = true; | |
3380 | ep_dbg(dev, "disconnect %s\n", | |
3381 | dev->driver->driver.name); | |
3382 | } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) && | |
3383 | (readl(&dev->usb->usbstat) & mask) | |
3384 | == 0) { | |
3385 | reset = true; | |
3386 | ep_dbg(dev, "reset %s\n", | |
3387 | dev->driver->driver.name); | |
3388 | } | |
3389 | ||
3390 | if (disconnect || reset) { | |
3391 | stop_activity(dev, dev->driver); | |
3392 | ep0_start(dev); | |
3393 | spin_unlock(&dev->lock); | |
3394 | if (reset) | |
3395 | usb_gadget_udc_reset | |
3396 | (&dev->gadget, dev->driver); | |
3397 | else | |
3398 | (dev->driver->disconnect) | |
3399 | (&dev->gadget); | |
3400 | spin_lock(&dev->lock); | |
3401 | return; | |
3402 | } | |
1da177e4 LT |
3403 | } |
3404 | stat &= ~tmp; | |
3405 | ||
3406 | /* vBUS can bounce ... one of many reasons to ignore the | |
3407 | * notion of hotplug events on bus connect/disconnect! | |
3408 | */ | |
3409 | if (!stat) | |
3410 | return; | |
3411 | } | |
3412 | ||
3413 | /* NOTE: chip stays in PCI D0 state for now, but it could | |
3414 | * enter D1 to save more power | |
3415 | */ | |
3e76fdcb | 3416 | tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT); |
1da177e4 | 3417 | if (stat & tmp) { |
fae3c158 | 3418 | writel(tmp, &dev->regs->irqstat1); |
3e76fdcb | 3419 | if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) { |
1da177e4 | 3420 | if (dev->driver->suspend) |
fae3c158 | 3421 | dev->driver->suspend(&dev->gadget); |
1da177e4 | 3422 | if (!enable_suspend) |
3e76fdcb | 3423 | stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT); |
1da177e4 LT |
3424 | } else { |
3425 | if (dev->driver->resume) | |
fae3c158 | 3426 | dev->driver->resume(&dev->gadget); |
1da177e4 LT |
3427 | /* at high speed, note erratum 0133 */ |
3428 | } | |
3429 | stat &= ~tmp; | |
3430 | } | |
3431 | ||
3432 | /* clear any other status/irqs */ | |
3433 | if (stat) | |
fae3c158 | 3434 | writel(stat, &dev->regs->irqstat1); |
1da177e4 LT |
3435 | |
3436 | /* some status we can just ignore */ | |
2eeb0016 | 3437 | if (dev->quirks & PLX_2280) |
3e76fdcb RR |
3438 | stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) | |
3439 | BIT(SUSPEND_REQUEST_INTERRUPT) | | |
3440 | BIT(RESUME_INTERRUPT) | | |
3441 | BIT(SOF_INTERRUPT)); | |
950ee4c8 | 3442 | else |
3e76fdcb RR |
3443 | stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) | |
3444 | BIT(RESUME_INTERRUPT) | | |
3445 | BIT(SOF_DOWN_INTERRUPT) | | |
3446 | BIT(SOF_INTERRUPT)); | |
950ee4c8 | 3447 | |
1da177e4 LT |
3448 | if (!stat) |
3449 | return; | |
e56e69cc | 3450 | /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/ |
1da177e4 LT |
3451 | |
3452 | /* DMA status, for ep-{a,b,c,d} */ | |
3453 | scratch = stat & DMA_INTERRUPTS; | |
3454 | stat &= ~DMA_INTERRUPTS; | |
3455 | scratch >>= 9; | |
3456 | for (num = 0; scratch; num++) { | |
3457 | struct net2280_dma_regs __iomem *dma; | |
3458 | ||
3e76fdcb | 3459 | tmp = BIT(num); |
1da177e4 LT |
3460 | if ((tmp & scratch) == 0) |
3461 | continue; | |
3462 | scratch ^= tmp; | |
3463 | ||
fae3c158 | 3464 | ep = &dev->ep[num + 1]; |
1da177e4 LT |
3465 | dma = ep->dma; |
3466 | ||
3467 | if (!dma) | |
3468 | continue; | |
3469 | ||
3470 | /* clear ep's dma status */ | |
fae3c158 RR |
3471 | tmp = readl(&dma->dmastat); |
3472 | writel(tmp, &dma->dmastat); | |
1da177e4 | 3473 | |
adc82f77 | 3474 | /* dma sync*/ |
5185c913 | 3475 | if (dev->quirks & PLX_PCIE) { |
adc82f77 RR |
3476 | u32 r_dmacount = readl(&dma->dmacount); |
3477 | if (!ep->is_in && (r_dmacount & 0x00FFFFFF) && | |
3e76fdcb | 3478 | (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) |
adc82f77 RR |
3479 | continue; |
3480 | } | |
3481 | ||
90664198 RR |
3482 | if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) { |
3483 | ep_dbg(ep->dev, "%s no xact done? %08x\n", | |
3484 | ep->ep.name, tmp); | |
3485 | continue; | |
1da177e4 | 3486 | } |
90664198 | 3487 | stop_dma(ep->dma); |
1da177e4 LT |
3488 | |
3489 | /* OUT transfers terminate when the data from the | |
3490 | * host is in our memory. Process whatever's done. | |
3491 | * On this path, we know transfer's last packet wasn't | |
3492 | * less than req->length. NAK_OUT_PACKETS may be set, | |
3493 | * or the FIFO may already be holding new packets. | |
3494 | * | |
3495 | * IN transfers can linger in the FIFO for a very | |
3496 | * long time ... we ignore that for now, accounting | |
3497 | * precisely (like PIO does) needs per-packet irqs | |
3498 | */ | |
fae3c158 | 3499 | scan_dma_completions(ep); |
1da177e4 LT |
3500 | |
3501 | /* disable dma on inactive queues; else maybe restart */ | |
90664198 | 3502 | if (!list_empty(&ep->queue)) { |
fae3c158 | 3503 | tmp = readl(&dma->dmactl); |
90664198 | 3504 | restart_dma(ep); |
1da177e4 LT |
3505 | } |
3506 | ep->irqs++; | |
3507 | } | |
3508 | ||
3509 | /* NOTE: there are other PCI errors we might usefully notice. | |
3510 | * if they appear very often, here's where to try recovering. | |
3511 | */ | |
3512 | if (stat & PCI_ERROR_INTERRUPTS) { | |
e56e69cc | 3513 | ep_err(dev, "pci dma error; stat %08x\n", stat); |
1da177e4 LT |
3514 | stat &= ~PCI_ERROR_INTERRUPTS; |
3515 | /* these are fatal errors, but "maybe" they won't | |
3516 | * happen again ... | |
3517 | */ | |
fae3c158 RR |
3518 | stop_activity(dev, dev->driver); |
3519 | ep0_start(dev); | |
1da177e4 LT |
3520 | stat = 0; |
3521 | } | |
3522 | ||
3523 | if (stat) | |
e56e69cc | 3524 | ep_dbg(dev, "unhandled irqstat1 %08x\n", stat); |
1da177e4 LT |
3525 | } |
3526 | ||
fae3c158 | 3527 | static irqreturn_t net2280_irq(int irq, void *_dev) |
1da177e4 LT |
3528 | { |
3529 | struct net2280 *dev = _dev; | |
3530 | ||
658ad5e0 | 3531 | /* shared interrupt, not ours */ |
2eeb0016 | 3532 | if ((dev->quirks & PLX_LEGACY) && |
3e76fdcb | 3533 | (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED)))) |
658ad5e0 AS |
3534 | return IRQ_NONE; |
3535 | ||
fae3c158 | 3536 | spin_lock(&dev->lock); |
1da177e4 LT |
3537 | |
3538 | /* handle disconnect, dma, and more */ | |
fae3c158 | 3539 | handle_stat1_irqs(dev, readl(&dev->regs->irqstat1)); |
1da177e4 LT |
3540 | |
3541 | /* control requests and PIO */ | |
fae3c158 | 3542 | handle_stat0_irqs(dev, readl(&dev->regs->irqstat0)); |
1da177e4 | 3543 | |
5185c913 | 3544 | if (dev->quirks & PLX_PCIE) { |
adc82f77 RR |
3545 | /* re-enable interrupt to trigger any possible new interrupt */ |
3546 | u32 pciirqenb1 = readl(&dev->regs->pciirqenb1); | |
3547 | writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1); | |
3548 | writel(pciirqenb1, &dev->regs->pciirqenb1); | |
3549 | } | |
3550 | ||
fae3c158 | 3551 | spin_unlock(&dev->lock); |
1da177e4 LT |
3552 | |
3553 | return IRQ_HANDLED; | |
3554 | } | |
3555 | ||
3556 | /*-------------------------------------------------------------------------*/ | |
3557 | ||
fae3c158 | 3558 | static void gadget_release(struct device *_dev) |
1da177e4 | 3559 | { |
fae3c158 | 3560 | struct net2280 *dev = dev_get_drvdata(_dev); |
1da177e4 | 3561 | |
fae3c158 | 3562 | kfree(dev); |
1da177e4 LT |
3563 | } |
3564 | ||
3565 | /* tear down the binding between this driver and the pci device */ | |
3566 | ||
fae3c158 | 3567 | static void net2280_remove(struct pci_dev *pdev) |
1da177e4 | 3568 | { |
fae3c158 | 3569 | struct net2280 *dev = pci_get_drvdata(pdev); |
1da177e4 | 3570 | |
0f91349b SAS |
3571 | usb_del_gadget_udc(&dev->gadget); |
3572 | ||
6bea476c | 3573 | BUG_ON(dev->driver); |
1da177e4 LT |
3574 | |
3575 | /* then clean up the resources we allocated during probe() */ | |
fae3c158 | 3576 | net2280_led_shutdown(dev); |
1da177e4 LT |
3577 | if (dev->requests) { |
3578 | int i; | |
3579 | for (i = 1; i < 5; i++) { | |
fae3c158 | 3580 | if (!dev->ep[i].dummy) |
1da177e4 | 3581 | continue; |
fae3c158 RR |
3582 | pci_pool_free(dev->requests, dev->ep[i].dummy, |
3583 | dev->ep[i].td_dma); | |
1da177e4 | 3584 | } |
fae3c158 | 3585 | pci_pool_destroy(dev->requests); |
1da177e4 LT |
3586 | } |
3587 | if (dev->got_irq) | |
fae3c158 | 3588 | free_irq(pdev->irq, dev); |
5185c913 | 3589 | if (dev->quirks & PLX_PCIE) |
adc82f77 | 3590 | pci_disable_msi(pdev); |
1da177e4 | 3591 | if (dev->regs) |
fae3c158 | 3592 | iounmap(dev->regs); |
1da177e4 | 3593 | if (dev->region) |
fae3c158 RR |
3594 | release_mem_region(pci_resource_start(pdev, 0), |
3595 | pci_resource_len(pdev, 0)); | |
1da177e4 | 3596 | if (dev->enabled) |
fae3c158 RR |
3597 | pci_disable_device(pdev); |
3598 | device_remove_file(&pdev->dev, &dev_attr_registers); | |
1da177e4 | 3599 | |
e56e69cc | 3600 | ep_info(dev, "unbind\n"); |
1da177e4 LT |
3601 | } |
3602 | ||
3603 | /* wrap this driver around the specified device, but | |
3604 | * don't respond over USB until a gadget driver binds to us. | |
3605 | */ | |
3606 | ||
fae3c158 | 3607 | static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
1da177e4 LT |
3608 | { |
3609 | struct net2280 *dev; | |
3610 | unsigned long resource, len; | |
3611 | void __iomem *base = NULL; | |
3612 | int retval, i; | |
1da177e4 | 3613 | |
1da177e4 | 3614 | /* alloc, and start init */ |
fae3c158 RR |
3615 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); |
3616 | if (dev == NULL) { | |
1da177e4 LT |
3617 | retval = -ENOMEM; |
3618 | goto done; | |
3619 | } | |
3620 | ||
fae3c158 RR |
3621 | pci_set_drvdata(pdev, dev); |
3622 | spin_lock_init(&dev->lock); | |
2eeb0016 | 3623 | dev->quirks = id->driver_data; |
1da177e4 LT |
3624 | dev->pdev = pdev; |
3625 | dev->gadget.ops = &net2280_ops; | |
2eeb0016 | 3626 | dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ? |
adc82f77 | 3627 | USB_SPEED_SUPER : USB_SPEED_HIGH; |
1da177e4 LT |
3628 | |
3629 | /* the "gadget" abstracts/virtualizes the controller */ | |
1da177e4 LT |
3630 | dev->gadget.name = driver_name; |
3631 | ||
3632 | /* now all the pci goodies ... */ | |
fae3c158 RR |
3633 | if (pci_enable_device(pdev) < 0) { |
3634 | retval = -ENODEV; | |
1da177e4 LT |
3635 | goto done; |
3636 | } | |
3637 | dev->enabled = 1; | |
3638 | ||
3639 | /* BAR 0 holds all the registers | |
3640 | * BAR 1 is 8051 memory; unused here (note erratum 0103) | |
3641 | * BAR 2 is fifo memory; unused here | |
3642 | */ | |
fae3c158 RR |
3643 | resource = pci_resource_start(pdev, 0); |
3644 | len = pci_resource_len(pdev, 0); | |
3645 | if (!request_mem_region(resource, len, driver_name)) { | |
e56e69cc | 3646 | ep_dbg(dev, "controller already in use\n"); |
1da177e4 LT |
3647 | retval = -EBUSY; |
3648 | goto done; | |
3649 | } | |
3650 | dev->region = 1; | |
3651 | ||
901b3d75 DB |
3652 | /* FIXME provide firmware download interface to put |
3653 | * 8051 code into the chip, e.g. to turn on PCI PM. | |
3654 | */ | |
3655 | ||
fae3c158 | 3656 | base = ioremap_nocache(resource, len); |
1da177e4 | 3657 | if (base == NULL) { |
e56e69cc | 3658 | ep_dbg(dev, "can't map memory\n"); |
1da177e4 LT |
3659 | retval = -EFAULT; |
3660 | goto done; | |
3661 | } | |
3662 | dev->regs = (struct net2280_regs __iomem *) base; | |
3663 | dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080); | |
3664 | dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100); | |
3665 | dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180); | |
3666 | dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200); | |
3667 | dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300); | |
3668 | ||
5185c913 | 3669 | if (dev->quirks & PLX_PCIE) { |
adc82f77 RR |
3670 | u32 fsmvalue; |
3671 | u32 usbstat; | |
3672 | dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *) | |
3673 | (base + 0x00b4); | |
adc82f77 RR |
3674 | dev->llregs = (struct usb338x_ll_regs __iomem *) |
3675 | (base + 0x0700); | |
3676 | dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *) | |
3677 | (base + 0x0748); | |
3678 | dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *) | |
3679 | (base + 0x077c); | |
3680 | dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *) | |
3681 | (base + 0x079c); | |
3682 | dev->plregs = (struct usb338x_pl_regs __iomem *) | |
3683 | (base + 0x0800); | |
3684 | usbstat = readl(&dev->usb->usbstat); | |
fae3c158 | 3685 | dev->enhanced_mode = !!(usbstat & BIT(11)); |
adc82f77 RR |
3686 | dev->n_ep = (dev->enhanced_mode) ? 9 : 5; |
3687 | /* put into initial config, link up all endpoints */ | |
3688 | fsmvalue = get_idx_reg(dev->regs, SCRATCH) & | |
3689 | (0xf << DEFECT7374_FSM_FIELD); | |
3690 | /* See if firmware needs to set up for workaround: */ | |
5517525e RR |
3691 | if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) { |
3692 | dev->bug7734_patched = 1; | |
adc82f77 | 3693 | writel(0, &dev->usb->usbctl); |
5517525e RR |
3694 | } else |
3695 | dev->bug7734_patched = 0; | |
3696 | } else { | |
adc82f77 RR |
3697 | dev->enhanced_mode = 0; |
3698 | dev->n_ep = 7; | |
3699 | /* put into initial config, link up all endpoints */ | |
3700 | writel(0, &dev->usb->usbctl); | |
3701 | } | |
3702 | ||
fae3c158 RR |
3703 | usb_reset(dev); |
3704 | usb_reinit(dev); | |
1da177e4 LT |
3705 | |
3706 | /* irq setup after old hardware is cleaned up */ | |
3707 | if (!pdev->irq) { | |
e56e69cc | 3708 | ep_err(dev, "No IRQ. Check PCI setup!\n"); |
1da177e4 LT |
3709 | retval = -ENODEV; |
3710 | goto done; | |
3711 | } | |
c6387a48 | 3712 | |
5185c913 | 3713 | if (dev->quirks & PLX_PCIE) |
adc82f77 | 3714 | if (pci_enable_msi(pdev)) |
e56e69cc | 3715 | ep_err(dev, "Failed to enable MSI mode\n"); |
adc82f77 | 3716 | |
fae3c158 RR |
3717 | if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED, |
3718 | driver_name, dev)) { | |
e56e69cc | 3719 | ep_err(dev, "request interrupt %d failed\n", pdev->irq); |
1da177e4 LT |
3720 | retval = -EBUSY; |
3721 | goto done; | |
3722 | } | |
3723 | dev->got_irq = 1; | |
3724 | ||
3725 | /* DMA setup */ | |
3726 | /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */ | |
fae3c158 RR |
3727 | dev->requests = pci_pool_create("requests", pdev, |
3728 | sizeof(struct net2280_dma), | |
1da177e4 LT |
3729 | 0 /* no alignment requirements */, |
3730 | 0 /* or page-crossing issues */); | |
3731 | if (!dev->requests) { | |
e56e69cc | 3732 | ep_dbg(dev, "can't get request pool\n"); |
1da177e4 LT |
3733 | retval = -ENOMEM; |
3734 | goto done; | |
3735 | } | |
3736 | for (i = 1; i < 5; i++) { | |
3737 | struct net2280_dma *td; | |
3738 | ||
fae3c158 RR |
3739 | td = pci_pool_alloc(dev->requests, GFP_KERNEL, |
3740 | &dev->ep[i].td_dma); | |
1da177e4 | 3741 | if (!td) { |
e56e69cc | 3742 | ep_dbg(dev, "can't get dummy %d\n", i); |
1da177e4 LT |
3743 | retval = -ENOMEM; |
3744 | goto done; | |
3745 | } | |
3746 | td->dmacount = 0; /* not VALID */ | |
1da177e4 | 3747 | td->dmadesc = td->dmaaddr; |
fae3c158 | 3748 | dev->ep[i].dummy = td; |
1da177e4 LT |
3749 | } |
3750 | ||
3751 | /* enable lower-overhead pci memory bursts during DMA */ | |
2eeb0016 | 3752 | if (dev->quirks & PLX_LEGACY) |
3e76fdcb RR |
3753 | writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) | |
3754 | /* | |
3755 | * 256 write retries may not be enough... | |
3756 | BIT(PCI_RETRY_ABORT_ENABLE) | | |
3757 | */ | |
3758 | BIT(DMA_READ_MULTIPLE_ENABLE) | | |
3759 | BIT(DMA_READ_LINE_ENABLE), | |
3760 | &dev->pci->pcimstctl); | |
1da177e4 | 3761 | /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */ |
fae3c158 RR |
3762 | pci_set_master(pdev); |
3763 | pci_try_set_mwi(pdev); | |
1da177e4 LT |
3764 | |
3765 | /* ... also flushes any posted pci writes */ | |
fae3c158 | 3766 | dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff; |
1da177e4 LT |
3767 | |
3768 | /* done */ | |
e56e69cc RR |
3769 | ep_info(dev, "%s\n", driver_desc); |
3770 | ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n", | |
c6387a48 | 3771 | pdev->irq, base, dev->chiprev); |
d588ff58 | 3772 | ep_info(dev, "version: " DRIVER_VERSION "; %s\n", |
adc82f77 | 3773 | dev->enhanced_mode ? "enhanced mode" : "legacy mode"); |
fae3c158 RR |
3774 | retval = device_create_file(&pdev->dev, &dev_attr_registers); |
3775 | if (retval) | |
3776 | goto done; | |
1da177e4 | 3777 | |
2901df68 FB |
3778 | retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget, |
3779 | gadget_release); | |
0f91349b SAS |
3780 | if (retval) |
3781 | goto done; | |
1da177e4 LT |
3782 | return 0; |
3783 | ||
3784 | done: | |
3785 | if (dev) | |
fae3c158 | 3786 | net2280_remove(pdev); |
1da177e4 LT |
3787 | return retval; |
3788 | } | |
3789 | ||
2d61bde7 AS |
3790 | /* make sure the board is quiescent; otherwise it will continue |
3791 | * generating IRQs across the upcoming reboot. | |
3792 | */ | |
3793 | ||
fae3c158 | 3794 | static void net2280_shutdown(struct pci_dev *pdev) |
2d61bde7 | 3795 | { |
fae3c158 | 3796 | struct net2280 *dev = pci_get_drvdata(pdev); |
2d61bde7 AS |
3797 | |
3798 | /* disable IRQs */ | |
fae3c158 RR |
3799 | writel(0, &dev->regs->pciirqenb0); |
3800 | writel(0, &dev->regs->pciirqenb1); | |
2d61bde7 AS |
3801 | |
3802 | /* disable the pullup so the host will think we're gone */ | |
fae3c158 | 3803 | writel(0, &dev->usb->usbctl); |
2f076077 | 3804 | |
2d61bde7 AS |
3805 | } |
3806 | ||
1da177e4 LT |
3807 | |
3808 | /*-------------------------------------------------------------------------*/ | |
3809 | ||
fae3c158 | 3810 | static const struct pci_device_id pci_ids[] = { { |
7b78f48a | 3811 | .class = PCI_CLASS_SERIAL_USB_DEVICE, |
901b3d75 | 3812 | .class_mask = ~0, |
c2db8a8a | 3813 | .vendor = PCI_VENDOR_ID_PLX_LEGACY, |
1da177e4 LT |
3814 | .device = 0x2280, |
3815 | .subvendor = PCI_ANY_ID, | |
3816 | .subdevice = PCI_ANY_ID, | |
2eeb0016 | 3817 | .driver_data = PLX_LEGACY | PLX_2280, |
ae8e530a | 3818 | }, { |
7b78f48a | 3819 | .class = PCI_CLASS_SERIAL_USB_DEVICE, |
901b3d75 | 3820 | .class_mask = ~0, |
c2db8a8a | 3821 | .vendor = PCI_VENDOR_ID_PLX_LEGACY, |
950ee4c8 GL |
3822 | .device = 0x2282, |
3823 | .subvendor = PCI_ANY_ID, | |
3824 | .subdevice = PCI_ANY_ID, | |
2eeb0016 | 3825 | .driver_data = PLX_LEGACY, |
ae8e530a | 3826 | }, |
adc82f77 | 3827 | { |
7b78f48a | 3828 | .class = PCI_CLASS_SERIAL_USB_DEVICE, |
ae8e530a RR |
3829 | .class_mask = ~0, |
3830 | .vendor = PCI_VENDOR_ID_PLX, | |
5185c913 TH |
3831 | .device = 0x2380, |
3832 | .subvendor = PCI_ANY_ID, | |
3833 | .subdevice = PCI_ANY_ID, | |
3834 | .driver_data = PLX_PCIE, | |
3835 | }, | |
3836 | { | |
3837 | .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe), | |
3838 | .class_mask = ~0, | |
3839 | .vendor = PCI_VENDOR_ID_PLX, | |
ae8e530a RR |
3840 | .device = 0x3380, |
3841 | .subvendor = PCI_ANY_ID, | |
3842 | .subdevice = PCI_ANY_ID, | |
5185c913 | 3843 | .driver_data = PLX_PCIE | PLX_SUPERSPEED, |
adc82f77 RR |
3844 | }, |
3845 | { | |
7b78f48a | 3846 | .class = PCI_CLASS_SERIAL_USB_DEVICE, |
ae8e530a RR |
3847 | .class_mask = ~0, |
3848 | .vendor = PCI_VENDOR_ID_PLX, | |
3849 | .device = 0x3382, | |
3850 | .subvendor = PCI_ANY_ID, | |
3851 | .subdevice = PCI_ANY_ID, | |
5185c913 | 3852 | .driver_data = PLX_PCIE | PLX_SUPERSPEED, |
adc82f77 RR |
3853 | }, |
3854 | { /* end: all zeroes */ } | |
1da177e4 | 3855 | }; |
fae3c158 | 3856 | MODULE_DEVICE_TABLE(pci, pci_ids); |
1da177e4 LT |
3857 | |
3858 | /* pci driver glue; this is a "new style" PCI driver module */ | |
3859 | static struct pci_driver net2280_pci_driver = { | |
3860 | .name = (char *) driver_name, | |
3861 | .id_table = pci_ids, | |
3862 | ||
3863 | .probe = net2280_probe, | |
3864 | .remove = net2280_remove, | |
2d61bde7 | 3865 | .shutdown = net2280_shutdown, |
1da177e4 LT |
3866 | |
3867 | /* FIXME add power management support */ | |
3868 | }; | |
3869 | ||
9a028e46 RR |
3870 | module_pci_driver(net2280_pci_driver); |
3871 | ||
fae3c158 RR |
3872 | MODULE_DESCRIPTION(DRIVER_DESC); |
3873 | MODULE_AUTHOR("David Brownell"); | |
3874 | MODULE_LICENSE("GPL"); |