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USB: add SPDX identifiers to all remaining files in drivers/usb/
[mirror_ubuntu-jammy-kernel.git] / drivers / usb / gadget / udc / net2280.c
CommitLineData
5fd54ace 1// SPDX-License-Identifier: GPL-2.0+
1da177e4
LT		 2/*
3 * Driver for the PLX NET2280 USB device controller.
4 * Specs and errata are available from <http://www.plxtech.com>.
5 *
901b3d75 6 * PLX Technology Inc. (formerly NetChip Technology) supported the
1da177e4
LT		 7 * development of this driver.
8 *
9 *
10 * CODE STATUS HIGHLIGHTS
11 *
12 * This driver should work well with most "gadget" drivers, including
fa06920a 13 * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
1da177e4
LT		 14 * as well as Gadget Zero and Gadgetfs.
15 *
90664198 16 * DMA is enabled by default.
1da177e4 17 *
adc82f77
RR		 18 * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
19 * be enabled.
20 *
1da177e4
LT		 21 * Note that almost all the errata workarounds here are only needed for
22 * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
23 */
24
25/*
26 * Copyright (C) 2003 David Brownell
27 * Copyright (C) 2003-2005 PLX Technology, Inc.
adc82f77 28 * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
1da177e4 29 *
901b3d75
DB		 30 * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
31 * with 2282 chip
950ee4c8 32 *
adc82f77
RR		 33 * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
34 * with usb 338x chip. Based on PLX driver
35 *
1da177e4
LT		 36 * This program is free software; you can redistribute it and/or modify
37 * it under the terms of the GNU General Public License as published by
38 * the Free Software Foundation; either version 2 of the License, or
39 * (at your option) any later version.
1da177e4
LT		 40 */
41
1da177e4
LT		 42#include <linux/module.h>
43#include <linux/pci.h>
682d4c80 44#include <linux/dma-mapping.h>
1da177e4
LT		 45#include <linux/kernel.h>
46#include <linux/delay.h>
47#include <linux/ioport.h>
1da177e4 48#include <linux/slab.h>
1da177e4
LT		 49#include <linux/errno.h>
50#include <linux/init.h>
51#include <linux/timer.h>
52#include <linux/list.h>
53#include <linux/interrupt.h>
54#include <linux/moduleparam.h>
55#include <linux/device.h>
5f848137 56#include <linux/usb/ch9.h>
9454a57a 57#include <linux/usb/gadget.h>
b38b03b3 58#include <linux/prefetch.h>
fae3c158 59#include <linux/io.h>
1da177e4
LT		 60
61#include <asm/byteorder.h>
1da177e4 62#include <asm/irq.h>
1da177e4
LT		 63#include <asm/unaligned.h>
64
adc82f77
RR		 65#define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
66#define DRIVER_VERSION "2005 Sept 27/v3.0"
1da177e4 67
1da177e4
LT		 68#define EP_DONTUSE 13 /* nonzero */
69
70#define USE_RDK_LEDS /* GPIO pins control three LEDs */
71
72
fae3c158
RR		 73static const char driver_name[] = "net2280";
74static const char driver_desc[] = DRIVER_DESC;
1da177e4 75
adc82f77 76static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
fae3c158 77static const char ep0name[] = "ep0";
1da177e4 78
c23c3c3c
RB		 79#define EP_INFO(_name, _caps) \
80 { \
81 .name = _name, \
82 .caps = _caps, \
83 }
84
85static const struct {
86 const char *name;
87 const struct usb_ep_caps caps;
88} ep_info_dft[] = { /* Default endpoint configuration */
89 EP_INFO(ep0name,
90 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
91 EP_INFO("ep-a",
92 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
93 EP_INFO("ep-b",
94 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
95 EP_INFO("ep-c",
96 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
97 EP_INFO("ep-d",
98 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
99 EP_INFO("ep-e",
100 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
101 EP_INFO("ep-f",
102 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
103 EP_INFO("ep-g",
104 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
105 EP_INFO("ep-h",
106 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
107}, ep_info_adv[] = { /* Endpoints for usb3380 advance mode */
108 EP_INFO(ep0name,
109 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
110 EP_INFO("ep1in",
111 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
112 EP_INFO("ep2out",
113 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
114 EP_INFO("ep3in",
115 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
116 EP_INFO("ep4out",
117 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
118 EP_INFO("ep1out",
119 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
120 EP_INFO("ep2in",
121 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
122 EP_INFO("ep3out",
123 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
124 EP_INFO("ep4in",
125 USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
a285f40d
MYK		 126};
127
c23c3c3c
RB		 128#undef EP_INFO
129
1da177e4
LT		 130/* mode 0 == ep-{a,b,c,d} 1K fifo each
131 * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
132 * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
133 */
fae3c158 134static ushort fifo_mode;
1da177e4
LT		 135
136/* "modprobe net2280 fifo_mode=1" etc */
ae8e530a 137module_param(fifo_mode, ushort, 0644);
1da177e4
LT		 138
139/* enable_suspend -- When enabled, the driver will respond to
140 * USB suspend requests by powering down the NET2280. Otherwise,
25985edc 141 * USB suspend requests will be ignored. This is acceptable for
950ee4c8 142 * self-powered devices
1da177e4 143 */
00d4db0e 144static bool enable_suspend;
1da177e4
LT		 145
146/* "modprobe net2280 enable_suspend=1" etc */
ae8e530a 147module_param(enable_suspend, bool, 0444);
1da177e4 148
1da177e4
LT		 149#define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
150
fae3c158 151static char *type_string(u8 bmAttributes)
1da177e4
LT		 152{
153 switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
154 case USB_ENDPOINT_XFER_BULK: return "bulk";
155 case USB_ENDPOINT_XFER_ISOC: return "iso";
156 case USB_ENDPOINT_XFER_INT: return "intr";
2b84f92b 157 }
1da177e4
LT		 158 return "control";
159}
1da177e4
LT		 160
161#include "net2280.h"
162
3e76fdcb
RR		 163#define valid_bit cpu_to_le32(BIT(VALID_BIT))
164#define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
1da177e4 165
e6ac4bb0 166static void ep_clear_seqnum(struct net2280_ep *ep);
11bece5e
MYK		 167static void stop_activity(struct net2280 *dev,
168 struct usb_gadget_driver *driver);
169static void ep0_start(struct net2280 *dev);
e6ac4bb0 170
1da177e4 171/*-------------------------------------------------------------------------*/
adc82f77
RR		 172static inline void enable_pciirqenb(struct net2280_ep *ep)
173{
174 u32 tmp = readl(&ep->dev->regs->pciirqenb0);
175
2eeb0016 176 if (ep->dev->quirks & PLX_LEGACY)
3e76fdcb 177 tmp |= BIT(ep->num);
adc82f77 178 else
3e76fdcb 179 tmp |= BIT(ep_bit[ep->num]);
adc82f77
RR		 180 writel(tmp, &ep->dev->regs->pciirqenb0);
181
182 return;
183}
1da177e4
LT		 184
185static int
fae3c158 186net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
1da177e4
LT		 187{
188 struct net2280 *dev;
189 struct net2280_ep *ep;
c65c4f05
MYK		 190 u32 max;
191 u32 tmp = 0;
192 u32 type;
1da177e4 193 unsigned long flags;
adc82f77 194 static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
9ceafcc2 195 int ret = 0;
1da177e4 196
fae3c158 197 ep = container_of(_ep, struct net2280_ep, ep);
ae8e530a 198 if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
9ceafcc2
MYK		 199 desc->bDescriptorType != USB_DT_ENDPOINT) {
200 pr_err("%s: failed at line=%d\n", __func__, __LINE__);
1da177e4 201 return -EINVAL;
9ceafcc2 202 }
1da177e4 203 dev = ep->dev;
9ceafcc2
MYK		 204 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
205 ret = -ESHUTDOWN;
206 goto print_err;
207 }
1da177e4
LT		 208
209 /* erratum 0119 workaround ties up an endpoint number */
9ceafcc2
MYK		 210 if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) {
211 ret = -EDOM;
212 goto print_err;
213 }
1da177e4 214
5185c913 215 if (dev->quirks & PLX_PCIE) {
9ceafcc2
MYK		 216 if ((desc->bEndpointAddress & 0x0f) >= 0x0c) {
217 ret = -EDOM;
218 goto print_err;
219 }
adc82f77 220 ep->is_in = !!usb_endpoint_dir_in(desc);
9ceafcc2
MYK		 221 if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) {
222 ret = -EINVAL;
223 goto print_err;
224 }
adc82f77
RR		 225 }
226
1da177e4 227 /* sanity check ep-e/ep-f since their fifos are small */
090bdb5c 228 max = usb_endpoint_maxp(desc);
9ceafcc2
MYK		 229 if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
230 ret = -ERANGE;
231 goto print_err;
232 }
1da177e4 233
fae3c158 234 spin_lock_irqsave(&dev->lock, flags);
090bdb5c 235 _ep->maxpacket = max;
1da177e4
LT		 236 ep->desc = desc;
237
238 /* ep_reset() has already been called */
239 ep->stopped = 0;
8066134f 240 ep->wedged = 0;
1da177e4
LT		 241 ep->out_overflow = 0;
242
243 /* set speed-dependent max packet; may kick in high bandwidth */
adc82f77 244 set_max_speed(ep, max);
1da177e4 245
1da177e4 246 /* set type, direction, address; reset fifo counters */
3e76fdcb 247 writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
c65c4f05 248
5185c913 249 if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
c65c4f05
MYK		 250 tmp = readl(&ep->cfg->ep_cfg);
251 /* If USB ep number doesn't match hardware ep number */
252 if ((tmp & 0xf) != usb_endpoint_num(desc)) {
253 ret = -EINVAL;
254 spin_unlock_irqrestore(&dev->lock, flags);
255 goto print_err;
256 }
257 if (ep->is_in)
258 tmp &= ~USB3380_EP_CFG_MASK_IN;
259 else
260 tmp &= ~USB3380_EP_CFG_MASK_OUT;
261 }
262 type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
263 if (type == USB_ENDPOINT_XFER_INT) {
1da177e4 264 /* erratum 0105 workaround prevents hs NYET */
ae8e530a
RR		 265 if (dev->chiprev == 0100 &&
266 dev->gadget.speed == USB_SPEED_HIGH &&
267 !(desc->bEndpointAddress & USB_DIR_IN))
3e76fdcb 268 writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
1da177e4 269 &ep->regs->ep_rsp);
c65c4f05 270 } else if (type == USB_ENDPOINT_XFER_BULK) {
1da177e4 271 /* catch some particularly blatant driver bugs */
adc82f77
RR		 272 if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
273 (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
274 (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
275 spin_unlock_irqrestore(&dev->lock, flags);
9ceafcc2
MYK		 276 ret = -ERANGE;
277 goto print_err;
1da177e4
LT		 278 }
279 }
c65c4f05 280 ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC);
adc82f77 281 /* Enable this endpoint */
2eeb0016 282 if (dev->quirks & PLX_LEGACY) {
c65c4f05 283 tmp |= type << ENDPOINT_TYPE;
adc82f77
RR		 284 tmp |= desc->bEndpointAddress;
285 /* default full fifo lines */
286 tmp |= (4 << ENDPOINT_BYTE_COUNT);
3e76fdcb 287 tmp |= BIT(ENDPOINT_ENABLE);
adc82f77
RR		 288 ep->is_in = (tmp & USB_DIR_IN) != 0;
289 } else {
290 /* In Legacy mode, only OUT endpoints are used */
291 if (dev->enhanced_mode && ep->is_in) {
c65c4f05 292 tmp |= type << IN_ENDPOINT_TYPE;
3e76fdcb 293 tmp |= BIT(IN_ENDPOINT_ENABLE);
adc82f77 294 } else {
c65c4f05 295 tmp |= type << OUT_ENDPOINT_TYPE;
3e76fdcb 296 tmp |= BIT(OUT_ENDPOINT_ENABLE);
adc82f77
RR		 297 tmp |= (ep->is_in << ENDPOINT_DIRECTION);
298 }
299
463e104f 300 tmp |= (4 << ENDPOINT_BYTE_COUNT);
c65c4f05
MYK		 301 if (!dev->enhanced_mode)
302 tmp |= usb_endpoint_num(desc);
adc82f77
RR		 303 tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
304 }
305
306 /* Make sure all the registers are written before ep_rsp*/
307 wmb();
1da177e4
LT		 308
309 /* for OUT transfers, block the rx fifo until a read is posted */
1da177e4 310 if (!ep->is_in)
3e76fdcb 311 writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
2eeb0016 312 else if (!(dev->quirks & PLX_2280)) {
901b3d75
DB		 313 /* Added for 2282, Don't use nak packets on an in endpoint,
314 * this was ignored on 2280
315 */
3e76fdcb
RR		 316 writel(BIT(CLEAR_NAK_OUT_PACKETS) |
317 BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
950ee4c8 318 }
1da177e4 319
5185c913 320 if (dev->quirks & PLX_PCIE)
e6ac4bb0 321 ep_clear_seqnum(ep);
adc82f77 322 writel(tmp, &ep->cfg->ep_cfg);
1da177e4
LT		 323
324 /* enable irqs */
325 if (!ep->dma) { /* pio, per-packet */
adc82f77 326 enable_pciirqenb(ep);
1da177e4 327
3e76fdcb
RR		 328 tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
329 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
2eeb0016 330 if (dev->quirks & PLX_2280)
fae3c158
RR		 331 tmp |= readl(&ep->regs->ep_irqenb);
332 writel(tmp, &ep->regs->ep_irqenb);
1da177e4 333 } else { /* dma, per-request */
3e76fdcb 334 tmp = BIT((8 + ep->num)); /* completion */
fae3c158
RR		 335 tmp |= readl(&dev->regs->pciirqenb1);
336 writel(tmp, &dev->regs->pciirqenb1);
1da177e4
LT		 337
338 /* for short OUT transfers, dma completions can't
339 * advance the queue; do it pio-style, by hand.
340 * NOTE erratum 0112 workaround #2
341 */
342 if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
3e76fdcb 343 tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
fae3c158 344 writel(tmp, &ep->regs->ep_irqenb);
1da177e4 345
adc82f77 346 enable_pciirqenb(ep);
1da177e4
LT		 347 }
348 }
349
350 tmp = desc->bEndpointAddress;
e56e69cc 351 ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
fae3c158
RR		 352 _ep->name, tmp & 0x0f, DIR_STRING(tmp),
353 type_string(desc->bmAttributes),
1da177e4
LT		 354 ep->dma ? "dma" : "pio", max);
355
356 /* pci writes may still be posted */
fae3c158 357 spin_unlock_irqrestore(&dev->lock, flags);
9ceafcc2
MYK		 358 return ret;
359
360print_err:
361 dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
362 return ret;
1da177e4
LT		 363}
364
fae3c158 365static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
1da177e4
LT		 366{
367 u32 result;
368
369 do {
fae3c158 370 result = readl(ptr);
1da177e4
LT		 371 if (result == ~(u32)0) /* "device unplugged" */
372 return -ENODEV;
373 result &= mask;
374 if (result == done)
375 return 0;
fae3c158 376 udelay(1);
1da177e4
LT		 377 usec--;
378 } while (usec > 0);
379 return -ETIMEDOUT;
380}
381
901b3d75 382static const struct usb_ep_ops net2280_ep_ops;
1da177e4 383
adc82f77
RR		 384static void ep_reset_228x(struct net2280_regs __iomem *regs,
385 struct net2280_ep *ep)
1da177e4
LT		 386{
387 u32 tmp;
388
389 ep->desc = NULL;
fae3c158 390 INIT_LIST_HEAD(&ep->queue);
1da177e4 391
e117e742 392 usb_ep_set_maxpacket_limit(&ep->ep, ~0);
1da177e4
LT		 393 ep->ep.ops = &net2280_ep_ops;
394
395 /* disable the dma, irqs, endpoint... */
396 if (ep->dma) {
fae3c158 397 writel(0, &ep->dma->dmactl);
3e76fdcb
RR		 398 writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
399 BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
400 BIT(DMA_ABORT),
401 &ep->dma->dmastat);
1da177e4 402
fae3c158 403 tmp = readl(&regs->pciirqenb0);
3e76fdcb 404 tmp &= ~BIT(ep->num);
fae3c158 405 writel(tmp, &regs->pciirqenb0);
1da177e4 406 } else {
fae3c158 407 tmp = readl(&regs->pciirqenb1);
3e76fdcb 408 tmp &= ~BIT((8 + ep->num)); /* completion */
fae3c158 409 writel(tmp, &regs->pciirqenb1);
1da177e4 410 }
fae3c158 411 writel(0, &ep->regs->ep_irqenb);
1da177e4
LT		 412
413 /* init to our chosen defaults, notably so that we NAK OUT
414 * packets until the driver queues a read (+note erratum 0112)
415 */
2eeb0016 416 if (!ep->is_in || (ep->dev->quirks & PLX_2280)) {
3e76fdcb
RR		 417 tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
418 BIT(SET_NAK_OUT_PACKETS) |
419 BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
420 BIT(CLEAR_INTERRUPT_MODE);
950ee4c8
GL		 421 } else {
422 /* added for 2282 */
3e76fdcb
RR		 423 tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
424 BIT(CLEAR_NAK_OUT_PACKETS) |
425 BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
426 BIT(CLEAR_INTERRUPT_MODE);
950ee4c8 427 }
1da177e4
LT		 428
429 if (ep->num != 0) {
3e76fdcb
RR		 430 tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
431 BIT(CLEAR_ENDPOINT_HALT);
1da177e4 432 }
fae3c158 433 writel(tmp, &ep->regs->ep_rsp);
1da177e4
LT		 434
435 /* scrub most status bits, and flush any fifo state */
2eeb0016 436 if (ep->dev->quirks & PLX_2280)
3e76fdcb
RR		 437 tmp = BIT(FIFO_OVERFLOW) |
438 BIT(FIFO_UNDERFLOW);
950ee4c8
GL		 439 else
440 tmp = 0;
441
3e76fdcb
RR		 442 writel(tmp | BIT(TIMEOUT) |
443 BIT(USB_STALL_SENT) |
444 BIT(USB_IN_NAK_SENT) |
445 BIT(USB_IN_ACK_RCVD) |
446 BIT(USB_OUT_PING_NAK_SENT) |
447 BIT(USB_OUT_ACK_SENT) |
448 BIT(FIFO_FLUSH) |
449 BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
450 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
451 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
452 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
453 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RR		 454 BIT(DATA_IN_TOKEN_INTERRUPT),
455 &ep->regs->ep_stat);
1da177e4
LT		 456
457 /* fifo size is handled separately */
458}
459
adc82f77
RR		 460static void ep_reset_338x(struct net2280_regs __iomem *regs,
461 struct net2280_ep *ep)
462{
463 u32 tmp, dmastat;
464
465 ep->desc = NULL;
466 INIT_LIST_HEAD(&ep->queue);
467
468 usb_ep_set_maxpacket_limit(&ep->ep, ~0);
469 ep->ep.ops = &net2280_ep_ops;
470
471 /* disable the dma, irqs, endpoint... */
472 if (ep->dma) {
473 writel(0, &ep->dma->dmactl);
3e76fdcb
RR		 474 writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
475 BIT(DMA_PAUSE_DONE_INTERRUPT) |
476 BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
ae8e530a
RR		 477 BIT(DMA_TRANSACTION_DONE_INTERRUPT),
478 /* | BIT(DMA_ABORT), */
479 &ep->dma->dmastat);
adc82f77
RR		 480
481 dmastat = readl(&ep->dma->dmastat);
482 if (dmastat == 0x5002) {
e56e69cc 483 ep_warn(ep->dev, "The dmastat return = %x!!\n",
adc82f77
RR		 484 dmastat);
485 writel(0x5a, &ep->dma->dmastat);
486 }
487
488 tmp = readl(&regs->pciirqenb0);
3e76fdcb 489 tmp &= ~BIT(ep_bit[ep->num]);
adc82f77
RR		 490 writel(tmp, &regs->pciirqenb0);
491 } else {
492 if (ep->num < 5) {
493 tmp = readl(&regs->pciirqenb1);
3e76fdcb 494 tmp &= ~BIT((8 + ep->num)); /* completion */
adc82f77
RR		 495 writel(tmp, &regs->pciirqenb1);
496 }
497 }
498 writel(0, &ep->regs->ep_irqenb);
499
3e76fdcb
RR		 500 writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
501 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
502 BIT(FIFO_OVERFLOW) |
503 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
504 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
505 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
506 BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
971fe656
MYK		 507
508 tmp = readl(&ep->cfg->ep_cfg);
509 if (ep->is_in)
510 tmp &= ~USB3380_EP_CFG_MASK_IN;
511 else
512 tmp &= ~USB3380_EP_CFG_MASK_OUT;
513 writel(tmp, &ep->cfg->ep_cfg);
adc82f77
RR		 514}
515
fae3c158 516static void nuke(struct net2280_ep *);
1da177e4 517
fae3c158 518static int net2280_disable(struct usb_ep *_ep)
1da177e4
LT		 519{
520 struct net2280_ep *ep;
521 unsigned long flags;
522
fae3c158 523 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 524 if (!_ep || !ep->desc || _ep->name == ep0name) {
525 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 526 return -EINVAL;
9ceafcc2 527 }
fae3c158
RR		 528 spin_lock_irqsave(&ep->dev->lock, flags);
529 nuke(ep);
adc82f77 530
5185c913 531 if (ep->dev->quirks & PLX_PCIE)
adc82f77
RR		 532 ep_reset_338x(ep->dev->regs, ep);
533 else
534 ep_reset_228x(ep->dev->regs, ep);
1da177e4 535
e56e69cc 536 ep_vdbg(ep->dev, "disabled %s %s\n",
1da177e4
LT		 537 ep->dma ? "dma" : "pio", _ep->name);
538
539 /* synch memory views with the device */
adc82f77 540 (void)readl(&ep->cfg->ep_cfg);
1da177e4 541
d588ff58 542 if (!ep->dma && ep->num >= 1 && ep->num <= 4)
fae3c158 543 ep->dma = &ep->dev->dma[ep->num - 1];
1da177e4 544
fae3c158 545 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 546 return 0;
547}
548
549/*-------------------------------------------------------------------------*/
550
fae3c158
RR		 551static struct usb_request
552*net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
1da177e4
LT		 553{
554 struct net2280_ep *ep;
555 struct net2280_request *req;
556
9ceafcc2
MYK		 557 if (!_ep) {
558 pr_err("%s: Invalid ep\n", __func__);
1da177e4 559 return NULL;
9ceafcc2 560 }
fae3c158 561 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4 562
7039f422 563 req = kzalloc(sizeof(*req), gfp_flags);
1da177e4
LT		 564 if (!req)
565 return NULL;
566
fae3c158 567 INIT_LIST_HEAD(&req->queue);
1da177e4
LT		 568
569 /* this dma descriptor may be swapped with the previous dummy */
570 if (ep->dma) {
571 struct net2280_dma *td;
572
fa9ed6f6 573 td = dma_pool_alloc(ep->dev->requests, gfp_flags,
1da177e4
LT		 574 &req->td_dma);
575 if (!td) {
fae3c158 576 kfree(req);
1da177e4
LT		 577 return NULL;
578 }
579 td->dmacount = 0; /* not VALID */
1da177e4
LT		 580 td->dmadesc = td->dmaaddr;
581 req->td = td;
582 }
583 return &req->req;
584}
585
fae3c158 586static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
1da177e4
LT		 587{
588 struct net2280_ep *ep;
589 struct net2280_request *req;
590
fae3c158 591 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2 592 if (!_ep || !_req) {
a00c9791 593 dev_err(&ep->dev->pdev->dev, "%s: Invalid ep=%p or req=%p\n",
9ceafcc2 594 __func__, _ep, _req);
1da177e4 595 return;
9ceafcc2 596 }
1da177e4 597
fae3c158
RR		 598 req = container_of(_req, struct net2280_request, req);
599 WARN_ON(!list_empty(&req->queue));
1da177e4 600 if (req->td)
fa9ed6f6 601 dma_pool_free(ep->dev->requests, req->td, req->td_dma);
fae3c158 602 kfree(req);
1da177e4
LT		 603}
604
605/*-------------------------------------------------------------------------*/
606
1da177e4
LT		 607/* load a packet into the fifo we use for usb IN transfers.
608 * works for all endpoints.
609 *
610 * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
611 * at a time, but this code is simpler because it knows it only writes
612 * one packet. ep-a..ep-d should use dma instead.
613 */
fae3c158 614static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
1da177e4
LT		 615{
616 struct net2280_ep_regs __iomem *regs = ep->regs;
617 u8 *buf;
618 u32 tmp;
619 unsigned count, total;
620
621 /* INVARIANT: fifo is currently empty. (testable) */
622
623 if (req) {
624 buf = req->buf + req->actual;
fae3c158 625 prefetch(buf);
1da177e4
LT		 626 total = req->length - req->actual;
627 } else {
628 total = 0;
629 buf = NULL;
630 }
631
632 /* write just one packet at a time */
633 count = ep->ep.maxpacket;
634 if (count > total) /* min() cannot be used on a bitfield */
635 count = total;
636
e56e69cc 637 ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
1da177e4
LT		 638 ep->ep.name, count,
639 (count != ep->ep.maxpacket) ? " (short)" : "",
640 req);
641 while (count >= 4) {
642 /* NOTE be careful if you try to align these. fifo lines
643 * should normally be full (4 bytes) and successive partial
644 * lines are ok only in certain cases.
645 */
fae3c158
RR		 646 tmp = get_unaligned((u32 *)buf);
647 cpu_to_le32s(&tmp);
648 writel(tmp, &regs->ep_data);
1da177e4
LT		 649 buf += 4;
650 count -= 4;
651 }
652
653 /* last fifo entry is "short" unless we wrote a full packet.
654 * also explicitly validate last word in (periodic) transfers
655 * when maxpacket is not a multiple of 4 bytes.
656 */
657 if (count || total < ep->ep.maxpacket) {
fae3c158
RR		 658 tmp = count ? get_unaligned((u32 *)buf) : count;
659 cpu_to_le32s(&tmp);
660 set_fifo_bytecount(ep, count & 0x03);
661 writel(tmp, &regs->ep_data);
1da177e4
LT		 662 }
663
664 /* pci writes may still be posted */
665}
666
667/* work around erratum 0106: PCI and USB race over the OUT fifo.
668 * caller guarantees chiprev 0100, out endpoint is NAKing, and
669 * there's no real data in the fifo.
670 *
671 * NOTE: also used in cases where that erratum doesn't apply:
672 * where the host wrote "too much" data to us.
673 */
fae3c158 674static void out_flush(struct net2280_ep *ep)
1da177e4
LT		 675{
676 u32 __iomem *statp;
677 u32 tmp;
678
1da177e4 679 statp = &ep->regs->ep_stat;
d82f3db2
RR		 680
681 tmp = readl(statp);
682 if (tmp & BIT(NAK_OUT_PACKETS)) {
683 ep_dbg(ep->dev, "%s %s %08x !NAK\n",
684 ep->ep.name, __func__, tmp);
685 writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
686 }
687
3e76fdcb 688 writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RR		 689 BIT(DATA_PACKET_RECEIVED_INTERRUPT),
690 statp);
3e76fdcb 691 writel(BIT(FIFO_FLUSH), statp);
fae3c158
RR		 692 /* Make sure that stap is written */
693 mb();
694 tmp = readl(statp);
ae8e530a 695 if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
1da177e4 696 /* high speed did bulk NYET; fifo isn't filling */
ae8e530a 697 ep->dev->gadget.speed == USB_SPEED_FULL) {
1da177e4
LT		 698 unsigned usec;
699
700 usec = 50; /* 64 byte bulk/interrupt */
3e76fdcb
RR		 701 handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
702 BIT(USB_OUT_PING_NAK_SENT), usec);
1da177e4
LT		 703 /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
704 }
705}
706
707/* unload packet(s) from the fifo we use for usb OUT transfers.
708 * returns true iff the request completed, because of short packet
709 * or the request buffer having filled with full packets.
710 *
711 * for ep-a..ep-d this will read multiple packets out when they
712 * have been accepted.
713 */
fae3c158 714static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
1da177e4
LT		 715{
716 struct net2280_ep_regs __iomem *regs = ep->regs;
717 u8 *buf = req->req.buf + req->req.actual;
718 unsigned count, tmp, is_short;
719 unsigned cleanup = 0, prevent = 0;
720
721 /* erratum 0106 ... packets coming in during fifo reads might
722 * be incompletely rejected. not all cases have workarounds.
723 */
ae8e530a
RR		 724 if (ep->dev->chiprev == 0x0100 &&
725 ep->dev->gadget.speed == USB_SPEED_FULL) {
fae3c158
RR		 726 udelay(1);
727 tmp = readl(&ep->regs->ep_stat);
3e76fdcb 728 if ((tmp & BIT(NAK_OUT_PACKETS)))
1da177e4 729 cleanup = 1;
3e76fdcb 730 else if ((tmp & BIT(FIFO_FULL))) {
fae3c158 731 start_out_naking(ep);
1da177e4
LT		 732 prevent = 1;
733 }
734 /* else: hope we don't see the problem */
735 }
736
737 /* never overflow the rx buffer. the fifo reads packets until
738 * it sees a short one; we might not be ready for them all.
739 */
fae3c158
RR		 740 prefetchw(buf);
741 count = readl(&regs->ep_avail);
742 if (unlikely(count == 0)) {
743 udelay(1);
744 tmp = readl(&ep->regs->ep_stat);
745 count = readl(&regs->ep_avail);
1da177e4 746 /* handled that data already? */
3e76fdcb 747 if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
1da177e4
LT		 748 return 0;
749 }
750
751 tmp = req->req.length - req->req.actual;
752 if (count > tmp) {
753 /* as with DMA, data overflow gets flushed */
754 if ((tmp % ep->ep.maxpacket) != 0) {
e56e69cc 755 ep_err(ep->dev,
1da177e4
LT		 756 "%s out fifo %d bytes, expected %d\n",
757 ep->ep.name, count, tmp);
758 req->req.status = -EOVERFLOW;
759 cleanup = 1;
760 /* NAK_OUT_PACKETS will be set, so flushing is safe;
761 * the next read will start with the next packet
762 */
763 } /* else it's a ZLP, no worries */
764 count = tmp;
765 }
766 req->req.actual += count;
767
768 is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
769
e56e69cc 770 ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
1da177e4
LT		 771 ep->ep.name, count, is_short ? " (short)" : "",
772 cleanup ? " flush" : "", prevent ? " nak" : "",
773 req, req->req.actual, req->req.length);
774
775 while (count >= 4) {
fae3c158
RR		 776 tmp = readl(&regs->ep_data);
777 cpu_to_le32s(&tmp);
778 put_unaligned(tmp, (u32 *)buf);
1da177e4
LT		 779 buf += 4;
780 count -= 4;
781 }
782 if (count) {
fae3c158 783 tmp = readl(&regs->ep_data);
1da177e4
LT		 784 /* LE conversion is implicit here: */
785 do {
786 *buf++ = (u8) tmp;
787 tmp >>= 8;
788 } while (--count);
789 }
790 if (cleanup)
fae3c158 791 out_flush(ep);
1da177e4 792 if (prevent) {
3e76fdcb 793 writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
fae3c158 794 (void) readl(&ep->regs->ep_rsp);
1da177e4
LT		 795 }
796
ae8e530a
RR		 797 return is_short || ((req->req.actual == req->req.length) &&
798 !req->req.zero);
1da177e4
LT		 799}
800
801/* fill out dma descriptor to match a given request */
fae3c158
RR		 802static void fill_dma_desc(struct net2280_ep *ep,
803 struct net2280_request *req, int valid)
1da177e4
LT		 804{
805 struct net2280_dma *td = req->td;
806 u32 dmacount = req->req.length;
807
808 /* don't let DMA continue after a short OUT packet,
809 * so overruns can't affect the next transfer.
810 * in case of overruns on max-size packets, we can't
811 * stop the fifo from filling but we can flush it.
812 */
813 if (ep->is_in)
3e76fdcb 814 dmacount |= BIT(DMA_DIRECTION);
ae8e530a 815 if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
2eeb0016 816 !(ep->dev->quirks & PLX_2280))
3e76fdcb 817 dmacount |= BIT(END_OF_CHAIN);
1da177e4
LT		 818
819 req->valid = valid;
820 if (valid)
3e76fdcb 821 dmacount |= BIT(VALID_BIT);
90664198 822 dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
1da177e4
LT		 823
824 /* td->dmadesc = previously set by caller */
825 td->dmaaddr = cpu_to_le32 (req->req.dma);
826
827 /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
fae3c158 828 wmb();
da2bbdcc 829 td->dmacount = cpu_to_le32(dmacount);
1da177e4
LT		 830}
831
832static const u32 dmactl_default =
3e76fdcb
RR		 833 BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
834 BIT(DMA_CLEAR_COUNT_ENABLE) |
1da177e4 835 /* erratum 0116 workaround part 1 (use POLLING) */
3e76fdcb
RR		 836 (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
837 BIT(DMA_VALID_BIT_POLLING_ENABLE) |
838 BIT(DMA_VALID_BIT_ENABLE) |
839 BIT(DMA_SCATTER_GATHER_ENABLE) |
1da177e4 840 /* erratum 0116 workaround part 2 (no AUTOSTART) */
3e76fdcb 841 BIT(DMA_ENABLE);
1da177e4 842
fae3c158 843static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
1da177e4 844{
3e76fdcb 845 handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
1da177e4
LT		 846}
847
fae3c158 848static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
1da177e4 849{
3e76fdcb 850 writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
fae3c158 851 spin_stop_dma(dma);
1da177e4
LT		 852}
853
fae3c158 854static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
1da177e4
LT		 855{
856 struct net2280_dma_regs __iomem *dma = ep->dma;
3e76fdcb 857 unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
1da177e4 858
2eeb0016 859 if (!(ep->dev->quirks & PLX_2280))
3e76fdcb 860 tmp |= BIT(END_OF_CHAIN);
950ee4c8 861
fae3c158
RR		 862 writel(tmp, &dma->dmacount);
863 writel(readl(&dma->dmastat), &dma->dmastat);
1da177e4 864
fae3c158 865 writel(td_dma, &dma->dmadesc);
5185c913 866 if (ep->dev->quirks & PLX_PCIE)
3e76fdcb 867 dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
fae3c158 868 writel(dmactl, &dma->dmactl);
1da177e4
LT		 869
870 /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
fae3c158 871 (void) readl(&ep->dev->pci->pcimstctl);
1da177e4 872
3e76fdcb 873 writel(BIT(DMA_START), &dma->dmastat);
1da177e4
LT		 874
875 if (!ep->is_in)
fae3c158 876 stop_out_naking(ep);
1da177e4
LT		 877}
878
fae3c158 879static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
1da177e4
LT		 880{
881 u32 tmp;
882 struct net2280_dma_regs __iomem *dma = ep->dma;
883
884 /* FIXME can't use DMA for ZLPs */
885
886 /* on this path we "know" there's no dma active (yet) */
3e76fdcb 887 WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
fae3c158 888 writel(0, &ep->dma->dmactl);
1da177e4
LT		 889
890 /* previous OUT packet might have been short */
fae3c158
RR		 891 if (!ep->is_in && (readl(&ep->regs->ep_stat) &
892 BIT(NAK_OUT_PACKETS))) {
3e76fdcb 893 writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
1da177e4
LT		 894 &ep->regs->ep_stat);
895
fae3c158 896 tmp = readl(&ep->regs->ep_avail);
1da177e4 897 if (tmp) {
fae3c158 898 writel(readl(&dma->dmastat), &dma->dmastat);
1da177e4
LT		 899
900 /* transfer all/some fifo data */
fae3c158
RR		 901 writel(req->req.dma, &dma->dmaaddr);
902 tmp = min(tmp, req->req.length);
1da177e4
LT		 903
904 /* dma irq, faking scatterlist status */
fae3c158 905 req->td->dmacount = cpu_to_le32(req->req.length - tmp);
ae8e530a
RR		 906 writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
907 &dma->dmacount);
1da177e4
LT		 908 req->td->dmadesc = 0;
909 req->valid = 1;
910
3e76fdcb
RR		 911 writel(BIT(DMA_ENABLE), &dma->dmactl);
912 writel(BIT(DMA_START), &dma->dmastat);
1da177e4
LT		 913 return;
914 }
915 }
916
917 tmp = dmactl_default;
918
919 /* force packet boundaries between dma requests, but prevent the
920 * controller from automagically writing a last "short" packet
921 * (zero length) unless the driver explicitly said to do that.
922 */
923 if (ep->is_in) {
fae3c158
RR		 924 if (likely((req->req.length % ep->ep.maxpacket) ||
925 req->req.zero)){
3e76fdcb 926 tmp |= BIT(DMA_FIFO_VALIDATE);
1da177e4
LT		 927 ep->in_fifo_validate = 1;
928 } else
929 ep->in_fifo_validate = 0;
930 }
931
932 /* init req->td, pointing to the current dummy */
933 req->td->dmadesc = cpu_to_le32 (ep->td_dma);
fae3c158 934 fill_dma_desc(ep, req, 1);
1da177e4 935
90664198 936 req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
1da177e4 937
fae3c158 938 start_queue(ep, tmp, req->td_dma);
1da177e4
LT		 939}
940
941static inline void
fae3c158 942queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
1da177e4
LT		 943{
944 struct net2280_dma *end;
945 dma_addr_t tmp;
946
947 /* swap new dummy for old, link; fill and maybe activate */
948 end = ep->dummy;
949 ep->dummy = req->td;
950 req->td = end;
951
952 tmp = ep->td_dma;
953 ep->td_dma = req->td_dma;
954 req->td_dma = tmp;
955
956 end->dmadesc = cpu_to_le32 (ep->td_dma);
957
fae3c158 958 fill_dma_desc(ep, req, valid);
1da177e4
LT		 959}
960
961static void
fae3c158 962done(struct net2280_ep *ep, struct net2280_request *req, int status)
1da177e4
LT		 963{
964 struct net2280 *dev;
965 unsigned stopped = ep->stopped;
966
fae3c158 967 list_del_init(&req->queue);
1da177e4
LT		 968
969 if (req->req.status == -EINPROGRESS)
970 req->req.status = status;
971 else
972 status = req->req.status;
973
974 dev = ep->dev;
ae4d7933
FB		 975 if (ep->dma)
976 usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
1da177e4
LT		 977
978 if (status && status != -ESHUTDOWN)
e56e69cc 979 ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
1da177e4
LT		 980 ep->ep.name, &req->req, status,
981 req->req.actual, req->req.length);
982
983 /* don't modify queue heads during completion callback */
984 ep->stopped = 1;
fae3c158 985 spin_unlock(&dev->lock);
304f7e5e 986 usb_gadget_giveback_request(&ep->ep, &req->req);
fae3c158 987 spin_lock(&dev->lock);
1da177e4
LT		 988 ep->stopped = stopped;
989}
990
991/*-------------------------------------------------------------------------*/
992
993static int
fae3c158 994net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
1da177e4
LT		 995{
996 struct net2280_request *req;
997 struct net2280_ep *ep;
998 struct net2280 *dev;
999 unsigned long flags;
9ceafcc2 1000 int ret = 0;
1da177e4
LT		 1001
1002 /* we always require a cpu-view buffer, so that we can
1003 * always use pio (as fallback or whatever).
1004 */
fae3c158 1005 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1006 if (!_ep || (!ep->desc && ep->num != 0)) {
1007 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 1008 return -EINVAL;
9ceafcc2
MYK		 1009 }
1010 req = container_of(_req, struct net2280_request, req);
1011 if (!_req || !_req->complete || !_req->buf ||
1012 !list_empty(&req->queue)) {
1013 ret = -EINVAL;
1014 goto print_err;
1015 }
1016 if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) {
1017 ret = -EDOM;
1018 goto print_err;
1019 }
1da177e4 1020 dev = ep->dev;
9ceafcc2
MYK		 1021 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
1022 ret = -ESHUTDOWN;
1023 goto print_err;
1024 }
1da177e4
LT		 1025
1026 /* FIXME implement PIO fallback for ZLPs with DMA */
9ceafcc2
MYK		 1027 if (ep->dma && _req->length == 0) {
1028 ret = -EOPNOTSUPP;
1029 goto print_err;
1030 }
1da177e4
LT		 1031
1032 /* set up dma mapping in case the caller didn't */
ae4d7933 1033 if (ep->dma) {
ae4d7933
FB		 1034 ret = usb_gadget_map_request(&dev->gadget, _req,
1035 ep->is_in);
1036 if (ret)
9ceafcc2 1037 goto print_err;
1da177e4
LT		 1038 }
1039
e56e69cc 1040 ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
1da177e4 1041 _ep->name, _req, _req->length, _req->buf);
1da177e4 1042
fae3c158 1043 spin_lock_irqsave(&dev->lock, flags);
1da177e4
LT		 1044
1045 _req->status = -EINPROGRESS;
1046 _req->actual = 0;
1047
1048 /* kickstart this i/o queue? */
485f44d0 1049 if (list_empty(&ep->queue) && !ep->stopped &&
5185c913 1050 !((dev->quirks & PLX_PCIE) && ep->dma &&
485f44d0
RR		 1051 (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) {
1052
1da177e4 1053 /* use DMA if the endpoint supports it, else pio */
485f44d0 1054 if (ep->dma)
fae3c158 1055 start_dma(ep, req);
1da177e4
LT		 1056 else {
1057 /* maybe there's no control data, just status ack */
1058 if (ep->num == 0 && _req->length == 0) {
fae3c158
RR		 1059 allow_status(ep);
1060 done(ep, req, 0);
e56e69cc 1061 ep_vdbg(dev, "%s status ack\n", ep->ep.name);
1da177e4
LT		 1062 goto done;
1063 }
1064
1065 /* PIO ... stuff the fifo, or unblock it. */
1066 if (ep->is_in)
fae3c158
RR		 1067 write_fifo(ep, _req);
1068 else if (list_empty(&ep->queue)) {
1da177e4
LT		 1069 u32 s;
1070
1071 /* OUT FIFO might have packet(s) buffered */
fae3c158 1072 s = readl(&ep->regs->ep_stat);
3e76fdcb 1073 if ((s & BIT(FIFO_EMPTY)) == 0) {
1da177e4
LT		 1074 /* note: _req->short_not_ok is
1075 * ignored here since PIO _always_
1076 * stops queue advance here, and
1077 * _req->status doesn't change for
1078 * short reads (only _req->actual)
1079 */
fae3c158
RR		 1080 if (read_fifo(ep, req) &&
1081 ep->num == 0) {
1082 done(ep, req, 0);
1083 allow_status(ep);
1da177e4
LT		 1084 /* don't queue it */
1085 req = NULL;
fae3c158
RR		 1086 } else if (read_fifo(ep, req) &&
1087 ep->num != 0) {
1088 done(ep, req, 0);
1089 req = NULL;
1da177e4 1090 } else
fae3c158 1091 s = readl(&ep->regs->ep_stat);
1da177e4
LT		 1092 }
1093
1094 /* don't NAK, let the fifo fill */
3e76fdcb
RR		 1095 if (req && (s & BIT(NAK_OUT_PACKETS)))
1096 writel(BIT(CLEAR_NAK_OUT_PACKETS),
1da177e4
LT		 1097 &ep->regs->ep_rsp);
1098 }
1099 }
1100
1101 } else if (ep->dma) {
1102 int valid = 1;
1103
1104 if (ep->is_in) {
1105 int expect;
1106
1107 /* preventing magic zlps is per-engine state, not
1108 * per-transfer; irq logic must recover hiccups.
1109 */
fae3c158
RR		 1110 expect = likely(req->req.zero ||
1111 (req->req.length % ep->ep.maxpacket));
1da177e4
LT		 1112 if (expect != ep->in_fifo_validate)
1113 valid = 0;
1114 }
fae3c158 1115 queue_dma(ep, req, valid);
1da177e4
LT		 1116
1117 } /* else the irq handler advances the queue. */
1118
1f26e28d 1119 ep->responded = 1;
1da177e4 1120 if (req)
fae3c158 1121 list_add_tail(&req->queue, &ep->queue);
1da177e4 1122done:
fae3c158 1123 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1124
1125 /* pci writes may still be posted */
9ceafcc2
MYK		 1126 return ret;
1127
1128print_err:
1129 dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
1130 return ret;
1da177e4
LT		 1131}
1132
1133static inline void
fae3c158
RR		 1134dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
1135 int status)
1da177e4
LT		 1136{
1137 req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
fae3c158 1138 done(ep, req, status);
1da177e4
LT		 1139}
1140
1de2ebfb 1141static int scan_dma_completions(struct net2280_ep *ep)
1da177e4 1142{
1de2ebfb
JK		 1143 int num_completed = 0;
1144
1da177e4
LT		 1145 /* only look at descriptors that were "naturally" retired,
1146 * so fifo and list head state won't matter
1147 */
fae3c158 1148 while (!list_empty(&ep->queue)) {
1da177e4 1149 struct net2280_request *req;
ef5e2fa9 1150 u32 req_dma_count;
1da177e4 1151
fae3c158 1152 req = list_entry(ep->queue.next,
1da177e4
LT		 1153 struct net2280_request, queue);
1154 if (!req->valid)
1155 break;
fae3c158 1156 rmb();
ef5e2fa9
RM		 1157 req_dma_count = le32_to_cpup(&req->td->dmacount);
1158 if ((req_dma_count & BIT(VALID_BIT)) != 0)
1da177e4
LT		 1159 break;
1160
1161 /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
1162 * cases where DMA must be aborted; this code handles
1163 * all non-abort DMA completions.
1164 */
fae3c158 1165 if (unlikely(req->td->dmadesc == 0)) {
1da177e4 1166 /* paranoia */
ef5e2fa9
RM		 1167 u32 const ep_dmacount = readl(&ep->dma->dmacount);
1168
1169 if (ep_dmacount & DMA_BYTE_COUNT_MASK)
1da177e4
LT		 1170 break;
1171 /* single transfer mode */
ef5e2fa9 1172 dma_done(ep, req, req_dma_count, 0);
1de2ebfb 1173 num_completed++;
1da177e4 1174 break;
ae8e530a 1175 } else if (!ep->is_in &&
43780aaa 1176 (req->req.length % ep->ep.maxpacket) &&
5185c913 1177 !(ep->dev->quirks & PLX_PCIE)) {
1da177e4 1178
ef5e2fa9 1179 u32 const ep_stat = readl(&ep->regs->ep_stat);
1da177e4
LT		 1180 /* AVOID TROUBLE HERE by not issuing short reads from
1181 * your gadget driver. That helps avoids errata 0121,
1182 * 0122, and 0124; not all cases trigger the warning.
1183 */
ef5e2fa9 1184 if ((ep_stat & BIT(NAK_OUT_PACKETS)) == 0) {
e56e69cc 1185 ep_warn(ep->dev, "%s lost packet sync!\n",
1da177e4
LT		 1186 ep->ep.name);
1187 req->req.status = -EOVERFLOW;
fae3c158 1188 } else {
ef5e2fa9
RM		 1189 u32 const ep_avail = readl(&ep->regs->ep_avail);
1190 if (ep_avail) {
fae3c158
RR		 1191 /* fifo gets flushed later */
1192 ep->out_overflow = 1;
e56e69cc 1193 ep_dbg(ep->dev,
fae3c158 1194 "%s dma, discard %d len %d\n",
ef5e2fa9 1195 ep->ep.name, ep_avail,
1da177e4 1196 req->req.length);
fae3c158
RR		 1197 req->req.status = -EOVERFLOW;
1198 }
1da177e4
LT		 1199 }
1200 }
ef5e2fa9 1201 dma_done(ep, req, req_dma_count, 0);
1de2ebfb 1202 num_completed++;
1da177e4 1203 }
1de2ebfb
JK		 1204
1205 return num_completed;
1da177e4
LT		 1206}
1207
fae3c158 1208static void restart_dma(struct net2280_ep *ep)
1da177e4
LT		 1209{
1210 struct net2280_request *req;
1da177e4
LT		 1211
1212 if (ep->stopped)
1213 return;
fae3c158 1214 req = list_entry(ep->queue.next, struct net2280_request, queue);
1da177e4 1215
90664198 1216 start_dma(ep, req);
1da177e4
LT		 1217}
1218
e721c457 1219static void abort_dma(struct net2280_ep *ep)
1da177e4
LT		 1220{
1221 /* abort the current transfer */
fae3c158 1222 if (likely(!list_empty(&ep->queue))) {
1da177e4 1223 /* FIXME work around errata 0121, 0122, 0124 */
3e76fdcb 1224 writel(BIT(DMA_ABORT), &ep->dma->dmastat);
fae3c158 1225 spin_stop_dma(ep->dma);
1da177e4 1226 } else
fae3c158
RR		 1227 stop_dma(ep->dma);
1228 scan_dma_completions(ep);
1da177e4
LT		 1229}
1230
1231/* dequeue ALL requests */
fae3c158 1232static void nuke(struct net2280_ep *ep)
1da177e4
LT		 1233{
1234 struct net2280_request *req;
1235
1236 /* called with spinlock held */
1237 ep->stopped = 1;
1238 if (ep->dma)
fae3c158
RR		 1239 abort_dma(ep);
1240 while (!list_empty(&ep->queue)) {
1241 req = list_entry(ep->queue.next,
1da177e4
LT		 1242 struct net2280_request,
1243 queue);
fae3c158 1244 done(ep, req, -ESHUTDOWN);
1da177e4
LT		 1245 }
1246}
1247
1248/* dequeue JUST ONE request */
fae3c158 1249static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1da177e4
LT		 1250{
1251 struct net2280_ep *ep;
1252 struct net2280_request *req;
1253 unsigned long flags;
1254 u32 dmactl;
1255 int stopped;
1256
fae3c158 1257 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1258 if (!_ep || (!ep->desc && ep->num != 0) || !_req) {
1259 pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n",
1260 __func__, _ep, _req);
1da177e4 1261 return -EINVAL;
9ceafcc2 1262 }
1da177e4 1263
fae3c158 1264 spin_lock_irqsave(&ep->dev->lock, flags);
1da177e4
LT		 1265 stopped = ep->stopped;
1266
1267 /* quiesce dma while we patch the queue */
1268 dmactl = 0;
1269 ep->stopped = 1;
1270 if (ep->dma) {
fae3c158 1271 dmactl = readl(&ep->dma->dmactl);
1da177e4 1272 /* WARNING erratum 0127 may kick in ... */
fae3c158
RR		 1273 stop_dma(ep->dma);
1274 scan_dma_completions(ep);
1da177e4
LT		 1275 }
1276
1277 /* make sure it's still queued on this endpoint */
fae3c158 1278 list_for_each_entry(req, &ep->queue, queue) {
1da177e4
LT		 1279 if (&req->req == _req)
1280 break;
1281 }
1282 if (&req->req != _req) {
fae3c158 1283 spin_unlock_irqrestore(&ep->dev->lock, flags);
9ceafcc2
MYK		 1284 dev_err(&ep->dev->pdev->dev, "%s: Request mismatch\n",
1285 __func__);
1da177e4
LT		 1286 return -EINVAL;
1287 }
1288
1289 /* queue head may be partially complete. */
1290 if (ep->queue.next == &req->queue) {
1291 if (ep->dma) {
e56e69cc 1292 ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
1da177e4 1293 _req->status = -ECONNRESET;
fae3c158
RR		 1294 abort_dma(ep);
1295 if (likely(ep->queue.next == &req->queue)) {
1296 /* NOTE: misreports single-transfer mode*/
1da177e4 1297 req->td->dmacount = 0; /* invalidate */
fae3c158
RR		 1298 dma_done(ep, req,
1299 readl(&ep->dma->dmacount),
1da177e4
LT		 1300 -ECONNRESET);
1301 }
1302 } else {
e56e69cc 1303 ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
fae3c158 1304 done(ep, req, -ECONNRESET);
1da177e4
LT		 1305 }
1306 req = NULL;
1da177e4
LT		 1307 }
1308
1309 if (req)
fae3c158 1310 done(ep, req, -ECONNRESET);
1da177e4
LT		 1311 ep->stopped = stopped;
1312
1313 if (ep->dma) {
1314 /* turn off dma on inactive queues */
fae3c158
RR		 1315 if (list_empty(&ep->queue))
1316 stop_dma(ep->dma);
1da177e4
LT		 1317 else if (!ep->stopped) {
1318 /* resume current request, or start new one */
1319 if (req)
fae3c158 1320 writel(dmactl, &ep->dma->dmactl);
1da177e4 1321 else
fae3c158 1322 start_dma(ep, list_entry(ep->queue.next,
1da177e4
LT		 1323 struct net2280_request, queue));
1324 }
1325 }
1326
fae3c158 1327 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 1328 return 0;
1329}
1330
1331/*-------------------------------------------------------------------------*/
1332
fae3c158 1333static int net2280_fifo_status(struct usb_ep *_ep);
1da177e4
LT		 1334
1335static int
8066134f 1336net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
1da177e4
LT		 1337{
1338 struct net2280_ep *ep;
1339 unsigned long flags;
1340 int retval = 0;
1341
fae3c158 1342 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1343 if (!_ep || (!ep->desc && ep->num != 0)) {
1344 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 1345 return -EINVAL;
9ceafcc2
MYK		 1346 }
1347 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
1348 retval = -ESHUTDOWN;
1349 goto print_err;
1350 }
1da177e4 1351 if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
9ceafcc2
MYK		 1352 == USB_ENDPOINT_XFER_ISOC) {
1353 retval = -EINVAL;
1354 goto print_err;
1355 }
1da177e4 1356
fae3c158 1357 spin_lock_irqsave(&ep->dev->lock, flags);
9ceafcc2 1358 if (!list_empty(&ep->queue)) {
1da177e4 1359 retval = -EAGAIN;
9ceafcc2
MYK		 1360 goto print_unlock;
1361 } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) {
1da177e4 1362 retval = -EAGAIN;
9ceafcc2
MYK		 1363 goto print_unlock;
1364 } else {
e56e69cc 1365 ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
8066134f
AS		 1366 value ? "set" : "clear",
1367 wedged ? "wedge" : "halt");
1da177e4
LT		 1368 /* set/clear, then synch memory views with the device */
1369 if (value) {
1370 if (ep->num == 0)
1371 ep->dev->protocol_stall = 1;
1372 else
fae3c158 1373 set_halt(ep);
8066134f
AS		 1374 if (wedged)
1375 ep->wedged = 1;
1376 } else {
fae3c158 1377 clear_halt(ep);
5185c913 1378 if (ep->dev->quirks & PLX_PCIE &&
adc82f77
RR		 1379 !list_empty(&ep->queue) && ep->td_dma)
1380 restart_dma(ep);
8066134f
AS		 1381 ep->wedged = 0;
1382 }
fae3c158 1383 (void) readl(&ep->regs->ep_rsp);
1da177e4 1384 }
fae3c158 1385 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 1386
1387 return retval;
9ceafcc2
MYK		 1388
1389print_unlock:
1390 spin_unlock_irqrestore(&ep->dev->lock, flags);
1391print_err:
1392 dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval);
1393 return retval;
1da177e4
LT		 1394}
1395
fae3c158 1396static int net2280_set_halt(struct usb_ep *_ep, int value)
8066134f
AS		 1397{
1398 return net2280_set_halt_and_wedge(_ep, value, 0);
1399}
1400
fae3c158 1401static int net2280_set_wedge(struct usb_ep *_ep)
8066134f 1402{
9ceafcc2
MYK		 1403 if (!_ep || _ep->name == ep0name) {
1404 pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep);
8066134f 1405 return -EINVAL;
9ceafcc2 1406 }
8066134f
AS		 1407 return net2280_set_halt_and_wedge(_ep, 1, 1);
1408}
1409
fae3c158 1410static int net2280_fifo_status(struct usb_ep *_ep)
1da177e4
LT		 1411{
1412 struct net2280_ep *ep;
1413 u32 avail;
1414
fae3c158 1415 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1416 if (!_ep || (!ep->desc && ep->num != 0)) {
1417 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 1418 return -ENODEV;
9ceafcc2
MYK		 1419 }
1420 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
1421 dev_err(&ep->dev->pdev->dev,
1422 "%s: Invalid driver=%p or speed=%d\n",
1423 __func__, ep->dev->driver, ep->dev->gadget.speed);
1da177e4 1424 return -ESHUTDOWN;
9ceafcc2 1425 }
1da177e4 1426
3e76fdcb 1427 avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
9ceafcc2
MYK		 1428 if (avail > ep->fifo_size) {
1429 dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__);
1da177e4 1430 return -EOVERFLOW;
9ceafcc2 1431 }
1da177e4
LT		 1432 if (ep->is_in)
1433 avail = ep->fifo_size - avail;
1434 return avail;
1435}
1436
fae3c158 1437static void net2280_fifo_flush(struct usb_ep *_ep)
1da177e4
LT		 1438{
1439 struct net2280_ep *ep;
1440
fae3c158 1441 ep = container_of(_ep, struct net2280_ep, ep);
9ceafcc2
MYK		 1442 if (!_ep || (!ep->desc && ep->num != 0)) {
1443 pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
1da177e4 1444 return;
9ceafcc2
MYK		 1445 }
1446 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
1447 dev_err(&ep->dev->pdev->dev,
1448 "%s: Invalid driver=%p or speed=%d\n",
1449 __func__, ep->dev->driver, ep->dev->gadget.speed);
1da177e4 1450 return;
9ceafcc2 1451 }
1da177e4 1452
3e76fdcb 1453 writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
fae3c158 1454 (void) readl(&ep->regs->ep_rsp);
1da177e4
LT		 1455}
1456
901b3d75 1457static const struct usb_ep_ops net2280_ep_ops = {
1da177e4
LT		 1458 .enable = net2280_enable,
1459 .disable = net2280_disable,
1460
1461 .alloc_request = net2280_alloc_request,
1462 .free_request = net2280_free_request,
1463
1da177e4
LT		 1464 .queue = net2280_queue,
1465 .dequeue = net2280_dequeue,
1466
1467 .set_halt = net2280_set_halt,
8066134f 1468 .set_wedge = net2280_set_wedge,
1da177e4
LT		 1469 .fifo_status = net2280_fifo_status,
1470 .fifo_flush = net2280_fifo_flush,
1471};
1472
1473/*-------------------------------------------------------------------------*/
1474
fae3c158 1475static int net2280_get_frame(struct usb_gadget *_gadget)
1da177e4
LT		 1476{
1477 struct net2280 *dev;
1478 unsigned long flags;
1479 u16 retval;
1480
1481 if (!_gadget)
1482 return -ENODEV;
fae3c158
RR		 1483 dev = container_of(_gadget, struct net2280, gadget);
1484 spin_lock_irqsave(&dev->lock, flags);
1485 retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
1486 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1487 return retval;
1488}
1489
fae3c158 1490static int net2280_wakeup(struct usb_gadget *_gadget)
1da177e4
LT		 1491{
1492 struct net2280 *dev;
1493 u32 tmp;
1494 unsigned long flags;
1495
1496 if (!_gadget)
1497 return 0;
fae3c158 1498 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1499
fae3c158
RR		 1500 spin_lock_irqsave(&dev->lock, flags);
1501 tmp = readl(&dev->usb->usbctl);
3e76fdcb
RR		 1502 if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
1503 writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
fae3c158 1504 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1505
1506 /* pci writes may still be posted */
1507 return 0;
1508}
1509
fae3c158 1510static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
1da177e4
LT		 1511{
1512 struct net2280 *dev;
1513 u32 tmp;
1514 unsigned long flags;
1515
1516 if (!_gadget)
1517 return 0;
fae3c158 1518 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1519
fae3c158
RR		 1520 spin_lock_irqsave(&dev->lock, flags);
1521 tmp = readl(&dev->usb->usbctl);
adc82f77 1522 if (value) {
3e76fdcb 1523 tmp |= BIT(SELF_POWERED_STATUS);
c8678d9f 1524 _gadget->is_selfpowered = 1;
adc82f77 1525 } else {
3e76fdcb 1526 tmp &= ~BIT(SELF_POWERED_STATUS);
c8678d9f 1527 _gadget->is_selfpowered = 0;
adc82f77 1528 }
fae3c158
RR		 1529 writel(tmp, &dev->usb->usbctl);
1530 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1531
1532 return 0;
1533}
1534
1535static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
1536{
1537 struct net2280 *dev;
1538 u32 tmp;
1539 unsigned long flags;
1540
1541 if (!_gadget)
1542 return -ENODEV;
fae3c158 1543 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1544
fae3c158
RR		 1545 spin_lock_irqsave(&dev->lock, flags);
1546 tmp = readl(&dev->usb->usbctl);
1da177e4 1547 dev->softconnect = (is_on != 0);
11bece5e
MYK		 1548 if (is_on) {
1549 ep0_start(dev);
1550 writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
1551 } else {
1552 writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
1553 stop_activity(dev, dev->driver);
1554 }
1555
fae3c158 1556 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1557
1558 return 0;
1559}
1560
3e8b2318
RB		 1561static struct usb_ep *net2280_match_ep(struct usb_gadget *_gadget,
1562 struct usb_endpoint_descriptor *desc,
1563 struct usb_ss_ep_comp_descriptor *ep_comp)
1564{
1565 char name[8];
1566 struct usb_ep *ep;
1567
1568 if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT) {
1569 /* ep-e, ep-f are PIO with only 64 byte fifos */
1570 ep = gadget_find_ep_by_name(_gadget, "ep-e");
1571 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1572 return ep;
1573 ep = gadget_find_ep_by_name(_gadget, "ep-f");
1574 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1575 return ep;
1576 }
1577
17f6ed62
JK		 1578 /* USB3380: Only first four endpoints have DMA channels. Allocate
1579 * slower interrupt endpoints from PIO hw endpoints, to allow bulk/isoc
1580 * endpoints use DMA hw endpoints.
1581 */
1582 if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
1583 usb_endpoint_dir_in(desc)) {
1584 ep = gadget_find_ep_by_name(_gadget, "ep2in");
1585 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1586 return ep;
1587 ep = gadget_find_ep_by_name(_gadget, "ep4in");
1588 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1589 return ep;
1590 } else if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
1591 !usb_endpoint_dir_in(desc)) {
1592 ep = gadget_find_ep_by_name(_gadget, "ep1out");
1593 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1594 return ep;
1595 ep = gadget_find_ep_by_name(_gadget, "ep3out");
1596 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1597 return ep;
1598 } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
1599 usb_endpoint_dir_in(desc)) {
1600 ep = gadget_find_ep_by_name(_gadget, "ep1in");
1601 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1602 return ep;
1603 ep = gadget_find_ep_by_name(_gadget, "ep3in");
1604 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1605 return ep;
1606 } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
1607 !usb_endpoint_dir_in(desc)) {
1608 ep = gadget_find_ep_by_name(_gadget, "ep2out");
1609 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1610 return ep;
1611 ep = gadget_find_ep_by_name(_gadget, "ep4out");
1612 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1613 return ep;
1614 }
1615
3e8b2318
RB		 1616 /* USB3380: use same address for usb and hardware endpoints */
1617 snprintf(name, sizeof(name), "ep%d%s", usb_endpoint_num(desc),
1618 usb_endpoint_dir_in(desc) ? "in" : "out");
1619 ep = gadget_find_ep_by_name(_gadget, name);
1620 if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
1621 return ep;
1622
1623 return NULL;
1624}
1625
4cf5e00b
FB		 1626static int net2280_start(struct usb_gadget *_gadget,
1627 struct usb_gadget_driver *driver);
22835b80 1628static int net2280_stop(struct usb_gadget *_gadget);
0f91349b 1629
1da177e4
LT		 1630static const struct usb_gadget_ops net2280_ops = {
1631 .get_frame = net2280_get_frame,
1632 .wakeup = net2280_wakeup,
1633 .set_selfpowered = net2280_set_selfpowered,
1634 .pullup = net2280_pullup,
4cf5e00b
FB		 1635 .udc_start = net2280_start,
1636 .udc_stop = net2280_stop,
3e8b2318 1637 .match_ep = net2280_match_ep,
1da177e4
LT		 1638};
1639
1640/*-------------------------------------------------------------------------*/
1641
b99b406c 1642#ifdef CONFIG_USB_GADGET_DEBUG_FILES
1da177e4
LT		 1643
1644/* FIXME move these into procfs, and use seq_file.
1645 * Sysfs _still_ doesn't behave for arbitrarily sized files,
1646 * and also doesn't help products using this with 2.4 kernels.
1647 */
1648
1649/* "function" sysfs attribute */
ce26bd23
GKH		 1650static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
1651 char *buf)
1da177e4 1652{
fae3c158 1653 struct net2280 *dev = dev_get_drvdata(_dev);
1da177e4 1654
fae3c158
RR		 1655 if (!dev->driver || !dev->driver->function ||
1656 strlen(dev->driver->function) > PAGE_SIZE)
1da177e4 1657 return 0;
fae3c158 1658 return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1da177e4 1659}
ce26bd23 1660static DEVICE_ATTR_RO(function);
1da177e4 1661
ce26bd23
GKH		 1662static ssize_t registers_show(struct device *_dev,
1663 struct device_attribute *attr, char *buf)
1da177e4
LT		 1664{
1665 struct net2280 *dev;
1666 char *next;
1667 unsigned size, t;
1668 unsigned long flags;
1669 int i;
1670 u32 t1, t2;
30e69598 1671 const char *s;
1da177e4 1672
fae3c158 1673 dev = dev_get_drvdata(_dev);
1da177e4
LT		 1674 next = buf;
1675 size = PAGE_SIZE;
fae3c158 1676 spin_lock_irqsave(&dev->lock, flags);
1da177e4
LT		 1677
1678 if (dev->driver)
1679 s = dev->driver->driver.name;
1680 else
1681 s = "(none)";
1682
1683 /* Main Control Registers */
fae3c158 1684 t = scnprintf(next, size, "%s version " DRIVER_VERSION
d588ff58 1685 ", chiprev %04x\n\n"
1da177e4
LT		 1686 "devinit %03x fifoctl %08x gadget '%s'\n"
1687 "pci irqenb0 %02x irqenb1 %08x "
1688 "irqstat0 %04x irqstat1 %08x\n",
1689 driver_name, dev->chiprev,
fae3c158
RR		 1690 readl(&dev->regs->devinit),
1691 readl(&dev->regs->fifoctl),
1da177e4 1692 s,
fae3c158
RR		 1693 readl(&dev->regs->pciirqenb0),
1694 readl(&dev->regs->pciirqenb1),
1695 readl(&dev->regs->irqstat0),
1696 readl(&dev->regs->irqstat1));
1da177e4
LT		 1697 size -= t;
1698 next += t;
1699
1700 /* USB Control Registers */
fae3c158
RR		 1701 t1 = readl(&dev->usb->usbctl);
1702 t2 = readl(&dev->usb->usbstat);
3e76fdcb
RR		 1703 if (t1 & BIT(VBUS_PIN)) {
1704 if (t2 & BIT(HIGH_SPEED))
1da177e4
LT		 1705 s = "high speed";
1706 else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1707 s = "powered";
1708 else
1709 s = "full speed";
1710 /* full speed bit (6) not working?? */
1711 } else
1712 s = "not attached";
fae3c158 1713 t = scnprintf(next, size,
1da177e4
LT		 1714 "stdrsp %08x usbctl %08x usbstat %08x "
1715 "addr 0x%02x (%s)\n",
fae3c158
RR		 1716 readl(&dev->usb->stdrsp), t1, t2,
1717 readl(&dev->usb->ouraddr), s);
1da177e4
LT		 1718 size -= t;
1719 next += t;
1720
1721 /* PCI Master Control Registers */
1722
1723 /* DMA Control Registers */
1724
1725 /* Configurable EP Control Registers */
adc82f77 1726 for (i = 0; i < dev->n_ep; i++) {
1da177e4
LT		 1727 struct net2280_ep *ep;
1728
fae3c158 1729 ep = &dev->ep[i];
1da177e4
LT		 1730 if (i && !ep->desc)
1731 continue;
1732
adc82f77 1733 t1 = readl(&ep->cfg->ep_cfg);
fae3c158
RR		 1734 t2 = readl(&ep->regs->ep_rsp) & 0xff;
1735 t = scnprintf(next, size,
1da177e4
LT		 1736 "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
1737 "irqenb %02x\n",
1738 ep->ep.name, t1, t2,
3e76fdcb 1739 (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
1da177e4 1740 ? "NAK " : "",
3e76fdcb 1741 (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
1da177e4 1742 ? "hide " : "",
3e76fdcb 1743 (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
1da177e4 1744 ? "CRC " : "",
3e76fdcb 1745 (t2 & BIT(CLEAR_INTERRUPT_MODE))
1da177e4 1746 ? "interrupt " : "",
3e76fdcb 1747 (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
1da177e4 1748 ? "status " : "",
3e76fdcb 1749 (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
1da177e4 1750 ? "NAKmode " : "",
3e76fdcb 1751 (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
1da177e4 1752 ? "DATA1 " : "DATA0 ",
3e76fdcb 1753 (t2 & BIT(CLEAR_ENDPOINT_HALT))
1da177e4 1754 ? "HALT " : "",
fae3c158 1755 readl(&ep->regs->ep_irqenb));
1da177e4
LT		 1756 size -= t;
1757 next += t;
1758
fae3c158 1759 t = scnprintf(next, size,
1da177e4
LT		 1760 "\tstat %08x avail %04x "
1761 "(ep%d%s-%s)%s\n",
fae3c158
RR		 1762 readl(&ep->regs->ep_stat),
1763 readl(&ep->regs->ep_avail),
1764 t1 & 0x0f, DIR_STRING(t1),
1765 type_string(t1 >> 8),
1da177e4
LT		 1766 ep->stopped ? "*" : "");
1767 size -= t;
1768 next += t;
1769
1770 if (!ep->dma)
1771 continue;
1772
fae3c158 1773 t = scnprintf(next, size,
1da177e4
LT		 1774 " dma\tctl %08x stat %08x count %08x\n"
1775 "\taddr %08x desc %08x\n",
fae3c158
RR		 1776 readl(&ep->dma->dmactl),
1777 readl(&ep->dma->dmastat),
1778 readl(&ep->dma->dmacount),
1779 readl(&ep->dma->dmaaddr),
1780 readl(&ep->dma->dmadesc));
1da177e4
LT		 1781 size -= t;
1782 next += t;
1783
1784 }
1785
fae3c158 1786 /* Indexed Registers (none yet) */
1da177e4
LT		 1787
1788 /* Statistics */
fae3c158 1789 t = scnprintf(next, size, "\nirqs: ");
1da177e4
LT		 1790 size -= t;
1791 next += t;
adc82f77 1792 for (i = 0; i < dev->n_ep; i++) {
1da177e4
LT		 1793 struct net2280_ep *ep;
1794
fae3c158 1795 ep = &dev->ep[i];
1da177e4
LT		 1796 if (i && !ep->irqs)
1797 continue;
fae3c158 1798 t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
1da177e4
LT		 1799 size -= t;
1800 next += t;
1801
1802 }
fae3c158 1803 t = scnprintf(next, size, "\n");
1da177e4
LT		 1804 size -= t;
1805 next += t;
1806
fae3c158 1807 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1808
1809 return PAGE_SIZE - size;
1810}
ce26bd23 1811static DEVICE_ATTR_RO(registers);
1da177e4 1812
ce26bd23
GKH		 1813static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
1814 char *buf)
1da177e4
LT		 1815{
1816 struct net2280 *dev;
1817 char *next;
1818 unsigned size;
1819 unsigned long flags;
1820 int i;
1821
fae3c158 1822 dev = dev_get_drvdata(_dev);
1da177e4
LT		 1823 next = buf;
1824 size = PAGE_SIZE;
fae3c158 1825 spin_lock_irqsave(&dev->lock, flags);
1da177e4 1826
adc82f77 1827 for (i = 0; i < dev->n_ep; i++) {
fae3c158 1828 struct net2280_ep *ep = &dev->ep[i];
1da177e4
LT		 1829 struct net2280_request *req;
1830 int t;
1831
1832 if (i != 0) {
1833 const struct usb_endpoint_descriptor *d;
1834
1835 d = ep->desc;
1836 if (!d)
1837 continue;
1838 t = d->bEndpointAddress;
fae3c158 1839 t = scnprintf(next, size,
1da177e4
LT		 1840 "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
1841 ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
1842 (t & USB_DIR_IN) ? "in" : "out",
a27f37a1 1843 type_string(d->bmAttributes),
090bdb5c 1844 usb_endpoint_maxp(d),
1da177e4
LT		 1845 ep->dma ? "dma" : "pio", ep->fifo_size
1846 );
1847 } else /* ep0 should only have one transfer queued */
fae3c158 1848 t = scnprintf(next, size, "ep0 max 64 pio %s\n",
1da177e4
LT		 1849 ep->is_in ? "in" : "out");
1850 if (t <= 0 || t > size)
1851 goto done;
1852 size -= t;
1853 next += t;
1854
fae3c158
RR		 1855 if (list_empty(&ep->queue)) {
1856 t = scnprintf(next, size, "\t(nothing queued)\n");
1da177e4
LT		 1857 if (t <= 0 || t > size)
1858 goto done;
1859 size -= t;
1860 next += t;
1861 continue;
1862 }
fae3c158
RR		 1863 list_for_each_entry(req, &ep->queue, queue) {
1864 if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
1865 t = scnprintf(next, size,
1da177e4
LT		 1866 "\treq %p len %d/%d "
1867 "buf %p (dmacount %08x)\n",
1868 &req->req, req->req.actual,
1869 req->req.length, req->req.buf,
fae3c158 1870 readl(&ep->dma->dmacount));
1da177e4 1871 else
fae3c158 1872 t = scnprintf(next, size,
1da177e4
LT		 1873 "\treq %p len %d/%d buf %p\n",
1874 &req->req, req->req.actual,
1875 req->req.length, req->req.buf);
1876 if (t <= 0 || t > size)
1877 goto done;
1878 size -= t;
1879 next += t;
1880
1881 if (ep->dma) {
1882 struct net2280_dma *td;
1883
1884 td = req->td;
fae3c158 1885 t = scnprintf(next, size, "\t td %08x "
1da177e4
LT		 1886 " count %08x buf %08x desc %08x\n",
1887 (u32) req->td_dma,
fae3c158
RR		 1888 le32_to_cpu(td->dmacount),
1889 le32_to_cpu(td->dmaaddr),
1890 le32_to_cpu(td->dmadesc));
1da177e4
LT		 1891 if (t <= 0 || t > size)
1892 goto done;
1893 size -= t;
1894 next += t;
1895 }
1896 }
1897 }
1898
1899done:
fae3c158 1900 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1901 return PAGE_SIZE - size;
1902}
ce26bd23 1903static DEVICE_ATTR_RO(queues);
1da177e4
LT		 1904
1905
1906#else
1907
fae3c158
RR		 1908#define device_create_file(a, b) (0)
1909#define device_remove_file(a, b) do { } while (0)
1da177e4
LT		 1910
1911#endif
1912
1913/*-------------------------------------------------------------------------*/
1914
1915/* another driver-specific mode might be a request type doing dma
1916 * to/from another device fifo instead of to/from memory.
1917 */
1918
fae3c158 1919static void set_fifo_mode(struct net2280 *dev, int mode)
1da177e4
LT		 1920{
1921 /* keeping high bits preserves BAR2 */
fae3c158 1922 writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
1da177e4
LT		 1923
1924 /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
fae3c158
RR		 1925 INIT_LIST_HEAD(&dev->gadget.ep_list);
1926 list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
1927 list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
1da177e4
LT		 1928 switch (mode) {
1929 case 0:
fae3c158
RR		 1930 list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
1931 list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
1932 dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
1da177e4
LT		 1933 break;
1934 case 1:
fae3c158 1935 dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
1da177e4
LT		 1936 break;
1937 case 2:
fae3c158
RR		 1938 list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
1939 dev->ep[1].fifo_size = 2048;
1940 dev->ep[2].fifo_size = 1024;
1da177e4
LT		 1941 break;
1942 }
1943 /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
fae3c158
RR		 1944 list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
1945 list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
1da177e4
LT		 1946}
1947
adc82f77
RR		 1948static void defect7374_disable_data_eps(struct net2280 *dev)
1949{
1950 /*
1951 * For Defect 7374, disable data EPs (and more):
1952 * - This phase undoes the earlier phase of the Defect 7374 workaround,
1953 * returing ep regs back to normal.
1954 */
1955 struct net2280_ep *ep;
1956 int i;
1957 unsigned char ep_sel;
1958 u32 tmp_reg;
1959
1960 for (i = 1; i < 5; i++) {
1961 ep = &dev->ep[i];
81e9d14a 1962 writel(i, &ep->cfg->ep_cfg);
adc82f77
RR		 1963 }
1964
1965 /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
1966 for (i = 0; i < 6; i++)
1967 writel(0, &dev->dep[i].dep_cfg);
1968
1969 for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
1970 /* Select an endpoint for subsequent operations: */
1971 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
1972 writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
1973
1974 if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
1975 ep_sel == 18 || ep_sel == 20)
1976 continue;
1977
1978 /* Change settings on some selected endpoints */
1979 tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
3e76fdcb 1980 tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
adc82f77
RR		 1981 writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
1982 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
3e76fdcb 1983 tmp_reg |= BIT(EP_INITIALIZED);
adc82f77
RR		 1984 writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
1985 }
1986}
1987
1988static void defect7374_enable_data_eps_zero(struct net2280 *dev)
1989{
1990 u32 tmp = 0, tmp_reg;
5517525e 1991 u32 scratch;
adc82f77
RR		 1992 int i;
1993 unsigned char ep_sel;
1994
1995 scratch = get_idx_reg(dev->regs, SCRATCH);
5517525e
RR		 1996
1997 WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD))
1998 == DEFECT7374_FSM_SS_CONTROL_READ);
1999
adc82f77
RR		 2000 scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
2001
5517525e
RR		 2002 ep_warn(dev, "Operate Defect 7374 workaround soft this time");
2003 ep_warn(dev, "It will operate on cold-reboot and SS connect");
adc82f77 2004
5517525e
RR		 2005 /*GPEPs:*/
2006 tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
2007 (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
2008 ((dev->enhanced_mode) ?
25d40ee8
MYK		 2009 BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) :
2010 BIT(ENDPOINT_ENABLE)));
adc82f77 2011
5517525e
RR		 2012 for (i = 1; i < 5; i++)
2013 writel(tmp, &dev->ep[i].cfg->ep_cfg);
adc82f77 2014
5517525e
RR		 2015 /* CSRIN, PCIIN, STATIN, RCIN*/
2016 tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
2017 writel(tmp, &dev->dep[1].dep_cfg);
2018 writel(tmp, &dev->dep[3].dep_cfg);
2019 writel(tmp, &dev->dep[4].dep_cfg);
2020 writel(tmp, &dev->dep[5].dep_cfg);
adc82f77 2021
5517525e
RR		 2022 /*Implemented for development and debug.
2023 * Can be refined/tuned later.*/
2024 for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
2025 /* Select an endpoint for subsequent operations: */
2026 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
2027 writel(((tmp_reg & ~0x1f) | ep_sel),
2028 &dev->plregs->pl_ep_ctrl);
2029
2030 if (ep_sel == 1) {
2031 tmp =
2032 (readl(&dev->plregs->pl_ep_ctrl) |
2033 BIT(CLEAR_ACK_ERROR_CODE) | 0);
2034 writel(tmp, &dev->plregs->pl_ep_ctrl);
2035 continue;
adc82f77
RR		 2036 }
2037
5517525e
RR		 2038 if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
2039 ep_sel == 18 || ep_sel == 20)
2040 continue;
2041
2042 tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
2043 BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
2044 writel(tmp, &dev->plregs->pl_ep_cfg_4);
2045
2046 tmp = readl(&dev->plregs->pl_ep_ctrl) &
2047 ~BIT(EP_INITIALIZED);
2048 writel(tmp, &dev->plregs->pl_ep_ctrl);
adc82f77 2049
adc82f77 2050 }
5517525e
RR		 2051
2052 /* Set FSM to focus on the first Control Read:
2053 * - Tip: Connection speed is known upon the first
2054 * setup request.*/
2055 scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
2056 set_idx_reg(dev->regs, SCRATCH, scratch);
2057
adc82f77
RR		 2058}
2059
1da177e4
LT		 2060/* keeping it simple:
2061 * - one bus driver, initted first;
2062 * - one function driver, initted second
2063 *
2064 * most of the work to support multiple net2280 controllers would
2065 * be to associate this gadget driver (yes?) with all of them, or
2066 * perhaps to bind specific drivers to specific devices.
2067 */
2068
adc82f77 2069static void usb_reset_228x(struct net2280 *dev)
1da177e4
LT		 2070{
2071 u32 tmp;
2072
2073 dev->gadget.speed = USB_SPEED_UNKNOWN;
fae3c158 2074 (void) readl(&dev->usb->usbctl);
1da177e4 2075
fae3c158 2076 net2280_led_init(dev);
1da177e4
LT		 2077
2078 /* disable automatic responses, and irqs */
fae3c158
RR		 2079 writel(0, &dev->usb->stdrsp);
2080 writel(0, &dev->regs->pciirqenb0);
2081 writel(0, &dev->regs->pciirqenb1);
1da177e4
LT		 2082
2083 /* clear old dma and irq state */
2084 for (tmp = 0; tmp < 4; tmp++) {
adc82f77 2085 struct net2280_ep *ep = &dev->ep[tmp + 1];
1da177e4 2086 if (ep->dma)
adc82f77 2087 abort_dma(ep);
1da177e4 2088 }
adc82f77 2089
fae3c158 2090 writel(~0, &dev->regs->irqstat0),
3e76fdcb 2091 writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
1da177e4
LT		 2092
2093 /* reset, and enable pci */
3e76fdcb
RR		 2094 tmp = readl(&dev->regs->devinit) |
2095 BIT(PCI_ENABLE) |
2096 BIT(FIFO_SOFT_RESET) |
2097 BIT(USB_SOFT_RESET) |
2098 BIT(M8051_RESET);
fae3c158 2099 writel(tmp, &dev->regs->devinit);
1da177e4
LT		 2100
2101 /* standard fifo and endpoint allocations */
fae3c158 2102 set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
1da177e4
LT		 2103}
2104
adc82f77
RR		 2105static void usb_reset_338x(struct net2280 *dev)
2106{
2107 u32 tmp;
adc82f77
RR		 2108
2109 dev->gadget.speed = USB_SPEED_UNKNOWN;
2110 (void)readl(&dev->usb->usbctl);
2111
2112 net2280_led_init(dev);
2113
5517525e 2114 if (dev->bug7734_patched) {
adc82f77
RR		 2115 /* disable automatic responses, and irqs */
2116 writel(0, &dev->usb->stdrsp);
2117 writel(0, &dev->regs->pciirqenb0);
2118 writel(0, &dev->regs->pciirqenb1);
2119 }
2120
2121 /* clear old dma and irq state */
2122 for (tmp = 0; tmp < 4; tmp++) {
2123 struct net2280_ep *ep = &dev->ep[tmp + 1];
3fc0a7c3 2124 struct net2280_dma_regs __iomem *dma;
adc82f77 2125
3fc0a7c3 2126 if (ep->dma) {
adc82f77 2127 abort_dma(ep);
3fc0a7c3
MYK		 2128 } else {
2129 dma = &dev->dma[tmp];
2130 writel(BIT(DMA_ABORT), &dma->dmastat);
2131 writel(0, &dma->dmactl);
2132 }
adc82f77
RR		 2133 }
2134
2135 writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
2136
5517525e 2137 if (dev->bug7734_patched) {
adc82f77
RR		 2138 /* reset, and enable pci */
2139 tmp = readl(&dev->regs->devinit) |
3e76fdcb
RR		 2140 BIT(PCI_ENABLE) |
2141 BIT(FIFO_SOFT_RESET) |
2142 BIT(USB_SOFT_RESET) |
2143 BIT(M8051_RESET);
adc82f77
RR		 2144
2145 writel(tmp, &dev->regs->devinit);
2146 }
2147
2148 /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
2149 INIT_LIST_HEAD(&dev->gadget.ep_list);
2150
2151 for (tmp = 1; tmp < dev->n_ep; tmp++)
2152 list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
2153
2154}
2155
2156static void usb_reset(struct net2280 *dev)
2157{
2eeb0016 2158 if (dev->quirks & PLX_LEGACY)
adc82f77
RR		 2159 return usb_reset_228x(dev);
2160 return usb_reset_338x(dev);
2161}
2162
2163static void usb_reinit_228x(struct net2280 *dev)
1da177e4
LT		 2164{
2165 u32 tmp;
1da177e4
LT		 2166
2167 /* basic endpoint init */
2168 for (tmp = 0; tmp < 7; tmp++) {
fae3c158 2169 struct net2280_ep *ep = &dev->ep[tmp];
1da177e4 2170
c23c3c3c
RB		 2171 ep->ep.name = ep_info_dft[tmp].name;
2172 ep->ep.caps = ep_info_dft[tmp].caps;
1da177e4
LT		 2173 ep->dev = dev;
2174 ep->num = tmp;
2175
2176 if (tmp > 0 && tmp <= 4) {
2177 ep->fifo_size = 1024;
d588ff58 2178 ep->dma = &dev->dma[tmp - 1];
1da177e4
LT		 2179 } else
2180 ep->fifo_size = 64;
fae3c158 2181 ep->regs = &dev->epregs[tmp];
adc82f77
RR		 2182 ep->cfg = &dev->epregs[tmp];
2183 ep_reset_228x(dev->regs, ep);
1da177e4 2184 }
fae3c158
RR		 2185 usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
2186 usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
2187 usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
1da177e4 2188
fae3c158
RR		 2189 dev->gadget.ep0 = &dev->ep[0].ep;
2190 dev->ep[0].stopped = 0;
2191 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1da177e4
LT		 2192
2193 /* we want to prevent lowlevel/insecure access from the USB host,
2194 * but erratum 0119 means this enable bit is ignored
2195 */
2196 for (tmp = 0; tmp < 5; tmp++)
fae3c158 2197 writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
1da177e4
LT		 2198}
2199
adc82f77
RR		 2200static void usb_reinit_338x(struct net2280 *dev)
2201{
adc82f77
RR		 2202 int i;
2203 u32 tmp, val;
adc82f77
RR		 2204 static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
2205 static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
2206 0x00, 0xC0, 0x00, 0xC0 };
2207
adc82f77
RR		 2208 /* basic endpoint init */
2209 for (i = 0; i < dev->n_ep; i++) {
2210 struct net2280_ep *ep = &dev->ep[i];
2211
c23c3c3c
RB		 2212 ep->ep.name = dev->enhanced_mode ? ep_info_adv[i].name :
2213 ep_info_dft[i].name;
2214 ep->ep.caps = dev->enhanced_mode ? ep_info_adv[i].caps :
2215 ep_info_dft[i].caps;
adc82f77
RR		 2216 ep->dev = dev;
2217 ep->num = i;
2218
d588ff58 2219 if (i > 0 && i <= 4)
adc82f77
RR		 2220 ep->dma = &dev->dma[i - 1];
2221
2222 if (dev->enhanced_mode) {
2223 ep->cfg = &dev->epregs[ne[i]];
c65c4f05
MYK		 2224 /*
2225 * Set USB endpoint number, hardware allows same number
2226 * in both directions.
2227 */
2228 if (i > 0 && i < 5)
2229 writel(ne[i], &ep->cfg->ep_cfg);
adc82f77 2230 ep->regs = (struct net2280_ep_regs __iomem *)
c43e97b2 2231 (((void __iomem *)&dev->epregs[ne[i]]) +
adc82f77 2232 ep_reg_addr[i]);
adc82f77
RR		 2233 } else {
2234 ep->cfg = &dev->epregs[i];
2235 ep->regs = &dev->epregs[i];
adc82f77
RR		 2236 }
2237
2238 ep->fifo_size = (i != 0) ? 2048 : 512;
2239
2240 ep_reset_338x(dev->regs, ep);
2241 }
2242 usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
2243
2244 dev->gadget.ep0 = &dev->ep[0].ep;
2245 dev->ep[0].stopped = 0;
2246
2247 /* Link layer set up */
5517525e 2248 if (dev->bug7734_patched) {
adc82f77 2249 tmp = readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2250 ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
adc82f77
RR		 2251 writel(tmp, &dev->usb_ext->usbctl2);
2252 }
2253
2254 /* Hardware Defect and Workaround */
2255 val = readl(&dev->ll_lfps_regs->ll_lfps_5);
2256 val &= ~(0xf << TIMER_LFPS_6US);
2257 val |= 0x5 << TIMER_LFPS_6US;
2258 writel(val, &dev->ll_lfps_regs->ll_lfps_5);
2259
2260 val = readl(&dev->ll_lfps_regs->ll_lfps_6);
2261 val &= ~(0xffff << TIMER_LFPS_80US);
2262 val |= 0x0100 << TIMER_LFPS_80US;
2263 writel(val, &dev->ll_lfps_regs->ll_lfps_6);
2264
2265 /*
2266 * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
2267 * Hot Reset Exit Handshake may Fail in Specific Case using
2268 * Default Register Settings. Workaround for Enumeration test.
2269 */
2270 val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2);
2271 val &= ~(0x1f << HOT_TX_NORESET_TS2);
2272 val |= 0x10 << HOT_TX_NORESET_TS2;
2273 writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2);
2274
2275 val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3);
2276 val &= ~(0x1f << HOT_RX_RESET_TS2);
2277 val |= 0x3 << HOT_RX_RESET_TS2;
2278 writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3);
2279
2280 /*
2281 * Set Recovery Idle to Recover bit:
2282 * - On SS connections, setting Recovery Idle to Recover Fmw improves
2283 * link robustness with various hosts and hubs.
2284 * - It is safe to set for all connection speeds; all chip revisions.
2285 * - R-M-W to leave other bits undisturbed.
2286 * - Reference PLX TT-7372
2287 */
2288 val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit);
3e76fdcb 2289 val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
adc82f77
RR		 2290 writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
2291
2292 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
2293
2294 /* disable dedicated endpoints */
2295 writel(0x0D, &dev->dep[0].dep_cfg);
2296 writel(0x0D, &dev->dep[1].dep_cfg);
2297 writel(0x0E, &dev->dep[2].dep_cfg);
2298 writel(0x0E, &dev->dep[3].dep_cfg);
2299 writel(0x0F, &dev->dep[4].dep_cfg);
2300 writel(0x0C, &dev->dep[5].dep_cfg);
2301}
2302
2303static void usb_reinit(struct net2280 *dev)
2304{
2eeb0016 2305 if (dev->quirks & PLX_LEGACY)
adc82f77
RR		 2306 return usb_reinit_228x(dev);
2307 return usb_reinit_338x(dev);
2308}
2309
2310static void ep0_start_228x(struct net2280 *dev)
1da177e4 2311{
3e76fdcb
RR		 2312 writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
2313 BIT(CLEAR_NAK_OUT_PACKETS) |
ae8e530a
RR		 2314 BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
2315 &dev->epregs[0].ep_rsp);
1da177e4
LT		 2316
2317 /*
2318 * hardware optionally handles a bunch of standard requests
2319 * that the API hides from drivers anyway. have it do so.
2320 * endpoint status/features are handled in software, to
2321 * help pass tests for some dubious behavior.
2322 */
3e76fdcb
RR		 2323 writel(BIT(SET_TEST_MODE) |
2324 BIT(SET_ADDRESS) |
2325 BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
2326 BIT(GET_DEVICE_STATUS) |
ae8e530a
RR		 2327 BIT(GET_INTERFACE_STATUS),
2328 &dev->usb->stdrsp);
3e76fdcb
RR		 2329 writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
2330 BIT(SELF_POWERED_USB_DEVICE) |
2331 BIT(REMOTE_WAKEUP_SUPPORT) |
2332 (dev->softconnect << USB_DETECT_ENABLE) |
2333 BIT(SELF_POWERED_STATUS),
2334 &dev->usb->usbctl);
1da177e4
LT		 2335
2336 /* enable irqs so we can see ep0 and general operation */
3e76fdcb
RR		 2337 writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
2338 BIT(ENDPOINT_0_INTERRUPT_ENABLE),
2339 &dev->regs->pciirqenb0);
2340 writel(BIT(PCI_INTERRUPT_ENABLE) |
2341 BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
2342 BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
2343 BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
2344 BIT(VBUS_INTERRUPT_ENABLE) |
2345 BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
2346 BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
2347 &dev->regs->pciirqenb1);
1da177e4
LT		 2348
2349 /* don't leave any writes posted */
fae3c158 2350 (void) readl(&dev->usb->usbctl);
1da177e4
LT		 2351}
2352
adc82f77
RR		 2353static void ep0_start_338x(struct net2280 *dev)
2354{
adc82f77 2355
5517525e 2356 if (dev->bug7734_patched)
3e76fdcb
RR		 2357 writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
2358 BIT(SET_EP_HIDE_STATUS_PHASE),
adc82f77
RR		 2359 &dev->epregs[0].ep_rsp);
2360
2361 /*
2362 * hardware optionally handles a bunch of standard requests
2363 * that the API hides from drivers anyway. have it do so.
2364 * endpoint status/features are handled in software, to
2365 * help pass tests for some dubious behavior.
2366 */
3e76fdcb
RR		 2367 writel(BIT(SET_ISOCHRONOUS_DELAY) |
2368 BIT(SET_SEL) |
2369 BIT(SET_TEST_MODE) |
2370 BIT(SET_ADDRESS) |
2371 BIT(GET_INTERFACE_STATUS) |
2372 BIT(GET_DEVICE_STATUS),
adc82f77
RR		 2373 &dev->usb->stdrsp);
2374 dev->wakeup_enable = 1;
3e76fdcb 2375 writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
adc82f77 2376 (dev->softconnect << USB_DETECT_ENABLE) |
3e76fdcb 2377 BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RR		 2378 &dev->usb->usbctl);
2379
2380 /* enable irqs so we can see ep0 and general operation */
3e76fdcb 2381 writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
ae8e530a
RR		 2382 BIT(ENDPOINT_0_INTERRUPT_ENABLE),
2383 &dev->regs->pciirqenb0);
3e76fdcb
RR		 2384 writel(BIT(PCI_INTERRUPT_ENABLE) |
2385 BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
2386 BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
2387 BIT(VBUS_INTERRUPT_ENABLE),
adc82f77
RR		 2388 &dev->regs->pciirqenb1);
2389
2390 /* don't leave any writes posted */
2391 (void)readl(&dev->usb->usbctl);
2392}
2393
2394static void ep0_start(struct net2280 *dev)
2395{
2eeb0016 2396 if (dev->quirks & PLX_LEGACY)
adc82f77
RR		 2397 return ep0_start_228x(dev);
2398 return ep0_start_338x(dev);
2399}
2400
1da177e4
LT		 2401/* when a driver is successfully registered, it will receive
2402 * control requests including set_configuration(), which enables
2403 * non-control requests. then usb traffic follows until a
2404 * disconnect is reported. then a host may connect again, or
2405 * the driver might get unbound.
2406 */
4cf5e00b
FB		 2407static int net2280_start(struct usb_gadget *_gadget,
2408 struct usb_gadget_driver *driver)
1da177e4 2409{
4cf5e00b 2410 struct net2280 *dev;
1da177e4
LT		 2411 int retval;
2412 unsigned i;
2413
2414 /* insist on high speed support from the driver, since
2415 * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
2416 * "must not be used in normal operation"
2417 */
ae8e530a
RR		 2418 if (!driver || driver->max_speed < USB_SPEED_HIGH ||
2419 !driver->setup)
1da177e4 2420 return -EINVAL;
4cf5e00b 2421
fae3c158 2422 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 2423
adc82f77 2424 for (i = 0; i < dev->n_ep; i++)
fae3c158 2425 dev->ep[i].irqs = 0;
1da177e4
LT		 2426
2427 /* hook up the driver ... */
1da177e4
LT		 2428 driver->driver.bus = NULL;
2429 dev->driver = driver;
1da177e4 2430
fae3c158
RR		 2431 retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
2432 if (retval)
2433 goto err_unbind;
2434 retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
2435 if (retval)
2436 goto err_func;
1da177e4 2437
7a74c481 2438 /* enable host detection and ep0; and we're ready
1da177e4
LT		 2439 * for set_configuration as well as eventual disconnect.
2440 */
fae3c158 2441 net2280_led_active(dev, 1);
adc82f77 2442
5185c913 2443 if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
adc82f77
RR		 2444 defect7374_enable_data_eps_zero(dev);
2445
fae3c158 2446 ep0_start(dev);
1da177e4 2447
1da177e4
LT		 2448 /* pci writes may still be posted */
2449 return 0;
b3899dac
JG		 2450
2451err_func:
fae3c158 2452 device_remove_file(&dev->pdev->dev, &dev_attr_function);
b3899dac 2453err_unbind:
b3899dac
JG		 2454 dev->driver = NULL;
2455 return retval;
1da177e4 2456}
1da177e4 2457
fae3c158 2458static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
1da177e4
LT		 2459{
2460 int i;
2461
2462 /* don't disconnect if it's not connected */
2463 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
2464 driver = NULL;
2465
2466 /* stop hardware; prevent new request submissions;
2467 * and kill any outstanding requests.
2468 */
fae3c158 2469 usb_reset(dev);
adc82f77 2470 for (i = 0; i < dev->n_ep; i++)
fae3c158 2471 nuke(&dev->ep[i]);
1da177e4 2472
699412d9 2473 /* report disconnect; the driver is already quiesced */
f16443a0 2474 if (driver)
699412d9 2475 driver->disconnect(&dev->gadget);
699412d9 2476
fae3c158 2477 usb_reinit(dev);
1da177e4
LT		 2478}
2479
22835b80 2480static int net2280_stop(struct usb_gadget *_gadget)
1da177e4 2481{
4cf5e00b 2482 struct net2280 *dev;
1da177e4
LT		 2483 unsigned long flags;
2484
fae3c158 2485 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 2486
fae3c158 2487 spin_lock_irqsave(&dev->lock, flags);
bfd0ed57 2488 stop_activity(dev, NULL);
fae3c158 2489 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4 2490
fae3c158 2491 net2280_led_active(dev, 0);
2f076077 2492
fae3c158
RR		 2493 device_remove_file(&dev->pdev->dev, &dev_attr_function);
2494 device_remove_file(&dev->pdev->dev, &dev_attr_queues);
1da177e4 2495
bfd0ed57 2496 dev->driver = NULL;
84237bfb 2497
1da177e4
LT		 2498 return 0;
2499}
1da177e4
LT		 2500
2501/*-------------------------------------------------------------------------*/
2502
2503/* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
2504 * also works for dma-capable endpoints, in pio mode or just
2505 * to manually advance the queue after short OUT transfers.
2506 */
fae3c158 2507static void handle_ep_small(struct net2280_ep *ep)
1da177e4
LT		 2508{
2509 struct net2280_request *req;
2510 u32 t;
2511 /* 0 error, 1 mid-data, 2 done */
2512 int mode = 1;
2513
fae3c158
RR		 2514 if (!list_empty(&ep->queue))
2515 req = list_entry(ep->queue.next,
1da177e4
LT		 2516 struct net2280_request, queue);
2517 else
2518 req = NULL;
2519
2520 /* ack all, and handle what we care about */
fae3c158 2521 t = readl(&ep->regs->ep_stat);
1da177e4 2522 ep->irqs++;
cb442ee1 2523
e56e69cc 2524 ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
fc12c68b 2525 ep->ep.name, t, req ? &req->req : NULL);
cb442ee1 2526
2eeb0016 2527 if (!ep->is_in || (ep->dev->quirks & PLX_2280))
3e76fdcb 2528 writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
950ee4c8
GL		 2529 else
2530 /* Added for 2282 */
fae3c158 2531 writel(t, &ep->regs->ep_stat);
1da177e4
LT		 2532
2533 /* for ep0, monitor token irqs to catch data stage length errors
2534 * and to synchronize on status.
2535 *
2536 * also, to defer reporting of protocol stalls ... here's where
2537 * data or status first appears, handling stalls here should never
2538 * cause trouble on the host side..
2539 *
2540 * control requests could be slightly faster without token synch for
2541 * status, but status can jam up that way.
2542 */
fae3c158 2543 if (unlikely(ep->num == 0)) {
1da177e4
LT		 2544 if (ep->is_in) {
2545 /* status; stop NAKing */
3e76fdcb 2546 if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
1da177e4
LT		 2547 if (ep->dev->protocol_stall) {
2548 ep->stopped = 1;
fae3c158 2549 set_halt(ep);
1da177e4
LT		 2550 }
2551 if (!req)
fae3c158 2552 allow_status(ep);
1da177e4
LT		 2553 mode = 2;
2554 /* reply to extra IN data tokens with a zlp */
3e76fdcb 2555 } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
1da177e4
LT		 2556 if (ep->dev->protocol_stall) {
2557 ep->stopped = 1;
fae3c158 2558 set_halt(ep);
1da177e4 2559 mode = 2;
1f26e28d
AS		 2560 } else if (ep->responded &&
2561 !req && !ep->stopped)
fae3c158 2562 write_fifo(ep, NULL);
1da177e4
LT		 2563 }
2564 } else {
2565 /* status; stop NAKing */
3e76fdcb 2566 if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
1da177e4
LT		 2567 if (ep->dev->protocol_stall) {
2568 ep->stopped = 1;
fae3c158 2569 set_halt(ep);
1da177e4
LT		 2570 }
2571 mode = 2;
2572 /* an extra OUT token is an error */
ae8e530a
RR		 2573 } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
2574 req &&
2575 req->req.actual == req->req.length) ||
2576 (ep->responded && !req)) {
1da177e4 2577 ep->dev->protocol_stall = 1;
fae3c158 2578 set_halt(ep);
1da177e4
LT		 2579 ep->stopped = 1;
2580 if (req)
fae3c158 2581 done(ep, req, -EOVERFLOW);
1da177e4
LT		 2582 req = NULL;
2583 }
2584 }
2585 }
2586
fae3c158 2587 if (unlikely(!req))
1da177e4
LT		 2588 return;
2589
2590 /* manual DMA queue advance after short OUT */
fae3c158 2591 if (likely(ep->dma)) {
3e76fdcb 2592 if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
1de2ebfb 2593 struct net2280_request *stuck_req = NULL;
1da177e4 2594 int stopped = ep->stopped;
1de2ebfb
JK		 2595 int num_completed;
2596 int stuck = 0;
2597 u32 count;
1da177e4
LT		 2598
2599 /* TRANSFERRED works around OUT_DONE erratum 0112.
2600 * we expect (N <= maxpacket) bytes; host wrote M.
2601 * iff (M < N) we won't ever see a DMA interrupt.
2602 */
2603 ep->stopped = 1;
fae3c158 2604 for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
1da177e4
LT		 2605
2606 /* any preceding dma transfers must finish.
2607 * dma handles (M >= N), may empty the queue
2608 */
1de2ebfb 2609 num_completed = scan_dma_completions(ep);
ae8e530a
RR		 2610 if (unlikely(list_empty(&ep->queue) ||
2611 ep->out_overflow)) {
1da177e4
LT		 2612 req = NULL;
2613 break;
2614 }
fae3c158 2615 req = list_entry(ep->queue.next,
1da177e4
LT		 2616 struct net2280_request, queue);
2617
2618 /* here either (M < N), a "real" short rx;
2619 * or (M == N) and the queue didn't empty
2620 */
3e76fdcb 2621 if (likely(t & BIT(FIFO_EMPTY))) {
fae3c158 2622 count = readl(&ep->dma->dmacount);
1da177e4 2623 count &= DMA_BYTE_COUNT_MASK;
fae3c158 2624 if (readl(&ep->dma->dmadesc)
1da177e4
LT		 2625 != req->td_dma)
2626 req = NULL;
2627 break;
2628 }
1de2ebfb
JK		 2629
2630 /* Escape loop if no dma transfers completed
2631 * after few retries.
2632 */
2633 if (num_completed == 0) {
2634 if (stuck_req == req &&
2635 readl(&ep->dma->dmadesc) !=
2636 req->td_dma && stuck++ > 5) {
2637 count = readl(
2638 &ep->dma->dmacount);
2639 count &= DMA_BYTE_COUNT_MASK;
2640 req = NULL;
2641 ep_dbg(ep->dev, "%s escape stuck %d, count %u\n",
2642 ep->ep.name, stuck,
2643 count);
2644 break;
2645 } else if (stuck_req != req) {
2646 stuck_req = req;
2647 stuck = 0;
2648 }
2649 } else {
2650 stuck_req = NULL;
2651 stuck = 0;
2652 }
2653
1da177e4
LT		 2654 udelay(1);
2655 }
2656
2657 /* stop DMA, leave ep NAKing */
3e76fdcb 2658 writel(BIT(DMA_ABORT), &ep->dma->dmastat);
fae3c158 2659 spin_stop_dma(ep->dma);
1da177e4 2660
fae3c158 2661 if (likely(req)) {
1da177e4 2662 req->td->dmacount = 0;
fae3c158
RR		 2663 t = readl(&ep->regs->ep_avail);
2664 dma_done(ep, req, count,
901b3d75
DB		 2665 (ep->out_overflow || t)
2666 ? -EOVERFLOW : 0);
1da177e4
LT		 2667 }
2668
2669 /* also flush to prevent erratum 0106 trouble */
ae8e530a
RR		 2670 if (unlikely(ep->out_overflow ||
2671 (ep->dev->chiprev == 0x0100 &&
2672 ep->dev->gadget.speed
2673 == USB_SPEED_FULL))) {
fae3c158 2674 out_flush(ep);
1da177e4
LT		 2675 ep->out_overflow = 0;
2676 }
2677
2678 /* (re)start dma if needed, stop NAKing */
2679 ep->stopped = stopped;
fae3c158
RR		 2680 if (!list_empty(&ep->queue))
2681 restart_dma(ep);
1da177e4 2682 } else
e56e69cc 2683 ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
1da177e4
LT		 2684 ep->ep.name, t);
2685 return;
2686
2687 /* data packet(s) received (in the fifo, OUT) */
3e76fdcb 2688 } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
fae3c158 2689 if (read_fifo(ep, req) && ep->num != 0)
1da177e4
LT		 2690 mode = 2;
2691
2692 /* data packet(s) transmitted (IN) */
3e76fdcb 2693 } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
1da177e4
LT		 2694 unsigned len;
2695
2696 len = req->req.length - req->req.actual;
2697 if (len > ep->ep.maxpacket)
2698 len = ep->ep.maxpacket;
2699 req->req.actual += len;
2700
2701 /* if we wrote it all, we're usually done */
fae3c158
RR		 2702 /* send zlps until the status stage */
2703 if ((req->req.actual == req->req.length) &&
2704 (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
1da177e4 2705 mode = 2;
1da177e4
LT		 2706
2707 /* there was nothing to do ... */
2708 } else if (mode == 1)
2709 return;
2710
2711 /* done */
2712 if (mode == 2) {
2713 /* stream endpoints often resubmit/unlink in completion */
fae3c158 2714 done(ep, req, 0);
1da177e4
LT		 2715
2716 /* maybe advance queue to next request */
2717 if (ep->num == 0) {
2718 /* NOTE: net2280 could let gadget driver start the
2719 * status stage later. since not all controllers let
2720 * them control that, the api doesn't (yet) allow it.
2721 */
2722 if (!ep->stopped)
fae3c158 2723 allow_status(ep);
1da177e4
LT		 2724 req = NULL;
2725 } else {
fae3c158
RR		 2726 if (!list_empty(&ep->queue) && !ep->stopped)
2727 req = list_entry(ep->queue.next,
1da177e4
LT		 2728 struct net2280_request, queue);
2729 else
2730 req = NULL;
2731 if (req && !ep->is_in)
fae3c158 2732 stop_out_naking(ep);
1da177e4
LT		 2733 }
2734 }
2735
2736 /* is there a buffer for the next packet?
2737 * for best streaming performance, make sure there is one.
2738 */
2739 if (req && !ep->stopped) {
2740
2741 /* load IN fifo with next packet (may be zlp) */
3e76fdcb 2742 if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
fae3c158 2743 write_fifo(ep, &req->req);
1da177e4
LT		 2744 }
2745}
2746
fae3c158 2747static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
1da177e4
LT		 2748{
2749 struct net2280_ep *ep;
2750
2751 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
fae3c158
RR		 2752 return &dev->ep[0];
2753 list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1da177e4
LT		 2754 u8 bEndpointAddress;
2755
2756 if (!ep->desc)
2757 continue;
2758 bEndpointAddress = ep->desc->bEndpointAddress;
2759 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2760 continue;
2761 if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
2762 return ep;
2763 }
2764 return NULL;
2765}
2766
adc82f77
RR		 2767static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
2768{
2769 u32 scratch, fsmvalue;
2770 u32 ack_wait_timeout, state;
2771
2772 /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
2773 scratch = get_idx_reg(dev->regs, SCRATCH);
2774 fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
2775 scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
2776
2777 if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
2778 (r.bRequestType & USB_DIR_IN)))
2779 return;
2780
2781 /* This is the first Control Read for this connection: */
3e76fdcb 2782 if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
adc82f77
RR		 2783 /*
2784 * Connection is NOT SS:
2785 * - Connection must be FS or HS.
2786 * - This FSM state should allow workaround software to
2787 * run after the next USB connection.
2788 */
2789 scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
5517525e 2790 dev->bug7734_patched = 1;
adc82f77
RR		 2791 goto restore_data_eps;
2792 }
2793
2794 /* Connection is SS: */
2795 for (ack_wait_timeout = 0;
2796 ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
2797 ack_wait_timeout++) {
2798
2799 state = readl(&dev->plregs->pl_ep_status_1)
2800 & (0xff << STATE);
2801 if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
2802 (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
2803 scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
5517525e 2804 dev->bug7734_patched = 1;
adc82f77
RR		 2805 break;
2806 }
2807
2808 /*
2809 * We have not yet received host's Data Phase ACK
2810 * - Wait and try again.
2811 */
2812 udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
2813
2814 continue;
2815 }
2816
2817
2818 if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
e56e69cc 2819 ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
adc82f77 2820 "to detect SS host's data phase ACK.");
e56e69cc 2821 ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
adc82f77
RR		 2822 "got 0x%2.2x.\n", state >> STATE);
2823 } else {
e56e69cc 2824 ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
adc82f77
RR		 2825 "%duSec for Control Read Data Phase ACK\n",
2826 DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
2827 }
2828
2829restore_data_eps:
2830 /*
2831 * Restore data EPs to their pre-workaround settings (disabled,
2832 * initialized, and other details).
2833 */
2834 defect7374_disable_data_eps(dev);
2835
2836 set_idx_reg(dev->regs, SCRATCH, scratch);
2837
2838 return;
2839}
2840
e0cbb046 2841static void ep_clear_seqnum(struct net2280_ep *ep)
adc82f77
RR		 2842{
2843 struct net2280 *dev = ep->dev;
2844 u32 val;
2845 static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
2846
e0cbb046
RR		 2847 val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f;
2848 val |= ep_pl[ep->num];
2849 writel(val, &dev->plregs->pl_ep_ctrl);
2850 val |= BIT(SEQUENCE_NUMBER_RESET);
2851 writel(val, &dev->plregs->pl_ep_ctrl);
adc82f77 2852
e0cbb046 2853 return;
adc82f77
RR		 2854}
2855
adc82f77
RR		 2856static void handle_stat0_irqs_superspeed(struct net2280 *dev,
2857 struct net2280_ep *ep, struct usb_ctrlrequest r)
2858{
2859 int tmp = 0;
2860
2861#define w_value le16_to_cpu(r.wValue)
2862#define w_index le16_to_cpu(r.wIndex)
2863#define w_length le16_to_cpu(r.wLength)
2864
2865 switch (r.bRequest) {
2866 struct net2280_ep *e;
2867 u16 status;
2868
2869 case USB_REQ_SET_CONFIGURATION:
2870 dev->addressed_state = !w_value;
2871 goto usb3_delegate;
2872
2873 case USB_REQ_GET_STATUS:
2874 switch (r.bRequestType) {
2875 case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2876 status = dev->wakeup_enable ? 0x02 : 0x00;
c8678d9f 2877 if (dev->gadget.is_selfpowered)
3e76fdcb 2878 status |= BIT(0);
adc82f77
RR		 2879 status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
2880 dev->ltm_enable << 4);
2881 writel(0, &dev->epregs[0].ep_irqenb);
2882 set_fifo_bytecount(ep, sizeof(status));
2883 writel((__force u32) status, &dev->epregs[0].ep_data);
2884 allow_status_338x(ep);
2885 break;
2886
2887 case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
2888 e = get_ep_by_addr(dev, w_index);
2889 if (!e)
2890 goto do_stall3;
2891 status = readl(&e->regs->ep_rsp) &
3e76fdcb 2892 BIT(CLEAR_ENDPOINT_HALT);
adc82f77
RR		 2893 writel(0, &dev->epregs[0].ep_irqenb);
2894 set_fifo_bytecount(ep, sizeof(status));
2895 writel((__force u32) status, &dev->epregs[0].ep_data);
2896 allow_status_338x(ep);
2897 break;
2898
2899 default:
2900 goto usb3_delegate;
2901 }
2902 break;
2903
2904 case USB_REQ_CLEAR_FEATURE:
2905 switch (r.bRequestType) {
2906 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2907 if (!dev->addressed_state) {
2908 switch (w_value) {
2909 case USB_DEVICE_U1_ENABLE:
2910 dev->u1_enable = 0;
2911 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2912 ~BIT(U1_ENABLE),
adc82f77
RR		 2913 &dev->usb_ext->usbctl2);
2914 allow_status_338x(ep);
2915 goto next_endpoints3;
2916
2917 case USB_DEVICE_U2_ENABLE:
2918 dev->u2_enable = 0;
2919 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2920 ~BIT(U2_ENABLE),
adc82f77
RR		 2921 &dev->usb_ext->usbctl2);
2922 allow_status_338x(ep);
2923 goto next_endpoints3;
2924
2925 case USB_DEVICE_LTM_ENABLE:
2926 dev->ltm_enable = 0;
2927 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2928 ~BIT(LTM_ENABLE),
adc82f77
RR		 2929 &dev->usb_ext->usbctl2);
2930 allow_status_338x(ep);
2931 goto next_endpoints3;
2932
2933 default:
2934 break;
2935 }
2936 }
2937 if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
2938 dev->wakeup_enable = 0;
2939 writel(readl(&dev->usb->usbctl) &
3e76fdcb 2940 ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RR		 2941 &dev->usb->usbctl);
2942 allow_status_338x(ep);
2943 break;
2944 }
2945 goto usb3_delegate;
2946
2947 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
2948 e = get_ep_by_addr(dev, w_index);
2949 if (!e)
2950 goto do_stall3;
2951 if (w_value != USB_ENDPOINT_HALT)
2952 goto do_stall3;
e56e69cc 2953 ep_vdbg(dev, "%s clear halt\n", e->ep.name);
e0cbb046
RR		 2954 /*
2955 * Workaround for SS SeqNum not cleared via
2956 * Endpoint Halt (Clear) bit. select endpoint
2957 */
2958 ep_clear_seqnum(e);
2959 clear_halt(e);
adc82f77
RR		 2960 if (!list_empty(&e->queue) && e->td_dma)
2961 restart_dma(e);
2962 allow_status(ep);
2963 ep->stopped = 1;
2964 break;
2965
2966 default:
2967 goto usb3_delegate;
2968 }
2969 break;
2970 case USB_REQ_SET_FEATURE:
2971 switch (r.bRequestType) {
2972 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2973 if (!dev->addressed_state) {
2974 switch (w_value) {
2975 case USB_DEVICE_U1_ENABLE:
2976 dev->u1_enable = 1;
2977 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2978 BIT(U1_ENABLE),
adc82f77
RR		 2979 &dev->usb_ext->usbctl2);
2980 allow_status_338x(ep);
2981 goto next_endpoints3;
2982
2983 case USB_DEVICE_U2_ENABLE:
2984 dev->u2_enable = 1;
2985 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2986 BIT(U2_ENABLE),
adc82f77
RR		 2987 &dev->usb_ext->usbctl2);
2988 allow_status_338x(ep);
2989 goto next_endpoints3;
2990
2991 case USB_DEVICE_LTM_ENABLE:
2992 dev->ltm_enable = 1;
2993 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2994 BIT(LTM_ENABLE),
adc82f77
RR		 2995 &dev->usb_ext->usbctl2);
2996 allow_status_338x(ep);
2997 goto next_endpoints3;
2998 default:
2999 break;
3000 }
3001 }
3002
3003 if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
3004 dev->wakeup_enable = 1;
3005 writel(readl(&dev->usb->usbctl) |
3e76fdcb 3006 BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RR		 3007 &dev->usb->usbctl);
3008 allow_status_338x(ep);
3009 break;
3010 }
3011 goto usb3_delegate;
3012
3013 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
3014 e = get_ep_by_addr(dev, w_index);
3015 if (!e || (w_value != USB_ENDPOINT_HALT))
3016 goto do_stall3;
cf8b1cde
RR		 3017 ep->stopped = 1;
3018 if (ep->num == 0)
3019 ep->dev->protocol_stall = 1;
3020 else {
3021 if (ep->dma)
e721c457 3022 abort_dma(ep);
e0cbb046 3023 set_halt(ep);
cf8b1cde 3024 }
adc82f77
RR		 3025 allow_status_338x(ep);
3026 break;
3027
3028 default:
3029 goto usb3_delegate;
3030 }
3031
3032 break;
3033 default:
3034
3035usb3_delegate:
e56e69cc 3036 ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
adc82f77
RR		 3037 r.bRequestType, r.bRequest,
3038 w_value, w_index, w_length,
3039 readl(&ep->cfg->ep_cfg));
3040
3041 ep->responded = 0;
3042 spin_unlock(&dev->lock);
3043 tmp = dev->driver->setup(&dev->gadget, &r);
3044 spin_lock(&dev->lock);
3045 }
3046do_stall3:
3047 if (tmp < 0) {
e56e69cc 3048 ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
adc82f77
RR		 3049 r.bRequestType, r.bRequest, tmp);
3050 dev->protocol_stall = 1;
3051 /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
e0cbb046 3052 set_halt(ep);
adc82f77
RR		 3053 }
3054
3055next_endpoints3:
3056
3057#undef w_value
3058#undef w_index
3059#undef w_length
3060
3061 return;
3062}
3063
a09e23f5
MYK		 3064static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
3065{
3066 u32 index;
3067 u32 bit;
3068
3069 for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
3070 bit = BIT(ep_bit[index]);
3071
3072 if (!stat0)
3073 break;
3074
3075 if (!(stat0 & bit))
3076 continue;
3077
3078 stat0 &= ~bit;
3079
3080 handle_ep_small(&dev->ep[index]);
3081 }
3082}
3083
fae3c158 3084static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
1da177e4
LT		 3085{
3086 struct net2280_ep *ep;
3087 u32 num, scratch;
3088
3089 /* most of these don't need individual acks */
3e76fdcb 3090 stat &= ~BIT(INTA_ASSERTED);
1da177e4
LT		 3091 if (!stat)
3092 return;
e56e69cc 3093 /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
1da177e4
LT		 3094
3095 /* starting a control request? */
3e76fdcb 3096 if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
1da177e4 3097 union {
fae3c158 3098 u32 raw[2];
1da177e4
LT		 3099 struct usb_ctrlrequest r;
3100 } u;
950ee4c8 3101 int tmp;
1da177e4
LT		 3102 struct net2280_request *req;
3103
3104 if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
adc82f77 3105 u32 val = readl(&dev->usb->usbstat);
3e76fdcb 3106 if (val & BIT(SUPER_SPEED)) {
adc82f77
RR		 3107 dev->gadget.speed = USB_SPEED_SUPER;
3108 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3109 EP0_SS_MAX_PACKET_SIZE);
3e76fdcb 3110 } else if (val & BIT(HIGH_SPEED)) {
1da177e4 3111 dev->gadget.speed = USB_SPEED_HIGH;
adc82f77
RR		 3112 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3113 EP0_HS_MAX_PACKET_SIZE);
3114 } else {
1da177e4 3115 dev->gadget.speed = USB_SPEED_FULL;
adc82f77
RR		 3116 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3117 EP0_HS_MAX_PACKET_SIZE);
3118 }
fae3c158 3119 net2280_led_speed(dev, dev->gadget.speed);
e56e69cc 3120 ep_dbg(dev, "%s\n",
fae3c158 3121 usb_speed_string(dev->gadget.speed));
1da177e4
LT		 3122 }
3123
fae3c158 3124 ep = &dev->ep[0];
1da177e4
LT		 3125 ep->irqs++;
3126
3127 /* make sure any leftover request state is cleared */
3e76fdcb 3128 stat &= ~BIT(ENDPOINT_0_INTERRUPT);
fae3c158
RR		 3129 while (!list_empty(&ep->queue)) {
3130 req = list_entry(ep->queue.next,
1da177e4 3131 struct net2280_request, queue);
fae3c158 3132 done(ep, req, (req->req.actual == req->req.length)
1da177e4
LT		 3133 ? 0 : -EPROTO);
3134 }
3135 ep->stopped = 0;
3136 dev->protocol_stall = 0;
5185c913 3137 if (!(dev->quirks & PLX_PCIE)) {
2eeb0016 3138 if (ep->dev->quirks & PLX_2280)
3e76fdcb
RR		 3139 tmp = BIT(FIFO_OVERFLOW) |
3140 BIT(FIFO_UNDERFLOW);
adc82f77
RR		 3141 else
3142 tmp = 0;
3143
3e76fdcb
RR		 3144 writel(tmp | BIT(TIMEOUT) |
3145 BIT(USB_STALL_SENT) |
3146 BIT(USB_IN_NAK_SENT) |
3147 BIT(USB_IN_ACK_RCVD) |
3148 BIT(USB_OUT_PING_NAK_SENT) |
3149 BIT(USB_OUT_ACK_SENT) |
3150 BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
3151 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
3152 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
3153 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
3154 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RR		 3155 BIT(DATA_IN_TOKEN_INTERRUPT),
3156 &ep->regs->ep_stat);
adc82f77
RR		 3157 }
3158 u.raw[0] = readl(&dev->usb->setup0123);
3159 u.raw[1] = readl(&dev->usb->setup4567);
901b3d75 3160
fae3c158
RR		 3161 cpu_to_le32s(&u.raw[0]);
3162 cpu_to_le32s(&u.raw[1]);
1da177e4 3163
5185c913 3164 if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
adc82f77
RR		 3165 defect7374_workaround(dev, u.r);
3166
950ee4c8
GL		 3167 tmp = 0;
3168
01ee7d70
DB		 3169#define w_value le16_to_cpu(u.r.wValue)
3170#define w_index le16_to_cpu(u.r.wIndex)
3171#define w_length le16_to_cpu(u.r.wLength)
1da177e4
LT		 3172
3173 /* ack the irq */
3e76fdcb
RR		 3174 writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
3175 stat ^= BIT(SETUP_PACKET_INTERRUPT);
1da177e4
LT		 3176
3177 /* watch control traffic at the token level, and force
3178 * synchronization before letting the status stage happen.
3179 * FIXME ignore tokens we'll NAK, until driver responds.
3180 * that'll mean a lot less irqs for some drivers.
3181 */
3182 ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
3183 if (ep->is_in) {
3e76fdcb
RR		 3184 scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
3185 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
3186 BIT(DATA_IN_TOKEN_INTERRUPT);
fae3c158 3187 stop_out_naking(ep);
1da177e4 3188 } else
3e76fdcb
RR		 3189 scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
3190 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
3191 BIT(DATA_IN_TOKEN_INTERRUPT);
fae3c158 3192 writel(scratch, &dev->epregs[0].ep_irqenb);
1da177e4
LT		 3193
3194 /* we made the hardware handle most lowlevel requests;
3195 * everything else goes uplevel to the gadget code.
3196 */
1f26e28d 3197 ep->responded = 1;
adc82f77
RR		 3198
3199 if (dev->gadget.speed == USB_SPEED_SUPER) {
3200 handle_stat0_irqs_superspeed(dev, ep, u.r);
3201 goto next_endpoints;
3202 }
3203
1da177e4
LT		 3204 switch (u.r.bRequest) {
3205 case USB_REQ_GET_STATUS: {
3206 struct net2280_ep *e;
320f3459 3207 __le32 status;
1da177e4
LT		 3208
3209 /* hw handles device and interface status */
3210 if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
3211 goto delegate;
fae3c158
RR		 3212 e = get_ep_by_addr(dev, w_index);
3213 if (!e || w_length > 2)
1da177e4
LT		 3214 goto do_stall;
3215
3e76fdcb 3216 if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
fae3c158 3217 status = cpu_to_le32(1);
1da177e4 3218 else
fae3c158 3219 status = cpu_to_le32(0);
1da177e4
LT		 3220
3221 /* don't bother with a request object! */
fae3c158
RR		 3222 writel(0, &dev->epregs[0].ep_irqenb);
3223 set_fifo_bytecount(ep, w_length);
3224 writel((__force u32)status, &dev->epregs[0].ep_data);
3225 allow_status(ep);
e56e69cc 3226 ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
1da177e4
LT		 3227 goto next_endpoints;
3228 }
3229 break;
3230 case USB_REQ_CLEAR_FEATURE: {
3231 struct net2280_ep *e;
3232
3233 /* hw handles device features */
3234 if (u.r.bRequestType != USB_RECIP_ENDPOINT)
3235 goto delegate;
ae8e530a 3236 if (w_value != USB_ENDPOINT_HALT || w_length != 0)
1da177e4 3237 goto do_stall;
fae3c158
RR		 3238 e = get_ep_by_addr(dev, w_index);
3239 if (!e)
1da177e4 3240 goto do_stall;
8066134f 3241 if (e->wedged) {
e56e69cc 3242 ep_vdbg(dev, "%s wedged, halt not cleared\n",
8066134f
AS		 3243 ep->ep.name);
3244 } else {
e56e69cc 3245 ep_vdbg(dev, "%s clear halt\n", e->ep.name);
8066134f 3246 clear_halt(e);
5185c913 3247 if ((ep->dev->quirks & PLX_PCIE) &&
adc82f77
RR		 3248 !list_empty(&e->queue) && e->td_dma)
3249 restart_dma(e);
8066134f 3250 }
fae3c158 3251 allow_status(ep);
1da177e4
LT		 3252 goto next_endpoints;
3253 }
3254 break;
3255 case USB_REQ_SET_FEATURE: {
3256 struct net2280_ep *e;
3257
3258 /* hw handles device features */
3259 if (u.r.bRequestType != USB_RECIP_ENDPOINT)
3260 goto delegate;
ae8e530a 3261 if (w_value != USB_ENDPOINT_HALT || w_length != 0)
1da177e4 3262 goto do_stall;
fae3c158
RR		 3263 e = get_ep_by_addr(dev, w_index);
3264 if (!e)
1da177e4 3265 goto do_stall;
8066134f
AS		 3266 if (e->ep.name == ep0name)
3267 goto do_stall;
fae3c158 3268 set_halt(e);
5185c913 3269 if ((dev->quirks & PLX_PCIE) && e->dma)
adc82f77 3270 abort_dma(e);
fae3c158 3271 allow_status(ep);
e56e69cc 3272 ep_vdbg(dev, "%s set halt\n", ep->ep.name);
1da177e4
LT		 3273 goto next_endpoints;
3274 }
3275 break;
3276 default:
3277delegate:
e56e69cc 3278 ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
1da177e4
LT		 3279 "ep_cfg %08x\n",
3280 u.r.bRequestType, u.r.bRequest,
320f3459 3281 w_value, w_index, w_length,
adc82f77 3282 readl(&ep->cfg->ep_cfg));
1f26e28d 3283 ep->responded = 0;
fae3c158
RR		 3284 spin_unlock(&dev->lock);
3285 tmp = dev->driver->setup(&dev->gadget, &u.r);
3286 spin_lock(&dev->lock);
1da177e4
LT		 3287 }
3288
3289 /* stall ep0 on error */
3290 if (tmp < 0) {
3291do_stall:
e56e69cc 3292 ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
1da177e4
LT		 3293 u.r.bRequestType, u.r.bRequest, tmp);
3294 dev->protocol_stall = 1;
3295 }
3296
3297 /* some in/out token irq should follow; maybe stall then.
3298 * driver must queue a request (even zlp) or halt ep0
3299 * before the host times out.
3300 */
3301 }
3302
320f3459
DB		 3303#undef w_value
3304#undef w_index
3305#undef w_length
3306
1da177e4 3307next_endpoints:
5185c913 3308 if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
a09e23f5
MYK		 3309 u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
3310 USB3380_IRQSTAT0_EP_INTR_MASK_IN |
3311 USB3380_IRQSTAT0_EP_INTR_MASK_OUT);
3312
3313 if (stat & mask) {
3314 usb338x_handle_ep_intr(dev, stat & mask);
3315 stat &= ~mask;
3316 }
3317 } else {
3318 /* endpoint data irq ? */
3319 scratch = stat & 0x7f;
3320 stat &= ~0x7f;
3321 for (num = 0; scratch; num++) {
3322 u32 t;
3323
3324 /* do this endpoint's FIFO and queue need tending? */
3325 t = BIT(num);
3326 if ((scratch & t) == 0)
3327 continue;
3328 scratch ^= t;
1da177e4 3329
a09e23f5
MYK		 3330 ep = &dev->ep[num];
3331 handle_ep_small(ep);
3332 }
1da177e4
LT		 3333 }
3334
3335 if (stat)
e56e69cc 3336 ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
1da177e4
LT		 3337}
3338
3e76fdcb
RR		 3339#define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
3340 BIT(DMA_C_INTERRUPT) | \
3341 BIT(DMA_B_INTERRUPT) | \
3342 BIT(DMA_A_INTERRUPT))
1da177e4 3343#define PCI_ERROR_INTERRUPTS ( \
3e76fdcb
RR		 3344 BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
3345 BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
3346 BIT(PCI_RETRY_ABORT_INTERRUPT))
1da177e4 3347
fae3c158 3348static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
1da177e4
LT		 3349{
3350 struct net2280_ep *ep;
3351 u32 tmp, num, mask, scratch;
3352
3353 /* after disconnect there's nothing else to do! */
3e76fdcb
RR		 3354 tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
3355 mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
1da177e4
LT		 3356
3357 /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
fb914ebf 3358 * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
901b3d75 3359 * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
1da177e4
LT		 3360 * only indicates a change in the reset state).
3361 */
3362 if (stat & tmp) {
b611e424
AS		 3363 bool reset = false;
3364 bool disconnect = false;
3365
3366 /*
3367 * Ignore disconnects and resets if the speed hasn't been set.
3368 * VBUS can bounce and there's always an initial reset.
3369 */
fae3c158 3370 writel(tmp, &dev->regs->irqstat1);
b611e424
AS		 3371 if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
3372 if ((stat & BIT(VBUS_INTERRUPT)) &&
3373 (readl(&dev->usb->usbctl) &
3374 BIT(VBUS_PIN)) == 0) {
3375 disconnect = true;
3376 ep_dbg(dev, "disconnect %s\n",
3377 dev->driver->driver.name);
3378 } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
3379 (readl(&dev->usb->usbstat) & mask)
3380 == 0) {
3381 reset = true;
3382 ep_dbg(dev, "reset %s\n",
3383 dev->driver->driver.name);
3384 }
3385
3386 if (disconnect || reset) {
3387 stop_activity(dev, dev->driver);
3388 ep0_start(dev);
b611e424
AS		 3389 if (reset)
3390 usb_gadget_udc_reset
3391 (&dev->gadget, dev->driver);
3392 else
3393 (dev->driver->disconnect)
3394 (&dev->gadget);
b611e424
AS		 3395 return;
3396 }
1da177e4
LT		 3397 }
3398 stat &= ~tmp;
3399
3400 /* vBUS can bounce ... one of many reasons to ignore the
3401 * notion of hotplug events on bus connect/disconnect!
3402 */
3403 if (!stat)
3404 return;
3405 }
3406
3407 /* NOTE: chip stays in PCI D0 state for now, but it could
3408 * enter D1 to save more power
3409 */
3e76fdcb 3410 tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
1da177e4 3411 if (stat & tmp) {
fae3c158 3412 writel(tmp, &dev->regs->irqstat1);
3e76fdcb 3413 if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
1da177e4 3414 if (dev->driver->suspend)
fae3c158 3415 dev->driver->suspend(&dev->gadget);
1da177e4 3416 if (!enable_suspend)
3e76fdcb 3417 stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
1da177e4
LT		 3418 } else {
3419 if (dev->driver->resume)
fae3c158 3420 dev->driver->resume(&dev->gadget);
1da177e4
LT		 3421 /* at high speed, note erratum 0133 */
3422 }
3423 stat &= ~tmp;
3424 }
3425
3426 /* clear any other status/irqs */
3427 if (stat)
fae3c158 3428 writel(stat, &dev->regs->irqstat1);
1da177e4
LT		 3429
3430 /* some status we can just ignore */
2eeb0016 3431 if (dev->quirks & PLX_2280)
3e76fdcb
RR		 3432 stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
3433 BIT(SUSPEND_REQUEST_INTERRUPT) |
3434 BIT(RESUME_INTERRUPT) |
3435 BIT(SOF_INTERRUPT));
950ee4c8 3436 else
3e76fdcb
RR		 3437 stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
3438 BIT(RESUME_INTERRUPT) |
3439 BIT(SOF_DOWN_INTERRUPT) |
3440 BIT(SOF_INTERRUPT));
950ee4c8 3441
1da177e4
LT		 3442 if (!stat)
3443 return;
e56e69cc 3444 /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
1da177e4
LT		 3445
3446 /* DMA status, for ep-{a,b,c,d} */
3447 scratch = stat & DMA_INTERRUPTS;
3448 stat &= ~DMA_INTERRUPTS;
3449 scratch >>= 9;
3450 for (num = 0; scratch; num++) {
3451 struct net2280_dma_regs __iomem *dma;
3452
3e76fdcb 3453 tmp = BIT(num);
1da177e4
LT		 3454 if ((tmp & scratch) == 0)
3455 continue;
3456 scratch ^= tmp;
3457
fae3c158 3458 ep = &dev->ep[num + 1];
1da177e4
LT		 3459 dma = ep->dma;
3460
3461 if (!dma)
3462 continue;
3463
3464 /* clear ep's dma status */
fae3c158
RR		 3465 tmp = readl(&dma->dmastat);
3466 writel(tmp, &dma->dmastat);
1da177e4 3467
adc82f77 3468 /* dma sync*/
5185c913 3469 if (dev->quirks & PLX_PCIE) {
adc82f77
RR		 3470 u32 r_dmacount = readl(&dma->dmacount);
3471 if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
3e76fdcb 3472 (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
adc82f77
RR		 3473 continue;
3474 }
3475
90664198
RR		 3476 if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
3477 ep_dbg(ep->dev, "%s no xact done? %08x\n",
3478 ep->ep.name, tmp);
3479 continue;
1da177e4 3480 }
90664198 3481 stop_dma(ep->dma);
1da177e4
LT		 3482
3483 /* OUT transfers terminate when the data from the
3484 * host is in our memory. Process whatever's done.
3485 * On this path, we know transfer's last packet wasn't
3486 * less than req->length. NAK_OUT_PACKETS may be set,
3487 * or the FIFO may already be holding new packets.
3488 *
3489 * IN transfers can linger in the FIFO for a very
3490 * long time ... we ignore that for now, accounting
3491 * precisely (like PIO does) needs per-packet irqs
3492 */
fae3c158 3493 scan_dma_completions(ep);
1da177e4
LT		 3494
3495 /* disable dma on inactive queues; else maybe restart */
90664198 3496 if (!list_empty(&ep->queue)) {
fae3c158 3497 tmp = readl(&dma->dmactl);
90664198 3498 restart_dma(ep);
1da177e4
LT		 3499 }
3500 ep->irqs++;
3501 }
3502
3503 /* NOTE: there are other PCI errors we might usefully notice.
3504 * if they appear very often, here's where to try recovering.
3505 */
3506 if (stat & PCI_ERROR_INTERRUPTS) {
e56e69cc 3507 ep_err(dev, "pci dma error; stat %08x\n", stat);
1da177e4
LT		 3508 stat &= ~PCI_ERROR_INTERRUPTS;
3509 /* these are fatal errors, but "maybe" they won't
3510 * happen again ...
3511 */
fae3c158
RR		 3512 stop_activity(dev, dev->driver);
3513 ep0_start(dev);
1da177e4
LT		 3514 stat = 0;
3515 }
3516
3517 if (stat)
e56e69cc 3518 ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
1da177e4
LT		 3519}
3520
fae3c158 3521static irqreturn_t net2280_irq(int irq, void *_dev)
1da177e4
LT		 3522{
3523 struct net2280 *dev = _dev;
3524
658ad5e0 3525 /* shared interrupt, not ours */
2eeb0016 3526 if ((dev->quirks & PLX_LEGACY) &&
3e76fdcb 3527 (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
658ad5e0
AS		 3528 return IRQ_NONE;
3529
fae3c158 3530 spin_lock(&dev->lock);
1da177e4
LT		 3531
3532 /* handle disconnect, dma, and more */
fae3c158 3533 handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
1da177e4
LT		 3534
3535 /* control requests and PIO */
fae3c158 3536 handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
1da177e4 3537
5185c913 3538 if (dev->quirks & PLX_PCIE) {
adc82f77
RR		 3539 /* re-enable interrupt to trigger any possible new interrupt */
3540 u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
3541 writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
3542 writel(pciirqenb1, &dev->regs->pciirqenb1);
3543 }
3544
fae3c158 3545 spin_unlock(&dev->lock);
1da177e4
LT		 3546
3547 return IRQ_HANDLED;
3548}
3549
3550/*-------------------------------------------------------------------------*/
3551
fae3c158 3552static void gadget_release(struct device *_dev)
1da177e4 3553{
fae3c158 3554 struct net2280 *dev = dev_get_drvdata(_dev);
1da177e4 3555
fae3c158 3556 kfree(dev);
1da177e4
LT		 3557}
3558
3559/* tear down the binding between this driver and the pci device */
3560
fae3c158 3561static void net2280_remove(struct pci_dev *pdev)
1da177e4 3562{
fae3c158 3563 struct net2280 *dev = pci_get_drvdata(pdev);
1da177e4 3564
0f91349b
SAS		 3565 usb_del_gadget_udc(&dev->gadget);
3566
6bea476c 3567 BUG_ON(dev->driver);
1da177e4
LT		 3568
3569 /* then clean up the resources we allocated during probe() */
1da177e4
LT		 3570 if (dev->requests) {
3571 int i;
3572 for (i = 1; i < 5; i++) {
fae3c158 3573 if (!dev->ep[i].dummy)
1da177e4 3574 continue;
fa9ed6f6 3575 dma_pool_free(dev->requests, dev->ep[i].dummy,
fae3c158 3576 dev->ep[i].td_dma);
1da177e4 3577 }
fa9ed6f6 3578 dma_pool_destroy(dev->requests);
1da177e4
LT		 3579 }
3580 if (dev->got_irq)
fae3c158 3581 free_irq(pdev->irq, dev);
5185c913 3582 if (dev->quirks & PLX_PCIE)
adc82f77 3583 pci_disable_msi(pdev);
53e720f3
GS		 3584 if (dev->regs) {
3585 net2280_led_shutdown(dev);
fae3c158 3586 iounmap(dev->regs);
53e720f3 3587 }
1da177e4 3588 if (dev->region)
fae3c158
RR		 3589 release_mem_region(pci_resource_start(pdev, 0),
3590 pci_resource_len(pdev, 0));
1da177e4 3591 if (dev->enabled)
fae3c158
RR		 3592 pci_disable_device(pdev);
3593 device_remove_file(&pdev->dev, &dev_attr_registers);
1da177e4 3594
e56e69cc 3595 ep_info(dev, "unbind\n");
1da177e4
LT		 3596}
3597
3598/* wrap this driver around the specified device, but
3599 * don't respond over USB until a gadget driver binds to us.
3600 */
3601
fae3c158 3602static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4
LT		 3603{
3604 struct net2280 *dev;
3605 unsigned long resource, len;
3606 void __iomem *base = NULL;
3607 int retval, i;
1da177e4 3608
1da177e4 3609 /* alloc, and start init */
fae3c158
RR		 3610 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
3611 if (dev == NULL) {
1da177e4
LT		 3612 retval = -ENOMEM;
3613 goto done;
3614 }
3615
fae3c158
RR		 3616 pci_set_drvdata(pdev, dev);
3617 spin_lock_init(&dev->lock);
2eeb0016 3618 dev->quirks = id->driver_data;
1da177e4
LT		 3619 dev->pdev = pdev;
3620 dev->gadget.ops = &net2280_ops;
2eeb0016 3621 dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ?
adc82f77 3622 USB_SPEED_SUPER : USB_SPEED_HIGH;
1da177e4
LT		 3623
3624 /* the "gadget" abstracts/virtualizes the controller */
1da177e4
LT		 3625 dev->gadget.name = driver_name;
3626
3627 /* now all the pci goodies ... */
fae3c158
RR		 3628 if (pci_enable_device(pdev) < 0) {
3629 retval = -ENODEV;
1da177e4
LT		 3630 goto done;
3631 }
3632 dev->enabled = 1;
3633
3634 /* BAR 0 holds all the registers
3635 * BAR 1 is 8051 memory; unused here (note erratum 0103)
3636 * BAR 2 is fifo memory; unused here
3637 */
fae3c158
RR		 3638 resource = pci_resource_start(pdev, 0);
3639 len = pci_resource_len(pdev, 0);
3640 if (!request_mem_region(resource, len, driver_name)) {
e56e69cc 3641 ep_dbg(dev, "controller already in use\n");
1da177e4
LT		 3642 retval = -EBUSY;
3643 goto done;
3644 }
3645 dev->region = 1;
3646
901b3d75
DB		 3647 /* FIXME provide firmware download interface to put
3648 * 8051 code into the chip, e.g. to turn on PCI PM.
3649 */
3650
fae3c158 3651 base = ioremap_nocache(resource, len);
1da177e4 3652 if (base == NULL) {
e56e69cc 3653 ep_dbg(dev, "can't map memory\n");
1da177e4
LT		 3654 retval = -EFAULT;
3655 goto done;
3656 }
3657 dev->regs = (struct net2280_regs __iomem *) base;
3658 dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
3659 dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
3660 dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
3661 dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
3662 dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
3663
5185c913 3664 if (dev->quirks & PLX_PCIE) {
adc82f77
RR		 3665 u32 fsmvalue;
3666 u32 usbstat;
3667 dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
3668 (base + 0x00b4);
adc82f77
RR		 3669 dev->llregs = (struct usb338x_ll_regs __iomem *)
3670 (base + 0x0700);
3671 dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
3672 (base + 0x0748);
3673 dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *)
3674 (base + 0x077c);
3675 dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *)
3676 (base + 0x079c);
3677 dev->plregs = (struct usb338x_pl_regs __iomem *)
3678 (base + 0x0800);
3679 usbstat = readl(&dev->usb->usbstat);
fae3c158 3680 dev->enhanced_mode = !!(usbstat & BIT(11));
adc82f77
RR		 3681 dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
3682 /* put into initial config, link up all endpoints */
3683 fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
3684 (0xf << DEFECT7374_FSM_FIELD);
3685 /* See if firmware needs to set up for workaround: */
5517525e
RR		 3686 if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
3687 dev->bug7734_patched = 1;
adc82f77 3688 writel(0, &dev->usb->usbctl);
5517525e
RR		 3689 } else
3690 dev->bug7734_patched = 0;
3691 } else {
adc82f77
RR		 3692 dev->enhanced_mode = 0;
3693 dev->n_ep = 7;
3694 /* put into initial config, link up all endpoints */
3695 writel(0, &dev->usb->usbctl);
3696 }
3697
fae3c158
RR		 3698 usb_reset(dev);
3699 usb_reinit(dev);
1da177e4
LT		 3700
3701 /* irq setup after old hardware is cleaned up */
3702 if (!pdev->irq) {
e56e69cc 3703 ep_err(dev, "No IRQ. Check PCI setup!\n");
1da177e4
LT		 3704 retval = -ENODEV;
3705 goto done;
3706 }
c6387a48 3707
5185c913 3708 if (dev->quirks & PLX_PCIE)
adc82f77 3709 if (pci_enable_msi(pdev))
e56e69cc 3710 ep_err(dev, "Failed to enable MSI mode\n");
adc82f77 3711
fae3c158
RR		 3712 if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
3713 driver_name, dev)) {
e56e69cc 3714 ep_err(dev, "request interrupt %d failed\n", pdev->irq);
1da177e4
LT		 3715 retval = -EBUSY;
3716 goto done;
3717 }
3718 dev->got_irq = 1;
3719
3720 /* DMA setup */
3721 /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
fa9ed6f6 3722 dev->requests = dma_pool_create("requests", &pdev->dev,
fae3c158 3723 sizeof(struct net2280_dma),
1da177e4
LT		 3724 0 /* no alignment requirements */,
3725 0 /* or page-crossing issues */);
3726 if (!dev->requests) {
e56e69cc 3727 ep_dbg(dev, "can't get request pool\n");
1da177e4
LT		 3728 retval = -ENOMEM;
3729 goto done;
3730 }
3731 for (i = 1; i < 5; i++) {
3732 struct net2280_dma *td;
3733
fa9ed6f6 3734 td = dma_pool_alloc(dev->requests, GFP_KERNEL,
fae3c158 3735 &dev->ep[i].td_dma);
1da177e4 3736 if (!td) {
e56e69cc 3737 ep_dbg(dev, "can't get dummy %d\n", i);
1da177e4
LT		 3738 retval = -ENOMEM;
3739 goto done;
3740 }
3741 td->dmacount = 0; /* not VALID */
1da177e4 3742 td->dmadesc = td->dmaaddr;
fae3c158 3743 dev->ep[i].dummy = td;
1da177e4
LT		 3744 }
3745
3746 /* enable lower-overhead pci memory bursts during DMA */
2eeb0016 3747 if (dev->quirks & PLX_LEGACY)
3e76fdcb
RR		 3748 writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
3749 /*
3750 * 256 write retries may not be enough...
3751 BIT(PCI_RETRY_ABORT_ENABLE) |
3752 */
3753 BIT(DMA_READ_MULTIPLE_ENABLE) |
3754 BIT(DMA_READ_LINE_ENABLE),
3755 &dev->pci->pcimstctl);
1da177e4 3756 /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
fae3c158
RR		 3757 pci_set_master(pdev);
3758 pci_try_set_mwi(pdev);
1da177e4
LT		 3759
3760 /* ... also flushes any posted pci writes */
fae3c158 3761 dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
1da177e4
LT		 3762
3763 /* done */
e56e69cc
RR		 3764 ep_info(dev, "%s\n", driver_desc);
3765 ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
c6387a48 3766 pdev->irq, base, dev->chiprev);
d588ff58 3767 ep_info(dev, "version: " DRIVER_VERSION "; %s\n",
adc82f77 3768 dev->enhanced_mode ? "enhanced mode" : "legacy mode");
fae3c158
RR		 3769 retval = device_create_file(&pdev->dev, &dev_attr_registers);
3770 if (retval)
3771 goto done;
1da177e4 3772
2901df68
FB		 3773 retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
3774 gadget_release);
0f91349b
SAS		 3775 if (retval)
3776 goto done;
1da177e4
LT		 3777 return 0;
3778
3779done:
3780 if (dev)
fae3c158 3781 net2280_remove(pdev);
1da177e4
LT		 3782 return retval;
3783}
3784
2d61bde7
AS		 3785/* make sure the board is quiescent; otherwise it will continue
3786 * generating IRQs across the upcoming reboot.
3787 */
3788
fae3c158 3789static void net2280_shutdown(struct pci_dev *pdev)
2d61bde7 3790{
fae3c158 3791 struct net2280 *dev = pci_get_drvdata(pdev);
2d61bde7
AS		 3792
3793 /* disable IRQs */
fae3c158
RR		 3794 writel(0, &dev->regs->pciirqenb0);
3795 writel(0, &dev->regs->pciirqenb1);
2d61bde7
AS		 3796
3797 /* disable the pullup so the host will think we're gone */
fae3c158 3798 writel(0, &dev->usb->usbctl);
2f076077 3799
2d61bde7
AS		 3800}
3801
1da177e4
LT		 3802
3803/*-------------------------------------------------------------------------*/
3804
fae3c158 3805static const struct pci_device_id pci_ids[] = { {
7b78f48a 3806 .class = PCI_CLASS_SERIAL_USB_DEVICE,
901b3d75 3807 .class_mask = ~0,
c2db8a8a 3808 .vendor = PCI_VENDOR_ID_PLX_LEGACY,
1da177e4
LT		 3809 .device = 0x2280,
3810 .subvendor = PCI_ANY_ID,
3811 .subdevice = PCI_ANY_ID,
2eeb0016 3812 .driver_data = PLX_LEGACY | PLX_2280,
ae8e530a 3813 }, {
7b78f48a 3814 .class = PCI_CLASS_SERIAL_USB_DEVICE,
901b3d75 3815 .class_mask = ~0,
c2db8a8a 3816 .vendor = PCI_VENDOR_ID_PLX_LEGACY,
950ee4c8
GL		 3817 .device = 0x2282,
3818 .subvendor = PCI_ANY_ID,
3819 .subdevice = PCI_ANY_ID,
2eeb0016 3820 .driver_data = PLX_LEGACY,
ae8e530a 3821 },
adc82f77 3822 {
7b78f48a 3823 .class = PCI_CLASS_SERIAL_USB_DEVICE,
ae8e530a
RR		 3824 .class_mask = ~0,
3825 .vendor = PCI_VENDOR_ID_PLX,
5185c913
TH		 3826 .device = 0x2380,
3827 .subvendor = PCI_ANY_ID,
3828 .subdevice = PCI_ANY_ID,
3829 .driver_data = PLX_PCIE,
3830 },
3831 {
3832 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3833 .class_mask = ~0,
3834 .vendor = PCI_VENDOR_ID_PLX,
ae8e530a
RR		 3835 .device = 0x3380,
3836 .subvendor = PCI_ANY_ID,
3837 .subdevice = PCI_ANY_ID,
5185c913 3838 .driver_data = PLX_PCIE | PLX_SUPERSPEED,
adc82f77
RR		 3839 },
3840 {
7b78f48a 3841 .class = PCI_CLASS_SERIAL_USB_DEVICE,
ae8e530a
RR		 3842 .class_mask = ~0,
3843 .vendor = PCI_VENDOR_ID_PLX,
3844 .device = 0x3382,
3845 .subvendor = PCI_ANY_ID,
3846 .subdevice = PCI_ANY_ID,
5185c913 3847 .driver_data = PLX_PCIE | PLX_SUPERSPEED,
adc82f77
RR		 3848 },
3849{ /* end: all zeroes */ }
1da177e4 3850};
fae3c158 3851MODULE_DEVICE_TABLE(pci, pci_ids);
1da177e4
LT		 3852
3853/* pci driver glue; this is a "new style" PCI driver module */
3854static struct pci_driver net2280_pci_driver = {
3855 .name = (char *) driver_name,
3856 .id_table = pci_ids,
3857
3858 .probe = net2280_probe,
3859 .remove = net2280_remove,
2d61bde7 3860 .shutdown = net2280_shutdown,
1da177e4
LT		 3861
3862 /* FIXME add power management support */
3863};
3864
9a028e46
RR		 3865module_pci_driver(net2280_pci_driver);
3866
fae3c158
RR		 3867MODULE_DESCRIPTION(DRIVER_DESC);
3868MODULE_AUTHOR("David Brownell");
3869MODULE_LICENSE("GPL");
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