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Commit | Line | Data |
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80cb9aee | 1 | /* |
1af10774 AV |
2 | * Copyright 2005-2009 MontaVista Software, Inc. |
3 | * Copyright 2008 Freescale Semiconductor, Inc. | |
80cb9aee RV |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
12 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
13 | * for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software Foundation, | |
17 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
18 | * | |
19 | * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided | |
20 | * by Hunter Wu. | |
1af10774 AV |
21 | * Power Management support by Dave Liu <daveliu@freescale.com>, |
22 | * Jerry Huang <Chang-Ming.Huang@freescale.com> and | |
23 | * Anton Vorontsov <avorontsov@ru.mvista.com>. | |
80cb9aee RV |
24 | */ |
25 | ||
1af10774 AV |
26 | #include <linux/kernel.h> |
27 | #include <linux/types.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/pm.h> | |
80cb9aee RV |
30 | #include <linux/platform_device.h> |
31 | #include <linux/fsl_devices.h> | |
32 | ||
33 | #include "ehci-fsl.h" | |
34 | ||
80cb9aee RV |
35 | /* configure so an HC device and id are always provided */ |
36 | /* always called with process context; sleeping is OK */ | |
37 | ||
38 | /** | |
39 | * usb_hcd_fsl_probe - initialize FSL-based HCDs | |
40 | * @drvier: Driver to be used for this HCD | |
41 | * @pdev: USB Host Controller being probed | |
42 | * Context: !in_interrupt() | |
43 | * | |
44 | * Allocates basic resources for this USB host controller. | |
45 | * | |
46 | */ | |
dad3843f AV |
47 | static int usb_hcd_fsl_probe(const struct hc_driver *driver, |
48 | struct platform_device *pdev) | |
80cb9aee RV |
49 | { |
50 | struct fsl_usb2_platform_data *pdata; | |
51 | struct usb_hcd *hcd; | |
52 | struct resource *res; | |
53 | int irq; | |
54 | int retval; | |
80cb9aee RV |
55 | |
56 | pr_debug("initializing FSL-SOC USB Controller\n"); | |
57 | ||
58 | /* Need platform data for setup */ | |
59 | pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data; | |
60 | if (!pdata) { | |
61 | dev_err(&pdev->dev, | |
7071a3ce | 62 | "No platform data for %s.\n", dev_name(&pdev->dev)); |
80cb9aee RV |
63 | return -ENODEV; |
64 | } | |
65 | ||
66 | /* | |
67 | * This is a host mode driver, verify that we're supposed to be | |
68 | * in host mode. | |
69 | */ | |
70 | if (!((pdata->operating_mode == FSL_USB2_DR_HOST) || | |
ba02978a LY |
71 | (pdata->operating_mode == FSL_USB2_MPH_HOST) || |
72 | (pdata->operating_mode == FSL_USB2_DR_OTG))) { | |
80cb9aee RV |
73 | dev_err(&pdev->dev, |
74 | "Non Host Mode configured for %s. Wrong driver linked.\n", | |
7071a3ce | 75 | dev_name(&pdev->dev)); |
80cb9aee RV |
76 | return -ENODEV; |
77 | } | |
78 | ||
79 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
80 | if (!res) { | |
81 | dev_err(&pdev->dev, | |
82 | "Found HC with no IRQ. Check %s setup!\n", | |
7071a3ce | 83 | dev_name(&pdev->dev)); |
80cb9aee RV |
84 | return -ENODEV; |
85 | } | |
86 | irq = res->start; | |
87 | ||
7071a3ce | 88 | hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); |
80cb9aee RV |
89 | if (!hcd) { |
90 | retval = -ENOMEM; | |
91 | goto err1; | |
92 | } | |
93 | ||
94 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
95 | if (!res) { | |
96 | dev_err(&pdev->dev, | |
97 | "Found HC with no register addr. Check %s setup!\n", | |
7071a3ce | 98 | dev_name(&pdev->dev)); |
80cb9aee RV |
99 | retval = -ENODEV; |
100 | goto err2; | |
101 | } | |
102 | hcd->rsrc_start = res->start; | |
103 | hcd->rsrc_len = res->end - res->start + 1; | |
104 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | |
105 | driver->description)) { | |
106 | dev_dbg(&pdev->dev, "controller already in use\n"); | |
107 | retval = -EBUSY; | |
108 | goto err2; | |
109 | } | |
110 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); | |
111 | ||
112 | if (hcd->regs == NULL) { | |
113 | dev_dbg(&pdev->dev, "error mapping memory\n"); | |
114 | retval = -EFAULT; | |
115 | goto err3; | |
116 | } | |
117 | ||
230f7ede | 118 | pdata->regs = hcd->regs; |
80cb9aee | 119 | |
83722bc9 AG |
120 | if (pdata->power_budget) |
121 | hcd->power_budget = pdata->power_budget; | |
122 | ||
230f7ede AG |
123 | /* |
124 | * do platform specific init: check the clock, grab/config pins, etc. | |
125 | */ | |
126 | if (pdata->init && pdata->init(pdev)) { | |
127 | retval = -ENODEV; | |
128 | goto err3; | |
129 | } | |
130 | ||
230f7ede AG |
131 | /* Enable USB controller, 83xx or 8536 */ |
132 | if (pdata->have_sysif_regs) | |
133 | setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4); | |
134 | ||
135 | /* Don't need to set host mode here. It will be done by tdi_reset() */ | |
80cb9aee | 136 | |
442258e2 | 137 | retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); |
80cb9aee RV |
138 | if (retval != 0) |
139 | goto err4; | |
83722bc9 AG |
140 | |
141 | #ifdef CONFIG_USB_OTG | |
142 | if (pdata->operating_mode == FSL_USB2_DR_OTG) { | |
143 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
144 | ||
145 | ehci->transceiver = otg_get_transceiver(); | |
146 | dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, transceiver=0x%p\n", | |
147 | hcd, ehci, ehci->transceiver); | |
148 | ||
149 | if (ehci->transceiver) { | |
150 | retval = otg_set_host(ehci->transceiver, | |
151 | &ehci_to_hcd(ehci)->self); | |
152 | if (retval) { | |
153 | if (ehci->transceiver) | |
154 | put_device(ehci->transceiver->dev); | |
155 | goto err4; | |
156 | } | |
157 | } else { | |
158 | dev_err(&pdev->dev, "can't find transceiver\n"); | |
159 | retval = -ENODEV; | |
160 | goto err4; | |
161 | } | |
162 | } | |
163 | #endif | |
80cb9aee RV |
164 | return retval; |
165 | ||
166 | err4: | |
167 | iounmap(hcd->regs); | |
168 | err3: | |
169 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
170 | err2: | |
171 | usb_put_hcd(hcd); | |
172 | err1: | |
7071a3ce | 173 | dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval); |
230f7ede AG |
174 | if (pdata->exit) |
175 | pdata->exit(pdev); | |
80cb9aee RV |
176 | return retval; |
177 | } | |
178 | ||
179 | /* may be called without controller electrically present */ | |
180 | /* may be called with controller, bus, and devices active */ | |
181 | ||
182 | /** | |
183 | * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs | |
184 | * @dev: USB Host Controller being removed | |
185 | * Context: !in_interrupt() | |
186 | * | |
187 | * Reverses the effect of usb_hcd_fsl_probe(). | |
188 | * | |
189 | */ | |
dad3843f AV |
190 | static void usb_hcd_fsl_remove(struct usb_hcd *hcd, |
191 | struct platform_device *pdev) | |
80cb9aee | 192 | { |
230f7ede | 193 | struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; |
83722bc9 AG |
194 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
195 | ||
196 | if (ehci->transceiver) { | |
197 | otg_set_host(ehci->transceiver, NULL); | |
198 | put_device(ehci->transceiver->dev); | |
199 | } | |
230f7ede | 200 | |
80cb9aee | 201 | usb_remove_hcd(hcd); |
230f7ede AG |
202 | |
203 | /* | |
204 | * do platform specific un-initialization: | |
205 | * release iomux pins, disable clock, etc. | |
206 | */ | |
207 | if (pdata->exit) | |
208 | pdata->exit(pdev); | |
80cb9aee RV |
209 | iounmap(hcd->regs); |
210 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
211 | usb_put_hcd(hcd); | |
212 | } | |
213 | ||
230f7ede AG |
214 | static void ehci_fsl_setup_phy(struct ehci_hcd *ehci, |
215 | enum fsl_usb2_phy_modes phy_mode, | |
216 | unsigned int port_offset) | |
80cb9aee | 217 | { |
230f7ede AG |
218 | u32 portsc; |
219 | ||
220 | portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]); | |
221 | portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW); | |
222 | ||
80cb9aee RV |
223 | switch (phy_mode) { |
224 | case FSL_USB2_PHY_ULPI: | |
225 | portsc |= PORT_PTS_ULPI; | |
226 | break; | |
227 | case FSL_USB2_PHY_SERIAL: | |
228 | portsc |= PORT_PTS_SERIAL; | |
229 | break; | |
230 | case FSL_USB2_PHY_UTMI_WIDE: | |
231 | portsc |= PORT_PTS_PTW; | |
232 | /* fall through */ | |
233 | case FSL_USB2_PHY_UTMI: | |
234 | portsc |= PORT_PTS_UTMI; | |
235 | break; | |
236 | case FSL_USB2_PHY_NONE: | |
237 | break; | |
238 | } | |
083522d7 | 239 | ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); |
80cb9aee RV |
240 | } |
241 | ||
230f7ede | 242 | static void ehci_fsl_usb_setup(struct ehci_hcd *ehci) |
80cb9aee | 243 | { |
230f7ede | 244 | struct usb_hcd *hcd = ehci_to_hcd(ehci); |
80cb9aee RV |
245 | struct fsl_usb2_platform_data *pdata; |
246 | void __iomem *non_ehci = hcd->regs; | |
ba02978a | 247 | u32 temp; |
80cb9aee | 248 | |
230f7ede AG |
249 | pdata = hcd->self.controller->platform_data; |
250 | ||
80cb9aee | 251 | /* Enable PHY interface in the control reg. */ |
230f7ede AG |
252 | if (pdata->have_sysif_regs) { |
253 | temp = in_be32(non_ehci + FSL_SOC_USB_CTRL); | |
254 | out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004); | |
255 | out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b); | |
256 | } | |
80cb9aee | 257 | |
40acc095 LY |
258 | #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) |
259 | /* | |
260 | * Turn on cache snooping hardware, since some PowerPC platforms | |
261 | * wholly rely on hardware to deal with cache coherent | |
262 | */ | |
263 | ||
264 | /* Setup Snooping for all the 4GB space */ | |
265 | /* SNOOP1 starts from 0x0, size 2G */ | |
266 | out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB); | |
267 | /* SNOOP2 starts from 0x80000000, size 2G */ | |
268 | out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); | |
269 | #endif | |
270 | ||
ba02978a LY |
271 | if ((pdata->operating_mode == FSL_USB2_DR_HOST) || |
272 | (pdata->operating_mode == FSL_USB2_DR_OTG)) | |
230f7ede | 273 | ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0); |
80cb9aee RV |
274 | |
275 | if (pdata->operating_mode == FSL_USB2_MPH_HOST) { | |
8cd42e97 KG |
276 | unsigned int chip, rev, svr; |
277 | ||
278 | svr = mfspr(SPRN_SVR); | |
279 | chip = svr >> 16; | |
280 | rev = (svr >> 4) & 0xf; | |
281 | ||
282 | /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */ | |
283 | if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) | |
284 | ehci->has_fsl_port_bug = 1; | |
285 | ||
80cb9aee | 286 | if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) |
230f7ede | 287 | ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0); |
80cb9aee | 288 | if (pdata->port_enables & FSL_USB2_PORT1_ENABLED) |
230f7ede | 289 | ehci_fsl_setup_phy(ehci, pdata->phy_mode, 1); |
80cb9aee RV |
290 | } |
291 | ||
230f7ede | 292 | if (pdata->have_sysif_regs) { |
4f534258 | 293 | #ifdef CONFIG_PPC_85xx |
230f7ede AG |
294 | out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); |
295 | out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080); | |
4f534258 | 296 | #else |
230f7ede AG |
297 | out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c); |
298 | out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040); | |
4f534258 | 299 | #endif |
230f7ede AG |
300 | out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); |
301 | } | |
80cb9aee RV |
302 | } |
303 | ||
304 | /* called after powerup, by probe or system-pm "wakeup" */ | |
305 | static int ehci_fsl_reinit(struct ehci_hcd *ehci) | |
306 | { | |
230f7ede | 307 | ehci_fsl_usb_setup(ehci); |
80cb9aee RV |
308 | ehci_port_power(ehci, 0); |
309 | ||
310 | return 0; | |
311 | } | |
312 | ||
313 | /* called during probe() after chip reset completes */ | |
314 | static int ehci_fsl_setup(struct usb_hcd *hcd) | |
315 | { | |
316 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
317 | int retval; | |
230f7ede AG |
318 | struct fsl_usb2_platform_data *pdata; |
319 | ||
320 | pdata = hcd->self.controller->platform_data; | |
321 | ehci->big_endian_desc = pdata->big_endian_desc; | |
322 | ehci->big_endian_mmio = pdata->big_endian_mmio; | |
80cb9aee RV |
323 | |
324 | /* EHCI registers start at offset 0x100 */ | |
325 | ehci->caps = hcd->regs + 0x100; | |
326 | ehci->regs = hcd->regs + 0x100 + | |
c430131a | 327 | HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); |
80cb9aee RV |
328 | dbg_hcs_params(ehci, "reset"); |
329 | dbg_hcc_params(ehci, "reset"); | |
330 | ||
331 | /* cache this readonly data; minimize chip reads */ | |
083522d7 | 332 | ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); |
80cb9aee | 333 | |
65fd4272 MC |
334 | hcd->has_tt = 1; |
335 | ||
80cb9aee RV |
336 | retval = ehci_halt(ehci); |
337 | if (retval) | |
338 | return retval; | |
339 | ||
340 | /* data structure init */ | |
341 | retval = ehci_init(hcd); | |
342 | if (retval) | |
343 | return retval; | |
344 | ||
80cb9aee RV |
345 | ehci->sbrn = 0x20; |
346 | ||
347 | ehci_reset(ehci); | |
348 | ||
349 | retval = ehci_fsl_reinit(ehci); | |
350 | return retval; | |
351 | } | |
352 | ||
1af10774 AV |
353 | struct ehci_fsl { |
354 | struct ehci_hcd ehci; | |
355 | ||
356 | #ifdef CONFIG_PM | |
357 | /* Saved USB PHY settings, need to restore after deep sleep. */ | |
358 | u32 usb_ctrl; | |
359 | #endif | |
360 | }; | |
361 | ||
362 | #ifdef CONFIG_PM | |
363 | ||
13b7ee2a AG |
364 | #ifdef CONFIG_PPC_MPC512x |
365 | static int ehci_fsl_mpc512x_drv_suspend(struct device *dev) | |
366 | { | |
367 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
368 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
369 | struct fsl_usb2_platform_data *pdata = dev->platform_data; | |
370 | u32 tmp; | |
371 | ||
372 | #ifdef DEBUG | |
373 | u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE); | |
374 | mode &= USBMODE_CM_MASK; | |
375 | tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */ | |
376 | ||
377 | dev_dbg(dev, "suspend=%d already_suspended=%d " | |
378 | "mode=%d usbcmd %08x\n", pdata->suspended, | |
379 | pdata->already_suspended, mode, tmp); | |
380 | #endif | |
381 | ||
382 | /* | |
383 | * If the controller is already suspended, then this must be a | |
384 | * PM suspend. Remember this fact, so that we will leave the | |
385 | * controller suspended at PM resume time. | |
386 | */ | |
387 | if (pdata->suspended) { | |
388 | dev_dbg(dev, "already suspended, leaving early\n"); | |
389 | pdata->already_suspended = 1; | |
390 | return 0; | |
391 | } | |
392 | ||
393 | dev_dbg(dev, "suspending...\n"); | |
394 | ||
395 | hcd->state = HC_STATE_SUSPENDED; | |
396 | dev->power.power_state = PMSG_SUSPEND; | |
397 | ||
398 | /* ignore non-host interrupts */ | |
399 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
400 | ||
401 | /* stop the controller */ | |
402 | tmp = ehci_readl(ehci, &ehci->regs->command); | |
403 | tmp &= ~CMD_RUN; | |
404 | ehci_writel(ehci, tmp, &ehci->regs->command); | |
405 | ||
406 | /* save EHCI registers */ | |
407 | pdata->pm_command = ehci_readl(ehci, &ehci->regs->command); | |
408 | pdata->pm_command &= ~CMD_RUN; | |
409 | pdata->pm_status = ehci_readl(ehci, &ehci->regs->status); | |
410 | pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable); | |
411 | pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index); | |
412 | pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment); | |
413 | pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list); | |
414 | pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next); | |
415 | pdata->pm_configured_flag = | |
416 | ehci_readl(ehci, &ehci->regs->configured_flag); | |
417 | pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]); | |
418 | pdata->pm_usbgenctrl = ehci_readl(ehci, | |
419 | hcd->regs + FSL_SOC_USB_USBGENCTRL); | |
420 | ||
421 | /* clear the W1C bits */ | |
422 | pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS); | |
423 | ||
424 | pdata->suspended = 1; | |
425 | ||
426 | /* clear PP to cut power to the port */ | |
427 | tmp = ehci_readl(ehci, &ehci->regs->port_status[0]); | |
428 | tmp &= ~PORT_POWER; | |
429 | ehci_writel(ehci, tmp, &ehci->regs->port_status[0]); | |
430 | ||
431 | return 0; | |
432 | } | |
433 | ||
434 | static int ehci_fsl_mpc512x_drv_resume(struct device *dev) | |
435 | { | |
436 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
437 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
438 | struct fsl_usb2_platform_data *pdata = dev->platform_data; | |
439 | u32 tmp; | |
440 | ||
441 | dev_dbg(dev, "suspend=%d already_suspended=%d\n", | |
442 | pdata->suspended, pdata->already_suspended); | |
443 | ||
444 | /* | |
445 | * If the controller was already suspended at suspend time, | |
446 | * then don't resume it now. | |
447 | */ | |
448 | if (pdata->already_suspended) { | |
449 | dev_dbg(dev, "already suspended, leaving early\n"); | |
450 | pdata->already_suspended = 0; | |
451 | return 0; | |
452 | } | |
453 | ||
454 | if (!pdata->suspended) { | |
455 | dev_dbg(dev, "not suspended, leaving early\n"); | |
456 | return 0; | |
457 | } | |
458 | ||
459 | pdata->suspended = 0; | |
460 | ||
461 | dev_dbg(dev, "resuming...\n"); | |
462 | ||
463 | /* set host mode */ | |
464 | tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0); | |
465 | ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE); | |
466 | ||
467 | ehci_writel(ehci, pdata->pm_usbgenctrl, | |
468 | hcd->regs + FSL_SOC_USB_USBGENCTRL); | |
469 | ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE, | |
470 | hcd->regs + FSL_SOC_USB_ISIPHYCTRL); | |
471 | ||
472 | /* restore EHCI registers */ | |
473 | ehci_writel(ehci, pdata->pm_command, &ehci->regs->command); | |
474 | ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable); | |
475 | ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index); | |
476 | ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment); | |
477 | ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list); | |
478 | ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next); | |
479 | ehci_writel(ehci, pdata->pm_configured_flag, | |
480 | &ehci->regs->configured_flag); | |
481 | ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]); | |
482 | ||
483 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
484 | hcd->state = HC_STATE_RUNNING; | |
485 | dev->power.power_state = PMSG_ON; | |
486 | ||
487 | tmp = ehci_readl(ehci, &ehci->regs->command); | |
488 | tmp |= CMD_RUN; | |
489 | ehci_writel(ehci, tmp, &ehci->regs->command); | |
490 | ||
491 | usb_hcd_resume_root_hub(hcd); | |
492 | ||
493 | return 0; | |
494 | } | |
495 | #else | |
496 | static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev) | |
497 | { | |
498 | return 0; | |
499 | } | |
500 | ||
501 | static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev) | |
502 | { | |
503 | return 0; | |
504 | } | |
505 | #endif /* CONFIG_PPC_MPC512x */ | |
506 | ||
1af10774 AV |
507 | static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd) |
508 | { | |
509 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
510 | ||
511 | return container_of(ehci, struct ehci_fsl, ehci); | |
512 | } | |
513 | ||
514 | static int ehci_fsl_drv_suspend(struct device *dev) | |
515 | { | |
516 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
517 | struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); | |
518 | void __iomem *non_ehci = hcd->regs; | |
519 | ||
13b7ee2a AG |
520 | if (of_device_is_compatible(dev->parent->of_node, |
521 | "fsl,mpc5121-usb2-dr")) { | |
522 | return ehci_fsl_mpc512x_drv_suspend(dev); | |
523 | } | |
524 | ||
4147200d AS |
525 | ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd), |
526 | device_may_wakeup(dev)); | |
1af10774 AV |
527 | if (!fsl_deep_sleep()) |
528 | return 0; | |
529 | ||
530 | ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL); | |
531 | return 0; | |
532 | } | |
533 | ||
534 | static int ehci_fsl_drv_resume(struct device *dev) | |
535 | { | |
536 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
537 | struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); | |
538 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
539 | void __iomem *non_ehci = hcd->regs; | |
540 | ||
13b7ee2a AG |
541 | if (of_device_is_compatible(dev->parent->of_node, |
542 | "fsl,mpc5121-usb2-dr")) { | |
543 | return ehci_fsl_mpc512x_drv_resume(dev); | |
544 | } | |
545 | ||
16032c4f | 546 | ehci_prepare_ports_for_controller_resume(ehci); |
1af10774 AV |
547 | if (!fsl_deep_sleep()) |
548 | return 0; | |
549 | ||
550 | usb_root_hub_lost_power(hcd->self.root_hub); | |
551 | ||
552 | /* Restore USB PHY settings and enable the controller. */ | |
553 | out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl); | |
554 | ||
555 | ehci_reset(ehci); | |
556 | ehci_fsl_reinit(ehci); | |
557 | ||
558 | return 0; | |
559 | } | |
560 | ||
561 | static int ehci_fsl_drv_restore(struct device *dev) | |
562 | { | |
563 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
564 | ||
565 | usb_root_hub_lost_power(hcd->self.root_hub); | |
566 | return 0; | |
567 | } | |
568 | ||
569 | static struct dev_pm_ops ehci_fsl_pm_ops = { | |
570 | .suspend = ehci_fsl_drv_suspend, | |
571 | .resume = ehci_fsl_drv_resume, | |
572 | .restore = ehci_fsl_drv_restore, | |
573 | }; | |
574 | ||
575 | #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops) | |
576 | #else | |
577 | #define EHCI_FSL_PM_OPS NULL | |
578 | #endif /* CONFIG_PM */ | |
579 | ||
83722bc9 AG |
580 | #ifdef CONFIG_USB_OTG |
581 | static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port) | |
582 | { | |
583 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | |
584 | u32 status; | |
585 | ||
586 | if (!port) | |
587 | return -EINVAL; | |
588 | ||
589 | port--; | |
590 | ||
591 | /* start port reset before HNP protocol time out */ | |
592 | status = readl(&ehci->regs->port_status[port]); | |
593 | if (!(status & PORT_CONNECT)) | |
594 | return -ENODEV; | |
595 | ||
596 | /* khubd will finish the reset later */ | |
597 | if (ehci_is_TDI(ehci)) { | |
598 | writel(PORT_RESET | | |
599 | (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)), | |
600 | &ehci->regs->port_status[port]); | |
601 | } else { | |
602 | writel(PORT_RESET, &ehci->regs->port_status[port]); | |
603 | } | |
604 | ||
605 | return 0; | |
606 | } | |
607 | #else | |
608 | #define ehci_start_port_reset NULL | |
609 | #endif /* CONFIG_USB_OTG */ | |
610 | ||
611 | ||
80cb9aee RV |
612 | static const struct hc_driver ehci_fsl_hc_driver = { |
613 | .description = hcd_name, | |
614 | .product_desc = "Freescale On-Chip EHCI Host Controller", | |
1af10774 | 615 | .hcd_priv_size = sizeof(struct ehci_fsl), |
80cb9aee RV |
616 | |
617 | /* | |
618 | * generic hardware linkage | |
619 | */ | |
620 | .irq = ehci_irq, | |
230f7ede | 621 | .flags = HCD_USB2 | HCD_MEMORY, |
80cb9aee RV |
622 | |
623 | /* | |
624 | * basic lifecycle operations | |
625 | */ | |
626 | .reset = ehci_fsl_setup, | |
627 | .start = ehci_run, | |
80cb9aee | 628 | .stop = ehci_stop, |
64a21d02 | 629 | .shutdown = ehci_shutdown, |
80cb9aee RV |
630 | |
631 | /* | |
632 | * managing i/o requests and associated device resources | |
633 | */ | |
634 | .urb_enqueue = ehci_urb_enqueue, | |
635 | .urb_dequeue = ehci_urb_dequeue, | |
636 | .endpoint_disable = ehci_endpoint_disable, | |
b18ffd49 | 637 | .endpoint_reset = ehci_endpoint_reset, |
80cb9aee RV |
638 | |
639 | /* | |
640 | * scheduling support | |
641 | */ | |
642 | .get_frame_number = ehci_get_frame, | |
643 | ||
644 | /* | |
645 | * root hub support | |
646 | */ | |
647 | .hub_status_data = ehci_hub_status_data, | |
648 | .hub_control = ehci_hub_control, | |
649 | .bus_suspend = ehci_bus_suspend, | |
650 | .bus_resume = ehci_bus_resume, | |
83722bc9 | 651 | .start_port_reset = ehci_start_port_reset, |
90da096e | 652 | .relinquish_port = ehci_relinquish_port, |
3a31155c | 653 | .port_handed_over = ehci_port_handed_over, |
914b7012 AS |
654 | |
655 | .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, | |
80cb9aee RV |
656 | }; |
657 | ||
658 | static int ehci_fsl_drv_probe(struct platform_device *pdev) | |
659 | { | |
660 | if (usb_disabled()) | |
661 | return -ENODEV; | |
662 | ||
135db048 | 663 | /* FIXME we only want one one probe() not two */ |
80cb9aee RV |
664 | return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev); |
665 | } | |
666 | ||
667 | static int ehci_fsl_drv_remove(struct platform_device *pdev) | |
668 | { | |
669 | struct usb_hcd *hcd = platform_get_drvdata(pdev); | |
670 | ||
135db048 | 671 | /* FIXME we only want one one remove() not two */ |
80cb9aee | 672 | usb_hcd_fsl_remove(hcd, pdev); |
80cb9aee RV |
673 | return 0; |
674 | } | |
675 | ||
135db048 | 676 | MODULE_ALIAS("platform:fsl-ehci"); |
80cb9aee | 677 | |
01cced25 | 678 | static struct platform_driver ehci_fsl_driver = { |
80cb9aee RV |
679 | .probe = ehci_fsl_drv_probe, |
680 | .remove = ehci_fsl_drv_remove, | |
64a21d02 | 681 | .shutdown = usb_hcd_platform_shutdown, |
80cb9aee | 682 | .driver = { |
1af10774 AV |
683 | .name = "fsl-ehci", |
684 | .pm = EHCI_FSL_PM_OPS, | |
135db048 | 685 | }, |
80cb9aee | 686 | }; |