]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2000-2004 by David Brownell | |
53bd6a60 | 3 | * |
1da177e4 LT |
4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but | |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software Foundation, | |
16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
1da177e4 LT |
19 | #include <linux/module.h> |
20 | #include <linux/pci.h> | |
21 | #include <linux/dmapool.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/ioport.h> | |
25 | #include <linux/sched.h> | |
26 | #include <linux/slab.h> | |
1da177e4 LT |
27 | #include <linux/errno.h> |
28 | #include <linux/init.h> | |
29 | #include <linux/timer.h> | |
30 | #include <linux/list.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/reboot.h> | |
33 | #include <linux/usb.h> | |
34 | #include <linux/moduleparam.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | ||
37 | #include "../core/hcd.h" | |
38 | ||
39 | #include <asm/byteorder.h> | |
40 | #include <asm/io.h> | |
41 | #include <asm/irq.h> | |
42 | #include <asm/system.h> | |
43 | #include <asm/unaligned.h> | |
1da177e4 LT |
44 | |
45 | /*-------------------------------------------------------------------------*/ | |
46 | ||
47 | /* | |
48 | * EHCI hc_driver implementation ... experimental, incomplete. | |
49 | * Based on the final 1.0 register interface specification. | |
50 | * | |
51 | * USB 2.0 shows up in upcoming www.pcmcia.org technology. | |
52 | * First was PCMCIA, like ISA; then CardBus, which is PCI. | |
53 | * Next comes "CardBay", using USB 2.0 signals. | |
54 | * | |
55 | * Contains additional contributions by Brad Hards, Rory Bolt, and others. | |
56 | * Special thanks to Intel and VIA for providing host controllers to | |
57 | * test this driver on, and Cypress (including In-System Design) for | |
58 | * providing early devices for those host controllers to talk to! | |
59 | * | |
60 | * HISTORY: | |
61 | * | |
62 | * 2004-05-10 Root hub and PCI suspend/resume support; remote wakeup. (db) | |
63 | * 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net) | |
64 | * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka, | |
65 | * <sojkam@centrum.cz>, updates by DB). | |
66 | * | |
67 | * 2002-11-29 Correct handling for hw async_next register. | |
68 | * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared; | |
69 | * only scheduling is different, no arbitrary limitations. | |
70 | * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support, | |
53bd6a60 | 71 | * clean up HC run state handshaking. |
1da177e4 LT |
72 | * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts |
73 | * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other | |
74 | * missing pieces: enabling 64bit dma, handoff from BIOS/SMM. | |
75 | * 2002-05-07 Some error path cleanups to report better errors; wmb(); | |
76 | * use non-CVS version id; better iso bandwidth claim. | |
77 | * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on | |
78 | * errors in submit path. Bugfixes to interrupt scheduling/processing. | |
79 | * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift | |
80 | * more checking to generic hcd framework (db). Make it work with | |
81 | * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt). | |
82 | * 2002-01-14 Minor cleanup; version synch. | |
83 | * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers. | |
84 | * 2002-01-04 Control/Bulk queuing behaves. | |
85 | * | |
86 | * 2001-12-12 Initial patch version for Linux 2.5.1 kernel. | |
87 | * 2001-June Works with usb-storage and NEC EHCI on 2.4 | |
88 | */ | |
89 | ||
90 | #define DRIVER_VERSION "10 Dec 2004" | |
91 | #define DRIVER_AUTHOR "David Brownell" | |
92 | #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver" | |
93 | ||
94 | static const char hcd_name [] = "ehci_hcd"; | |
95 | ||
96 | ||
97 | #undef EHCI_VERBOSE_DEBUG | |
98 | #undef EHCI_URB_TRACE | |
99 | ||
100 | #ifdef DEBUG | |
101 | #define EHCI_STATS | |
102 | #endif | |
103 | ||
104 | /* magic numbers that can affect system performance */ | |
105 | #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */ | |
106 | #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */ | |
107 | #define EHCI_TUNE_RL_TT 0 | |
108 | #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */ | |
109 | #define EHCI_TUNE_MULT_TT 1 | |
110 | #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */ | |
111 | ||
64f89798 | 112 | #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */ |
1da177e4 LT |
113 | #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */ |
114 | #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */ | |
115 | #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */ | |
116 | ||
117 | /* Initial IRQ latency: faster than hw default */ | |
118 | static int log2_irq_thresh = 0; // 0 to 6 | |
119 | module_param (log2_irq_thresh, int, S_IRUGO); | |
120 | MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes"); | |
121 | ||
122 | /* initial park setting: slower than hw default */ | |
123 | static unsigned park = 0; | |
124 | module_param (park, uint, S_IRUGO); | |
125 | MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets"); | |
126 | ||
93f1a47c DB |
127 | /* for flakey hardware, ignore overcurrent indicators */ |
128 | static int ignore_oc = 0; | |
129 | module_param (ignore_oc, bool, S_IRUGO); | |
130 | MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications"); | |
131 | ||
1da177e4 LT |
132 | #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) |
133 | ||
134 | /*-------------------------------------------------------------------------*/ | |
135 | ||
136 | #include "ehci.h" | |
137 | #include "ehci-dbg.c" | |
138 | ||
139 | /*-------------------------------------------------------------------------*/ | |
140 | ||
141 | /* | |
142 | * handshake - spin reading hc until handshake completes or fails | |
143 | * @ptr: address of hc register to be read | |
144 | * @mask: bits to look at in result of read | |
145 | * @done: value of those bits when handshake succeeds | |
146 | * @usec: timeout in microseconds | |
147 | * | |
148 | * Returns negative errno, or zero on success | |
149 | * | |
150 | * Success happens when the "mask" bits have the specified value (hardware | |
151 | * handshake done). There are two failure modes: "usec" have passed (major | |
152 | * hardware flakeout), or the register reads as all-ones (hardware removed). | |
153 | * | |
154 | * That last failure should_only happen in cases like physical cardbus eject | |
155 | * before driver shutdown. But it also seems to be caused by bugs in cardbus | |
156 | * bridge shutdown: shutting down the bridge before the devices using it. | |
157 | */ | |
083522d7 BH |
158 | static int handshake (struct ehci_hcd *ehci, void __iomem *ptr, |
159 | u32 mask, u32 done, int usec) | |
1da177e4 LT |
160 | { |
161 | u32 result; | |
162 | ||
163 | do { | |
083522d7 | 164 | result = ehci_readl(ehci, ptr); |
1da177e4 LT |
165 | if (result == ~(u32)0) /* card removed */ |
166 | return -ENODEV; | |
167 | result &= mask; | |
168 | if (result == done) | |
169 | return 0; | |
170 | udelay (1); | |
171 | usec--; | |
172 | } while (usec > 0); | |
173 | return -ETIMEDOUT; | |
174 | } | |
175 | ||
176 | /* force HC to halt state from unknown (EHCI spec section 2.3) */ | |
177 | static int ehci_halt (struct ehci_hcd *ehci) | |
178 | { | |
083522d7 | 179 | u32 temp = ehci_readl(ehci, &ehci->regs->status); |
1da177e4 | 180 | |
72f30b6f | 181 | /* disable any irqs left enabled by previous code */ |
083522d7 | 182 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
72f30b6f | 183 | |
1da177e4 LT |
184 | if ((temp & STS_HALT) != 0) |
185 | return 0; | |
186 | ||
083522d7 | 187 | temp = ehci_readl(ehci, &ehci->regs->command); |
1da177e4 | 188 | temp &= ~CMD_RUN; |
083522d7 BH |
189 | ehci_writel(ehci, temp, &ehci->regs->command); |
190 | return handshake (ehci, &ehci->regs->status, | |
191 | STS_HALT, STS_HALT, 16 * 125); | |
1da177e4 LT |
192 | } |
193 | ||
194 | /* put TDI/ARC silicon into EHCI mode */ | |
195 | static void tdi_reset (struct ehci_hcd *ehci) | |
196 | { | |
197 | u32 __iomem *reg_ptr; | |
198 | u32 tmp; | |
199 | ||
d23a1377 | 200 | reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE); |
083522d7 | 201 | tmp = ehci_readl(ehci, reg_ptr); |
d23a1377 VB |
202 | tmp |= USBMODE_CM_HC; |
203 | /* The default byte access to MMR space is LE after | |
204 | * controller reset. Set the required endian mode | |
205 | * for transfer buffers to match the host microprocessor | |
206 | */ | |
207 | if (ehci_big_endian_mmio(ehci)) | |
208 | tmp |= USBMODE_BE; | |
083522d7 | 209 | ehci_writel(ehci, tmp, reg_ptr); |
1da177e4 LT |
210 | } |
211 | ||
212 | /* reset a non-running (STS_HALT == 1) controller */ | |
213 | static int ehci_reset (struct ehci_hcd *ehci) | |
214 | { | |
215 | int retval; | |
083522d7 | 216 | u32 command = ehci_readl(ehci, &ehci->regs->command); |
1da177e4 LT |
217 | |
218 | command |= CMD_RESET; | |
219 | dbg_cmd (ehci, "reset", command); | |
083522d7 | 220 | ehci_writel(ehci, command, &ehci->regs->command); |
1da177e4 LT |
221 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; |
222 | ehci->next_statechange = jiffies; | |
083522d7 BH |
223 | retval = handshake (ehci, &ehci->regs->command, |
224 | CMD_RESET, 0, 250 * 1000); | |
1da177e4 LT |
225 | |
226 | if (retval) | |
227 | return retval; | |
228 | ||
229 | if (ehci_is_TDI(ehci)) | |
230 | tdi_reset (ehci); | |
231 | ||
232 | return retval; | |
233 | } | |
234 | ||
235 | /* idle the controller (from running) */ | |
236 | static void ehci_quiesce (struct ehci_hcd *ehci) | |
237 | { | |
238 | u32 temp; | |
239 | ||
240 | #ifdef DEBUG | |
241 | if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) | |
242 | BUG (); | |
243 | #endif | |
244 | ||
245 | /* wait for any schedule enables/disables to take effect */ | |
083522d7 | 246 | temp = ehci_readl(ehci, &ehci->regs->command) << 10; |
1da177e4 | 247 | temp &= STS_ASS | STS_PSS; |
083522d7 | 248 | if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS, |
1da177e4 LT |
249 | temp, 16 * 125) != 0) { |
250 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; | |
251 | return; | |
252 | } | |
253 | ||
254 | /* then disable anything that's still active */ | |
083522d7 | 255 | temp = ehci_readl(ehci, &ehci->regs->command); |
1da177e4 | 256 | temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE); |
083522d7 | 257 | ehci_writel(ehci, temp, &ehci->regs->command); |
1da177e4 LT |
258 | |
259 | /* hardware can take 16 microframes to turn off ... */ | |
083522d7 | 260 | if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS, |
1da177e4 LT |
261 | 0, 16 * 125) != 0) { |
262 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; | |
263 | return; | |
264 | } | |
265 | } | |
266 | ||
267 | /*-------------------------------------------------------------------------*/ | |
268 | ||
7d12e780 | 269 | static void ehci_work(struct ehci_hcd *ehci); |
1da177e4 LT |
270 | |
271 | #include "ehci-hub.c" | |
272 | #include "ehci-mem.c" | |
273 | #include "ehci-q.c" | |
274 | #include "ehci-sched.c" | |
275 | ||
276 | /*-------------------------------------------------------------------------*/ | |
277 | ||
64f89798 | 278 | static void ehci_watchdog (unsigned long param) |
1da177e4 LT |
279 | { |
280 | struct ehci_hcd *ehci = (struct ehci_hcd *) param; | |
281 | unsigned long flags; | |
282 | ||
283 | spin_lock_irqsave (&ehci->lock, flags); | |
284 | ||
64f89798 | 285 | /* lost IAA irqs wedge things badly; seen with a vt8235 */ |
1da177e4 | 286 | if (ehci->reclaim) { |
083522d7 | 287 | u32 status = ehci_readl(ehci, &ehci->regs->status); |
1da177e4 LT |
288 | if (status & STS_IAA) { |
289 | ehci_vdbg (ehci, "lost IAA\n"); | |
290 | COUNT (ehci->stats.lost_iaa); | |
083522d7 | 291 | ehci_writel(ehci, STS_IAA, &ehci->regs->status); |
64f89798 | 292 | ehci->reclaim_ready = 1; |
1da177e4 LT |
293 | } |
294 | } | |
295 | ||
64f89798 | 296 | /* stop async processing after it's idled a bit */ |
1da177e4 | 297 | if (test_bit (TIMER_ASYNC_OFF, &ehci->actions)) |
26f953fd | 298 | start_unlink_async (ehci, ehci->async); |
1da177e4 LT |
299 | |
300 | /* ehci could run by timer, without IRQs ... */ | |
7d12e780 | 301 | ehci_work (ehci); |
1da177e4 LT |
302 | |
303 | spin_unlock_irqrestore (&ehci->lock, flags); | |
304 | } | |
305 | ||
8903795a AS |
306 | /* On some systems, leaving remote wakeup enabled prevents system shutdown. |
307 | * The firmware seems to think that powering off is a wakeup event! | |
308 | * This routine turns off remote wakeup and everything else, on all ports. | |
309 | */ | |
310 | static void ehci_turn_off_all_ports(struct ehci_hcd *ehci) | |
311 | { | |
312 | int port = HCS_N_PORTS(ehci->hcs_params); | |
313 | ||
314 | while (port--) | |
315 | ehci_writel(ehci, PORT_RWC_BITS, | |
316 | &ehci->regs->port_status[port]); | |
317 | } | |
318 | ||
64a21d02 | 319 | /* ehci_shutdown kick in for silicon on any bus (not just pci, etc). |
72f30b6f DB |
320 | * This forcibly disables dma and IRQs, helping kexec and other cases |
321 | * where the next system software may expect clean state. | |
322 | */ | |
64a21d02 AG |
323 | static void |
324 | ehci_shutdown (struct usb_hcd *hcd) | |
1da177e4 | 325 | { |
64a21d02 | 326 | struct ehci_hcd *ehci; |
1da177e4 | 327 | |
64a21d02 | 328 | ehci = hcd_to_ehci (hcd); |
72f30b6f | 329 | (void) ehci_halt (ehci); |
8903795a | 330 | ehci_turn_off_all_ports(ehci); |
1da177e4 LT |
331 | |
332 | /* make BIOS/etc use companion controller during reboot */ | |
083522d7 | 333 | ehci_writel(ehci, 0, &ehci->regs->configured_flag); |
8903795a AS |
334 | |
335 | /* unblock posted writes */ | |
336 | ehci_readl(ehci, &ehci->regs->configured_flag); | |
1da177e4 LT |
337 | } |
338 | ||
56c1e26d DB |
339 | static void ehci_port_power (struct ehci_hcd *ehci, int is_on) |
340 | { | |
341 | unsigned port; | |
342 | ||
343 | if (!HCS_PPC (ehci->hcs_params)) | |
344 | return; | |
345 | ||
346 | ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down"); | |
347 | for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) | |
348 | (void) ehci_hub_control(ehci_to_hcd(ehci), | |
349 | is_on ? SetPortFeature : ClearPortFeature, | |
350 | USB_PORT_FEAT_POWER, | |
351 | port--, NULL, 0); | |
383975d7 AS |
352 | /* Flush those writes */ |
353 | ehci_readl(ehci, &ehci->regs->command); | |
56c1e26d DB |
354 | msleep(20); |
355 | } | |
356 | ||
7ff71d6a | 357 | /*-------------------------------------------------------------------------*/ |
1da177e4 | 358 | |
7ff71d6a MP |
359 | /* |
360 | * ehci_work is called from some interrupts, timers, and so on. | |
361 | * it calls driver completion functions, after dropping ehci->lock. | |
362 | */ | |
7d12e780 | 363 | static void ehci_work (struct ehci_hcd *ehci) |
7ff71d6a MP |
364 | { |
365 | timer_action_done (ehci, TIMER_IO_WATCHDOG); | |
64f89798 GKH |
366 | if (ehci->reclaim_ready) |
367 | end_unlink_async (ehci); | |
7ff71d6a MP |
368 | |
369 | /* another CPU may drop ehci->lock during a schedule scan while | |
370 | * it reports urb completions. this flag guards against bogus | |
371 | * attempts at re-entrant schedule scanning. | |
372 | */ | |
373 | if (ehci->scanning) | |
374 | return; | |
375 | ehci->scanning = 1; | |
7d12e780 | 376 | scan_async (ehci); |
7ff71d6a | 377 | if (ehci->next_uframe != -1) |
7d12e780 | 378 | scan_periodic (ehci); |
7ff71d6a MP |
379 | ehci->scanning = 0; |
380 | ||
381 | /* the IO watchdog guards against hardware or driver bugs that | |
382 | * misplace IRQs, and should let us run completely without IRQs. | |
383 | * such lossage has been observed on both VT6202 and VT8235. | |
384 | */ | |
385 | if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && | |
386 | (ehci->async->qh_next.ptr != NULL || | |
387 | ehci->periodic_sched != 0)) | |
388 | timer_action (ehci, TIMER_IO_WATCHDOG); | |
389 | } | |
1da177e4 | 390 | |
7ff71d6a | 391 | static void ehci_stop (struct usb_hcd *hcd) |
1da177e4 LT |
392 | { |
393 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
1da177e4 | 394 | |
7ff71d6a | 395 | ehci_dbg (ehci, "stop\n"); |
1da177e4 | 396 | |
7ff71d6a MP |
397 | /* Turn off port power on all root hub ports. */ |
398 | ehci_port_power (ehci, 0); | |
1da177e4 | 399 | |
7ff71d6a MP |
400 | /* no more interrupts ... */ |
401 | del_timer_sync (&ehci->watchdog); | |
56c1e26d | 402 | |
7ff71d6a MP |
403 | spin_lock_irq(&ehci->lock); |
404 | if (HC_IS_RUNNING (hcd->state)) | |
405 | ehci_quiesce (ehci); | |
1da177e4 | 406 | |
7ff71d6a | 407 | ehci_reset (ehci); |
083522d7 | 408 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
7ff71d6a | 409 | spin_unlock_irq(&ehci->lock); |
1da177e4 | 410 | |
7ff71d6a | 411 | /* let companion controllers work when we aren't */ |
083522d7 | 412 | ehci_writel(ehci, 0, &ehci->regs->configured_flag); |
56c1e26d | 413 | |
57e06c11 | 414 | remove_companion_file(ehci); |
7ff71d6a | 415 | remove_debug_files (ehci); |
1da177e4 | 416 | |
7ff71d6a MP |
417 | /* root hub is shut down separately (first, when possible) */ |
418 | spin_lock_irq (&ehci->lock); | |
419 | if (ehci->async) | |
7d12e780 | 420 | ehci_work (ehci); |
7ff71d6a MP |
421 | spin_unlock_irq (&ehci->lock); |
422 | ehci_mem_cleanup (ehci); | |
1da177e4 | 423 | |
7ff71d6a MP |
424 | #ifdef EHCI_STATS |
425 | ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n", | |
426 | ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim, | |
427 | ehci->stats.lost_iaa); | |
428 | ehci_dbg (ehci, "complete %ld unlink %ld\n", | |
429 | ehci->stats.complete, ehci->stats.unlink); | |
1da177e4 | 430 | #endif |
1da177e4 | 431 | |
083522d7 BH |
432 | dbg_status (ehci, "ehci_stop completed", |
433 | ehci_readl(ehci, &ehci->regs->status)); | |
1da177e4 LT |
434 | } |
435 | ||
18807521 DB |
436 | /* one-time init, only for memory state */ |
437 | static int ehci_init(struct usb_hcd *hcd) | |
1da177e4 | 438 | { |
18807521 | 439 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
1da177e4 | 440 | u32 temp; |
1da177e4 LT |
441 | int retval; |
442 | u32 hcc_params; | |
18807521 DB |
443 | |
444 | spin_lock_init(&ehci->lock); | |
445 | ||
446 | init_timer(&ehci->watchdog); | |
447 | ehci->watchdog.function = ehci_watchdog; | |
448 | ehci->watchdog.data = (unsigned long) ehci; | |
1da177e4 LT |
449 | |
450 | /* | |
451 | * hw default: 1K periodic list heads, one per frame. | |
452 | * periodic_size can shrink by USBCMD update if hcc_params allows. | |
453 | */ | |
454 | ehci->periodic_size = DEFAULT_I_TDPS; | |
18807521 | 455 | if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0) |
1da177e4 LT |
456 | return retval; |
457 | ||
458 | /* controllers may cache some of the periodic schedule ... */ | |
083522d7 | 459 | hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); |
53bd6a60 | 460 | if (HCC_ISOC_CACHE(hcc_params)) // full frame cache |
1da177e4 LT |
461 | ehci->i_thresh = 8; |
462 | else // N microframes cached | |
18807521 | 463 | ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); |
1da177e4 LT |
464 | |
465 | ehci->reclaim = NULL; | |
64f89798 | 466 | ehci->reclaim_ready = 0; |
1da177e4 LT |
467 | ehci->next_uframe = -1; |
468 | ||
1da177e4 LT |
469 | /* |
470 | * dedicate a qh for the async ring head, since we couldn't unlink | |
471 | * a 'real' qh without stopping the async schedule [4.8]. use it | |
472 | * as the 'reclamation list head' too. | |
473 | * its dummy is used in hw_alt_next of many tds, to prevent the qh | |
474 | * from automatically advancing to the next td after short reads. | |
475 | */ | |
18807521 | 476 | ehci->async->qh_next.qh = NULL; |
6dbd682b SR |
477 | ehci->async->hw_next = QH_NEXT(ehci, ehci->async->qh_dma); |
478 | ehci->async->hw_info1 = cpu_to_hc32(ehci, QH_HEAD); | |
479 | ehci->async->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT); | |
480 | ehci->async->hw_qtd_next = EHCI_LIST_END(ehci); | |
18807521 | 481 | ehci->async->qh_state = QH_STATE_LINKED; |
6dbd682b | 482 | ehci->async->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma); |
1da177e4 LT |
483 | |
484 | /* clear interrupt enables, set irq latency */ | |
485 | if (log2_irq_thresh < 0 || log2_irq_thresh > 6) | |
486 | log2_irq_thresh = 0; | |
487 | temp = 1 << (16 + log2_irq_thresh); | |
488 | if (HCC_CANPARK(hcc_params)) { | |
489 | /* HW default park == 3, on hardware that supports it (like | |
490 | * NVidia and ALI silicon), maximizes throughput on the async | |
491 | * schedule by avoiding QH fetches between transfers. | |
492 | * | |
493 | * With fast usb storage devices and NForce2, "park" seems to | |
494 | * make problems: throughput reduction (!), data errors... | |
495 | */ | |
496 | if (park) { | |
18807521 | 497 | park = min(park, (unsigned) 3); |
1da177e4 LT |
498 | temp |= CMD_PARK; |
499 | temp |= park << 8; | |
500 | } | |
18807521 | 501 | ehci_dbg(ehci, "park %d\n", park); |
1da177e4 | 502 | } |
18807521 | 503 | if (HCC_PGM_FRAMELISTLEN(hcc_params)) { |
1da177e4 LT |
504 | /* periodic schedule size can be smaller than default */ |
505 | temp &= ~(3 << 2); | |
506 | temp |= (EHCI_TUNE_FLS << 2); | |
507 | switch (EHCI_TUNE_FLS) { | |
508 | case 0: ehci->periodic_size = 1024; break; | |
509 | case 1: ehci->periodic_size = 512; break; | |
510 | case 2: ehci->periodic_size = 256; break; | |
18807521 | 511 | default: BUG(); |
1da177e4 LT |
512 | } |
513 | } | |
18807521 DB |
514 | ehci->command = temp; |
515 | ||
18807521 DB |
516 | return 0; |
517 | } | |
518 | ||
519 | /* start HC running; it's halted, ehci_init() has been run (once) */ | |
520 | static int ehci_run (struct usb_hcd *hcd) | |
521 | { | |
522 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
523 | int retval; | |
524 | u32 temp; | |
525 | u32 hcc_params; | |
526 | ||
1d619f12 MT |
527 | hcd->uses_new_polling = 1; |
528 | hcd->poll_rh = 0; | |
529 | ||
18807521 DB |
530 | /* EHCI spec section 4.1 */ |
531 | if ((retval = ehci_reset(ehci)) != 0) { | |
18807521 DB |
532 | ehci_mem_cleanup(ehci); |
533 | return retval; | |
534 | } | |
083522d7 BH |
535 | ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); |
536 | ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); | |
18807521 DB |
537 | |
538 | /* | |
539 | * hcc_params controls whether ehci->regs->segment must (!!!) | |
540 | * be used; it constrains QH/ITD/SITD and QTD locations. | |
541 | * pci_pool consistent memory always uses segment zero. | |
542 | * streaming mappings for I/O buffers, like pci_map_single(), | |
543 | * can return segments above 4GB, if the device allows. | |
544 | * | |
545 | * NOTE: the dma mask is visible through dma_supported(), so | |
546 | * drivers can pass this info along ... like NETIF_F_HIGHDMA, | |
547 | * Scsi_Host.highmem_io, and so forth. It's readonly to all | |
548 | * host side drivers though. | |
549 | */ | |
083522d7 | 550 | hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); |
18807521 | 551 | if (HCC_64BIT_ADDR(hcc_params)) { |
083522d7 | 552 | ehci_writel(ehci, 0, &ehci->regs->segment); |
18807521 DB |
553 | #if 0 |
554 | // this is deeply broken on almost all architectures | |
555 | if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK)) | |
556 | ehci_info(ehci, "enabled 64bit DMA\n"); | |
557 | #endif | |
558 | } | |
559 | ||
560 | ||
1da177e4 LT |
561 | // Philips, Intel, and maybe others need CMD_RUN before the |
562 | // root hub will detect new devices (why?); NEC doesn't | |
18807521 DB |
563 | ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); |
564 | ehci->command |= CMD_RUN; | |
083522d7 | 565 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
18807521 | 566 | dbg_cmd (ehci, "init", ehci->command); |
1da177e4 | 567 | |
1da177e4 LT |
568 | /* |
569 | * Start, enabling full USB 2.0 functionality ... usb 1.1 devices | |
570 | * are explicitly handed to companion controller(s), so no TT is | |
571 | * involved with the root hub. (Except where one is integrated, | |
572 | * and there's no companion controller unless maybe for USB OTG.) | |
32fe0198 AS |
573 | * |
574 | * Turning on the CF flag will transfer ownership of all ports | |
575 | * from the companions to the EHCI controller. If any of the | |
576 | * companions are in the middle of a port reset at the time, it | |
577 | * could cause trouble. Write-locking ehci_cf_port_reset_rwsem | |
578 | * guarantees that no resets are in progress. | |
1da177e4 | 579 | */ |
32fe0198 | 580 | down_write(&ehci_cf_port_reset_rwsem); |
1da177e4 | 581 | hcd->state = HC_STATE_RUNNING; |
083522d7 BH |
582 | ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); |
583 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ | |
32fe0198 | 584 | up_write(&ehci_cf_port_reset_rwsem); |
1da177e4 | 585 | |
083522d7 | 586 | temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase)); |
1da177e4 | 587 | ehci_info (ehci, |
93f1a47c | 588 | "USB %x.%x started, EHCI %x.%02x, driver %s%s\n", |
7ff71d6a | 589 | ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), |
93f1a47c DB |
590 | temp >> 8, temp & 0xff, DRIVER_VERSION, |
591 | ignore_oc ? ", overcurrent ignored" : ""); | |
1da177e4 | 592 | |
083522d7 BH |
593 | ehci_writel(ehci, INTR_MASK, |
594 | &ehci->regs->intr_enable); /* Turn On Interrupts */ | |
1da177e4 | 595 | |
18807521 DB |
596 | /* GRR this is run-once init(), being done every time the HC starts. |
597 | * So long as they're part of class devices, we can't do it init() | |
598 | * since the class device isn't created that early. | |
599 | */ | |
600 | create_debug_files(ehci); | |
57e06c11 | 601 | create_companion_file(ehci); |
1da177e4 LT |
602 | |
603 | return 0; | |
604 | } | |
605 | ||
1da177e4 LT |
606 | /*-------------------------------------------------------------------------*/ |
607 | ||
7d12e780 | 608 | static irqreturn_t ehci_irq (struct usb_hcd *hcd) |
1da177e4 LT |
609 | { |
610 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
1d619f12 | 611 | u32 status, pcd_status = 0; |
1da177e4 LT |
612 | int bh; |
613 | ||
614 | spin_lock (&ehci->lock); | |
615 | ||
083522d7 | 616 | status = ehci_readl(ehci, &ehci->regs->status); |
1da177e4 LT |
617 | |
618 | /* e.g. cardbus physical eject */ | |
619 | if (status == ~(u32) 0) { | |
620 | ehci_dbg (ehci, "device removed\n"); | |
621 | goto dead; | |
622 | } | |
623 | ||
624 | status &= INTR_MASK; | |
625 | if (!status) { /* irq sharing? */ | |
626 | spin_unlock(&ehci->lock); | |
627 | return IRQ_NONE; | |
628 | } | |
629 | ||
630 | /* clear (just) interrupts */ | |
083522d7 BH |
631 | ehci_writel(ehci, status, &ehci->regs->status); |
632 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */ | |
1da177e4 LT |
633 | bh = 0; |
634 | ||
635 | #ifdef EHCI_VERBOSE_DEBUG | |
636 | /* unrequested/ignored: Frame List Rollover */ | |
637 | dbg_status (ehci, "irq", status); | |
638 | #endif | |
639 | ||
640 | /* INT, ERR, and IAA interrupt rates can be throttled */ | |
641 | ||
642 | /* normal [4.15.1.2] or error [4.15.1.1] completion */ | |
643 | if (likely ((status & (STS_INT|STS_ERR)) != 0)) { | |
644 | if (likely ((status & STS_ERR) == 0)) | |
645 | COUNT (ehci->stats.normal); | |
646 | else | |
647 | COUNT (ehci->stats.error); | |
648 | bh = 1; | |
649 | } | |
650 | ||
651 | /* complete the unlinking of some qh [4.15.2.3] */ | |
652 | if (status & STS_IAA) { | |
653 | COUNT (ehci->stats.reclaim); | |
64f89798 | 654 | ehci->reclaim_ready = 1; |
1da177e4 LT |
655 | bh = 1; |
656 | } | |
657 | ||
658 | /* remote wakeup [4.3.1] */ | |
d97cc2f2 | 659 | if (status & STS_PCD) { |
1da177e4 | 660 | unsigned i = HCS_N_PORTS (ehci->hcs_params); |
1d619f12 | 661 | pcd_status = status; |
1da177e4 LT |
662 | |
663 | /* resume root hub? */ | |
083522d7 | 664 | if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN)) |
8c03356a | 665 | usb_hcd_resume_root_hub(hcd); |
1da177e4 LT |
666 | |
667 | while (i--) { | |
083522d7 BH |
668 | int pstatus = ehci_readl(ehci, |
669 | &ehci->regs->port_status [i]); | |
b972b68c DB |
670 | |
671 | if (pstatus & PORT_OWNER) | |
1da177e4 | 672 | continue; |
b972b68c | 673 | if (!(pstatus & PORT_RESUME) |
1da177e4 LT |
674 | || ehci->reset_done [i] != 0) |
675 | continue; | |
676 | ||
677 | /* start 20 msec resume signaling from this port, | |
678 | * and make khubd collect PORT_STAT_C_SUSPEND to | |
679 | * stop that signaling. | |
680 | */ | |
681 | ehci->reset_done [i] = jiffies + msecs_to_jiffies (20); | |
1da177e4 | 682 | ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); |
61e8b858 | 683 | mod_timer(&hcd->rh_timer, ehci->reset_done[i]); |
1da177e4 LT |
684 | } |
685 | } | |
686 | ||
687 | /* PCI errors [4.15.2.4] */ | |
688 | if (unlikely ((status & STS_FATAL) != 0)) { | |
689 | /* bogus "fatal" IRQs appear on some chips... why? */ | |
083522d7 BH |
690 | status = ehci_readl(ehci, &ehci->regs->status); |
691 | dbg_cmd (ehci, "fatal", ehci_readl(ehci, | |
692 | &ehci->regs->command)); | |
1da177e4 LT |
693 | dbg_status (ehci, "fatal", status); |
694 | if (status & STS_HALT) { | |
695 | ehci_err (ehci, "fatal error\n"); | |
696 | dead: | |
697 | ehci_reset (ehci); | |
083522d7 | 698 | ehci_writel(ehci, 0, &ehci->regs->configured_flag); |
1da177e4 LT |
699 | /* generic layer kills/unlinks all urbs, then |
700 | * uses ehci_stop to clean up the rest | |
701 | */ | |
702 | bh = 1; | |
703 | } | |
704 | } | |
705 | ||
706 | if (bh) | |
7d12e780 | 707 | ehci_work (ehci); |
1da177e4 | 708 | spin_unlock (&ehci->lock); |
1d619f12 MT |
709 | if (pcd_status & STS_PCD) |
710 | usb_hcd_poll_rh_status(hcd); | |
1da177e4 LT |
711 | return IRQ_HANDLED; |
712 | } | |
713 | ||
714 | /*-------------------------------------------------------------------------*/ | |
715 | ||
716 | /* | |
717 | * non-error returns are a promise to giveback() the urb later | |
718 | * we drop ownership so next owner (or urb unlink) can get it | |
719 | * | |
720 | * urb + dev is in hcd.self.controller.urb_list | |
721 | * we're queueing TDs onto software and hardware lists | |
722 | * | |
723 | * hcd-specific init for hcpriv hasn't been done yet | |
724 | * | |
725 | * NOTE: control, bulk, and interrupt share the same code to append TDs | |
726 | * to a (possibly active) QH, and the same QH scanning code. | |
727 | */ | |
728 | static int ehci_urb_enqueue ( | |
729 | struct usb_hcd *hcd, | |
1da177e4 | 730 | struct urb *urb, |
55016f10 | 731 | gfp_t mem_flags |
1da177e4 LT |
732 | ) { |
733 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
734 | struct list_head qtd_list; | |
735 | ||
736 | INIT_LIST_HEAD (&qtd_list); | |
737 | ||
738 | switch (usb_pipetype (urb->pipe)) { | |
739 | // case PIPE_CONTROL: | |
740 | // case PIPE_BULK: | |
741 | default: | |
742 | if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) | |
743 | return -ENOMEM; | |
e9df41c5 | 744 | return submit_async(ehci, urb, &qtd_list, mem_flags); |
1da177e4 LT |
745 | |
746 | case PIPE_INTERRUPT: | |
747 | if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) | |
748 | return -ENOMEM; | |
e9df41c5 | 749 | return intr_submit(ehci, urb, &qtd_list, mem_flags); |
1da177e4 LT |
750 | |
751 | case PIPE_ISOCHRONOUS: | |
752 | if (urb->dev->speed == USB_SPEED_HIGH) | |
753 | return itd_submit (ehci, urb, mem_flags); | |
754 | else | |
755 | return sitd_submit (ehci, urb, mem_flags); | |
756 | } | |
757 | } | |
758 | ||
759 | static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh) | |
760 | { | |
64f89798 GKH |
761 | /* if we need to use IAA and it's busy, defer */ |
762 | if (qh->qh_state == QH_STATE_LINKED | |
763 | && ehci->reclaim | |
764 | && HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) { | |
1da177e4 LT |
765 | struct ehci_qh *last; |
766 | ||
767 | for (last = ehci->reclaim; | |
768 | last->reclaim; | |
769 | last = last->reclaim) | |
770 | continue; | |
771 | qh->qh_state = QH_STATE_UNLINK_WAIT; | |
772 | last->reclaim = qh; | |
773 | ||
64f89798 GKH |
774 | /* bypass IAA if the hc can't care */ |
775 | } else if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && ehci->reclaim) | |
776 | end_unlink_async (ehci); | |
777 | ||
778 | /* something else might have unlinked the qh by now */ | |
779 | if (qh->qh_state == QH_STATE_LINKED) | |
1da177e4 LT |
780 | start_unlink_async (ehci, qh); |
781 | } | |
782 | ||
783 | /* remove from hardware lists | |
784 | * completions normally happen asynchronously | |
785 | */ | |
786 | ||
e9df41c5 | 787 | static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) |
1da177e4 LT |
788 | { |
789 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
790 | struct ehci_qh *qh; | |
791 | unsigned long flags; | |
e9df41c5 | 792 | int rc; |
1da177e4 LT |
793 | |
794 | spin_lock_irqsave (&ehci->lock, flags); | |
e9df41c5 AS |
795 | rc = usb_hcd_check_unlink_urb(hcd, urb, status); |
796 | if (rc) | |
797 | goto done; | |
798 | ||
1da177e4 LT |
799 | switch (usb_pipetype (urb->pipe)) { |
800 | // case PIPE_CONTROL: | |
801 | // case PIPE_BULK: | |
802 | default: | |
803 | qh = (struct ehci_qh *) urb->hcpriv; | |
804 | if (!qh) | |
805 | break; | |
64f89798 | 806 | unlink_async (ehci, qh); |
1da177e4 LT |
807 | break; |
808 | ||
809 | case PIPE_INTERRUPT: | |
810 | qh = (struct ehci_qh *) urb->hcpriv; | |
811 | if (!qh) | |
812 | break; | |
813 | switch (qh->qh_state) { | |
814 | case QH_STATE_LINKED: | |
815 | intr_deschedule (ehci, qh); | |
816 | /* FALL THROUGH */ | |
817 | case QH_STATE_IDLE: | |
7d12e780 | 818 | qh_completions (ehci, qh); |
1da177e4 LT |
819 | break; |
820 | default: | |
821 | ehci_dbg (ehci, "bogus qh %p state %d\n", | |
822 | qh, qh->qh_state); | |
823 | goto done; | |
824 | } | |
825 | ||
826 | /* reschedule QH iff another request is queued */ | |
827 | if (!list_empty (&qh->qtd_list) | |
828 | && HC_IS_RUNNING (hcd->state)) { | |
829 | int status; | |
830 | ||
831 | status = qh_schedule (ehci, qh); | |
832 | spin_unlock_irqrestore (&ehci->lock, flags); | |
833 | ||
834 | if (status != 0) { | |
835 | // shouldn't happen often, but ... | |
836 | // FIXME kill those tds' urbs | |
837 | err ("can't reschedule qh %p, err %d", | |
838 | qh, status); | |
839 | } | |
840 | return status; | |
841 | } | |
842 | break; | |
843 | ||
844 | case PIPE_ISOCHRONOUS: | |
845 | // itd or sitd ... | |
846 | ||
847 | // wait till next completion, do it then. | |
848 | // completion irqs can wait up to 1024 msec, | |
849 | break; | |
850 | } | |
851 | done: | |
852 | spin_unlock_irqrestore (&ehci->lock, flags); | |
e9df41c5 | 853 | return rc; |
1da177e4 LT |
854 | } |
855 | ||
856 | /*-------------------------------------------------------------------------*/ | |
857 | ||
858 | // bulk qh holds the data toggle | |
859 | ||
860 | static void | |
861 | ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep) | |
862 | { | |
863 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
864 | unsigned long flags; | |
865 | struct ehci_qh *qh, *tmp; | |
866 | ||
867 | /* ASSERT: any requests/urbs are being unlinked */ | |
868 | /* ASSERT: nobody can be submitting urbs for this any more */ | |
869 | ||
870 | rescan: | |
871 | spin_lock_irqsave (&ehci->lock, flags); | |
872 | qh = ep->hcpriv; | |
873 | if (!qh) | |
874 | goto done; | |
875 | ||
876 | /* endpoints can be iso streams. for now, we don't | |
877 | * accelerate iso completions ... so spin a while. | |
878 | */ | |
879 | if (qh->hw_info1 == 0) { | |
880 | ehci_vdbg (ehci, "iso delay\n"); | |
881 | goto idle_timeout; | |
882 | } | |
883 | ||
884 | if (!HC_IS_RUNNING (hcd->state)) | |
885 | qh->qh_state = QH_STATE_IDLE; | |
886 | switch (qh->qh_state) { | |
887 | case QH_STATE_LINKED: | |
888 | for (tmp = ehci->async->qh_next.qh; | |
889 | tmp && tmp != qh; | |
890 | tmp = tmp->qh_next.qh) | |
891 | continue; | |
892 | /* periodic qh self-unlinks on empty */ | |
893 | if (!tmp) | |
894 | goto nogood; | |
895 | unlink_async (ehci, qh); | |
896 | /* FALL THROUGH */ | |
897 | case QH_STATE_UNLINK: /* wait for hw to finish? */ | |
898 | idle_timeout: | |
899 | spin_unlock_irqrestore (&ehci->lock, flags); | |
22c43863 | 900 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
901 | goto rescan; |
902 | case QH_STATE_IDLE: /* fully unlinked */ | |
903 | if (list_empty (&qh->qtd_list)) { | |
904 | qh_put (qh); | |
905 | break; | |
906 | } | |
907 | /* else FALL THROUGH */ | |
908 | default: | |
909 | nogood: | |
910 | /* caller was supposed to have unlinked any requests; | |
911 | * that's not our job. just leak this memory. | |
912 | */ | |
913 | ehci_err (ehci, "qh %p (#%02x) state %d%s\n", | |
914 | qh, ep->desc.bEndpointAddress, qh->qh_state, | |
915 | list_empty (&qh->qtd_list) ? "" : "(has tds)"); | |
916 | break; | |
917 | } | |
918 | ep->hcpriv = NULL; | |
919 | done: | |
920 | spin_unlock_irqrestore (&ehci->lock, flags); | |
921 | return; | |
922 | } | |
923 | ||
7ff71d6a MP |
924 | static int ehci_get_frame (struct usb_hcd *hcd) |
925 | { | |
926 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
083522d7 BH |
927 | return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) % |
928 | ehci->periodic_size; | |
7ff71d6a | 929 | } |
1da177e4 LT |
930 | |
931 | /*-------------------------------------------------------------------------*/ | |
932 | ||
1da177e4 LT |
933 | #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC |
934 | ||
935 | MODULE_DESCRIPTION (DRIVER_INFO); | |
936 | MODULE_AUTHOR (DRIVER_AUTHOR); | |
937 | MODULE_LICENSE ("GPL"); | |
938 | ||
7ff71d6a MP |
939 | #ifdef CONFIG_PCI |
940 | #include "ehci-pci.c" | |
01cced25 | 941 | #define PCI_DRIVER ehci_pci_driver |
7ff71d6a | 942 | #endif |
1da177e4 | 943 | |
ba02978a | 944 | #ifdef CONFIG_USB_EHCI_FSL |
80cb9aee | 945 | #include "ehci-fsl.c" |
01cced25 | 946 | #define PLATFORM_DRIVER ehci_fsl_driver |
80cb9aee RV |
947 | #endif |
948 | ||
dfbaa7d8 | 949 | #ifdef CONFIG_SOC_AU1200 |
76fa9a24 | 950 | #include "ehci-au1xxx.c" |
01cced25 | 951 | #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver |
76fa9a24 JC |
952 | #endif |
953 | ||
ad75a410 GL |
954 | #ifdef CONFIG_PPC_PS3 |
955 | #include "ehci-ps3.c" | |
7a4eb7fd | 956 | #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver |
ad75a410 GL |
957 | #endif |
958 | ||
fc65a15f SR |
959 | #ifdef CONFIG_440EPX |
960 | #include "ehci-ppc-soc.c" | |
961 | #define PLATFORM_DRIVER ehci_ppc_soc_driver | |
962 | #endif | |
963 | ||
ad75a410 GL |
964 | #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ |
965 | !defined(PS3_SYSTEM_BUS_DRIVER) | |
7ff71d6a MP |
966 | #error "missing bus glue for ehci-hcd" |
967 | #endif | |
01cced25 KG |
968 | |
969 | static int __init ehci_hcd_init(void) | |
970 | { | |
971 | int retval = 0; | |
972 | ||
973 | pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n", | |
974 | hcd_name, | |
975 | sizeof(struct ehci_qh), sizeof(struct ehci_qtd), | |
976 | sizeof(struct ehci_itd), sizeof(struct ehci_sitd)); | |
977 | ||
978 | #ifdef PLATFORM_DRIVER | |
979 | retval = platform_driver_register(&PLATFORM_DRIVER); | |
980 | if (retval < 0) | |
981 | return retval; | |
982 | #endif | |
983 | ||
984 | #ifdef PCI_DRIVER | |
985 | retval = pci_register_driver(&PCI_DRIVER); | |
986 | if (retval < 0) { | |
987 | #ifdef PLATFORM_DRIVER | |
988 | platform_driver_unregister(&PLATFORM_DRIVER); | |
989 | #endif | |
ad75a410 GL |
990 | return retval; |
991 | } | |
992 | #endif | |
993 | ||
994 | #ifdef PS3_SYSTEM_BUS_DRIVER | |
7a4eb7fd GL |
995 | retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER); |
996 | if (retval < 0) { | |
ad75a410 | 997 | #ifdef PLATFORM_DRIVER |
7a4eb7fd | 998 | platform_driver_unregister(&PLATFORM_DRIVER); |
ad75a410 GL |
999 | #endif |
1000 | #ifdef PCI_DRIVER | |
7a4eb7fd | 1001 | pci_unregister_driver(&PCI_DRIVER); |
ad75a410 | 1002 | #endif |
7a4eb7fd | 1003 | return retval; |
01cced25 KG |
1004 | } |
1005 | #endif | |
1006 | ||
1007 | return retval; | |
1008 | } | |
1009 | module_init(ehci_hcd_init); | |
1010 | ||
1011 | static void __exit ehci_hcd_cleanup(void) | |
1012 | { | |
1013 | #ifdef PLATFORM_DRIVER | |
1014 | platform_driver_unregister(&PLATFORM_DRIVER); | |
1015 | #endif | |
1016 | #ifdef PCI_DRIVER | |
1017 | pci_unregister_driver(&PCI_DRIVER); | |
1018 | #endif | |
ad75a410 | 1019 | #ifdef PS3_SYSTEM_BUS_DRIVER |
7a4eb7fd | 1020 | ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER); |
ad75a410 | 1021 | #endif |
01cced25 KG |
1022 | } |
1023 | module_exit(ehci_hcd_cleanup); | |
1024 |