[mirror_ubuntu-jammy-kernel.git] / drivers / usb / host / ehci-mv.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
 * Author: Chao Xie <chao.xie@marvell.com>
 *        Neil Zhang <zhangwm@marvell.com>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/usb/otg.h>
#include <linux/usb/of.h>
#include <linux/platform_data/mv_usb.h>
#include <linux/io.h>

#include <linux/usb/hcd.h>

#include "ehci.h"

/* registers */
#define U2x_CAPREGS_OFFSET       0x100

#define CAPLENGTH_MASK         (0xff)

#define hcd_to_ehci_hcd_mv(h) ((struct ehci_hcd_mv *)hcd_to_ehci(h)->priv)

struct ehci_hcd_mv {
	/* Which mode does this ehci running OTG/Host ? */
	int mode;

	void __iomem *base;
	void __iomem *cap_regs;
	void __iomem *op_regs;

	struct usb_phy *otg;
	struct clk *clk;

	struct phy *phy;

	int (*set_vbus)(unsigned int vbus);
};

static void ehci_clock_enable(struct ehci_hcd_mv *ehci_mv)
{
	clk_prepare_enable(ehci_mv->clk);
}

static void ehci_clock_disable(struct ehci_hcd_mv *ehci_mv)
{
	clk_disable_unprepare(ehci_mv->clk);
}

static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv)
{
	ehci_clock_enable(ehci_mv);
	return phy_init(ehci_mv->phy);
}

static void mv_ehci_disable(struct ehci_hcd_mv *ehci_mv)
{
	phy_exit(ehci_mv->phy);
	ehci_clock_disable(ehci_mv);
}

static int mv_ehci_reset(struct usb_hcd *hcd)
{
	struct device *dev = hcd->self.controller;
	struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	u32 status;
	int retval;

	if (ehci_mv == NULL) {
		dev_err(dev, "Can not find private ehci data\n");
		return -ENODEV;
	}

	hcd->has_tt = 1;

	retval = ehci_setup(hcd);
	if (retval)
		dev_err(dev, "ehci_setup failed %d\n", retval);

	if (of_usb_get_phy_mode(dev->of_node) == USBPHY_INTERFACE_MODE_HSIC) {
		status = ehci_readl(ehci, &ehci->regs->port_status[0]);
		status |= PORT_TEST_FORCE;
		ehci_writel(ehci, status, &ehci->regs->port_status[0]);
		status &= ~PORT_TEST_FORCE;
		ehci_writel(ehci, status, &ehci->regs->port_status[0]);
	}

	return retval;
}

static struct hc_driver __read_mostly ehci_platform_hc_driver;

static const struct ehci_driver_overrides platform_overrides __initconst = {
	.reset =		mv_ehci_reset,
	.extra_priv_size =	sizeof(struct ehci_hcd_mv),
};

static int mv_ehci_probe(struct platform_device *pdev)
{
	struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
	struct usb_hcd *hcd;
	struct ehci_hcd *ehci;
	struct ehci_hcd_mv *ehci_mv;
	struct resource *r;
	int retval;
	u32 offset;
	u32 status;

	if (usb_disabled())
		return -ENODEV;

	hcd = usb_create_hcd(&ehci_platform_hc_driver, &pdev->dev, dev_name(&pdev->dev));
	if (!hcd)
		return -ENOMEM;

	platform_set_drvdata(pdev, hcd);
	ehci_mv = hcd_to_ehci_hcd_mv(hcd);

	ehci_mv->mode = MV_USB_MODE_HOST;
	if (pdata) {
		ehci_mv->mode = pdata->mode;
		ehci_mv->set_vbus = pdata->set_vbus;
	}

	ehci_mv->phy = devm_phy_optional_get(&pdev->dev, "usb");
	if (IS_ERR(ehci_mv->phy)) {
		retval = PTR_ERR(ehci_mv->phy);
		if (retval != -EPROBE_DEFER)
			dev_err(&pdev->dev, "Failed to get phy.\n");
		goto err_put_hcd;
	}

	ehci_mv->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(ehci_mv->clk)) {
		dev_err(&pdev->dev, "error getting clock\n");
		retval = PTR_ERR(ehci_mv->clk);
		goto err_put_hcd;
	}

	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	ehci_mv->base = devm_ioremap_resource(&pdev->dev, r);
	if (IS_ERR(ehci_mv->base)) {
		retval = PTR_ERR(ehci_mv->base);
		goto err_put_hcd;
	}

	retval = mv_ehci_enable(ehci_mv);
	if (retval) {
		dev_err(&pdev->dev, "init phy error %d\n", retval);
		goto err_put_hcd;
	}

	ehci_mv->cap_regs =
		(void __iomem *) ((unsigned long) ehci_mv->base + U2x_CAPREGS_OFFSET);
	offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
	ehci_mv->op_regs =
		(void __iomem *) ((unsigned long) ehci_mv->cap_regs + offset);

	hcd->rsrc_start = r->start;
	hcd->rsrc_len = resource_size(r);
	hcd->regs = ehci_mv->op_regs;

	retval = platform_get_irq(pdev, 0);
	if (retval < 0)
		goto err_disable_clk;
	hcd->irq = retval;

	ehci = hcd_to_ehci(hcd);
	ehci->caps = (struct ehci_caps __iomem *) ehci_mv->cap_regs;

	if (ehci_mv->mode == MV_USB_MODE_OTG) {
		ehci_mv->otg = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
		if (IS_ERR(ehci_mv->otg)) {
			retval = PTR_ERR(ehci_mv->otg);

			if (retval == -ENXIO)
				dev_info(&pdev->dev, "MV_USB_MODE_OTG "
						"must have CONFIG_USB_PHY enabled\n");
			else
				dev_err(&pdev->dev,
						"unable to find transceiver\n");
			goto err_disable_clk;
		}

		retval = otg_set_host(ehci_mv->otg->otg, &hcd->self);
		if (retval < 0) {
			dev_err(&pdev->dev,
				"unable to register with transceiver\n");
			retval = -ENODEV;
			goto err_disable_clk;
		}
		/* otg will enable clock before use as host */
		mv_ehci_disable(ehci_mv);
	} else {
		if (ehci_mv->set_vbus)
			ehci_mv->set_vbus(1);

		retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
		if (retval) {
			dev_err(&pdev->dev,
				"failed to add hcd with err %d\n", retval);
			goto err_set_vbus;
		}
		device_wakeup_enable(hcd->self.controller);
	}

	if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_HSIC) {
		status = ehci_readl(ehci, &ehci->regs->port_status[0]);
		/* These "reserved" bits actually enable HSIC mode. */
		status |= BIT(25);
		status &= ~GENMASK(31, 30);
		ehci_writel(ehci, status, &ehci->regs->port_status[0]);
	}

	dev_info(&pdev->dev,
		 "successful find EHCI device with regs 0x%p irq %d"
		 " working in %s mode\n", hcd->regs, hcd->irq,
		 ehci_mv->mode == MV_USB_MODE_OTG ? "OTG" : "Host");

	return 0;

err_set_vbus:
	if (ehci_mv->set_vbus)
		ehci_mv->set_vbus(0);
err_disable_clk:
	mv_ehci_disable(ehci_mv);
err_put_hcd:
	usb_put_hcd(hcd);

	return retval;
}

static int mv_ehci_remove(struct platform_device *pdev)
{
	struct usb_hcd *hcd = platform_get_drvdata(pdev);
	struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);

	if (hcd->rh_registered)
		usb_remove_hcd(hcd);

	if (!IS_ERR_OR_NULL(ehci_mv->otg))
		otg_set_host(ehci_mv->otg->otg, NULL);

	if (ehci_mv->mode == MV_USB_MODE_HOST) {
		if (ehci_mv->set_vbus)
			ehci_mv->set_vbus(0);

		mv_ehci_disable(ehci_mv);
	}

	usb_put_hcd(hcd);

	return 0;
}

MODULE_ALIAS("mv-ehci");

static const struct platform_device_id ehci_id_table[] = {
	{"pxa-u2oehci", 0},
	{"pxa-sph", 0},
	{},
};

static void mv_ehci_shutdown(struct platform_device *pdev)
{
	struct usb_hcd *hcd = platform_get_drvdata(pdev);

	if (!hcd->rh_registered)
		return;

	if (hcd->driver->shutdown)
		hcd->driver->shutdown(hcd);
}

static const struct of_device_id ehci_mv_dt_ids[] = {
	{ .compatible = "marvell,pxau2o-ehci", },
	{},
};

static struct platform_driver ehci_mv_driver = {
	.probe = mv_ehci_probe,
	.remove = mv_ehci_remove,
	.shutdown = mv_ehci_shutdown,
	.driver = {
		.name = "mv-ehci",
		.bus = &platform_bus_type,
		.of_match_table = ehci_mv_dt_ids,
	},
	.id_table = ehci_id_table,
};

static int __init ehci_platform_init(void)
{
	if (usb_disabled())
		return -ENODEV;

	ehci_init_driver(&ehci_platform_hc_driver, &platform_overrides);
	return platform_driver_register(&ehci_mv_driver);
}
module_init(ehci_platform_init);

static void __exit ehci_platform_cleanup(void)
{
	platform_driver_unregister(&ehci_mv_driver);
}
module_exit(ehci_platform_cleanup);

MODULE_DESCRIPTION("Marvell EHCI driver");
MODULE_AUTHOR("Chao Xie <chao.xie@marvell.com>");
MODULE_AUTHOR("Neil Zhang <zhangwm@marvell.com>");
MODULE_ALIAS("mv-ehci");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(of, ehci_mv_dt_ids);
Commit	Line	Data
5fd54ace	1	// SPDX-License-Identifier: GPL-2.0+
3a082ec9 NZ	2	/*
	3	* Copyright (C) 2011 Marvell International Ltd. All rights reserved.
	4	* Author: Chao Xie <chao.xie@marvell.com>
	5	* Neil Zhang <zhangwm@marvell.com>
3a082ec9 NZ	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/module.h>
	10	#include <linux/platform_device.h>
	11	#include <linux/clk.h>
ded017ee	12	#include <linux/err.h>
3a082ec9	13	#include <linux/usb/otg.h>
7b104f89	14	#include <linux/usb/of.h>
3a082ec9	15	#include <linux/platform_data/mv_usb.h>
0440fa3d LR	16	#include <linux/io.h>
	17
	18	#include <linux/usb/hcd.h>
	19
	20	#include "ehci.h"
3a082ec9	21
a740f20d LR	22	/* registers */
	23	#define U2x_CAPREGS_OFFSET 0x100
	24
3a082ec9 NZ	25	#define CAPLENGTH_MASK (0xff)
3a082ec9 NZ	26
0440fa3d	27	#define hcd_to_ehci_hcd_mv(h) ((struct ehci_hcd_mv *)hcd_to_ehci(h)->priv)
3a082ec9	28
0440fa3d	29	struct ehci_hcd_mv {
3a082ec9 NZ	30	/* Which mode does this ehci running OTG/Host ? */
	31	int mode;
	32
a740f20d	33	void __iomem *base;
3a082ec9 NZ	34	void __iomem *cap_regs;
	35	void __iomem *op_regs;
	36
86753811	37	struct usb_phy *otg;
813e18b1	38	struct clk *clk;
3a082ec9	39
a740f20d	40	struct phy *phy;
3a082ec9	41
813e18b1	42	int (*set_vbus)(unsigned int vbus);
3a082ec9 NZ	43	};
	44
	45	static void ehci_clock_enable(struct ehci_hcd_mv *ehci_mv)
	46	{
b7e159c2	47	clk_prepare_enable(ehci_mv->clk);
3a082ec9 NZ	48	}
	49
	50	static void ehci_clock_disable(struct ehci_hcd_mv *ehci_mv)
	51	{
b7e159c2	52	clk_disable_unprepare(ehci_mv->clk);
3a082ec9 NZ	53	}
	54
	55	static int mv_ehci_enable(struct ehci_hcd_mv *ehci_mv)
	56	{
3a082ec9	57	ehci_clock_enable(ehci_mv);
a740f20d	58	return phy_init(ehci_mv->phy);
3a082ec9 NZ	59	}
	60
	61	static void mv_ehci_disable(struct ehci_hcd_mv *ehci_mv)
	62	{
a740f20d	63	phy_exit(ehci_mv->phy);
3a082ec9 NZ	64	ehci_clock_disable(ehci_mv);
	65	}
	66
	67	static int mv_ehci_reset(struct usb_hcd *hcd)
	68	{
3a082ec9	69	struct device *dev = hcd->self.controller;
0440fa3d	70	struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
7b104f89 LR	71	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
7b104f89 LR	72	u32 status;
3a082ec9 NZ	73	int retval;
	74
	75	if (ehci_mv == NULL) {
	76	dev_err(dev, "Can not find private ehci data\n");
	77	return -ENODEV;
	78	}
	79
3a082ec9	80	hcd->has_tt = 1;
3a082ec9	81
1a49e2ac AS	82	retval = ehci_setup(hcd);
	83	if (retval)
	84	dev_err(dev, "ehci_setup failed %d\n", retval);
3a082ec9	85
7b104f89 LR	86	if (of_usb_get_phy_mode(dev->of_node) == USBPHY_INTERFACE_MODE_HSIC) {
	87	status = ehci_readl(ehci, &ehci->regs->port_status[0]);
	88	status \|= PORT_TEST_FORCE;
	89	ehci_writel(ehci, status, &ehci->regs->port_status[0]);
	90	status &= ~PORT_TEST_FORCE;
	91	ehci_writel(ehci, status, &ehci->regs->port_status[0]);
	92	}
	93
1a49e2ac	94	return retval;
3a082ec9 NZ	95	}
3a082ec9 NZ	96
0440fa3d LR	97	static struct hc_driver __read_mostly ehci_platform_hc_driver;
	98
	99	static const struct ehci_driver_overrides platform_overrides __initconst = {
	100	.reset = mv_ehci_reset,
	101	.extra_priv_size = sizeof(struct ehci_hcd_mv),
3a082ec9 NZ	102	};
	103
	104	static int mv_ehci_probe(struct platform_device *pdev)
	105	{
d4f09e28	106	struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
3a082ec9 NZ	107	struct usb_hcd *hcd;
	108	struct ehci_hcd *ehci;
	109	struct ehci_hcd_mv *ehci_mv;
	110	struct resource *r;
09806eba	111	int retval;
3a082ec9	112	u32 offset;
6351f170	113	u32 status;
3a082ec9	114
3a082ec9 NZ	115	if (usb_disabled())
	116	return -ENODEV;
	117
aed67922	118	hcd = usb_create_hcd(&ehci_platform_hc_driver, &pdev->dev, dev_name(&pdev->dev));
3a082ec9 NZ	119	if (!hcd)
	120	return -ENOMEM;
	121
0440fa3d LR	122	platform_set_drvdata(pdev, hcd);
0440fa3d LR	123	ehci_mv = hcd_to_ehci_hcd_mv(hcd);
813e18b1 LR	124
	125	ehci_mv->mode = MV_USB_MODE_HOST;
	126	if (pdata) {
	127	ehci_mv->mode = pdata->mode;
	128	ehci_mv->set_vbus = pdata->set_vbus;
	129	}
3a082ec9	130
cf94ca49	131	ehci_mv->phy = devm_phy_optional_get(&pdev->dev, "usb");
a740f20d LR	132	if (IS_ERR(ehci_mv->phy)) {
	133	retval = PTR_ERR(ehci_mv->phy);
	134	if (retval != -EPROBE_DEFER)
	135	dev_err(&pdev->dev, "Failed to get phy.\n");
	136	goto err_put_hcd;
	137	}
	138
b7e159c2 CX	139	ehci_mv->clk = devm_clk_get(&pdev->dev, NULL);
	140	if (IS_ERR(ehci_mv->clk)) {
	141	dev_err(&pdev->dev, "error getting clock\n");
	142	retval = PTR_ERR(ehci_mv->clk);
970691eb	143	goto err_put_hcd;
3a082ec9 NZ	144	}
3a082ec9 NZ	145
a740f20d LR	146	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	147	ehci_mv->base = devm_ioremap_resource(&pdev->dev, r);
	148	if (IS_ERR(ehci_mv->base)) {
	149	retval = PTR_ERR(ehci_mv->base);
970691eb	150	goto err_put_hcd;
3a082ec9 NZ	151	}
	152
	153	retval = mv_ehci_enable(ehci_mv);
	154	if (retval) {
	155	dev_err(&pdev->dev, "init phy error %d\n", retval);
970691eb	156	goto err_put_hcd;
3a082ec9 NZ	157	}
3a082ec9 NZ	158
a740f20d LR	159	ehci_mv->cap_regs =
a740f20d LR	160	(void __iomem *) ((unsigned long) ehci_mv->base + U2x_CAPREGS_OFFSET);
3a082ec9 NZ	161	offset = readl(ehci_mv->cap_regs) & CAPLENGTH_MASK;
	162	ehci_mv->op_regs =
	163	(void __iomem *) ((unsigned long) ehci_mv->cap_regs + offset);
	164
	165	hcd->rsrc_start = r->start;
07cd29d7	166	hcd->rsrc_len = resource_size(r);
3a082ec9 NZ	167	hcd->regs = ehci_mv->op_regs;
3a082ec9 NZ	168
a7f40c23 CIK	169	retval = platform_get_irq(pdev, 0);
a7f40c23 CIK	170	if (retval < 0)
3a082ec9	171	goto err_disable_clk;
a7f40c23	172	hcd->irq = retval;
3a082ec9 NZ	173
3a082ec9 NZ	174	ehci = hcd_to_ehci(hcd);
60826786	175	ehci->caps = (struct ehci_caps __iomem *) ehci_mv->cap_regs;
3a082ec9	176
3a082ec9	177	if (ehci_mv->mode == MV_USB_MODE_OTG) {
35b55563	178	ehci_mv->otg = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
6f3ed4ec FB	179	if (IS_ERR(ehci_mv->otg)) {
	180	retval = PTR_ERR(ehci_mv->otg);
	181
	182	if (retval == -ENXIO)
	183	dev_info(&pdev->dev, "MV_USB_MODE_OTG "
	184	"must have CONFIG_USB_PHY enabled\n");
	185	else
	186	dev_err(&pdev->dev,
	187	"unable to find transceiver\n");
3a082ec9 NZ	188	goto err_disable_clk;
	189	}
	190
6e13c650	191	retval = otg_set_host(ehci_mv->otg->otg, &hcd->self);
3a082ec9 NZ	192	if (retval < 0) {
	193	dev_err(&pdev->dev,
	194	"unable to register with transceiver\n");
	195	retval = -ENODEV;
35b55563	196	goto err_disable_clk;
3a082ec9 NZ	197	}
	198	/* otg will enable clock before use as host */
	199	mv_ehci_disable(ehci_mv);
3a082ec9	200	} else {
813e18b1 LR	201	if (ehci_mv->set_vbus)
813e18b1 LR	202	ehci_mv->set_vbus(1);
3a082ec9 NZ	203
	204	retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
	205	if (retval) {
	206	dev_err(&pdev->dev,
	207	"failed to add hcd with err %d\n", retval);
	208	goto err_set_vbus;
	209	}
3c9740a1	210	device_wakeup_enable(hcd->self.controller);
3a082ec9 NZ	211	}
3a082ec9 NZ	212
6351f170 LR	213	if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_HSIC) {
	214	status = ehci_readl(ehci, &ehci->regs->port_status[0]);
	215	/* These "reserved" bits actually enable HSIC mode. */
	216	status \|= BIT(25);
	217	status &= ~GENMASK(31, 30);
	218	ehci_writel(ehci, status, &ehci->regs->port_status[0]);
	219	}
	220
3a082ec9 NZ	221	dev_info(&pdev->dev,
	222	"successful find EHCI device with regs 0x%p irq %d"
	223	" working in %s mode\n", hcd->regs, hcd->irq,
	224	ehci_mv->mode == MV_USB_MODE_OTG ? "OTG" : "Host");
	225
	226	return 0;
	227
	228	err_set_vbus:
813e18b1 LR	229	if (ehci_mv->set_vbus)
813e18b1 LR	230	ehci_mv->set_vbus(0);
3a082ec9 NZ	231	err_disable_clk:
3a082ec9 NZ	232	mv_ehci_disable(ehci_mv);
3a082ec9 NZ	233	err_put_hcd:
	234	usb_put_hcd(hcd);
	235
	236	return retval;
	237	}
	238
	239	static int mv_ehci_remove(struct platform_device *pdev)
	240	{
0440fa3d LR	241	struct usb_hcd *hcd = platform_get_drvdata(pdev);
0440fa3d LR	242	struct ehci_hcd_mv *ehci_mv = hcd_to_ehci_hcd_mv(hcd);
3a082ec9 NZ	243
	244	if (hcd->rh_registered)
	245	usb_remove_hcd(hcd);
	246
35b55563	247	if (!IS_ERR_OR_NULL(ehci_mv->otg))
6e13c650	248	otg_set_host(ehci_mv->otg->otg, NULL);
3a082ec9 NZ	249
3a082ec9 NZ	250	if (ehci_mv->mode == MV_USB_MODE_HOST) {
813e18b1 LR	251	if (ehci_mv->set_vbus)
813e18b1 LR	252	ehci_mv->set_vbus(0);
3a082ec9 NZ	253
	254	mv_ehci_disable(ehci_mv);
	255	}
	256
3a082ec9 NZ	257	usb_put_hcd(hcd);
	258
	259	return 0;
	260	}
	261
	262	MODULE_ALIAS("mv-ehci");
	263
	264	static const struct platform_device_id ehci_id_table[] = {
92f98352 LR	265	{"pxa-u2oehci", 0},
92f98352 LR	266	{"pxa-sph", 0},
3a082ec9 NZ	267	{},
	268	};
	269
	270	static void mv_ehci_shutdown(struct platform_device *pdev)
	271	{
0440fa3d	272	struct usb_hcd *hcd = platform_get_drvdata(pdev);
3a082ec9 NZ	273
	274	if (!hcd->rh_registered)
	275	return;
	276
	277	if (hcd->driver->shutdown)
	278	hcd->driver->shutdown(hcd);
	279	}
	280
813e18b1 LR	281	static const struct of_device_id ehci_mv_dt_ids[] = {
	282	{ .compatible = "marvell,pxau2o-ehci", },
	283	{},
	284	};
	285
3a082ec9 NZ	286	static struct platform_driver ehci_mv_driver = {
	287	.probe = mv_ehci_probe,
	288	.remove = mv_ehci_remove,
	289	.shutdown = mv_ehci_shutdown,
	290	.driver = {
813e18b1 LR	291	.name = "mv-ehci",
	292	.bus = &platform_bus_type,
	293	.of_match_table = ehci_mv_dt_ids,
	294	},
3a082ec9 NZ	295	.id_table = ehci_id_table,
3a082ec9 NZ	296	};
0440fa3d LR	297
	298	static int __init ehci_platform_init(void)
	299	{
	300	if (usb_disabled())
	301	return -ENODEV;
	302
	303	ehci_init_driver(&ehci_platform_hc_driver, &platform_overrides);
	304	return platform_driver_register(&ehci_mv_driver);
	305	}
	306	module_init(ehci_platform_init);
	307
	308	static void __exit ehci_platform_cleanup(void)
	309	{
	310	platform_driver_unregister(&ehci_mv_driver);
	311	}
	312	module_exit(ehci_platform_cleanup);
	313
	314	MODULE_DESCRIPTION("Marvell EHCI driver");
	315	MODULE_AUTHOR("Chao Xie <chao.xie@marvell.com>");
	316	MODULE_AUTHOR("Neil Zhang <zhangwm@marvell.com>");
	317	MODULE_ALIAS("mv-ehci");
	318	MODULE_LICENSE("GPL");
70d0ba4c	319	MODULE_DEVICE_TABLE(of, ehci_mv_dt_ids);