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USB: EHCI: add pointer to end of async-unlink list
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1da177e4 1/*
d49d4317 2 * Copyright (C) 2001-2004 by David Brownell
53bd6a60 3 *
1da177e4
LT
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* this file is part of ehci-hcd.c */
20
21/*-------------------------------------------------------------------------*/
22
23/*
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
25 *
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
30 *
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
53bd6a60 34 *
1da177e4
LT
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
39 */
40
41/*-------------------------------------------------------------------------*/
42
43/* fill a qtd, returning how much of the buffer we were able to queue up */
44
45static int
6dbd682b
SR
46qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
1da177e4
LT
48{
49 int i, count;
50 u64 addr = buf;
51
52 /* one buffer entry per 4K ... first might be short or unaligned */
6dbd682b
SR
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
1da177e4
LT
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
61
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
6dbd682b
SR
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
1da177e4
LT
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
73 }
74
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
78 }
6dbd682b 79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
1da177e4
LT
80 qtd->length = count;
81
82 return count;
83}
84
85/*-------------------------------------------------------------------------*/
86
87static inline void
88qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
89{
3807e26d
AD
90 struct ehci_qh_hw *hw = qh->hw;
91
1da177e4
LT
92 /* writes to an active overlay are unsafe */
93 BUG_ON(qh->qh_state != QH_STATE_IDLE);
94
3807e26d
AD
95 hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
96 hw->hw_alt_next = EHCI_LIST_END(ehci);
1da177e4 97
a455212d
AS
98 /* Except for control endpoints, we make hardware maintain data
99 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
100 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
101 * ever clear it.
102 */
4c53de72 103 if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
a455212d
AS
104 unsigned is_out, epnum;
105
e04f5f7e 106 is_out = qh->is_out;
3807e26d 107 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
a455212d 108 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
3807e26d 109 hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
a455212d
AS
110 usb_settoggle (qh->dev, epnum, is_out, 1);
111 }
112 }
113
3807e26d 114 hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
1da177e4
LT
115}
116
117/* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
120 */
121static void
122qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
123{
124 struct ehci_qtd *qtd;
125
126 if (list_empty (&qh->qtd_list))
127 qtd = qh->dummy;
128 else {
129 qtd = list_entry (qh->qtd_list.next,
130 struct ehci_qtd, qtd_list);
131 /* first qtd may already be partially processed */
3807e26d 132 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current)
1da177e4
LT
133 qtd = NULL;
134 }
135
136 if (qtd)
137 qh_update (ehci, qh, qtd);
138}
139
140/*-------------------------------------------------------------------------*/
141
914b7012
AS
142static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
143
144static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
145 struct usb_host_endpoint *ep)
146{
147 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
148 struct ehci_qh *qh = ep->hcpriv;
149 unsigned long flags;
150
151 spin_lock_irqsave(&ehci->lock, flags);
152 qh->clearing_tt = 0;
153 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
e8799906 154 && ehci->rh_state == EHCI_RH_RUNNING)
914b7012
AS
155 qh_link_async(ehci, qh);
156 spin_unlock_irqrestore(&ehci->lock, flags);
157}
158
159static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
160 struct urb *urb, u32 token)
161{
162
163 /* If an async split transaction gets an error or is unlinked,
164 * the TT buffer may be left in an indeterminate state. We
165 * have to clear the TT buffer.
166 *
167 * Note: this routine is never called for Isochronous transfers.
168 */
169 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
170#ifdef DEBUG
171 struct usb_device *tt = urb->dev->tt->hub;
172 dev_dbg(&tt->dev,
173 "clear tt buffer port %d, a%d ep%d t%08x\n",
174 urb->dev->ttport, urb->dev->devnum,
175 usb_pipeendpoint(urb->pipe), token);
176#endif /* DEBUG */
177 if (!ehci_is_TDI(ehci)
178 || urb->dev->tt->hub !=
179 ehci_to_hcd(ehci)->self.root_hub) {
180 if (usb_hub_clear_tt_buffer(urb) == 0)
181 qh->clearing_tt = 1;
182 } else {
183
184 /* REVISIT ARC-derived cores don't clear the root
185 * hub TT buffer in this way...
186 */
187 }
188 }
189}
190
14c04c0f 191static int qtd_copy_status (
1da177e4
LT
192 struct ehci_hcd *ehci,
193 struct urb *urb,
194 size_t length,
195 u32 token
196)
197{
14c04c0f
AS
198 int status = -EINPROGRESS;
199
1da177e4
LT
200 /* count IN/OUT bytes, not SETUP (even short packets) */
201 if (likely (QTD_PID (token) != 2))
202 urb->actual_length += length - QTD_LENGTH (token);
203
204 /* don't modify error codes */
eb231054 205 if (unlikely(urb->unlinked))
14c04c0f 206 return status;
1da177e4
LT
207
208 /* force cleanup after short read; not always an error */
209 if (unlikely (IS_SHORT_READ (token)))
14c04c0f 210 status = -EREMOTEIO;
1da177e4
LT
211
212 /* serious "can't proceed" faults reported by the hardware */
213 if (token & QTD_STS_HALT) {
214 if (token & QTD_STS_BABBLE) {
215 /* FIXME "must" disable babbling device's port too */
14c04c0f 216 status = -EOVERFLOW;
ba516de3
AS
217 /* CERR nonzero + halt --> stall */
218 } else if (QTD_CERR(token)) {
219 status = -EPIPE;
220
221 /* In theory, more than one of the following bits can be set
222 * since they are sticky and the transaction is retried.
223 * Which to test first is rather arbitrary.
224 */
1da177e4
LT
225 } else if (token & QTD_STS_MMF) {
226 /* fs/ls interrupt xfer missed the complete-split */
14c04c0f 227 status = -EPROTO;
1da177e4 228 } else if (token & QTD_STS_DBE) {
14c04c0f 229 status = (QTD_PID (token) == 1) /* IN ? */
1da177e4
LT
230 ? -ENOSR /* hc couldn't read data */
231 : -ECOMM; /* hc couldn't write data */
232 } else if (token & QTD_STS_XACT) {
ba516de3
AS
233 /* timeout, bad CRC, wrong PID, etc */
234 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
235 urb->dev->devpath,
236 usb_pipeendpoint(urb->pipe),
237 usb_pipein(urb->pipe) ? "in" : "out");
14c04c0f 238 status = -EPROTO;
ba516de3
AS
239 } else { /* unknown */
240 status = -EPROTO;
241 }
1da177e4
LT
242
243 ehci_vdbg (ehci,
244 "dev%d ep%d%s qtd token %08x --> status %d\n",
245 usb_pipedevice (urb->pipe),
246 usb_pipeendpoint (urb->pipe),
247 usb_pipein (urb->pipe) ? "in" : "out",
14c04c0f 248 token, status);
1da177e4 249 }
14c04c0f
AS
250
251 return status;
1da177e4
LT
252}
253
254static void
14c04c0f 255ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
1da177e4
LT
256__releases(ehci->lock)
257__acquires(ehci->lock)
258{
259 if (likely (urb->hcpriv != NULL)) {
260 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
261
262 /* S-mask in a QH means it's an interrupt urb */
3807e26d 263 if ((qh->hw->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
1da177e4
LT
264
265 /* ... update hc-wide periodic stats (for usbfs) */
266 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
267 }
1da177e4
LT
268 }
269
eb231054
AS
270 if (unlikely(urb->unlinked)) {
271 COUNT(ehci->stats.unlink);
272 } else {
4f667627
DB
273 /* report non-error and short read status as zero */
274 if (status == -EINPROGRESS || status == -EREMOTEIO)
14c04c0f 275 status = 0;
eb231054 276 COUNT(ehci->stats.complete);
1da177e4 277 }
1da177e4
LT
278
279#ifdef EHCI_URB_TRACE
280 ehci_dbg (ehci,
281 "%s %s urb %p ep%d%s status %d len %d/%d\n",
441b62c1 282 __func__, urb->dev->devpath, urb,
1da177e4
LT
283 usb_pipeendpoint (urb->pipe),
284 usb_pipein (urb->pipe) ? "in" : "out",
14c04c0f 285 status,
1da177e4
LT
286 urb->actual_length, urb->transfer_buffer_length);
287#endif
288
289 /* complete() can reenter this HCD */
e9df41c5 290 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1da177e4 291 spin_unlock (&ehci->lock);
4a00027d 292 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
1da177e4
LT
293 spin_lock (&ehci->lock);
294}
295
296static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
297static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
298
1da177e4
LT
299static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
300
301/*
302 * Process and free completed qtds for a qh, returning URBs to drivers.
303 * Chases up to qh->hw_current. Returns number of completions called,
304 * indicating how much "real" work we did.
305 */
1da177e4 306static unsigned
7d12e780 307qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
1da177e4 308{
3a44494e 309 struct ehci_qtd *last, *end = qh->dummy;
1da177e4 310 struct list_head *entry, *tmp;
3a44494e 311 int last_status;
1da177e4
LT
312 int stopped;
313 unsigned count = 0;
1da177e4 314 u8 state;
3807e26d 315 struct ehci_qh_hw *hw = qh->hw;
1da177e4
LT
316
317 if (unlikely (list_empty (&qh->qtd_list)))
318 return count;
319
320 /* completions (or tasks on other cpus) must never clobber HALT
321 * till we've gone through and cleaned everything up, even when
322 * they add urbs to this qh's queue or mark them for unlinking.
323 *
324 * NOTE: unlinking expects to be done in queue order.
3a44494e
AS
325 *
326 * It's a bug for qh->qh_state to be anything other than
327 * QH_STATE_IDLE, unless our caller is scan_async() or
328 * scan_periodic().
1da177e4
LT
329 */
330 state = qh->qh_state;
331 qh->qh_state = QH_STATE_COMPLETING;
332 stopped = (state == QH_STATE_IDLE);
333
3a44494e
AS
334 rescan:
335 last = NULL;
336 last_status = -EINPROGRESS;
337 qh->needs_rescan = 0;
338
1da177e4
LT
339 /* remove de-activated QTDs from front of queue.
340 * after faults (including short reads), cleanup this urb
341 * then let the queue advance.
342 * if queue is stopped, handles unlinks.
343 */
344 list_for_each_safe (entry, tmp, &qh->qtd_list) {
345 struct ehci_qtd *qtd;
346 struct urb *urb;
347 u32 token = 0;
348
349 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
350 urb = qtd->urb;
351
352 /* clean up any state from previous QTD ...*/
353 if (last) {
354 if (likely (last->urb != urb)) {
14c04c0f 355 ehci_urb_done(ehci, last->urb, last_status);
1da177e4 356 count++;
b5f7a0ec 357 last_status = -EINPROGRESS;
1da177e4
LT
358 }
359 ehci_qtd_free (ehci, last);
360 last = NULL;
361 }
362
363 /* ignore urbs submitted during completions we reported */
364 if (qtd == end)
365 break;
366
367 /* hardware copies qtd out of qh overlay */
368 rmb ();
6dbd682b 369 token = hc32_to_cpu(ehci, qtd->hw_token);
1da177e4
LT
370
371 /* always clean up qtds the hc de-activated */
a2c2706e 372 retry_xacterr:
1da177e4
LT
373 if ((token & QTD_STS_ACTIVE) == 0) {
374
332960bd
VP
375 /* Report Data Buffer Error: non-fatal but useful */
376 if (token & QTD_STS_DBE)
377 ehci_dbg(ehci,
378 "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
379 urb,
380 usb_endpoint_num(&urb->ep->desc),
381 usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
382 urb->transfer_buffer_length,
383 qtd,
384 qh);
385
a082b5c7
DB
386 /* on STALL, error, and short reads this urb must
387 * complete and all its qtds must be recycled.
388 */
1da177e4 389 if ((token & QTD_STS_HALT) != 0) {
a2c2706e
AS
390
391 /* retry transaction errors until we
392 * reach the software xacterr limit
393 */
394 if ((token & QTD_STS_XACT) &&
395 QTD_CERR(token) == 0 &&
ef4638f9 396 ++qh->xacterrs < QH_XACTERR_MAX &&
a2c2706e
AS
397 !urb->unlinked) {
398 ehci_dbg(ehci,
d0626808 399 "detected XactErr len %zu/%zu retry %d\n",
ef4638f9 400 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
a2c2706e
AS
401
402 /* reset the token in the qtd and the
403 * qh overlay (which still contains
404 * the qtd) so that we pick up from
405 * where we left off
406 */
407 token &= ~QTD_STS_HALT;
408 token |= QTD_STS_ACTIVE |
409 (EHCI_TUNE_CERR << 10);
410 qtd->hw_token = cpu_to_hc32(ehci,
411 token);
412 wmb();
3807e26d
AD
413 hw->hw_token = cpu_to_hc32(ehci,
414 token);
a2c2706e
AS
415 goto retry_xacterr;
416 }
1da177e4
LT
417 stopped = 1;
418
419 /* magic dummy for some short reads; qh won't advance.
420 * that silicon quirk can kick in with this dummy too.
a082b5c7
DB
421 *
422 * other short reads won't stop the queue, including
423 * control transfers (status stage handles that) or
424 * most other single-qtd reads ... the queue stops if
425 * URB_SHORT_NOT_OK was set so the driver submitting
426 * the urbs could clean it up.
1da177e4
LT
427 */
428 } else if (IS_SHORT_READ (token)
6dbd682b
SR
429 && !(qtd->hw_alt_next
430 & EHCI_LIST_END(ehci))) {
1da177e4 431 stopped = 1;
1da177e4
LT
432 }
433
434 /* stop scanning when we reach qtds the hc is using */
435 } else if (likely (!stopped
e8799906 436 && ehci->rh_state == EHCI_RH_RUNNING)) {
1da177e4
LT
437 break;
438
a082b5c7 439 /* scan the whole queue for unlinks whenever it stops */
1da177e4
LT
440 } else {
441 stopped = 1;
442
a082b5c7 443 /* cancel everything if we halt, suspend, etc */
e8799906 444 if (ehci->rh_state != EHCI_RH_RUNNING)
14c04c0f 445 last_status = -ESHUTDOWN;
1da177e4 446
a082b5c7
DB
447 /* this qtd is active; skip it unless a previous qtd
448 * for its urb faulted, or its urb was canceled.
1da177e4 449 */
a082b5c7 450 else if (last_status == -EINPROGRESS && !urb->unlinked)
1da177e4 451 continue;
53bd6a60 452
a082b5c7 453 /* qh unlinked; token in overlay may be most current */
1da177e4 454 if (state == QH_STATE_IDLE
6dbd682b 455 && cpu_to_hc32(ehci, qtd->qtd_dma)
3807e26d
AD
456 == hw->hw_current) {
457 token = hc32_to_cpu(ehci, hw->hw_token);
1da177e4 458
914b7012
AS
459 /* An unlink may leave an incomplete
460 * async transaction in the TT buffer.
461 * We have to clear it.
462 */
463 ehci_clear_tt_buffer(ehci, qh, urb, token);
464 }
1da177e4 465 }
53bd6a60 466
4f667627
DB
467 /* unless we already know the urb's status, collect qtd status
468 * and update count of bytes transferred. in common short read
469 * cases with only one data qtd (including control transfers),
470 * queue processing won't halt. but with two or more qtds (for
471 * example, with a 32 KB transfer), when the first qtd gets a
472 * short read the second must be removed by hand.
473 */
474 if (last_status == -EINPROGRESS) {
475 last_status = qtd_copy_status(ehci, urb,
476 qtd->length, token);
477 if (last_status == -EREMOTEIO
478 && (qtd->hw_alt_next
479 & EHCI_LIST_END(ehci)))
480 last_status = -EINPROGRESS;
914b7012
AS
481
482 /* As part of low/full-speed endpoint-halt processing
483 * we must clear the TT buffer (11.17.5).
484 */
485 if (unlikely(last_status != -EINPROGRESS &&
c2f6595f
AS
486 last_status != -EREMOTEIO)) {
487 /* The TT's in some hubs malfunction when they
488 * receive this request following a STALL (they
489 * stop sending isochronous packets). Since a
490 * STALL can't leave the TT buffer in a busy
491 * state (if you believe Figures 11-48 - 11-51
492 * in the USB 2.0 spec), we won't clear the TT
493 * buffer in this case. Strictly speaking this
494 * is a violation of the spec.
495 */
496 if (last_status != -EPIPE)
497 ehci_clear_tt_buffer(ehci, qh, urb,
498 token);
499 }
b0d9efba 500 }
1da177e4 501
a082b5c7
DB
502 /* if we're removing something not at the queue head,
503 * patch the hardware queue pointer.
504 */
1da177e4
LT
505 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
506 last = list_entry (qtd->qtd_list.prev,
507 struct ehci_qtd, qtd_list);
508 last->hw_next = qtd->hw_next;
509 }
a082b5c7
DB
510
511 /* remove qtd; it's recycled after possible urb completion */
1da177e4
LT
512 list_del (&qtd->qtd_list);
513 last = qtd;
a2c2706e
AS
514
515 /* reinit the xacterr counter for the next qtd */
ef4638f9 516 qh->xacterrs = 0;
1da177e4
LT
517 }
518
519 /* last urb's completion might still need calling */
520 if (likely (last != NULL)) {
14c04c0f 521 ehci_urb_done(ehci, last->urb, last_status);
1da177e4
LT
522 count++;
523 ehci_qtd_free (ehci, last);
524 }
525
3a44494e
AS
526 /* Do we need to rescan for URBs dequeued during a giveback? */
527 if (unlikely(qh->needs_rescan)) {
528 /* If the QH is already unlinked, do the rescan now. */
529 if (state == QH_STATE_IDLE)
530 goto rescan;
531
532 /* Otherwise we have to wait until the QH is fully unlinked.
533 * Our caller will start an unlink if qh->needs_rescan is
534 * set. But if an unlink has already started, nothing needs
535 * to be done.
536 */
537 if (state != QH_STATE_LINKED)
538 qh->needs_rescan = 0;
539 }
540
1da177e4
LT
541 /* restore original state; caller must unlink or relink */
542 qh->qh_state = state;
543
544 /* be sure the hardware's done with the qh before refreshing
545 * it after fault cleanup, or recovering from silicon wrongly
546 * overlaying the dummy qtd (which reduces DMA chatter).
547 */
3807e26d 548 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
1da177e4
LT
549 switch (state) {
550 case QH_STATE_IDLE:
551 qh_refresh(ehci, qh);
552 break;
553 case QH_STATE_LINKED:
a082b5c7
DB
554 /* We won't refresh a QH that's linked (after the HC
555 * stopped the queue). That avoids a race:
556 * - HC reads first part of QH;
557 * - CPU updates that first part and the token;
558 * - HC reads rest of that QH, including token
559 * Result: HC gets an inconsistent image, and then
560 * DMAs to/from the wrong memory (corrupting it).
561 *
562 * That should be rare for interrupt transfers,
1da177e4
LT
563 * except maybe high bandwidth ...
564 */
a448c9d8
AS
565
566 /* Tell the caller to start an unlink */
567 qh->needs_rescan = 1;
1da177e4
LT
568 break;
569 /* otherwise, unlink already started */
570 }
571 }
572
573 return count;
574}
575
576/*-------------------------------------------------------------------------*/
577
578// high bandwidth multiplier, as encoded in highspeed endpoint descriptors
579#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
580// ... and packet size, for any kind of endpoint descriptor
581#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
582
583/*
584 * reverse of qh_urb_transaction: free a list of TDs.
585 * used for cleanup after errors, before HC sees an URB's TDs.
586 */
587static void qtd_list_free (
588 struct ehci_hcd *ehci,
589 struct urb *urb,
590 struct list_head *qtd_list
591) {
592 struct list_head *entry, *temp;
593
594 list_for_each_safe (entry, temp, qtd_list) {
595 struct ehci_qtd *qtd;
596
597 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
598 list_del (&qtd->qtd_list);
599 ehci_qtd_free (ehci, qtd);
600 }
601}
602
603/*
604 * create a list of filled qtds for this URB; won't link into qh.
605 */
606static struct list_head *
607qh_urb_transaction (
608 struct ehci_hcd *ehci,
609 struct urb *urb,
610 struct list_head *head,
55016f10 611 gfp_t flags
1da177e4
LT
612) {
613 struct ehci_qtd *qtd, *qtd_prev;
614 dma_addr_t buf;
40f8db8f 615 int len, this_sg_len, maxpacket;
1da177e4
LT
616 int is_input;
617 u32 token;
40f8db8f
AS
618 int i;
619 struct scatterlist *sg;
1da177e4
LT
620
621 /*
622 * URBs map to sequences of QTDs: one logical transaction
623 */
624 qtd = ehci_qtd_alloc (ehci, flags);
625 if (unlikely (!qtd))
626 return NULL;
627 list_add_tail (&qtd->qtd_list, head);
628 qtd->urb = urb;
629
630 token = QTD_STS_ACTIVE;
631 token |= (EHCI_TUNE_CERR << 10);
632 /* for split transactions, SplitXState initialized to zero */
633
634 len = urb->transfer_buffer_length;
635 is_input = usb_pipein (urb->pipe);
636 if (usb_pipecontrol (urb->pipe)) {
637 /* SETUP pid */
6dbd682b
SR
638 qtd_fill(ehci, qtd, urb->setup_dma,
639 sizeof (struct usb_ctrlrequest),
640 token | (2 /* "setup" */ << 8), 8);
1da177e4
LT
641
642 /* ... and always at least one more pid */
643 token ^= QTD_TOGGLE;
644 qtd_prev = qtd;
645 qtd = ehci_qtd_alloc (ehci, flags);
646 if (unlikely (!qtd))
647 goto cleanup;
648 qtd->urb = urb;
6dbd682b 649 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
1da177e4 650 list_add_tail (&qtd->qtd_list, head);
6912354a
AS
651
652 /* for zero length DATA stages, STATUS is always IN */
653 if (len == 0)
654 token |= (1 /* "in" */ << 8);
53bd6a60 655 }
1da177e4
LT
656
657 /*
658 * data transfer stage: buffer setup
659 */
bc677d5b 660 i = urb->num_mapped_sgs;
40f8db8f 661 if (len > 0 && i > 0) {
910f8d0c 662 sg = urb->sg;
40f8db8f
AS
663 buf = sg_dma_address(sg);
664
665 /* urb->transfer_buffer_length may be smaller than the
666 * size of the scatterlist (or vice versa)
667 */
668 this_sg_len = min_t(int, sg_dma_len(sg), len);
669 } else {
670 sg = NULL;
671 buf = urb->transfer_dma;
672 this_sg_len = len;
673 }
1da177e4 674
6912354a 675 if (is_input)
1da177e4
LT
676 token |= (1 /* "in" */ << 8);
677 /* else it's already initted to "out" pid (0 << 8) */
678
679 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
680
681 /*
682 * buffer gets wrapped in one or more qtds;
683 * last one may be "short" (including zero len)
684 * and may serve as a control status ack
685 */
686 for (;;) {
687 int this_qtd_len;
688
40f8db8f
AS
689 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
690 maxpacket);
691 this_sg_len -= this_qtd_len;
1da177e4
LT
692 len -= this_qtd_len;
693 buf += this_qtd_len;
a082b5c7
DB
694
695 /*
696 * short reads advance to a "magic" dummy instead of the next
697 * qtd ... that forces the queue to stop, for manual cleanup.
698 * (this will usually be overridden later.)
699 */
1da177e4 700 if (is_input)
3807e26d 701 qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
1da177e4
LT
702
703 /* qh makes control packets use qtd toggle; maybe switch it */
704 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
705 token ^= QTD_TOGGLE;
706
40f8db8f
AS
707 if (likely(this_sg_len <= 0)) {
708 if (--i <= 0 || len <= 0)
709 break;
710 sg = sg_next(sg);
711 buf = sg_dma_address(sg);
712 this_sg_len = min_t(int, sg_dma_len(sg), len);
713 }
1da177e4
LT
714
715 qtd_prev = qtd;
716 qtd = ehci_qtd_alloc (ehci, flags);
717 if (unlikely (!qtd))
718 goto cleanup;
719 qtd->urb = urb;
6dbd682b 720 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
1da177e4
LT
721 list_add_tail (&qtd->qtd_list, head);
722 }
723
a082b5c7
DB
724 /*
725 * unless the caller requires manual cleanup after short reads,
726 * have the alt_next mechanism keep the queue running after the
727 * last data qtd (the only one, for control and most other cases).
1da177e4
LT
728 */
729 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
730 || usb_pipecontrol (urb->pipe)))
6dbd682b 731 qtd->hw_alt_next = EHCI_LIST_END(ehci);
1da177e4
LT
732
733 /*
734 * control requests may need a terminating data "status" ack;
9a971dda
ML
735 * other OUT ones may need a terminating short packet
736 * (zero length).
1da177e4 737 */
6912354a 738 if (likely (urb->transfer_buffer_length != 0)) {
1da177e4
LT
739 int one_more = 0;
740
741 if (usb_pipecontrol (urb->pipe)) {
742 one_more = 1;
743 token ^= 0x0100; /* "in" <--> "out" */
744 token |= QTD_TOGGLE; /* force DATA1 */
9a971dda 745 } else if (usb_pipeout(urb->pipe)
1da177e4
LT
746 && (urb->transfer_flags & URB_ZERO_PACKET)
747 && !(urb->transfer_buffer_length % maxpacket)) {
748 one_more = 1;
749 }
750 if (one_more) {
751 qtd_prev = qtd;
752 qtd = ehci_qtd_alloc (ehci, flags);
753 if (unlikely (!qtd))
754 goto cleanup;
755 qtd->urb = urb;
6dbd682b 756 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
1da177e4
LT
757 list_add_tail (&qtd->qtd_list, head);
758
759 /* never any data in such packets */
6dbd682b 760 qtd_fill(ehci, qtd, 0, 0, token, 0);
1da177e4
LT
761 }
762 }
763
764 /* by default, enable interrupt on urb completion */
765 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
6dbd682b 766 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
1da177e4
LT
767 return head;
768
769cleanup:
770 qtd_list_free (ehci, urb, head);
771 return NULL;
772}
773
774/*-------------------------------------------------------------------------*/
775
776// Would be best to create all qh's from config descriptors,
777// when each interface/altsetting is established. Unlink
778// any previous qh and cancel its urbs first; endpoints are
779// implicitly reset then (data toggle too).
780// That'd mean updating how usbcore talks to HCDs. (2.7?)
781
782
783/*
784 * Each QH holds a qtd list; a QH is used for everything except iso.
785 *
786 * For interrupt urbs, the scheduler must set the microframe scheduling
787 * mask(s) each time the QH gets scheduled. For highspeed, that's
788 * just one microframe in the s-mask. For split interrupt transactions
789 * there are additional complications: c-mask, maybe FSTNs.
790 */
791static struct ehci_qh *
792qh_make (
793 struct ehci_hcd *ehci,
794 struct urb *urb,
55016f10 795 gfp_t flags
1da177e4
LT
796) {
797 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
798 u32 info1 = 0, info2 = 0;
799 int is_input, type;
800 int maxp = 0;
340ba5f9 801 struct usb_tt *tt = urb->dev->tt;
3807e26d 802 struct ehci_qh_hw *hw;
1da177e4
LT
803
804 if (!qh)
805 return qh;
806
807 /*
808 * init endpoint/device data for this QH
809 */
810 info1 |= usb_pipeendpoint (urb->pipe) << 8;
811 info1 |= usb_pipedevice (urb->pipe) << 0;
812
813 is_input = usb_pipein (urb->pipe);
814 type = usb_pipetype (urb->pipe);
815 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
816
caa9ef67
DB
817 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
818 * acts like up to 3KB, but is built from smaller packets.
819 */
820 if (max_packet(maxp) > 1024) {
821 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
822 goto done;
823 }
824
1da177e4
LT
825 /* Compute interrupt scheduling parameters just once, and save.
826 * - allowing for high bandwidth, how many nsec/uframe are used?
827 * - split transactions need a second CSPLIT uframe; same question
828 * - splits also need a schedule gap (for full/low speed I/O)
829 * - qh has a polling interval
830 *
831 * For control/bulk requests, the HC or TT handles these.
832 */
833 if (type == PIPE_INTERRUPT) {
340ba5f9
DB
834 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
835 is_input, 0,
836 hb_mult(maxp) * max_packet(maxp)));
1da177e4 837 qh->start = NO_FRAME;
1e12c910 838 qh->stamp = ehci->periodic_stamp;
1da177e4
LT
839
840 if (urb->dev->speed == USB_SPEED_HIGH) {
841 qh->c_usecs = 0;
842 qh->gap_uf = 0;
843
844 qh->period = urb->interval >> 3;
845 if (qh->period == 0 && urb->interval != 1) {
846 /* NOTE interval 2 or 4 uframes could work.
847 * But interval 1 scheduling is simpler, and
848 * includes high bandwidth.
849 */
1b9a38bf
AS
850 urb->interval = 1;
851 } else if (qh->period > ehci->periodic_size) {
852 qh->period = ehci->periodic_size;
853 urb->interval = qh->period << 3;
1da177e4
LT
854 }
855 } else {
d0384200
DB
856 int think_time;
857
1da177e4
LT
858 /* gap is f(FS/LS transfer times) */
859 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
860 is_input, 0, maxp) / (125 * 1000);
861
862 /* FIXME this just approximates SPLIT/CSPLIT times */
863 if (is_input) { // SPLIT, gap, CSPLIT+DATA
864 qh->c_usecs = qh->usecs + HS_USECS (0);
865 qh->usecs = HS_USECS (1);
866 } else { // SPLIT+DATA, gap, CSPLIT
867 qh->usecs += HS_USECS (1);
868 qh->c_usecs = HS_USECS (0);
869 }
870
d0384200
DB
871 think_time = tt ? tt->think_time : 0;
872 qh->tt_usecs = NS_TO_US (think_time +
873 usb_calc_bus_time (urb->dev->speed,
874 is_input, 0, max_packet (maxp)));
1da177e4 875 qh->period = urb->interval;
1b9a38bf
AS
876 if (qh->period > ehci->periodic_size) {
877 qh->period = ehci->periodic_size;
878 urb->interval = qh->period;
879 }
1da177e4
LT
880 }
881 }
882
883 /* support for tt scheduling, and access to toggles */
6a8e87b2 884 qh->dev = urb->dev;
1da177e4
LT
885
886 /* using TT? */
887 switch (urb->dev->speed) {
888 case USB_SPEED_LOW:
4c53de72 889 info1 |= QH_LOW_SPEED;
1da177e4
LT
890 /* FALL THROUGH */
891
892 case USB_SPEED_FULL:
893 /* EPS 0 means "full" */
894 if (type != PIPE_INTERRUPT)
895 info1 |= (EHCI_TUNE_RL_TT << 28);
896 if (type == PIPE_CONTROL) {
4c53de72
AS
897 info1 |= QH_CONTROL_EP; /* for TT */
898 info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
1da177e4
LT
899 }
900 info1 |= maxp << 16;
901
902 info2 |= (EHCI_TUNE_MULT_TT << 30);
8cd42e97
KG
903
904 /* Some Freescale processors have an erratum in which the
905 * port number in the queue head was 0..N-1 instead of 1..N.
906 */
907 if (ehci_has_fsl_portno_bug(ehci))
908 info2 |= (urb->dev->ttport-1) << 23;
909 else
910 info2 |= urb->dev->ttport << 23;
1da177e4
LT
911
912 /* set the address of the TT; for TDI's integrated
913 * root hub tt, leave it zeroed.
914 */
340ba5f9
DB
915 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
916 info2 |= tt->hub->devnum << 16;
1da177e4
LT
917
918 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
919
920 break;
921
922 case USB_SPEED_HIGH: /* no TT involved */
4c53de72 923 info1 |= QH_HIGH_SPEED;
1da177e4
LT
924 if (type == PIPE_CONTROL) {
925 info1 |= (EHCI_TUNE_RL_HS << 28);
926 info1 |= 64 << 16; /* usb2 fixed maxpacket */
4c53de72 927 info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
1da177e4
LT
928 info2 |= (EHCI_TUNE_MULT_HS << 30);
929 } else if (type == PIPE_BULK) {
930 info1 |= (EHCI_TUNE_RL_HS << 28);
caa9ef67
DB
931 /* The USB spec says that high speed bulk endpoints
932 * always use 512 byte maxpacket. But some device
933 * vendors decided to ignore that, and MSFT is happy
934 * to help them do so. So now people expect to use
935 * such nonconformant devices with Linux too; sigh.
936 */
937 info1 |= max_packet(maxp) << 16;
1da177e4
LT
938 info2 |= (EHCI_TUNE_MULT_HS << 30);
939 } else { /* PIPE_INTERRUPT */
940 info1 |= max_packet (maxp) << 16;
941 info2 |= hb_mult (maxp) << 30;
942 }
943 break;
944 default:
82491c2a
GKH
945 ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
946 urb->dev->speed);
1da177e4 947done:
c83e1a9f 948 qh_destroy(ehci, qh);
1da177e4
LT
949 return NULL;
950 }
951
952 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
953
954 /* init as live, toggle clear, advance to dummy */
955 qh->qh_state = QH_STATE_IDLE;
3807e26d
AD
956 hw = qh->hw;
957 hw->hw_info1 = cpu_to_hc32(ehci, info1);
958 hw->hw_info2 = cpu_to_hc32(ehci, info2);
e04f5f7e 959 qh->is_out = !is_input;
a455212d 960 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
1da177e4
LT
961 qh_refresh (ehci, qh);
962 return qh;
963}
964
965/*-------------------------------------------------------------------------*/
966
967/* move qh (and its qtds) onto async queue; maybe enable queue. */
968
969static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
970{
6dbd682b 971 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
1da177e4
LT
972 struct ehci_qh *head;
973
914b7012
AS
974 /* Don't link a QH if there's a Clear-TT-Buffer pending */
975 if (unlikely(qh->clearing_tt))
976 return;
977
3a44494e
AS
978 WARN_ON(qh->qh_state != QH_STATE_IDLE);
979
1da177e4
LT
980 /* (re)start the async schedule? */
981 head = ehci->async;
982 timer_action_done (ehci, TIMER_ASYNC_OFF);
983 if (!head->qh_next.qh) {
3d9545cc 984 if (!(ehci->command & CMD_ASE)) {
1da177e4 985 /* in case a clear of CMD_ASE didn't take yet */
083522d7
BH
986 (void)handshake(ehci, &ehci->regs->status,
987 STS_ASS, 0, 150);
3d9545cc
AS
988 ehci->command |= CMD_ASE;
989 ehci_writel(ehci, ehci->command, &ehci->regs->command);
1da177e4
LT
990 /* posted write need not be known to HC yet ... */
991 }
992 }
993
a455212d 994 /* clear halt and/or toggle; and maybe recover from silicon quirk */
3a44494e 995 qh_refresh(ehci, qh);
1da177e4
LT
996
997 /* splice right after start */
998 qh->qh_next = head->qh_next;
3807e26d 999 qh->hw->hw_next = head->hw->hw_next;
1da177e4
LT
1000 wmb ();
1001
1002 head->qh_next.qh = qh;
3807e26d 1003 head->hw->hw_next = dma;
1da177e4 1004
ef4638f9 1005 qh->xacterrs = 0;
1da177e4
LT
1006 qh->qh_state = QH_STATE_LINKED;
1007 /* qtd completions reported later by interrupt */
1008}
1009
1010/*-------------------------------------------------------------------------*/
1011
1da177e4
LT
1012/*
1013 * For control/bulk/interrupt, return QH with these TDs appended.
1014 * Allocates and initializes the QH if necessary.
1015 * Returns null if it can't allocate a QH it needs to.
1016 * If the QH has TDs (urbs) already, that's great.
1017 */
1018static struct ehci_qh *qh_append_tds (
1019 struct ehci_hcd *ehci,
1020 struct urb *urb,
1021 struct list_head *qtd_list,
1022 int epnum,
1023 void **ptr
1024)
1025{
1026 struct ehci_qh *qh = NULL;
fd05e720 1027 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1da177e4
LT
1028
1029 qh = (struct ehci_qh *) *ptr;
1030 if (unlikely (qh == NULL)) {
1031 /* can't sleep here, we have ehci->lock... */
1032 qh = qh_make (ehci, urb, GFP_ATOMIC);
1033 *ptr = qh;
1034 }
1035 if (likely (qh != NULL)) {
1036 struct ehci_qtd *qtd;
1037
1038 if (unlikely (list_empty (qtd_list)))
1039 qtd = NULL;
1040 else
1041 qtd = list_entry (qtd_list->next, struct ehci_qtd,
1042 qtd_list);
1043
1044 /* control qh may need patching ... */
1045 if (unlikely (epnum == 0)) {
1046
1047 /* usb_reset_device() briefly reverts to address 0 */
1048 if (usb_pipedevice (urb->pipe) == 0)
3807e26d 1049 qh->hw->hw_info1 &= ~qh_addr_mask;
1da177e4
LT
1050 }
1051
1052 /* just one way to queue requests: swap with the dummy qtd.
1053 * only hc or qh_refresh() ever modify the overlay.
1054 */
1055 if (likely (qtd != NULL)) {
1056 struct ehci_qtd *dummy;
1057 dma_addr_t dma;
6dbd682b 1058 __hc32 token;
1da177e4
LT
1059
1060 /* to avoid racing the HC, use the dummy td instead of
1061 * the first td of our list (becomes new dummy). both
1062 * tds stay deactivated until we're done, when the
1063 * HC is allowed to fetch the old dummy (4.10.2).
1064 */
1065 token = qtd->hw_token;
6dbd682b 1066 qtd->hw_token = HALT_BIT(ehci);
41f05ded 1067
1da177e4
LT
1068 dummy = qh->dummy;
1069
1070 dma = dummy->qtd_dma;
1071 *dummy = *qtd;
1072 dummy->qtd_dma = dma;
1073
1074 list_del (&qtd->qtd_list);
1075 list_add (&dummy->qtd_list, qtd_list);
7d283aee 1076 list_splice_tail(qtd_list, &qh->qtd_list);
1da177e4 1077
6dbd682b 1078 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1da177e4
LT
1079 qh->dummy = qtd;
1080
1081 /* hc must see the new dummy at list end */
1082 dma = qtd->qtd_dma;
1083 qtd = list_entry (qh->qtd_list.prev,
1084 struct ehci_qtd, qtd_list);
6dbd682b 1085 qtd->hw_next = QTD_NEXT(ehci, dma);
1da177e4
LT
1086
1087 /* let the hc process these next qtds */
1088 wmb ();
1089 dummy->hw_token = token;
1090
c83e1a9f 1091 urb->hcpriv = qh;
1da177e4
LT
1092 }
1093 }
1094 return qh;
1095}
1096
1097/*-------------------------------------------------------------------------*/
1098
1099static int
1100submit_async (
1101 struct ehci_hcd *ehci,
1da177e4
LT
1102 struct urb *urb,
1103 struct list_head *qtd_list,
55016f10 1104 gfp_t mem_flags
1da177e4 1105) {
1da177e4
LT
1106 int epnum;
1107 unsigned long flags;
1108 struct ehci_qh *qh = NULL;
e9df41c5 1109 int rc;
1da177e4 1110
e9df41c5 1111 epnum = urb->ep->desc.bEndpointAddress;
1da177e4
LT
1112
1113#ifdef EHCI_URB_TRACE
eb34a908
DD
1114 {
1115 struct ehci_qtd *qtd;
1116 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1117 ehci_dbg(ehci,
1118 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1119 __func__, urb->dev->devpath, urb,
1120 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1121 urb->transfer_buffer_length,
1122 qtd, urb->ep->hcpriv);
1123 }
1da177e4
LT
1124#endif
1125
1126 spin_lock_irqsave (&ehci->lock, flags);
541c7d43 1127 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
8de98402
BH
1128 rc = -ESHUTDOWN;
1129 goto done;
1130 }
e9df41c5
AS
1131 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1132 if (unlikely(rc))
1133 goto done;
8de98402 1134
e9df41c5 1135 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
8de98402 1136 if (unlikely(qh == NULL)) {
e9df41c5 1137 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
8de98402
BH
1138 rc = -ENOMEM;
1139 goto done;
1140 }
1da177e4
LT
1141
1142 /* Control/bulk operations through TTs don't need scheduling,
1143 * the HC and TT handle it when the TT has a buffer ready.
1144 */
8de98402 1145 if (likely (qh->qh_state == QH_STATE_IDLE))
7a0f0d95 1146 qh_link_async(ehci, qh);
8de98402 1147 done:
1da177e4 1148 spin_unlock_irqrestore (&ehci->lock, flags);
8de98402 1149 if (unlikely (qh == NULL))
1da177e4 1150 qtd_list_free (ehci, urb, qtd_list);
8de98402 1151 return rc;
1da177e4
LT
1152}
1153
1154/*-------------------------------------------------------------------------*/
1155
99ac5b1e 1156/* the async qh for the qtds being unlinked are now gone from the HC */
1da177e4 1157
7d12e780 1158static void end_unlink_async (struct ehci_hcd *ehci)
1da177e4 1159{
99ac5b1e 1160 struct ehci_qh *qh = ehci->async_unlink;
1da177e4
LT
1161 struct ehci_qh *next;
1162
07d29b63 1163 iaa_watchdog_done(ehci);
1da177e4 1164
6dbd682b 1165 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
1da177e4
LT
1166 qh->qh_state = QH_STATE_IDLE;
1167 qh->qh_next.qh = NULL;
1da177e4
LT
1168
1169 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
99ac5b1e
AS
1170 next = qh->unlink_next;
1171 ehci->async_unlink = next;
1172 qh->unlink_next = NULL;
1da177e4 1173
7d12e780 1174 qh_completions (ehci, qh);
1da177e4 1175
e8799906 1176 if (!list_empty(&qh->qtd_list) && ehci->rh_state == EHCI_RH_RUNNING) {
1da177e4 1177 qh_link_async (ehci, qh);
e8799906 1178 } else {
1da177e4
LT
1179 /* it's not free to turn the async schedule on/off; leave it
1180 * active but idle for a while once it empties.
1181 */
e8799906 1182 if (ehci->rh_state == EHCI_RH_RUNNING
1da177e4
LT
1183 && ehci->async->qh_next.qh == NULL)
1184 timer_action (ehci, TIMER_ASYNC_OFF);
1185 }
1186
1187 if (next) {
99ac5b1e 1188 ehci->async_unlink = NULL;
1da177e4
LT
1189 start_unlink_async (ehci, next);
1190 }
2f7ac6c1
GJ
1191
1192 if (ehci->has_synopsys_hc_bug)
1193 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1194 &ehci->regs->async_next);
1da177e4
LT
1195}
1196
1197/* makes sure the async qh will become idle */
1198/* caller must own ehci->lock */
1199
1200static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1201{
1da177e4
LT
1202 struct ehci_qh *prev;
1203
1204#ifdef DEBUG
1205 assert_spin_locked(&ehci->lock);
99ac5b1e 1206 if (ehci->async_unlink
1da177e4
LT
1207 || (qh->qh_state != QH_STATE_LINKED
1208 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1209 )
1210 BUG ();
1211#endif
1212
1213 /* stop async schedule right now? */
1214 if (unlikely (qh == ehci->async)) {
1215 /* can't get here without STS_ASS set */
e8799906 1216 if (ehci->rh_state != EHCI_RH_HALTED
99ac5b1e 1217 && !ehci->async_unlink) {
d0852299 1218 /* ... and CMD_IAAD clear */
3d9545cc
AS
1219 ehci->command &= ~CMD_ASE;
1220 ehci_writel(ehci, ehci->command, &ehci->regs->command);
1da177e4
LT
1221 wmb ();
1222 // handshake later, if we need to
d0852299 1223 timer_action_done (ehci, TIMER_ASYNC_OFF);
1da177e4 1224 }
1da177e4 1225 return;
53bd6a60 1226 }
1da177e4
LT
1227
1228 qh->qh_state = QH_STATE_UNLINK;
99ac5b1e 1229 ehci->async_unlink = qh;
2f5bb665
AS
1230 if (!qh->unlink_next)
1231 ehci->async_unlink_last = qh;
1da177e4
LT
1232
1233 prev = ehci->async;
1234 while (prev->qh_next.qh != qh)
1235 prev = prev->qh_next.qh;
1236
3807e26d 1237 prev->hw->hw_next = qh->hw->hw_next;
1da177e4 1238 prev->qh_next = qh->qh_next;
004c1968
AS
1239 if (ehci->qh_scan_next == qh)
1240 ehci->qh_scan_next = qh->qh_next.qh;
1da177e4
LT
1241 wmb ();
1242
391016f6 1243 /* If the controller isn't running, we don't have to wait for it */
e8799906 1244 if (unlikely(ehci->rh_state != EHCI_RH_RUNNING)) {
99ac5b1e 1245 /* if (unlikely (qh->unlink_next != 0))
53bd6a60 1246 * this will recurse, probably not much
1da177e4 1247 */
7d12e780 1248 end_unlink_async (ehci);
1da177e4
LT
1249 return;
1250 }
1251
3d9545cc 1252 ehci_writel(ehci, ehci->command | CMD_IAAD, &ehci->regs->command);
083522d7 1253 (void)ehci_readl(ehci, &ehci->regs->command);
07d29b63 1254 iaa_watchdog_start(ehci);
1da177e4
LT
1255}
1256
1257/*-------------------------------------------------------------------------*/
1258
7d12e780 1259static void scan_async (struct ehci_hcd *ehci)
1da177e4 1260{
94ae4976 1261 bool stopped;
1da177e4
LT
1262 struct ehci_qh *qh;
1263 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1264
1da177e4 1265 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
e8799906 1266 stopped = (ehci->rh_state != EHCI_RH_RUNNING);
1da177e4 1267
004c1968
AS
1268 ehci->qh_scan_next = ehci->async->qh_next.qh;
1269 while (ehci->qh_scan_next) {
1270 qh = ehci->qh_scan_next;
1271 ehci->qh_scan_next = qh->qh_next.qh;
1272 rescan:
1273 /* clean any finished work for this qh */
1274 if (!list_empty(&qh->qtd_list)) {
1275 int temp;
1276
1277 /*
1278 * Unlinks could happen here; completion reporting
1279 * drops the lock. That's why ehci->qh_scan_next
1280 * always holds the next qh to scan; if the next qh
1281 * gets unlinked then ehci->qh_scan_next is adjusted
1282 * in start_unlink_async().
1da177e4 1283 */
004c1968
AS
1284 temp = qh_completions(ehci, qh);
1285 if (qh->needs_rescan)
1286 unlink_async(ehci, qh);
1287 qh->unlink_time = jiffies + EHCI_SHRINK_JIFFIES;
004c1968
AS
1288 if (temp != 0)
1289 goto rescan;
1290 }
1da177e4 1291
004c1968
AS
1292 /* unlink idle entries, reducing DMA usage as well
1293 * as HCD schedule-scanning costs. delay for any qh
1294 * we just scanned, there's a not-unusual case that it
1295 * doesn't stay idle for long.
1296 * (plus, avoids some kind of re-activation race.)
1297 */
1298 if (list_empty(&qh->qtd_list)
1299 && qh->qh_state == QH_STATE_LINKED) {
99ac5b1e 1300 if (!ehci->async_unlink && (stopped ||
004c1968
AS
1301 time_after_eq(jiffies, qh->unlink_time)))
1302 start_unlink_async(ehci, qh);
1303 else
1304 action = TIMER_ASYNC_SHRINK;
1305 }
1da177e4
LT
1306 }
1307 if (action == TIMER_ASYNC_SHRINK)
1308 timer_action (ehci, TIMER_ASYNC_SHRINK);
1309}