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Commit | Line | Data |
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db11e47d SS |
1 | /* |
2 | * Glue code for the ISP1760 driver and bus | |
3 | * Currently there is support for | |
4 | * - OpenFirmware | |
5 | * - PCI | |
9da69c60 | 6 | * - PDEV (generic platform device centralized driver model) |
db11e47d SS |
7 | * |
8 | * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de> | |
9 | * | |
10 | */ | |
11 | ||
12 | #include <linux/usb.h> | |
13 | #include <linux/io.h> | |
6eb0de82 | 14 | #include <linux/module.h> |
c3cc40cc | 15 | #include <linux/of.h> |
f7e7aa58 | 16 | #include <linux/platform_device.h> |
c3cc40cc | 17 | #include <linux/slab.h> |
9da69c60 | 18 | #include <linux/usb/isp1760.h> |
27729aad | 19 | #include <linux/usb/hcd.h> |
db11e47d | 20 | |
db11e47d SS |
21 | #include "isp1760-hcd.h" |
22 | ||
ff30bf1c | 23 | #ifdef CONFIG_PCI |
db11e47d SS |
24 | #include <linux/pci.h> |
25 | #endif | |
26 | ||
ff30bf1c | 27 | #ifdef CONFIG_PCI |
41ac7b3a | 28 | static int isp1761_pci_probe(struct pci_dev *dev, |
db11e47d SS |
29 | const struct pci_device_id *id) |
30 | { | |
31 | u8 latency, limit; | |
32 | __u32 reg_data; | |
33 | int retry_count; | |
db11e47d | 34 | struct usb_hcd *hcd; |
3faefc88 | 35 | unsigned int devflags = 0; |
6013bbba KB |
36 | int ret_status = 0; |
37 | ||
38 | resource_size_t pci_mem_phy0; | |
39 | resource_size_t memlength; | |
40 | ||
41 | u8 __iomem *chip_addr; | |
42 | u8 __iomem *iobase; | |
43 | resource_size_t nxp_pci_io_base; | |
44 | resource_size_t iolength; | |
db11e47d SS |
45 | |
46 | if (usb_disabled()) | |
47 | return -ENODEV; | |
48 | ||
49 | if (pci_enable_device(dev) < 0) | |
50 | return -ENODEV; | |
51 | ||
52 | if (!dev->irq) | |
53 | return -ENODEV; | |
54 | ||
55 | /* Grab the PLX PCI mem maped port start address we need */ | |
56 | nxp_pci_io_base = pci_resource_start(dev, 0); | |
57 | iolength = pci_resource_len(dev, 0); | |
58 | ||
59 | if (!request_mem_region(nxp_pci_io_base, iolength, "ISP1761 IO MEM")) { | |
60 | printk(KERN_ERR "request region #1\n"); | |
61 | return -EBUSY; | |
62 | } | |
63 | ||
64 | iobase = ioremap_nocache(nxp_pci_io_base, iolength); | |
65 | if (!iobase) { | |
66 | printk(KERN_ERR "ioremap #1\n"); | |
6013bbba KB |
67 | ret_status = -ENOMEM; |
68 | goto cleanup1; | |
db11e47d SS |
69 | } |
70 | /* Grab the PLX PCI shared memory of the ISP 1761 we need */ | |
71 | pci_mem_phy0 = pci_resource_start(dev, 3); | |
6013bbba KB |
72 | memlength = pci_resource_len(dev, 3); |
73 | if (memlength < 0xffff) { | |
74 | printk(KERN_ERR "memory length for this resource is wrong\n"); | |
75 | ret_status = -ENOMEM; | |
76 | goto cleanup2; | |
db11e47d SS |
77 | } |
78 | ||
6013bbba | 79 | if (!request_mem_region(pci_mem_phy0, memlength, "ISP-PCI")) { |
db11e47d | 80 | printk(KERN_ERR "host controller already in use\n"); |
6013bbba KB |
81 | ret_status = -EBUSY; |
82 | goto cleanup2; | |
83 | } | |
84 | ||
85 | /* map available memory */ | |
86 | chip_addr = ioremap_nocache(pci_mem_phy0,memlength); | |
87 | if (!chip_addr) { | |
88 | printk(KERN_ERR "Error ioremap failed\n"); | |
89 | ret_status = -ENOMEM; | |
90 | goto cleanup3; | |
db11e47d SS |
91 | } |
92 | ||
93 | /* bad pci latencies can contribute to overruns */ | |
94 | pci_read_config_byte(dev, PCI_LATENCY_TIMER, &latency); | |
95 | if (latency) { | |
96 | pci_read_config_byte(dev, PCI_MAX_LAT, &limit); | |
97 | if (limit && limit < latency) | |
98 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, limit); | |
99 | } | |
100 | ||
101 | /* Try to check whether we can access Scratch Register of | |
102 | * Host Controller or not. The initial PCI access is retried until | |
103 | * local init for the PCI bridge is completed | |
104 | */ | |
105 | retry_count = 20; | |
106 | reg_data = 0; | |
107 | while ((reg_data != 0xFACE) && retry_count) { | |
108 | /*by default host is in 16bit mode, so | |
109 | * io operations at this stage must be 16 bit | |
110 | * */ | |
111 | writel(0xface, chip_addr + HC_SCRATCH_REG); | |
112 | udelay(100); | |
6013bbba | 113 | reg_data = readl(chip_addr + HC_SCRATCH_REG) & 0x0000ffff; |
db11e47d SS |
114 | retry_count--; |
115 | } | |
116 | ||
6013bbba KB |
117 | iounmap(chip_addr); |
118 | ||
db11e47d SS |
119 | /* Host Controller presence is detected by writing to scratch register |
120 | * and reading back and checking the contents are same or not | |
121 | */ | |
122 | if (reg_data != 0xFACE) { | |
802f389a | 123 | dev_err(&dev->dev, "scratch register mismatch %x\n", reg_data); |
6013bbba KB |
124 | ret_status = -ENOMEM; |
125 | goto cleanup3; | |
db11e47d SS |
126 | } |
127 | ||
128 | pci_set_master(dev); | |
129 | ||
6013bbba KB |
130 | /* configure PLX PCI chip to pass interrupts */ |
131 | #define PLX_INT_CSR_REG 0x68 | |
132 | reg_data = readl(iobase + PLX_INT_CSR_REG); | |
133 | reg_data |= 0x900; | |
134 | writel(reg_data, iobase + PLX_INT_CSR_REG); | |
db11e47d SS |
135 | |
136 | dev->dev.dma_mask = NULL; | |
6013bbba | 137 | hcd = isp1760_register(pci_mem_phy0, memlength, dev->irq, |
7eb42c6e LP |
138 | IRQF_SHARED, &dev->dev, dev_name(&dev->dev), |
139 | devflags); | |
6013bbba KB |
140 | if (IS_ERR(hcd)) { |
141 | ret_status = -ENODEV; | |
142 | goto cleanup3; | |
ce5dee50 | 143 | } |
6013bbba KB |
144 | |
145 | /* done with PLX IO access */ | |
db11e47d | 146 | iounmap(iobase); |
db11e47d | 147 | release_mem_region(nxp_pci_io_base, iolength); |
6013bbba | 148 | |
6013bbba KB |
149 | return 0; |
150 | ||
151 | cleanup3: | |
152 | release_mem_region(pci_mem_phy0, memlength); | |
153 | cleanup2: | |
154 | iounmap(iobase); | |
155 | cleanup1: | |
156 | release_mem_region(nxp_pci_io_base, iolength); | |
157 | return ret_status; | |
db11e47d | 158 | } |
6013bbba | 159 | |
db11e47d SS |
160 | static void isp1761_pci_remove(struct pci_dev *dev) |
161 | { | |
10c73f09 | 162 | isp1760_unregister(&dev->dev); |
db11e47d SS |
163 | |
164 | pci_disable_device(dev); | |
db11e47d SS |
165 | } |
166 | ||
167 | static void isp1761_pci_shutdown(struct pci_dev *dev) | |
168 | { | |
169 | printk(KERN_ERR "ips1761_pci_shutdown\n"); | |
170 | } | |
171 | ||
6c073568 SAS |
172 | static const struct pci_device_id isp1760_plx [] = { |
173 | { | |
174 | .class = PCI_CLASS_BRIDGE_OTHER << 8, | |
175 | .class_mask = ~0, | |
176 | .vendor = PCI_VENDOR_ID_PLX, | |
177 | .device = 0x5406, | |
178 | .subvendor = PCI_VENDOR_ID_PLX, | |
179 | .subdevice = 0x9054, | |
180 | }, | |
181 | { } | |
db11e47d SS |
182 | }; |
183 | MODULE_DEVICE_TABLE(pci, isp1760_plx); | |
184 | ||
185 | static struct pci_driver isp1761_pci_driver = { | |
186 | .name = "isp1760", | |
187 | .id_table = isp1760_plx, | |
188 | .probe = isp1761_pci_probe, | |
189 | .remove = isp1761_pci_remove, | |
190 | .shutdown = isp1761_pci_shutdown, | |
191 | }; | |
192 | #endif | |
193 | ||
41ac7b3a | 194 | static int isp1760_plat_probe(struct platform_device *pdev) |
f7e7aa58 | 195 | { |
c3cc40cc LP |
196 | unsigned long irqflags = IRQF_SHARED; |
197 | unsigned int devflags = 0; | |
f7e7aa58 CM |
198 | struct resource *mem_res; |
199 | struct resource *irq_res; | |
200 | resource_size_t mem_size; | |
c3cc40cc LP |
201 | struct usb_hcd *hcd; |
202 | int ret; | |
f7e7aa58 CM |
203 | |
204 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
205 | if (!mem_res) { | |
206 | pr_warning("isp1760: Memory resource not available\n"); | |
c3cc40cc | 207 | return -ENODEV; |
f7e7aa58 CM |
208 | } |
209 | mem_size = resource_size(mem_res); | |
210 | if (!request_mem_region(mem_res->start, mem_size, "isp1760")) { | |
211 | pr_warning("isp1760: Cannot reserve the memory resource\n"); | |
c3cc40cc | 212 | return -EBUSY; |
f7e7aa58 CM |
213 | } |
214 | ||
215 | irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
216 | if (!irq_res) { | |
217 | pr_warning("isp1760: IRQ resource not available\n"); | |
72d9c8b6 LC |
218 | ret = -ENODEV; |
219 | goto cleanup; | |
f7e7aa58 | 220 | } |
72d9c8b6 | 221 | |
f7e7aa58 CM |
222 | irqflags |= irq_res->flags & IRQF_TRIGGER_MASK; |
223 | ||
c3cc40cc LP |
224 | if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { |
225 | struct device_node *dp = pdev->dev.of_node; | |
226 | u32 bus_width = 0; | |
227 | ||
228 | if (of_device_is_compatible(dp, "nxp,usb-isp1761")) | |
9da69c60 | 229 | devflags |= ISP1760_FLAG_ISP1761; |
c3cc40cc LP |
230 | |
231 | /* Some systems wire up only 16 of the 32 data lines */ | |
232 | of_property_read_u32(dp, "bus-width", &bus_width); | |
233 | if (bus_width == 16) | |
9da69c60 | 234 | devflags |= ISP1760_FLAG_BUS_WIDTH_16; |
c3cc40cc LP |
235 | |
236 | if (of_property_read_bool(dp, "port1-otg")) | |
9da69c60 | 237 | devflags |= ISP1760_FLAG_OTG_EN; |
c3cc40cc LP |
238 | |
239 | if (of_property_read_bool(dp, "analog-oc")) | |
9da69c60 | 240 | devflags |= ISP1760_FLAG_ANALOG_OC; |
c3cc40cc LP |
241 | |
242 | if (of_property_read_bool(dp, "dack-polarity")) | |
9da69c60 | 243 | devflags |= ISP1760_FLAG_DACK_POL_HIGH; |
c3cc40cc LP |
244 | |
245 | if (of_property_read_bool(dp, "dreq-polarity")) | |
246 | devflags |= ISP1760_FLAG_DREQ_POL_HIGH; | |
247 | } else if (dev_get_platdata(&pdev->dev)) { | |
248 | struct isp1760_platform_data *pdata = | |
249 | dev_get_platdata(&pdev->dev); | |
250 | ||
251 | if (pdata->is_isp1761) | |
252 | devflags |= ISP1760_FLAG_ISP1761; | |
253 | if (pdata->bus_width_16) | |
254 | devflags |= ISP1760_FLAG_BUS_WIDTH_16; | |
255 | if (pdata->port1_otg) | |
256 | devflags |= ISP1760_FLAG_OTG_EN; | |
257 | if (pdata->analog_oc) | |
258 | devflags |= ISP1760_FLAG_ANALOG_OC; | |
259 | if (pdata->dack_polarity_high) | |
260 | devflags |= ISP1760_FLAG_DACK_POL_HIGH; | |
261 | if (pdata->dreq_polarity_high) | |
9da69c60 MH |
262 | devflags |= ISP1760_FLAG_DREQ_POL_HIGH; |
263 | } | |
264 | ||
f7e7aa58 | 265 | hcd = isp1760_register(mem_res->start, mem_size, irq_res->start, |
7eb42c6e LP |
266 | irqflags, &pdev->dev, dev_name(&pdev->dev), |
267 | devflags); | |
f7e7aa58 CM |
268 | if (IS_ERR(hcd)) { |
269 | pr_warning("isp1760: Failed to register the HCD device\n"); | |
c3cc40cc | 270 | ret = PTR_ERR(hcd); |
f7e7aa58 CM |
271 | goto cleanup; |
272 | } | |
273 | ||
274 | pr_info("ISP1760 USB device initialised\n"); | |
c3cc40cc | 275 | return 0; |
f7e7aa58 CM |
276 | |
277 | cleanup: | |
278 | release_mem_region(mem_res->start, mem_size); | |
f7e7aa58 CM |
279 | return ret; |
280 | } | |
281 | ||
fb4e98ab | 282 | static int isp1760_plat_remove(struct platform_device *pdev) |
f7e7aa58 | 283 | { |
10c73f09 | 284 | isp1760_unregister(&pdev->dev); |
310e9e33 | 285 | |
f7e7aa58 CM |
286 | return 0; |
287 | } | |
288 | ||
c3cc40cc LP |
289 | #ifdef CONFIG_OF |
290 | static const struct of_device_id isp1760_of_match[] = { | |
291 | { .compatible = "nxp,usb-isp1760", }, | |
292 | { .compatible = "nxp,usb-isp1761", }, | |
293 | { }, | |
294 | }; | |
295 | MODULE_DEVICE_TABLE(of, isp1760_of_match); | |
296 | #endif | |
297 | ||
f7e7aa58 CM |
298 | static struct platform_driver isp1760_plat_driver = { |
299 | .probe = isp1760_plat_probe, | |
7690417d | 300 | .remove = isp1760_plat_remove, |
f7e7aa58 CM |
301 | .driver = { |
302 | .name = "isp1760", | |
c3cc40cc | 303 | .of_match_table = of_match_ptr(isp1760_of_match), |
f7e7aa58 CM |
304 | }, |
305 | }; | |
306 | ||
db11e47d SS |
307 | static int __init isp1760_init(void) |
308 | { | |
f7e7aa58 | 309 | int ret, any_ret = -ENODEV; |
db11e47d SS |
310 | |
311 | init_kmem_once(); | |
312 | ||
f7e7aa58 CM |
313 | ret = platform_driver_register(&isp1760_plat_driver); |
314 | if (!ret) | |
315 | any_ret = 0; | |
ff30bf1c | 316 | #ifdef CONFIG_PCI |
db11e47d | 317 | ret = pci_register_driver(&isp1761_pci_driver); |
f7e7aa58 CM |
318 | if (!ret) |
319 | any_ret = 0; | |
db11e47d | 320 | #endif |
db11e47d | 321 | |
f7e7aa58 CM |
322 | if (any_ret) |
323 | deinit_kmem_cache(); | |
324 | return any_ret; | |
db11e47d SS |
325 | } |
326 | module_init(isp1760_init); | |
327 | ||
328 | static void __exit isp1760_exit(void) | |
329 | { | |
f7e7aa58 | 330 | platform_driver_unregister(&isp1760_plat_driver); |
ff30bf1c | 331 | #ifdef CONFIG_PCI |
db11e47d SS |
332 | pci_unregister_driver(&isp1761_pci_driver); |
333 | #endif | |
334 | deinit_kmem_cache(); | |
335 | } | |
336 | module_exit(isp1760_exit); |