]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blame - drivers/usb/host/ohci-hcd.c
projects / mirror_ubuntu-hirsute-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] USB: EHCI unlink tweaks
[mirror_ubuntu-hirsute-kernel.git] / drivers / usb / host / ohci-hcd.c
CommitLineData
1da177e4
LT		 1/*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
11 *
12 *
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
17 *
18 * History:
19 *
20 * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
21 * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
22 * 2003/02/24 show registers in sysfs (Kevin Brosius)
23 *
24 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
25 * bandwidth accounting; if debugging, show schedules in driverfs
26 * 2002/07/19 fixes to management of ED and schedule state.
27 * 2002/06/09 SA-1111 support (Christopher Hoover)
28 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
29 * to fix urb unlink races caused by interrupt latency assumptions;
30 * minor ED field and function naming updates
31 * 2002/01/18 package as a patch for 2.5.3; this should match the
32 * 2.4.17 kernel modulo some bugs being fixed.
33 *
34 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
35 * from post-2.4.5 patches.
36 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
37 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
38 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
39 * pbook pci quirks gone (please fix pbook pci sw!) (db)
40 *
41 * 2001/04/08 Identify version on module load (gb)
42 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
43 pci_map_single (db)
44 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
45 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
46 *
47 * 2000/09/26 fixed races in removing the private portion of the urb
48 * 2000/09/07 disable bulk and control lists when unlinking the last
49 * endpoint descriptor in order to avoid unrecoverable errors on
50 * the Lucent chips. (rwc@sgi)
51 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
52 * urb unlink probs, indentation fixes
53 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
54 * device unplugs.
55 * 2000/06/28 use PCI hotplug framework, for better power management
56 * and for Cardbus support (David Brownell)
57 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
58 * when the controller loses power; handle UE; cleanup; ...
59 *
60 * v5.2 1999/12/07 URB 3rd preview,
61 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
62 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
63 * i386: HUB, Keyboard, Mouse, Printer
64 *
65 * v4.3 1999/10/27 multiple HCs, bulk_request
66 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
67 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
68 * v4.0 1999/08/18
69 * v3.0 1999/06/25
70 * v2.1 1999/05/09 code clean up
71 * v2.0 1999/05/04
72 * v1.0 1999/04/27 initial release
73 *
74 * This file is licenced under the GPL.
75 */
76
77#include <linux/config.h>
1da177e4
LT		 78#include <linux/module.h>
79#include <linux/moduleparam.h>
80#include <linux/pci.h>
81#include <linux/kernel.h>
82#include <linux/delay.h>
83#include <linux/ioport.h>
84#include <linux/sched.h>
85#include <linux/slab.h>
86#include <linux/smp_lock.h>
87#include <linux/errno.h>
88#include <linux/init.h>
89#include <linux/timer.h>
90#include <linux/list.h>
1da177e4
LT		 91#include <linux/usb.h>
92#include <linux/usb_otg.h>
1da177e4 93#include <linux/dma-mapping.h>
f4df0e33
DB		 94#include <linux/dmapool.h>
95#include <linux/reboot.h>
1da177e4
LT		 96
97#include <asm/io.h>
98#include <asm/irq.h>
99#include <asm/system.h>
100#include <asm/unaligned.h>
101#include <asm/byteorder.h>
102
f4df0e33 103#include "../core/hcd.h"
1da177e4 104
f4df0e33 105#define DRIVER_VERSION "2005 April 22"
1da177e4
LT		 106#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
107#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
108
109/*-------------------------------------------------------------------------*/
110
8de98402 111#undef OHCI_VERBOSE_DEBUG /* not always helpful */
1da177e4
LT		 112
113/* For initializing controller (mask in an HCFS mode too) */
114#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
115#define OHCI_INTR_INIT \
116 (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
117
118#ifdef __hppa__
119/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
120#define IR_DISABLE
121#endif
122
123#ifdef CONFIG_ARCH_OMAP
124/* OMAP doesn't support IR (no SMM; not needed) */
125#define IR_DISABLE
126#endif
127
128/*-------------------------------------------------------------------------*/
129
130static const char hcd_name [] = "ohci_hcd";
131
132#include "ohci.h"
133
134static void ohci_dump (struct ohci_hcd *ohci, int verbose);
135static int ohci_init (struct ohci_hcd *ohci);
136static void ohci_stop (struct usb_hcd *hcd);
f4df0e33 137static int ohci_reboot (struct notifier_block *, unsigned long , void *);
1da177e4
LT		 138
139#include "ohci-hub.c"
140#include "ohci-dbg.c"
141#include "ohci-mem.c"
142#include "ohci-q.c"
143
144
145/*
146 * On architectures with edge-triggered interrupts we must never return
147 * IRQ_NONE.
148 */
149#if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
150#define IRQ_NOTMINE IRQ_HANDLED
151#else
152#define IRQ_NOTMINE IRQ_NONE
153#endif
154
155
156/* Some boards misreport power switching/overcurrent */
157static int distrust_firmware = 1;
158module_param (distrust_firmware, bool, 0);
159MODULE_PARM_DESC (distrust_firmware,
160 "true to distrust firmware power/overcurrent setup");
161
162/* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
163static int no_handshake = 0;
164module_param (no_handshake, bool, 0);
165MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
166
167/*-------------------------------------------------------------------------*/
168
169/*
170 * queue up an urb for anything except the root hub
171 */
172static int ohci_urb_enqueue (
173 struct usb_hcd *hcd,
174 struct usb_host_endpoint *ep,
175 struct urb *urb,
55016f10 176 gfp_t mem_flags
1da177e4
LT		 177) {
178 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
179 struct ed *ed;
180 urb_priv_t *urb_priv;
181 unsigned int pipe = urb->pipe;
182 int i, size = 0;
183 unsigned long flags;
184 int retval = 0;
185
186#ifdef OHCI_VERBOSE_DEBUG
187 urb_print (urb, "SUB", usb_pipein (pipe));
188#endif
189
190 /* every endpoint has a ed, locate and maybe (re)initialize it */
191 if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
192 return -ENOMEM;
193
194 /* for the private part of the URB we need the number of TDs (size) */
195 switch (ed->type) {
196 case PIPE_CONTROL:
197 /* td_submit_urb() doesn't yet handle these */
198 if (urb->transfer_buffer_length > 4096)
199 return -EMSGSIZE;
200
201 /* 1 TD for setup, 1 for ACK, plus ... */
202 size = 2;
203 /* FALLTHROUGH */
204 // case PIPE_INTERRUPT:
205 // case PIPE_BULK:
206 default:
207 /* one TD for every 4096 Bytes (can be upto 8K) */
208 size += urb->transfer_buffer_length / 4096;
209 /* ... and for any remaining bytes ... */
210 if ((urb->transfer_buffer_length % 4096) != 0)
211 size++;
212 /* ... and maybe a zero length packet to wrap it up */
213 if (size == 0)
214 size++;
215 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
216 && (urb->transfer_buffer_length
217 % usb_maxpacket (urb->dev, pipe,
218 usb_pipeout (pipe))) == 0)
219 size++;
220 break;
221 case PIPE_ISOCHRONOUS: /* number of packets from URB */
222 size = urb->number_of_packets;
223 break;
224 }
225
226 /* allocate the private part of the URB */
227 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
228 mem_flags);
229 if (!urb_priv)
230 return -ENOMEM;
231 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
232 INIT_LIST_HEAD (&urb_priv->pending);
233 urb_priv->length = size;
234 urb_priv->ed = ed;
235
236 /* allocate the TDs (deferring hash chain updates) */
237 for (i = 0; i < size; i++) {
238 urb_priv->td [i] = td_alloc (ohci, mem_flags);
239 if (!urb_priv->td [i]) {
240 urb_priv->length = i;
241 urb_free_priv (ohci, urb_priv);
242 return -ENOMEM;
243 }
244 }
245
246 spin_lock_irqsave (&ohci->lock, flags);
247
248 /* don't submit to a dead HC */
8de98402
BH		 249 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
250 retval = -ENODEV;
251 goto fail;
252 }
1da177e4
LT		 253 if (!HC_IS_RUNNING(hcd->state)) {
254 retval = -ENODEV;
255 goto fail;
256 }
257
258 /* in case of unlink-during-submit */
259 spin_lock (&urb->lock);
260 if (urb->status != -EINPROGRESS) {
261 spin_unlock (&urb->lock);
262 urb->hcpriv = urb_priv;
263 finish_urb (ohci, urb, NULL);
264 retval = 0;
265 goto fail;
266 }
267
268 /* schedule the ed if needed */
269 if (ed->state == ED_IDLE) {
270 retval = ed_schedule (ohci, ed);
271 if (retval < 0)
272 goto fail0;
273 if (ed->type == PIPE_ISOCHRONOUS) {
274 u16 frame = ohci_frame_no(ohci);
275
276 /* delay a few frames before the first TD */
277 frame += max_t (u16, 8, ed->interval);
278 frame &= ~(ed->interval - 1);
279 frame |= ed->branch;
280 urb->start_frame = frame;
281
282 /* yes, only URB_ISO_ASAP is supported, and
283 * urb->start_frame is never used as input.
284 */
285 }
286 } else if (ed->type == PIPE_ISOCHRONOUS)
287 urb->start_frame = ed->last_iso + ed->interval;
288
289 /* fill the TDs and link them to the ed; and
290 * enable that part of the schedule, if needed
291 * and update count of queued periodic urbs
292 */
293 urb->hcpriv = urb_priv;
294 td_submit_urb (ohci, urb);
295
296fail0:
297 spin_unlock (&urb->lock);
298fail:
299 if (retval)
300 urb_free_priv (ohci, urb_priv);
301 spin_unlock_irqrestore (&ohci->lock, flags);
302 return retval;
303}
304
305/*
306 * decouple the URB from the HC queues (TDs, urb_priv); it's
307 * already marked using urb->status. reporting is always done
308 * asynchronously, and we might be dealing with an urb that's
309 * partially transferred, or an ED with other urbs being unlinked.
310 */
311static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
312{
313 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
314 unsigned long flags;
315
316#ifdef OHCI_VERBOSE_DEBUG
317 urb_print (urb, "UNLINK", 1);
318#endif
319
320 spin_lock_irqsave (&ohci->lock, flags);
321 if (HC_IS_RUNNING(hcd->state)) {
322 urb_priv_t *urb_priv;
323
324 /* Unless an IRQ completed the unlink while it was being
325 * handed to us, flag it for unlink and giveback, and force
326 * some upcoming INTR_SF to call finish_unlinks()
327 */
328 urb_priv = urb->hcpriv;
329 if (urb_priv) {
330 if (urb_priv->ed->state == ED_OPER)
331 start_ed_unlink (ohci, urb_priv->ed);
332 }
333 } else {
334 /*
335 * with HC dead, we won't respect hc queue pointers
336 * any more ... just clean up every urb's memory.
337 */
338 if (urb->hcpriv)
339 finish_urb (ohci, urb, NULL);
340 }
341 spin_unlock_irqrestore (&ohci->lock, flags);
342 return 0;
343}
344
345/*-------------------------------------------------------------------------*/
346
347/* frees config/altsetting state for endpoints,
348 * including ED memory, dummy TD, and bulk/intr data toggle
349 */
350
351static void
352ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
353{
354 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
355 unsigned long flags;
356 struct ed *ed = ep->hcpriv;
357 unsigned limit = 1000;
358
359 /* ASSERT: any requests/urbs are being unlinked */
360 /* ASSERT: nobody can be submitting urbs for this any more */
361
362 if (!ed)
363 return;
364
365rescan:
366 spin_lock_irqsave (&ohci->lock, flags);
367
368 if (!HC_IS_RUNNING (hcd->state)) {
369sanitize:
370 ed->state = ED_IDLE;
371 finish_unlinks (ohci, 0, NULL);
372 }
373
374 switch (ed->state) {
375 case ED_UNLINK: /* wait for hw to finish? */
376 /* major IRQ delivery trouble loses INTR_SF too... */
377 if (limit-- == 0) {
378 ohci_warn (ohci, "IRQ INTR_SF lossage\n");
379 goto sanitize;
380 }
381 spin_unlock_irqrestore (&ohci->lock, flags);
22c43863 382 schedule_timeout_uninterruptible(1);
1da177e4
LT		 383 goto rescan;
384 case ED_IDLE: /* fully unlinked */
385 if (list_empty (&ed->td_list)) {
386 td_free (ohci, ed->dummy);
387 ed_free (ohci, ed);
388 break;
389 }
390 /* else FALL THROUGH */
391 default:
392 /* caller was supposed to have unlinked any requests;
393 * that's not our job. can't recover; must leak ed.
394 */
395 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
396 ed, ep->desc.bEndpointAddress, ed->state,
397 list_empty (&ed->td_list) ? "" : " (has tds)");
398 td_free (ohci, ed->dummy);
399 break;
400 }
401 ep->hcpriv = NULL;
402 spin_unlock_irqrestore (&ohci->lock, flags);
403 return;
404}
405
406static int ohci_get_frame (struct usb_hcd *hcd)
407{
408 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
409
410 return ohci_frame_no(ohci);
411}
412
413static void ohci_usb_reset (struct ohci_hcd *ohci)
414{
415 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
416 ohci->hc_control &= OHCI_CTRL_RWC;
417 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
418}
419
f4df0e33
DB		 420/* reboot notifier forcibly disables IRQs and DMA, helping kexec and
421 * other cases where the next software may expect clean state from the
422 * "firmware". this is bus-neutral, unlike shutdown() methods.
423 */
424static int
425ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
426{
427 struct ohci_hcd *ohci;
428
429 ohci = container_of (block, struct ohci_hcd, reboot_notifier);
430 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
431 ohci_usb_reset (ohci);
432 /* flush the writes */
433 (void) ohci_readl (ohci, &ohci->regs->control);
434 return 0;
435}
436
1da177e4
LT		 437/*-------------------------------------------------------------------------*
438 * HC functions
439 *-------------------------------------------------------------------------*/
440
441/* init memory, and kick BIOS/SMM off */
442
443static int ohci_init (struct ohci_hcd *ohci)
444{
445 int ret;
446
447 disable (ohci);
448 ohci->regs = ohci_to_hcd(ohci)->regs;
449 ohci->next_statechange = jiffies;
450
451#ifndef IR_DISABLE
452 /* SMM owns the HC? not for long! */
453 if (!no_handshake && ohci_readl (ohci,
454 &ohci->regs->control) & OHCI_CTRL_IR) {
455 u32 temp;
456
457 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
458
459 /* this timeout is arbitrary. we make it long, so systems
460 * depending on usb keyboards may be usable even if the
461 * BIOS/SMM code seems pretty broken.
462 */
463 temp = 500; /* arbitrary: five seconds */
464
465 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
466 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
467 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
468 msleep (10);
469 if (--temp == 0) {
470 ohci_err (ohci, "USB HC takeover failed!"
471 " (BIOS/SMM bug)\n");
472 return -EBUSY;
473 }
474 }
475 ohci_usb_reset (ohci);
476 }
477#endif
478
479 /* Disable HC interrupts */
480 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
481 // flush the writes
482 (void) ohci_readl (ohci, &ohci->regs->control);
483
fdd13b36
DB		 484 /* Read the number of ports unless overridden */
485 if (ohci->num_ports == 0)
486 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
487
1da177e4
LT		 488 if (ohci->hcca)
489 return 0;
490
491 ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller,
492 sizeof *ohci->hcca, &ohci->hcca_dma, 0);
493 if (!ohci->hcca)
494 return -ENOMEM;
495
496 if ((ret = ohci_mem_init (ohci)) < 0)
497 ohci_stop (ohci_to_hcd(ohci));
498
499 return ret;
500
501}
502
503/*-------------------------------------------------------------------------*/
504
505/* Start an OHCI controller, set the BUS operational
506 * resets USB and controller
507 * enable interrupts
1da177e4
LT		 508 */
509static int ohci_run (struct ohci_hcd *ohci)
510{
511 u32 mask, temp;
1da177e4
LT		 512 int first = ohci->fminterval == 0;
513
514 disable (ohci);
515
516 /* boot firmware should have set this up (5.1.1.3.1) */
517 if (first) {
518
519 temp = ohci_readl (ohci, &ohci->regs->fminterval);
520 ohci->fminterval = temp & 0x3fff;
521 if (ohci->fminterval != FI)
522 ohci_dbg (ohci, "fminterval delta %d\n",
523 ohci->fminterval - FI);
524 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
525 /* also: power/overcurrent flags in roothub.a */
526 }
527
528 /* Reset USB nearly "by the book". RemoteWakeupConnected
529 * saved if boot firmware (BIOS/SMM/...) told us it's connected
530 * (for OHCI integrated on mainboard, it normally is)
531 */
532 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
533 ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
534 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
535 ohci->hc_control);
536
537 if (ohci->hc_control & OHCI_CTRL_RWC
538 && !(ohci->flags & OHCI_QUIRK_AMD756))
539 ohci_to_hcd(ohci)->can_wakeup = 1;
540
541 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
542 case OHCI_USB_OPER:
543 temp = 0;
544 break;
545 case OHCI_USB_SUSPEND:
546 case OHCI_USB_RESUME:
547 ohci->hc_control &= OHCI_CTRL_RWC;
548 ohci->hc_control |= OHCI_USB_RESUME;
549 temp = 10 /* msec wait */;
550 break;
551 // case OHCI_USB_RESET:
552 default:
553 ohci->hc_control &= OHCI_CTRL_RWC;
554 ohci->hc_control |= OHCI_USB_RESET;
555 temp = 50 /* msec wait */;
556 break;
557 }
558 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
559 // flush the writes
560 (void) ohci_readl (ohci, &ohci->regs->control);
561 msleep(temp);
562 temp = roothub_a (ohci);
563 if (!(temp & RH_A_NPS)) {
1da177e4 564 /* power down each port */
fdd13b36 565 for (temp = 0; temp < ohci->num_ports; temp++)
1da177e4
LT		 566 ohci_writel (ohci, RH_PS_LSDA,
567 &ohci->regs->roothub.portstatus [temp]);
568 }
569 // flush those writes
570 (void) ohci_readl (ohci, &ohci->regs->control);
571 memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
572
573 /* 2msec timelimit here means no irqs/preempt */
574 spin_lock_irq (&ohci->lock);
575
576retry:
577 /* HC Reset requires max 10 us delay */
578 ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
579 temp = 30; /* ... allow extra time */
580 while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
581 if (--temp == 0) {
582 spin_unlock_irq (&ohci->lock);
583 ohci_err (ohci, "USB HC reset timed out!\n");
584 return -1;
585 }
586 udelay (1);
587 }
588
589 /* now we're in the SUSPEND state ... must go OPERATIONAL
590 * within 2msec else HC enters RESUME
591 *
592 * ... but some hardware won't init fmInterval "by the book"
593 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
594 * this if we write fmInterval after we're OPERATIONAL.
595 * Unclear about ALi, ServerWorks, and others ... this could
596 * easily be a longstanding bug in chip init on Linux.
597 */
598 if (ohci->flags & OHCI_QUIRK_INITRESET) {
599 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
600 // flush those writes
601 (void) ohci_readl (ohci, &ohci->regs->control);
602 }
603
604 /* Tell the controller where the control and bulk lists are
605 * The lists are empty now. */
606 ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
607 ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
608
609 /* a reset clears this */
610 ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
611
612 periodic_reinit (ohci);
613
614 /* some OHCI implementations are finicky about how they init.
615 * bogus values here mean not even enumeration could work.
616 */
617 if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
618 || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
619 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
620 ohci->flags |= OHCI_QUIRK_INITRESET;
621 ohci_dbg (ohci, "enabling initreset quirk\n");
622 goto retry;
623 }
624 spin_unlock_irq (&ohci->lock);
625 ohci_err (ohci, "init err (%08x %04x)\n",
626 ohci_readl (ohci, &ohci->regs->fminterval),
627 ohci_readl (ohci, &ohci->regs->periodicstart));
628 return -EOVERFLOW;
629 }
630
631 /* start controller operations */
632 ohci->hc_control &= OHCI_CTRL_RWC;
633 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
634 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
635 ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
636
637 /* wake on ConnectStatusChange, matching external hubs */
638 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
639
640 /* Choose the interrupts we care about now, others later on demand */
641 mask = OHCI_INTR_INIT;
642 ohci_writel (ohci, mask, &ohci->regs->intrstatus);
643 ohci_writel (ohci, mask, &ohci->regs->intrenable);
644
645 /* handle root hub init quirks ... */
646 temp = roothub_a (ohci);
647 temp &= ~(RH_A_PSM | RH_A_OCPM);
648 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
649 /* NSC 87560 and maybe others */
650 temp |= RH_A_NOCP;
651 temp &= ~(RH_A_POTPGT | RH_A_NPS);
652 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
653 } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
654 /* hub power always on; required for AMD-756 and some
655 * Mac platforms. ganged overcurrent reporting, if any.
656 */
657 temp |= RH_A_NPS;
658 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
659 }
660 ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
661 ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
662 &ohci->regs->roothub.b);
663 // flush those writes
664 (void) ohci_readl (ohci, &ohci->regs->control);
665
666 spin_unlock_irq (&ohci->lock);
667
668 // POTPGT delay is bits 24-31, in 2 ms units.
669 mdelay ((temp >> 23) & 0x1fe);
1da177e4
LT		 670 ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
671
672 ohci_dump (ohci, 1);
673
edfd6aee
DB		 674 if (ohci_to_hcd(ohci)->self.root_hub == NULL) {
675 register_reboot_notifier (&ohci->reboot_notifier);
247f3105 676 create_debug_files (ohci);
edfd6aee 677 }
1da177e4 678
1da177e4
LT		 679 return 0;
680}
681
682/*-------------------------------------------------------------------------*/
683
684/* an interrupt happens */
685
686static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
687{
688 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
689 struct ohci_regs __iomem *regs = ohci->regs;
690 int ints;
691
692 /* we can eliminate a (slow) ohci_readl()
693 if _only_ WDH caused this irq */
694 if ((ohci->hcca->done_head != 0)
695 && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
696 & 0x01)) {
697 ints = OHCI_INTR_WDH;
698
699 /* cardbus/... hardware gone before remove() */
700 } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
701 disable (ohci);
702 ohci_dbg (ohci, "device removed!\n");
703 return IRQ_HANDLED;
704
705 /* interrupt for some other device? */
706 } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
707 return IRQ_NOTMINE;
708 }
709
710 if (ints & OHCI_INTR_UE) {
711 disable (ohci);
712 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
713 // e.g. due to PCI Master/Target Abort
714
715 ohci_dump (ohci, 1);
716 ohci_usb_reset (ohci);
717 }
718
719 if (ints & OHCI_INTR_RD) {
720 ohci_vdbg (ohci, "resume detect\n");
e0fd3cbc 721 ohci_writel (ohci, OHCI_INTR_RD, &regs->intrstatus);
1da177e4 722 if (hcd->state != HC_STATE_QUIESCING)
f197b2c5 723 usb_hcd_resume_root_hub(hcd);
1da177e4
LT		 724 }
725
726 if (ints & OHCI_INTR_WDH) {
727 if (HC_IS_RUNNING(hcd->state))
728 ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
729 spin_lock (&ohci->lock);
730 dl_done_list (ohci, ptregs);
731 spin_unlock (&ohci->lock);
732 if (HC_IS_RUNNING(hcd->state))
733 ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
734 }
735
736 /* could track INTR_SO to reduce available PCI/... bandwidth */
737
738 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
739 * when there's still unlinking to be done (next frame).
740 */
741 spin_lock (&ohci->lock);
742 if (ohci->ed_rm_list)
743 finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
744 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
745 && HC_IS_RUNNING(hcd->state))
746 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
747 spin_unlock (&ohci->lock);
748
749 if (HC_IS_RUNNING(hcd->state)) {
750 ohci_writel (ohci, ints, &regs->intrstatus);
751 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
752 // flush those writes
753 (void) ohci_readl (ohci, &ohci->regs->control);
754 }
755
756 return IRQ_HANDLED;
757}
758
759/*-------------------------------------------------------------------------*/
760
761static void ohci_stop (struct usb_hcd *hcd)
762{
763 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
764
765 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
766 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
767 hcd->state);
768 ohci_dump (ohci, 1);
769
770 flush_scheduled_work();
771
772 ohci_usb_reset (ohci);
773 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
774
775 remove_debug_files (ohci);
f4df0e33 776 unregister_reboot_notifier (&ohci->reboot_notifier);
1da177e4
LT		 777 ohci_mem_cleanup (ohci);
778 if (ohci->hcca) {
779 dma_free_coherent (hcd->self.controller,
780 sizeof *ohci->hcca,
781 ohci->hcca, ohci->hcca_dma);
782 ohci->hcca = NULL;
783 ohci->hcca_dma = 0;
784 }
785}
786
787/*-------------------------------------------------------------------------*/
788
789/* must not be called from interrupt context */
790
8ad7fe16 791#ifdef CONFIG_PM
1da177e4
LT		 792
793static int ohci_restart (struct ohci_hcd *ohci)
794{
795 int temp;
796 int i;
797 struct urb_priv *priv;
1da177e4
LT		 798
799 /* mark any devices gone, so they do nothing till khubd disconnects.
800 * recycle any "live" eds/tds (and urbs) right away.
801 * later, khubd disconnect processing will recycle the other state,
802 * (either as disconnect/reconnect, or maybe someday as a reset).
803 */
804 spin_lock_irq(&ohci->lock);
805 disable (ohci);
1c50c317 806 usb_root_hub_lost_power(ohci_to_hcd(ohci)->self.root_hub);
1da177e4
LT		 807 if (!list_empty (&ohci->pending))
808 ohci_dbg(ohci, "abort schedule...\n");
809 list_for_each_entry (priv, &ohci->pending, pending) {
810 struct urb *urb = priv->td[0]->urb;
811 struct ed *ed = priv->ed;
812
813 switch (ed->state) {
814 case ED_OPER:
815 ed->state = ED_UNLINK;
816 ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
817 ed_deschedule (ohci, ed);
818
819 ed->ed_next = ohci->ed_rm_list;
820 ed->ed_prev = NULL;
821 ohci->ed_rm_list = ed;
822 /* FALLTHROUGH */
823 case ED_UNLINK:
824 break;
825 default:
826 ohci_dbg(ohci, "bogus ed %p state %d\n",
827 ed, ed->state);
828 }
829
830 spin_lock (&urb->lock);
831 urb->status = -ESHUTDOWN;
832 spin_unlock (&urb->lock);
833 }
834 finish_unlinks (ohci, 0, NULL);
835 spin_unlock_irq(&ohci->lock);
836
837 /* paranoia, in case that didn't work: */
838
839 /* empty the interrupt branches */
840 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
841 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
842
843 /* no EDs to remove */
844 ohci->ed_rm_list = NULL;
845
846 /* empty control and bulk lists */
847 ohci->ed_controltail = NULL;
848 ohci->ed_bulktail = NULL;
849
850 if ((temp = ohci_run (ohci)) < 0) {
851 ohci_err (ohci, "can't restart, %d\n", temp);
852 return temp;
853 } else {
854 /* here we "know" root ports should always stay powered,
855 * and that if we try to turn them back on the root hub
856 * will respond to CSC processing.
857 */
fdd13b36 858 i = ohci->num_ports;
1da177e4
LT		 859 while (i--)
860 ohci_writel (ohci, RH_PS_PSS,
861 &ohci->regs->roothub.portstatus [temp]);
862 ohci_dbg (ohci, "restart complete\n");
863 }
864 return 0;
865}
866#endif
867
868/*-------------------------------------------------------------------------*/
869
870#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
871
872MODULE_AUTHOR (DRIVER_AUTHOR);
873MODULE_DESCRIPTION (DRIVER_INFO);
874MODULE_LICENSE ("GPL");
875
876#ifdef CONFIG_PCI
877#include "ohci-pci.c"
878#endif
879
880#ifdef CONFIG_SA1111
881#include "ohci-sa1111.c"
882#endif
883
3eb0c5f4
BD		 884#ifdef CONFIG_ARCH_S3C2410
885#include "ohci-s3c2410.c"
886#endif
887
1da177e4
LT		 888#ifdef CONFIG_ARCH_OMAP
889#include "ohci-omap.c"
890#endif
891
892#ifdef CONFIG_ARCH_LH7A404
893#include "ohci-lh7a404.c"
894#endif
895
896#ifdef CONFIG_PXA27x
897#include "ohci-pxa27x.c"
898#endif
899
900#ifdef CONFIG_SOC_AU1X00
901#include "ohci-au1xxx.c"
902#endif
903
904#ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
905#include "ohci-ppc-soc.c"
906#endif
907
908#if !(defined(CONFIG_PCI) \
909 || defined(CONFIG_SA1111) \
3eb0c5f4 910 || defined(CONFIG_ARCH_S3C2410) \
1da177e4
LT		 911 || defined(CONFIG_ARCH_OMAP) \
912 || defined (CONFIG_ARCH_LH7A404) \
913 || defined (CONFIG_PXA27x) \
914 || defined (CONFIG_SOC_AU1X00) \
915 || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \
916 )
917#error "missing bus glue for ohci-hcd"
918#endif
Ubuntu Hirsute Linux kernel mirror