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Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2005 David Brownell | |
6 | * (C) Copyright 2002 Hewlett-Packard Company | |
bd35078f | 7 | * |
1da177e4 LT |
8 | * OMAP Bus Glue |
9 | * | |
10 | * Modified for OMAP by Tony Lindgren <tony@atomide.com> | |
11 | * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. | |
12 | * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> | |
13 | * | |
14 | * This file is licenced under the GPL. | |
15 | */ | |
16 | ||
d54b5caa | 17 | #include <linux/signal.h> /* IRQF_DISABLED */ |
4e57b681 | 18 | #include <linux/jiffies.h> |
d052d1be | 19 | #include <linux/platform_device.h> |
f8ce2547 | 20 | #include <linux/clk.h> |
4e57b681 | 21 | |
1da177e4 LT |
22 | #include <asm/hardware.h> |
23 | #include <asm/io.h> | |
24 | #include <asm/mach-types.h> | |
25 | ||
1da177e4 LT |
26 | #include <asm/arch/mux.h> |
27 | #include <asm/arch/irqs.h> | |
28 | #include <asm/arch/gpio.h> | |
29 | #include <asm/arch/fpga.h> | |
30 | #include <asm/arch/usb.h> | |
1da177e4 LT |
31 | |
32 | ||
33 | /* OMAP-1510 OHCI has its own MMU for DMA */ | |
34 | #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ | |
35 | #define OMAP1510_LB_CLOCK_DIV 0xfffec10c | |
36 | #define OMAP1510_LB_MMU_CTL 0xfffec208 | |
37 | #define OMAP1510_LB_MMU_LCK 0xfffec224 | |
38 | #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 | |
39 | #define OMAP1510_LB_MMU_CAM_H 0xfffec22c | |
40 | #define OMAP1510_LB_MMU_CAM_L 0xfffec230 | |
41 | #define OMAP1510_LB_MMU_RAM_H 0xfffec234 | |
42 | #define OMAP1510_LB_MMU_RAM_L 0xfffec238 | |
43 | ||
44 | ||
45 | #ifndef CONFIG_ARCH_OMAP | |
46 | #error "This file is OMAP bus glue. CONFIG_OMAP must be defined." | |
47 | #endif | |
48 | ||
49 | #ifdef CONFIG_TPS65010 | |
6d16bfb5 | 50 | #include <linux/i2c/tps65010.h> |
1da177e4 LT |
51 | #else |
52 | ||
53 | #define LOW 0 | |
54 | #define HIGH 1 | |
55 | ||
56 | #define GPIO1 1 | |
57 | ||
58 | static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) | |
59 | { | |
60 | return 0; | |
61 | } | |
62 | ||
63 | #endif | |
64 | ||
65 | extern int usb_disabled(void); | |
66 | extern int ocpi_enable(void); | |
67 | ||
68 | static struct clk *usb_host_ck; | |
bd35078f DB |
69 | static struct clk *usb_dc_ck; |
70 | static int host_enabled; | |
71 | static int host_initialized; | |
1da177e4 LT |
72 | |
73 | static void omap_ohci_clock_power(int on) | |
74 | { | |
75 | if (on) { | |
bd35078f | 76 | clk_enable(usb_dc_ck); |
1da177e4 LT |
77 | clk_enable(usb_host_ck); |
78 | /* guesstimate for T5 == 1x 32K clock + APLL lock time */ | |
79 | udelay(100); | |
80 | } else { | |
81 | clk_disable(usb_host_ck); | |
bd35078f | 82 | clk_disable(usb_dc_ck); |
1da177e4 LT |
83 | } |
84 | } | |
85 | ||
86 | /* | |
87 | * Board specific gang-switched transceiver power on/off. | |
88 | * NOTE: OSK supplies power from DC, not battery. | |
89 | */ | |
90 | static int omap_ohci_transceiver_power(int on) | |
91 | { | |
92 | if (on) { | |
93 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
94 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
bd35078f | 95 | | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
96 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
97 | else if (machine_is_omap_osk()) | |
98 | tps65010_set_gpio_out_value(GPIO1, LOW); | |
99 | } else { | |
100 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
101 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
bd35078f | 102 | & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
103 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
104 | else if (machine_is_omap_osk()) | |
105 | tps65010_set_gpio_out_value(GPIO1, HIGH); | |
106 | } | |
107 | ||
108 | return 0; | |
109 | } | |
110 | ||
bd35078f | 111 | #ifdef CONFIG_ARCH_OMAP15XX |
1da177e4 LT |
112 | /* |
113 | * OMAP-1510 specific Local Bus clock on/off | |
114 | */ | |
115 | static int omap_1510_local_bus_power(int on) | |
116 | { | |
117 | if (on) { | |
118 | omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); | |
119 | udelay(200); | |
120 | } else { | |
121 | omap_writel(0, OMAP1510_LB_MMU_CTL); | |
122 | } | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | /* | |
128 | * OMAP-1510 specific Local Bus initialization | |
129 | * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. | |
bd35078f DB |
130 | * See also arch/mach-omap/memory.h for __virt_to_dma() and |
131 | * __dma_to_virt() which need to match with the physical | |
1da177e4 LT |
132 | * Local Bus address below. |
133 | */ | |
134 | static int omap_1510_local_bus_init(void) | |
135 | { | |
136 | unsigned int tlb; | |
137 | unsigned long lbaddr, physaddr; | |
138 | ||
bd35078f | 139 | omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, |
1da177e4 LT |
140 | OMAP1510_LB_CLOCK_DIV); |
141 | ||
142 | /* Configure the Local Bus MMU table */ | |
143 | for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { | |
144 | lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; | |
145 | physaddr = tlb * 0x00100000 + PHYS_OFFSET; | |
146 | omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); | |
bd35078f | 147 | omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, |
1da177e4 LT |
148 | OMAP1510_LB_MMU_CAM_L); |
149 | omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); | |
150 | omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); | |
151 | omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); | |
152 | omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); | |
153 | } | |
154 | ||
155 | /* Enable the walking table */ | |
156 | omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); | |
157 | udelay(200); | |
158 | ||
159 | return 0; | |
160 | } | |
bd35078f DB |
161 | #else |
162 | #define omap_1510_local_bus_power(x) {} | |
163 | #define omap_1510_local_bus_init() {} | |
164 | #endif | |
1da177e4 LT |
165 | |
166 | #ifdef CONFIG_USB_OTG | |
167 | ||
168 | static void start_hnp(struct ohci_hcd *ohci) | |
169 | { | |
170 | const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1; | |
171 | unsigned long flags; | |
f35ae634 | 172 | u32 l; |
1da177e4 LT |
173 | |
174 | otg_start_hnp(ohci->transceiver); | |
175 | ||
176 | local_irq_save(flags); | |
177 | ohci->transceiver->state = OTG_STATE_A_SUSPEND; | |
178 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); | |
f35ae634 TL |
179 | l = omap_readl(OTG_CTRL); |
180 | l &= ~OTG_A_BUSREQ; | |
181 | omap_writel(l, OTG_CTRL); | |
1da177e4 LT |
182 | local_irq_restore(flags); |
183 | } | |
184 | ||
185 | #endif | |
186 | ||
187 | /*-------------------------------------------------------------------------*/ | |
188 | ||
bd35078f | 189 | static int ohci_omap_init(struct usb_hcd *hcd) |
1da177e4 | 190 | { |
bd35078f DB |
191 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
192 | struct omap_usb_config *config = hcd->self.controller->platform_data; | |
1da177e4 LT |
193 | int need_transceiver = (config->otg != 0); |
194 | int ret; | |
195 | ||
bd35078f | 196 | dev_dbg(hcd->self.controller, "starting USB Controller\n"); |
1da177e4 LT |
197 | |
198 | if (config->otg) { | |
199 | ohci_to_hcd(ohci)->self.otg_port = config->otg; | |
200 | /* default/minimum OTG power budget: 8 mA */ | |
bc96c0ad | 201 | ohci_to_hcd(ohci)->power_budget = 8; |
1da177e4 LT |
202 | } |
203 | ||
204 | /* boards can use OTG transceivers in non-OTG modes */ | |
205 | need_transceiver = need_transceiver | |
206 | || machine_is_omap_h2() || machine_is_omap_h3(); | |
207 | ||
208 | if (cpu_is_omap16xx()) | |
209 | ocpi_enable(); | |
210 | ||
211 | #ifdef CONFIG_ARCH_OMAP_OTG | |
212 | if (need_transceiver) { | |
213 | ohci->transceiver = otg_get_transceiver(); | |
214 | if (ohci->transceiver) { | |
215 | int status = otg_set_host(ohci->transceiver, | |
216 | &ohci_to_hcd(ohci)->self); | |
bd35078f | 217 | dev_dbg(hcd->self.controller, "init %s transceiver, status %d\n", |
1da177e4 LT |
218 | ohci->transceiver->label, status); |
219 | if (status) { | |
220 | if (ohci->transceiver) | |
221 | put_device(ohci->transceiver->dev); | |
222 | return status; | |
223 | } | |
224 | } else { | |
bd35078f | 225 | dev_err(hcd->self.controller, "can't find transceiver\n"); |
1da177e4 LT |
226 | return -ENODEV; |
227 | } | |
228 | } | |
229 | #endif | |
230 | ||
231 | omap_ohci_clock_power(1); | |
232 | ||
233 | if (cpu_is_omap1510()) { | |
234 | omap_1510_local_bus_power(1); | |
235 | omap_1510_local_bus_init(); | |
236 | } | |
237 | ||
238 | if ((ret = ohci_init(ohci)) < 0) | |
239 | return ret; | |
240 | ||
241 | /* board-specific power switching and overcurrent support */ | |
242 | if (machine_is_omap_osk() || machine_is_omap_innovator()) { | |
243 | u32 rh = roothub_a (ohci); | |
244 | ||
245 | /* power switching (ganged by default) */ | |
246 | rh &= ~RH_A_NPS; | |
247 | ||
248 | /* TPS2045 switch for internal transceiver (port 1) */ | |
249 | if (machine_is_omap_osk()) { | |
bc96c0ad | 250 | ohci_to_hcd(ohci)->power_budget = 250; |
1da177e4 LT |
251 | |
252 | rh &= ~RH_A_NOCP; | |
253 | ||
254 | /* gpio9 for overcurrent detction */ | |
255 | omap_cfg_reg(W8_1610_GPIO9); | |
256 | omap_request_gpio(9); | |
257 | omap_set_gpio_direction(9, 1 /* IN */); | |
258 | ||
259 | /* for paranoia's sake: disable USB.PUEN */ | |
260 | omap_cfg_reg(W4_USB_HIGHZ); | |
261 | } | |
262 | ohci_writel(ohci, rh, &ohci->regs->roothub.a); | |
263 | distrust_firmware = 0; | |
bd35078f DB |
264 | } else if (machine_is_nokia770()) { |
265 | /* We require a self-powered hub, which should have | |
266 | * plenty of power. */ | |
267 | ohci_to_hcd(ohci)->power_budget = 0; | |
1da177e4 LT |
268 | } |
269 | ||
270 | /* FIXME khubd hub requests should manage power switching */ | |
271 | omap_ohci_transceiver_power(1); | |
272 | ||
273 | /* board init will have already handled HMC and mux setup. | |
274 | * any external transceiver should already be initialized | |
275 | * too, so all configured ports use the right signaling now. | |
276 | */ | |
277 | ||
278 | return 0; | |
279 | } | |
280 | ||
bd35078f | 281 | static void ohci_omap_stop(struct usb_hcd *hcd) |
1da177e4 | 282 | { |
bd35078f | 283 | dev_dbg(hcd->self.controller, "stopping USB Controller\n"); |
1da177e4 LT |
284 | omap_ohci_clock_power(0); |
285 | } | |
286 | ||
287 | ||
288 | /*-------------------------------------------------------------------------*/ | |
289 | ||
1da177e4 LT |
290 | /** |
291 | * usb_hcd_omap_probe - initialize OMAP-based HCDs | |
292 | * Context: !in_interrupt() | |
293 | * | |
294 | * Allocates basic resources for this USB host controller, and | |
295 | * then invokes the start() method for the HCD associated with it | |
296 | * through the hotplug entry's driver_data. | |
297 | */ | |
bd35078f | 298 | static int usb_hcd_omap_probe (const struct hc_driver *driver, |
1da177e4 LT |
299 | struct platform_device *pdev) |
300 | { | |
48944738 | 301 | int retval, irq; |
1da177e4 LT |
302 | struct usb_hcd *hcd = 0; |
303 | struct ohci_hcd *ohci; | |
304 | ||
305 | if (pdev->num_resources != 2) { | |
bd35078f | 306 | printk(KERN_ERR "hcd probe: invalid num_resources: %i\n", |
1da177e4 LT |
307 | pdev->num_resources); |
308 | return -ENODEV; | |
309 | } | |
310 | ||
bd35078f | 311 | if (pdev->resource[0].flags != IORESOURCE_MEM |
1da177e4 LT |
312 | || pdev->resource[1].flags != IORESOURCE_IRQ) { |
313 | printk(KERN_ERR "hcd probe: invalid resource type\n"); | |
314 | return -ENODEV; | |
315 | } | |
316 | ||
317 | usb_host_ck = clk_get(0, "usb_hhc_ck"); | |
318 | if (IS_ERR(usb_host_ck)) | |
319 | return PTR_ERR(usb_host_ck); | |
320 | ||
bd35078f DB |
321 | if (!cpu_is_omap1510()) |
322 | usb_dc_ck = clk_get(0, "usb_dc_ck"); | |
323 | else | |
324 | usb_dc_ck = clk_get(0, "lb_ck"); | |
325 | ||
326 | if (IS_ERR(usb_dc_ck)) { | |
327 | clk_put(usb_host_ck); | |
328 | return PTR_ERR(usb_dc_ck); | |
329 | } | |
330 | ||
331 | ||
1da177e4 LT |
332 | hcd = usb_create_hcd (driver, &pdev->dev, pdev->dev.bus_id); |
333 | if (!hcd) { | |
334 | retval = -ENOMEM; | |
335 | goto err0; | |
336 | } | |
337 | hcd->rsrc_start = pdev->resource[0].start; | |
338 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | |
339 | ||
340 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | |
341 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); | |
342 | retval = -EBUSY; | |
343 | goto err1; | |
344 | } | |
345 | ||
346 | hcd->regs = (void __iomem *) (int) IO_ADDRESS(hcd->rsrc_start); | |
347 | ||
348 | ohci = hcd_to_ohci(hcd); | |
349 | ohci_hcd_init(ohci); | |
350 | ||
bd35078f DB |
351 | host_initialized = 0; |
352 | host_enabled = 1; | |
1da177e4 | 353 | |
48944738 DV |
354 | irq = platform_get_irq(pdev, 0); |
355 | if (irq < 0) { | |
356 | retval = -ENXIO; | |
357 | goto err2; | |
358 | } | |
d54b5caa | 359 | retval = usb_add_hcd(hcd, irq, IRQF_DISABLED); |
bd35078f DB |
360 | if (retval) |
361 | goto err2; | |
362 | ||
363 | host_initialized = 1; | |
364 | ||
365 | if (!host_enabled) | |
366 | omap_ohci_clock_power(0); | |
1da177e4 | 367 | |
bd35078f | 368 | return 0; |
1da177e4 LT |
369 | err2: |
370 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
371 | err1: | |
372 | usb_put_hcd(hcd); | |
373 | err0: | |
bd35078f | 374 | clk_put(usb_dc_ck); |
1da177e4 LT |
375 | clk_put(usb_host_ck); |
376 | return retval; | |
377 | } | |
378 | ||
379 | ||
380 | /* may be called with controller, bus, and devices active */ | |
381 | ||
382 | /** | |
383 | * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs | |
384 | * @dev: USB Host Controller being removed | |
385 | * Context: !in_interrupt() | |
386 | * | |
387 | * Reverses the effect of usb_hcd_omap_probe(), first invoking | |
388 | * the HCD's stop() method. It is always called from a thread | |
389 | * context, normally "rmmod", "apmd", or something similar. | |
1da177e4 | 390 | */ |
bd35078f DB |
391 | static inline void |
392 | usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev) | |
1da177e4 | 393 | { |
bd35078f DB |
394 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
395 | ||
1da177e4 | 396 | usb_remove_hcd(hcd); |
bd35078f DB |
397 | if (ohci->transceiver) { |
398 | (void) otg_set_host(ohci->transceiver, 0); | |
399 | put_device(ohci->transceiver->dev); | |
400 | } | |
1da177e4 LT |
401 | if (machine_is_omap_osk()) |
402 | omap_free_gpio(9); | |
1da177e4 LT |
403 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
404 | usb_put_hcd(hcd); | |
bd35078f | 405 | clk_put(usb_dc_ck); |
1da177e4 LT |
406 | clk_put(usb_host_ck); |
407 | } | |
408 | ||
409 | /*-------------------------------------------------------------------------*/ | |
410 | ||
bd35078f | 411 | static int |
1da177e4 LT |
412 | ohci_omap_start (struct usb_hcd *hcd) |
413 | { | |
414 | struct omap_usb_config *config; | |
415 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
416 | int ret; | |
417 | ||
bd35078f DB |
418 | if (!host_enabled) |
419 | return 0; | |
1da177e4 | 420 | config = hcd->self.controller->platform_data; |
d413984a DB |
421 | if (config->otg || config->rwc) { |
422 | ohci->hc_control = OHCI_CTRL_RWC; | |
1da177e4 | 423 | writel(OHCI_CTRL_RWC, &ohci->regs->control); |
d413984a | 424 | } |
1da177e4 LT |
425 | |
426 | if ((ret = ohci_run (ohci)) < 0) { | |
427 | dev_err(hcd->self.controller, "can't start\n"); | |
428 | ohci_stop (hcd); | |
429 | return ret; | |
430 | } | |
431 | return 0; | |
432 | } | |
433 | ||
434 | /*-------------------------------------------------------------------------*/ | |
435 | ||
436 | static const struct hc_driver ohci_omap_hc_driver = { | |
437 | .description = hcd_name, | |
438 | .product_desc = "OMAP OHCI", | |
439 | .hcd_priv_size = sizeof(struct ohci_hcd), | |
440 | ||
441 | /* | |
442 | * generic hardware linkage | |
443 | */ | |
444 | .irq = ohci_irq, | |
445 | .flags = HCD_USB11 | HCD_MEMORY, | |
446 | ||
447 | /* | |
448 | * basic lifecycle operations | |
449 | */ | |
bd35078f | 450 | .reset = ohci_omap_init, |
1da177e4 | 451 | .start = ohci_omap_start, |
bd35078f | 452 | .stop = ohci_omap_stop, |
dd9048af | 453 | .shutdown = ohci_shutdown, |
1da177e4 LT |
454 | |
455 | /* | |
456 | * managing i/o requests and associated device resources | |
457 | */ | |
458 | .urb_enqueue = ohci_urb_enqueue, | |
459 | .urb_dequeue = ohci_urb_dequeue, | |
460 | .endpoint_disable = ohci_endpoint_disable, | |
461 | ||
462 | /* | |
463 | * scheduling support | |
464 | */ | |
465 | .get_frame_number = ohci_get_frame, | |
466 | ||
467 | /* | |
468 | * root hub support | |
469 | */ | |
470 | .hub_status_data = ohci_hub_status_data, | |
471 | .hub_control = ohci_hub_control, | |
09ca8adb | 472 | .hub_irq_enable = ohci_rhsc_enable, |
8ad7fe16 | 473 | #ifdef CONFIG_PM |
0c0382e3 AS |
474 | .bus_suspend = ohci_bus_suspend, |
475 | .bus_resume = ohci_bus_resume, | |
1da177e4 LT |
476 | #endif |
477 | .start_port_reset = ohci_start_port_reset, | |
478 | }; | |
479 | ||
480 | /*-------------------------------------------------------------------------*/ | |
481 | ||
3ae5eaec | 482 | static int ohci_hcd_omap_drv_probe(struct platform_device *dev) |
1da177e4 | 483 | { |
3ae5eaec | 484 | return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev); |
1da177e4 LT |
485 | } |
486 | ||
3ae5eaec | 487 | static int ohci_hcd_omap_drv_remove(struct platform_device *dev) |
1da177e4 | 488 | { |
3ae5eaec | 489 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 | 490 | |
3ae5eaec | 491 | usb_hcd_omap_remove(hcd, dev); |
3ae5eaec | 492 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
493 | |
494 | return 0; | |
495 | } | |
496 | ||
497 | /*-------------------------------------------------------------------------*/ | |
498 | ||
499 | #ifdef CONFIG_PM | |
500 | ||
3ae5eaec | 501 | static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message) |
1da177e4 | 502 | { |
3ae5eaec | 503 | struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev)); |
f197b2c5 DB |
504 | |
505 | if (time_before(jiffies, ohci->next_statechange)) | |
506 | msleep(5); | |
507 | ohci->next_statechange = jiffies; | |
508 | ||
509 | omap_ohci_clock_power(0); | |
510 | ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED; | |
f197b2c5 | 511 | return 0; |
1da177e4 LT |
512 | } |
513 | ||
3ae5eaec | 514 | static int ohci_omap_resume(struct platform_device *dev) |
1da177e4 | 515 | { |
43bbb7e0 AS |
516 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
517 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
1da177e4 | 518 | |
b404a5b0 DB |
519 | if (time_before(jiffies, ohci->next_statechange)) |
520 | msleep(5); | |
521 | ohci->next_statechange = jiffies; | |
f197b2c5 | 522 | |
b404a5b0 | 523 | omap_ohci_clock_power(1); |
43bbb7e0 | 524 | ohci_finish_controller_resume(hcd); |
f197b2c5 | 525 | return 0; |
1da177e4 LT |
526 | } |
527 | ||
528 | #endif | |
529 | ||
530 | /*-------------------------------------------------------------------------*/ | |
531 | ||
532 | /* | |
533 | * Driver definition to register with the OMAP bus | |
534 | */ | |
3ae5eaec | 535 | static struct platform_driver ohci_hcd_omap_driver = { |
1da177e4 LT |
536 | .probe = ohci_hcd_omap_drv_probe, |
537 | .remove = ohci_hcd_omap_drv_remove, | |
dd9048af | 538 | .shutdown = usb_hcd_platform_shutdown, |
1da177e4 LT |
539 | #ifdef CONFIG_PM |
540 | .suspend = ohci_omap_suspend, | |
541 | .resume = ohci_omap_resume, | |
542 | #endif | |
3ae5eaec RK |
543 | .driver = { |
544 | .owner = THIS_MODULE, | |
545 | .name = "ohci", | |
546 | }, | |
1da177e4 LT |
547 | }; |
548 | ||
f4fce61d | 549 | MODULE_ALIAS("platform:ohci"); |