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1da177e4 LT |
1 | /* |
2 | * SL811HS HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * Copyright (C) 2004 Psion Teklogix (for NetBook PRO) | |
1e9a47b6 DB |
5 | * Copyright (C) 2004-2005 David Brownell |
6 | * | |
1da177e4 LT |
7 | * Periodic scheduling is based on Roman's OHCI code |
8 | * Copyright (C) 1999 Roman Weissgaerber | |
9 | * | |
10 | * The SL811HS controller handles host side USB (like the SL11H, but with | |
11 | * another register set and SOF generation) as well as peripheral side USB | |
12 | * (like the SL811S). This driver version doesn't implement the Gadget API | |
13 | * for the peripheral role; or OTG (that'd need much external circuitry). | |
14 | * | |
15 | * For documentation, see the SL811HS spec and the "SL811HS Embedded Host" | |
16 | * document (providing significant pieces missing from that spec); plus | |
17 | * the SL811S spec if you want peripheral side info. | |
1e9a47b6 | 18 | */ |
1da177e4 LT |
19 | |
20 | /* | |
21 | * Status: Passed basic stress testing, works with hubs, mice, keyboards, | |
22 | * and usb-storage. | |
23 | * | |
24 | * TODO: | |
25 | * - usb suspend/resume triggered by sl811 (with USB_SUSPEND) | |
26 | * - various issues noted in the code | |
27 | * - performance work; use both register banks; ... | |
28 | * - use urb->iso_frame_desc[] with ISO transfers | |
29 | */ | |
30 | ||
31 | #undef VERBOSE | |
32 | #undef PACKET_TRACE | |
33 | ||
1da177e4 LT |
34 | #include <linux/module.h> |
35 | #include <linux/moduleparam.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/delay.h> | |
38 | #include <linux/ioport.h> | |
39 | #include <linux/sched.h> | |
40 | #include <linux/slab.h> | |
1da177e4 LT |
41 | #include <linux/errno.h> |
42 | #include <linux/init.h> | |
43 | #include <linux/timer.h> | |
44 | #include <linux/list.h> | |
45 | #include <linux/interrupt.h> | |
46 | #include <linux/usb.h> | |
325a4af6 | 47 | #include <linux/usb/sl811.h> |
d052d1be | 48 | #include <linux/platform_device.h> |
1da177e4 LT |
49 | |
50 | #include <asm/io.h> | |
51 | #include <asm/irq.h> | |
52 | #include <asm/system.h> | |
53 | #include <asm/byteorder.h> | |
54 | ||
55 | #include "../core/hcd.h" | |
56 | #include "sl811.h" | |
57 | ||
58 | ||
59 | MODULE_DESCRIPTION("SL811HS USB Host Controller Driver"); | |
60 | MODULE_LICENSE("GPL"); | |
f4fce61d | 61 | MODULE_ALIAS("platform:sl811-hcd"); |
1da177e4 | 62 | |
1e9a47b6 | 63 | #define DRIVER_VERSION "19 May 2005" |
1da177e4 LT |
64 | |
65 | ||
66 | #ifndef DEBUG | |
67 | # define STUB_DEBUG_FILE | |
68 | #endif | |
69 | ||
70 | /* for now, use only one transfer register bank */ | |
71 | #undef USE_B | |
72 | ||
73 | /* this doesn't understand urb->iso_frame_desc[], but if you had a driver | |
74 | * that just queued one ISO frame per URB then iso transfers "should" work | |
75 | * using the normal urb status fields. | |
76 | */ | |
77 | #define DISABLE_ISO | |
78 | ||
79 | // #define QUIRK2 | |
80 | #define QUIRK3 | |
81 | ||
82 | static const char hcd_name[] = "sl811-hcd"; | |
83 | ||
84 | /*-------------------------------------------------------------------------*/ | |
85 | ||
86 | static void port_power(struct sl811 *sl811, int is_on) | |
87 | { | |
88 | struct usb_hcd *hcd = sl811_to_hcd(sl811); | |
89 | ||
90 | /* hub is inactive unless the port is powered */ | |
91 | if (is_on) { | |
92 | if (sl811->port1 & (1 << USB_PORT_FEAT_POWER)) | |
93 | return; | |
94 | ||
95 | sl811->port1 = (1 << USB_PORT_FEAT_POWER); | |
96 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
1da177e4 LT |
97 | } else { |
98 | sl811->port1 = 0; | |
99 | sl811->irq_enable = 0; | |
100 | hcd->state = HC_STATE_HALT; | |
1da177e4 LT |
101 | } |
102 | sl811->ctrl1 = 0; | |
103 | sl811_write(sl811, SL11H_IRQ_ENABLE, 0); | |
104 | sl811_write(sl811, SL11H_IRQ_STATUS, ~0); | |
105 | ||
106 | if (sl811->board && sl811->board->port_power) { | |
107 | /* switch VBUS, at 500mA unless hub power budget gets set */ | |
108 | DBG("power %s\n", is_on ? "on" : "off"); | |
109 | sl811->board->port_power(hcd->self.controller, is_on); | |
110 | } | |
111 | ||
112 | /* reset as thoroughly as we can */ | |
113 | if (sl811->board && sl811->board->reset) | |
114 | sl811->board->reset(hcd->self.controller); | |
1e9a47b6 DB |
115 | else { |
116 | sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0); | |
117 | mdelay(20); | |
118 | } | |
1da177e4 LT |
119 | |
120 | sl811_write(sl811, SL11H_IRQ_ENABLE, 0); | |
121 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
122 | sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT); | |
123 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
124 | ||
125 | // if !is_on, put into lowpower mode now | |
126 | } | |
127 | ||
128 | /*-------------------------------------------------------------------------*/ | |
129 | ||
130 | /* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue, | |
131 | * and may start I/O. Endpoint queues are scanned during completion irq | |
093cf723 | 132 | * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation. |
1da177e4 LT |
133 | * |
134 | * Using an external DMA engine to copy a packet at a time could work, | |
135 | * though setup/teardown costs may be too big to make it worthwhile. | |
136 | */ | |
137 | ||
138 | /* SETUP starts a new control request. Devices are not allowed to | |
139 | * STALL or NAK these; they must cancel any pending control requests. | |
140 | */ | |
141 | static void setup_packet( | |
142 | struct sl811 *sl811, | |
143 | struct sl811h_ep *ep, | |
144 | struct urb *urb, | |
145 | u8 bank, | |
146 | u8 control | |
147 | ) | |
148 | { | |
149 | u8 addr; | |
150 | u8 len; | |
151 | void __iomem *data_reg; | |
152 | ||
153 | addr = SL811HS_PACKET_BUF(bank == 0); | |
154 | len = sizeof(struct usb_ctrlrequest); | |
155 | data_reg = sl811->data_reg; | |
156 | sl811_write_buf(sl811, addr, urb->setup_packet, len); | |
157 | ||
158 | /* autoincrementing */ | |
159 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
160 | writeb(len, data_reg); | |
161 | writeb(SL_SETUP /* | ep->epnum */, data_reg); | |
162 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
163 | ||
164 | /* always OUT/data0 */ ; | |
165 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, | |
166 | control | SL11H_HCTLMASK_OUT); | |
167 | ep->length = 0; | |
168 | PACKET("SETUP qh%p\n", ep); | |
169 | } | |
170 | ||
171 | /* STATUS finishes control requests, often after IN or OUT data packets */ | |
172 | static void status_packet( | |
173 | struct sl811 *sl811, | |
174 | struct sl811h_ep *ep, | |
175 | struct urb *urb, | |
176 | u8 bank, | |
177 | u8 control | |
178 | ) | |
179 | { | |
180 | int do_out; | |
181 | void __iomem *data_reg; | |
182 | ||
183 | do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe); | |
184 | data_reg = sl811->data_reg; | |
185 | ||
186 | /* autoincrementing */ | |
187 | sl811_write(sl811, bank + SL11H_BUFADDRREG, 0); | |
188 | writeb(0, data_reg); | |
189 | writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg); | |
190 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
191 | ||
192 | /* always data1; sometimes IN */ | |
193 | control |= SL11H_HCTLMASK_TOGGLE; | |
194 | if (do_out) | |
195 | control |= SL11H_HCTLMASK_OUT; | |
196 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); | |
197 | ep->length = 0; | |
198 | PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "", | |
199 | do_out ? "out" : "in", ep); | |
200 | } | |
201 | ||
202 | /* IN packets can be used with any type of endpoint. here we just | |
203 | * start the transfer, data from the peripheral may arrive later. | |
204 | * urb->iso_frame_desc is currently ignored here... | |
205 | */ | |
206 | static void in_packet( | |
207 | struct sl811 *sl811, | |
208 | struct sl811h_ep *ep, | |
209 | struct urb *urb, | |
210 | u8 bank, | |
211 | u8 control | |
212 | ) | |
213 | { | |
214 | u8 addr; | |
215 | u8 len; | |
216 | void __iomem *data_reg; | |
217 | ||
218 | /* avoid losing data on overflow */ | |
219 | len = ep->maxpacket; | |
220 | addr = SL811HS_PACKET_BUF(bank == 0); | |
221 | if (!(control & SL11H_HCTLMASK_ISOCH) | |
222 | && usb_gettoggle(urb->dev, ep->epnum, 0)) | |
223 | control |= SL11H_HCTLMASK_TOGGLE; | |
224 | data_reg = sl811->data_reg; | |
225 | ||
226 | /* autoincrementing */ | |
227 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
228 | writeb(len, data_reg); | |
229 | writeb(SL_IN | ep->epnum, data_reg); | |
230 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
231 | ||
232 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); | |
233 | ep->length = min((int)len, | |
234 | urb->transfer_buffer_length - urb->actual_length); | |
235 | PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", | |
236 | !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len); | |
237 | } | |
238 | ||
239 | /* OUT packets can be used with any type of endpoint. | |
240 | * urb->iso_frame_desc is currently ignored here... | |
241 | */ | |
242 | static void out_packet( | |
243 | struct sl811 *sl811, | |
244 | struct sl811h_ep *ep, | |
245 | struct urb *urb, | |
246 | u8 bank, | |
247 | u8 control | |
248 | ) | |
249 | { | |
250 | void *buf; | |
251 | u8 addr; | |
252 | u8 len; | |
253 | void __iomem *data_reg; | |
254 | ||
255 | buf = urb->transfer_buffer + urb->actual_length; | |
256 | prefetch(buf); | |
257 | ||
258 | len = min((int)ep->maxpacket, | |
259 | urb->transfer_buffer_length - urb->actual_length); | |
260 | ||
261 | if (!(control & SL11H_HCTLMASK_ISOCH) | |
262 | && usb_gettoggle(urb->dev, ep->epnum, 1)) | |
263 | control |= SL11H_HCTLMASK_TOGGLE; | |
264 | addr = SL811HS_PACKET_BUF(bank == 0); | |
265 | data_reg = sl811->data_reg; | |
266 | ||
267 | sl811_write_buf(sl811, addr, buf, len); | |
268 | ||
269 | /* autoincrementing */ | |
270 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
271 | writeb(len, data_reg); | |
272 | writeb(SL_OUT | ep->epnum, data_reg); | |
273 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
274 | ||
275 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, | |
276 | control | SL11H_HCTLMASK_OUT); | |
277 | ep->length = len; | |
278 | PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", | |
279 | !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len); | |
280 | } | |
281 | ||
282 | /*-------------------------------------------------------------------------*/ | |
283 | ||
284 | /* caller updates on-chip enables later */ | |
285 | ||
286 | static inline void sofirq_on(struct sl811 *sl811) | |
287 | { | |
288 | if (sl811->irq_enable & SL11H_INTMASK_SOFINTR) | |
289 | return; | |
290 | VDBG("sof irq on\n"); | |
291 | sl811->irq_enable |= SL11H_INTMASK_SOFINTR; | |
292 | } | |
293 | ||
294 | static inline void sofirq_off(struct sl811 *sl811) | |
295 | { | |
296 | if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR)) | |
297 | return; | |
298 | VDBG("sof irq off\n"); | |
299 | sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR; | |
300 | } | |
301 | ||
302 | /*-------------------------------------------------------------------------*/ | |
303 | ||
304 | /* pick the next endpoint for a transaction, and issue it. | |
305 | * frames start with periodic transfers (after whatever is pending | |
306 | * from the previous frame), and the rest of the time is async | |
307 | * transfers, scheduled round-robin. | |
308 | */ | |
309 | static struct sl811h_ep *start(struct sl811 *sl811, u8 bank) | |
310 | { | |
311 | struct sl811h_ep *ep; | |
312 | struct urb *urb; | |
313 | int fclock; | |
314 | u8 control; | |
315 | ||
316 | /* use endpoint at schedule head */ | |
317 | if (sl811->next_periodic) { | |
318 | ep = sl811->next_periodic; | |
319 | sl811->next_periodic = ep->next; | |
320 | } else { | |
321 | if (sl811->next_async) | |
322 | ep = sl811->next_async; | |
323 | else if (!list_empty(&sl811->async)) | |
324 | ep = container_of(sl811->async.next, | |
325 | struct sl811h_ep, schedule); | |
326 | else { | |
327 | /* could set up the first fullspeed periodic | |
328 | * transfer for the next frame ... | |
329 | */ | |
330 | return NULL; | |
331 | } | |
332 | ||
333 | #ifdef USE_B | |
334 | if ((bank && sl811->active_b == ep) || sl811->active_a == ep) | |
335 | return NULL; | |
336 | #endif | |
337 | ||
338 | if (ep->schedule.next == &sl811->async) | |
339 | sl811->next_async = NULL; | |
340 | else | |
341 | sl811->next_async = container_of(ep->schedule.next, | |
342 | struct sl811h_ep, schedule); | |
343 | } | |
344 | ||
345 | if (unlikely(list_empty(&ep->hep->urb_list))) { | |
346 | DBG("empty %p queue?\n", ep); | |
347 | return NULL; | |
348 | } | |
349 | ||
350 | urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); | |
351 | control = ep->defctrl; | |
352 | ||
353 | /* if this frame doesn't have enough time left to transfer this | |
354 | * packet, wait till the next frame. too-simple algorithm... | |
355 | */ | |
356 | fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6; | |
357 | fclock -= 100; /* setup takes not much time */ | |
358 | if (urb->dev->speed == USB_SPEED_LOW) { | |
359 | if (control & SL11H_HCTLMASK_PREAMBLE) { | |
360 | /* also note erratum 1: some hubs won't work */ | |
361 | fclock -= 800; | |
362 | } | |
363 | fclock -= ep->maxpacket << 8; | |
364 | ||
365 | /* erratum 2: AFTERSOF only works for fullspeed */ | |
366 | if (fclock < 0) { | |
367 | if (ep->period) | |
368 | sl811->stat_overrun++; | |
369 | sofirq_on(sl811); | |
370 | return NULL; | |
371 | } | |
372 | } else { | |
373 | fclock -= 12000 / 19; /* 19 64byte packets/msec */ | |
374 | if (fclock < 0) { | |
375 | if (ep->period) | |
376 | sl811->stat_overrun++; | |
377 | control |= SL11H_HCTLMASK_AFTERSOF; | |
378 | ||
379 | /* throttle bulk/control irq noise */ | |
380 | } else if (ep->nak_count) | |
381 | control |= SL11H_HCTLMASK_AFTERSOF; | |
382 | } | |
383 | ||
384 | ||
385 | switch (ep->nextpid) { | |
386 | case USB_PID_IN: | |
387 | in_packet(sl811, ep, urb, bank, control); | |
388 | break; | |
389 | case USB_PID_OUT: | |
390 | out_packet(sl811, ep, urb, bank, control); | |
391 | break; | |
392 | case USB_PID_SETUP: | |
393 | setup_packet(sl811, ep, urb, bank, control); | |
394 | break; | |
395 | case USB_PID_ACK: /* for control status */ | |
396 | status_packet(sl811, ep, urb, bank, control); | |
397 | break; | |
398 | default: | |
399 | DBG("bad ep%p pid %02x\n", ep, ep->nextpid); | |
400 | ep = NULL; | |
401 | } | |
402 | return ep; | |
403 | } | |
404 | ||
405 | #define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2) | |
406 | ||
407 | static inline void start_transfer(struct sl811 *sl811) | |
408 | { | |
409 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) | |
410 | return; | |
411 | if (sl811->active_a == NULL) { | |
412 | sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF)); | |
413 | if (sl811->active_a != NULL) | |
414 | sl811->jiffies_a = jiffies + MIN_JIFFIES; | |
415 | } | |
416 | #ifdef USE_B | |
417 | if (sl811->active_b == NULL) { | |
418 | sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF)); | |
419 | if (sl811->active_b != NULL) | |
420 | sl811->jiffies_b = jiffies + MIN_JIFFIES; | |
421 | } | |
422 | #endif | |
423 | } | |
424 | ||
425 | static void finish_request( | |
426 | struct sl811 *sl811, | |
427 | struct sl811h_ep *ep, | |
428 | struct urb *urb, | |
1da177e4 LT |
429 | int status |
430 | ) __releases(sl811->lock) __acquires(sl811->lock) | |
431 | { | |
432 | unsigned i; | |
433 | ||
434 | if (usb_pipecontrol(urb->pipe)) | |
435 | ep->nextpid = USB_PID_SETUP; | |
436 | ||
e9df41c5 | 437 | usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb); |
1da177e4 | 438 | spin_unlock(&sl811->lock); |
4a00027d | 439 | usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status); |
1da177e4 LT |
440 | spin_lock(&sl811->lock); |
441 | ||
442 | /* leave active endpoints in the schedule */ | |
443 | if (!list_empty(&ep->hep->urb_list)) | |
444 | return; | |
445 | ||
446 | /* async deschedule? */ | |
447 | if (!list_empty(&ep->schedule)) { | |
448 | list_del_init(&ep->schedule); | |
449 | if (ep == sl811->next_async) | |
450 | sl811->next_async = NULL; | |
451 | return; | |
452 | } | |
453 | ||
454 | /* periodic deschedule */ | |
455 | DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch); | |
456 | for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { | |
457 | struct sl811h_ep *temp; | |
458 | struct sl811h_ep **prev = &sl811->periodic[i]; | |
459 | ||
460 | while (*prev && ((temp = *prev) != ep)) | |
461 | prev = &temp->next; | |
462 | if (*prev) | |
463 | *prev = ep->next; | |
464 | sl811->load[i] -= ep->load; | |
1e9a47b6 | 465 | } |
1da177e4 LT |
466 | ep->branch = PERIODIC_SIZE; |
467 | sl811->periodic_count--; | |
468 | sl811_to_hcd(sl811)->self.bandwidth_allocated | |
469 | -= ep->load / ep->period; | |
470 | if (ep == sl811->next_periodic) | |
471 | sl811->next_periodic = ep->next; | |
472 | ||
473 | /* we might turn SOFs back on again for the async schedule */ | |
474 | if (sl811->periodic_count == 0) | |
475 | sofirq_off(sl811); | |
476 | } | |
477 | ||
478 | static void | |
7d12e780 | 479 | done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank) |
1da177e4 LT |
480 | { |
481 | u8 status; | |
482 | struct urb *urb; | |
483 | int urbstat = -EINPROGRESS; | |
484 | ||
485 | if (unlikely(!ep)) | |
486 | return; | |
487 | ||
488 | status = sl811_read(sl811, bank + SL11H_PKTSTATREG); | |
489 | ||
490 | urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); | |
491 | ||
492 | /* we can safely ignore NAKs */ | |
493 | if (status & SL11H_STATMASK_NAK) { | |
494 | // PACKET("...NAK_%02x qh%p\n", bank, ep); | |
495 | if (!ep->period) | |
496 | ep->nak_count++; | |
497 | ep->error_count = 0; | |
498 | ||
499 | /* ACK advances transfer, toggle, and maybe queue */ | |
500 | } else if (status & SL11H_STATMASK_ACK) { | |
501 | struct usb_device *udev = urb->dev; | |
502 | int len; | |
503 | unsigned char *buf; | |
504 | ||
505 | /* urb->iso_frame_desc is currently ignored here... */ | |
506 | ||
507 | ep->nak_count = ep->error_count = 0; | |
508 | switch (ep->nextpid) { | |
509 | case USB_PID_OUT: | |
510 | // PACKET("...ACK/out_%02x qh%p\n", bank, ep); | |
511 | urb->actual_length += ep->length; | |
512 | usb_dotoggle(udev, ep->epnum, 1); | |
513 | if (urb->actual_length | |
514 | == urb->transfer_buffer_length) { | |
515 | if (usb_pipecontrol(urb->pipe)) | |
516 | ep->nextpid = USB_PID_ACK; | |
517 | ||
518 | /* some bulk protocols terminate OUT transfers | |
519 | * by a short packet, using ZLPs not padding. | |
520 | */ | |
521 | else if (ep->length < ep->maxpacket | |
522 | || !(urb->transfer_flags | |
523 | & URB_ZERO_PACKET)) | |
524 | urbstat = 0; | |
525 | } | |
526 | break; | |
527 | case USB_PID_IN: | |
528 | // PACKET("...ACK/in_%02x qh%p\n", bank, ep); | |
529 | buf = urb->transfer_buffer + urb->actual_length; | |
530 | prefetchw(buf); | |
531 | len = ep->maxpacket - sl811_read(sl811, | |
532 | bank + SL11H_XFERCNTREG); | |
533 | if (len > ep->length) { | |
534 | len = ep->length; | |
65e51098 | 535 | urbstat = -EOVERFLOW; |
1da177e4 LT |
536 | } |
537 | urb->actual_length += len; | |
538 | sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0), | |
539 | buf, len); | |
540 | usb_dotoggle(udev, ep->epnum, 0); | |
65e51098 AS |
541 | if (urbstat == -EINPROGRESS && |
542 | (len < ep->maxpacket || | |
543 | urb->actual_length == | |
544 | urb->transfer_buffer_length)) { | |
545 | if (usb_pipecontrol(urb->pipe)) | |
546 | ep->nextpid = USB_PID_ACK; | |
547 | else | |
548 | urbstat = 0; | |
1da177e4 LT |
549 | } |
550 | break; | |
551 | case USB_PID_SETUP: | |
552 | // PACKET("...ACK/setup_%02x qh%p\n", bank, ep); | |
553 | if (urb->transfer_buffer_length == urb->actual_length) | |
554 | ep->nextpid = USB_PID_ACK; | |
555 | else if (usb_pipeout(urb->pipe)) { | |
556 | usb_settoggle(udev, 0, 1, 1); | |
557 | ep->nextpid = USB_PID_OUT; | |
558 | } else { | |
559 | usb_settoggle(udev, 0, 0, 1); | |
560 | ep->nextpid = USB_PID_IN; | |
561 | } | |
562 | break; | |
563 | case USB_PID_ACK: | |
564 | // PACKET("...ACK/status_%02x qh%p\n", bank, ep); | |
565 | urbstat = 0; | |
566 | break; | |
567 | } | |
568 | ||
569 | /* STALL stops all transfers */ | |
570 | } else if (status & SL11H_STATMASK_STALL) { | |
571 | PACKET("...STALL_%02x qh%p\n", bank, ep); | |
572 | ep->nak_count = ep->error_count = 0; | |
573 | urbstat = -EPIPE; | |
574 | ||
575 | /* error? retry, until "3 strikes" */ | |
576 | } else if (++ep->error_count >= 3) { | |
577 | if (status & SL11H_STATMASK_TMOUT) | |
38e2bfc9 | 578 | urbstat = -ETIME; |
1da177e4 LT |
579 | else if (status & SL11H_STATMASK_OVF) |
580 | urbstat = -EOVERFLOW; | |
581 | else | |
582 | urbstat = -EPROTO; | |
583 | ep->error_count = 0; | |
584 | PACKET("...3STRIKES_%02x %02x qh%p stat %d\n", | |
585 | bank, status, ep, urbstat); | |
586 | } | |
587 | ||
65e51098 | 588 | if (urbstat != -EINPROGRESS || urb->unlinked) |
7d12e780 | 589 | finish_request(sl811, ep, urb, urbstat); |
1da177e4 LT |
590 | } |
591 | ||
592 | static inline u8 checkdone(struct sl811 *sl811) | |
593 | { | |
594 | u8 ctl; | |
595 | u8 irqstat = 0; | |
596 | ||
597 | if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) { | |
598 | ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)); | |
599 | if (ctl & SL11H_HCTLMASK_ARM) | |
600 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); | |
601 | DBG("%s DONE_A: ctrl %02x sts %02x\n", | |
602 | (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", | |
603 | ctl, | |
604 | sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); | |
605 | irqstat |= SL11H_INTMASK_DONE_A; | |
606 | } | |
607 | #ifdef USE_B | |
608 | if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) { | |
609 | ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)); | |
610 | if (ctl & SL11H_HCTLMASK_ARM) | |
611 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); | |
612 | DBG("%s DONE_B: ctrl %02x sts %02x\n", | |
613 | (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", | |
614 | ctl, | |
615 | sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); | |
616 | irqstat |= SL11H_INTMASK_DONE_A; | |
617 | } | |
618 | #endif | |
619 | return irqstat; | |
620 | } | |
621 | ||
7d12e780 | 622 | static irqreturn_t sl811h_irq(struct usb_hcd *hcd) |
1da177e4 LT |
623 | { |
624 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
625 | u8 irqstat; | |
626 | irqreturn_t ret = IRQ_NONE; | |
627 | unsigned retries = 5; | |
628 | ||
629 | spin_lock(&sl811->lock); | |
630 | ||
631 | retry: | |
632 | irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP; | |
633 | if (irqstat) { | |
634 | sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); | |
635 | irqstat &= sl811->irq_enable; | |
636 | } | |
637 | ||
638 | #ifdef QUIRK2 | |
639 | /* this may no longer be necessary ... */ | |
1e9a47b6 | 640 | if (irqstat == 0) { |
1da177e4 | 641 | irqstat = checkdone(sl811); |
1e9a47b6 | 642 | if (irqstat) |
1da177e4 LT |
643 | sl811->stat_lost++; |
644 | } | |
645 | #endif | |
646 | ||
647 | /* USB packets, not necessarily handled in the order they're | |
648 | * issued ... that's fine if they're different endpoints. | |
649 | */ | |
650 | if (irqstat & SL11H_INTMASK_DONE_A) { | |
7d12e780 | 651 | done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF)); |
1da177e4 LT |
652 | sl811->active_a = NULL; |
653 | sl811->stat_a++; | |
654 | } | |
655 | #ifdef USE_B | |
656 | if (irqstat & SL11H_INTMASK_DONE_B) { | |
7d12e780 | 657 | done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF)); |
1da177e4 LT |
658 | sl811->active_b = NULL; |
659 | sl811->stat_b++; | |
660 | } | |
661 | #endif | |
662 | if (irqstat & SL11H_INTMASK_SOFINTR) { | |
663 | unsigned index; | |
664 | ||
665 | index = sl811->frame++ % (PERIODIC_SIZE - 1); | |
666 | sl811->stat_sof++; | |
667 | ||
668 | /* be graceful about almost-inevitable periodic schedule | |
669 | * overruns: continue the previous frame's transfers iff | |
670 | * this one has nothing scheduled. | |
671 | */ | |
672 | if (sl811->next_periodic) { | |
673 | // ERR("overrun to slot %d\n", index); | |
674 | sl811->stat_overrun++; | |
675 | } | |
676 | if (sl811->periodic[index]) | |
677 | sl811->next_periodic = sl811->periodic[index]; | |
678 | } | |
679 | ||
680 | /* khubd manages debouncing and wakeup */ | |
681 | if (irqstat & SL11H_INTMASK_INSRMV) { | |
682 | sl811->stat_insrmv++; | |
683 | ||
684 | /* most stats are reset for each VBUS session */ | |
685 | sl811->stat_wake = 0; | |
686 | sl811->stat_sof = 0; | |
687 | sl811->stat_a = 0; | |
688 | sl811->stat_b = 0; | |
689 | sl811->stat_lost = 0; | |
690 | ||
691 | sl811->ctrl1 = 0; | |
692 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
693 | ||
694 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
695 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
696 | ||
697 | /* usbcore nukes other pending transactions on disconnect */ | |
698 | if (sl811->active_a) { | |
699 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); | |
700 | finish_request(sl811, sl811->active_a, | |
1e9a47b6 DB |
701 | container_of(sl811->active_a |
702 | ->hep->urb_list.next, | |
1da177e4 | 703 | struct urb, urb_list), |
7d12e780 | 704 | -ESHUTDOWN); |
1da177e4 LT |
705 | sl811->active_a = NULL; |
706 | } | |
707 | #ifdef USE_B | |
708 | if (sl811->active_b) { | |
709 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); | |
710 | finish_request(sl811, sl811->active_b, | |
1e9a47b6 DB |
711 | container_of(sl811->active_b |
712 | ->hep->urb_list.next, | |
1da177e4 LT |
713 | struct urb, urb_list), |
714 | NULL, -ESHUTDOWN); | |
715 | sl811->active_b = NULL; | |
716 | } | |
717 | #endif | |
718 | ||
093cf723 | 719 | /* port status seems weird until after reset, so |
1da177e4 LT |
720 | * force the reset and make khubd clean up later. |
721 | */ | |
722 | sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION) | |
723 | | (1 << USB_PORT_FEAT_CONNECTION); | |
724 | ||
725 | } else if (irqstat & SL11H_INTMASK_RD) { | |
726 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) { | |
727 | DBG("wakeup\n"); | |
728 | sl811->port1 |= 1 << USB_PORT_FEAT_C_SUSPEND; | |
729 | sl811->stat_wake++; | |
730 | } else | |
731 | irqstat &= ~SL11H_INTMASK_RD; | |
732 | } | |
733 | ||
734 | if (irqstat) { | |
735 | if (sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)) | |
736 | start_transfer(sl811); | |
737 | ret = IRQ_HANDLED; | |
738 | if (retries--) | |
739 | goto retry; | |
740 | } | |
741 | ||
1e9a47b6 | 742 | if (sl811->periodic_count == 0 && list_empty(&sl811->async)) |
1da177e4 LT |
743 | sofirq_off(sl811); |
744 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
745 | ||
746 | spin_unlock(&sl811->lock); | |
747 | ||
748 | return ret; | |
749 | } | |
750 | ||
751 | /*-------------------------------------------------------------------------*/ | |
752 | ||
753 | /* usb 1.1 says max 90% of a frame is available for periodic transfers. | |
754 | * this driver doesn't promise that much since it's got to handle an | |
755 | * IRQ per packet; irq handling latencies also use up that time. | |
4b2e790a DB |
756 | * |
757 | * NOTE: the periodic schedule is a sparse tree, with the load for | |
758 | * each branch minimized. see fig 3.5 in the OHCI spec for example. | |
1da177e4 LT |
759 | */ |
760 | #define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */ | |
761 | ||
762 | static int balance(struct sl811 *sl811, u16 period, u16 load) | |
763 | { | |
764 | int i, branch = -ENOSPC; | |
765 | ||
766 | /* search for the least loaded schedule branch of that period | |
767 | * which has enough bandwidth left unreserved. | |
768 | */ | |
769 | for (i = 0; i < period ; i++) { | |
770 | if (branch < 0 || sl811->load[branch] > sl811->load[i]) { | |
771 | int j; | |
772 | ||
773 | for (j = i; j < PERIODIC_SIZE; j += period) { | |
774 | if ((sl811->load[j] + load) | |
775 | > MAX_PERIODIC_LOAD) | |
776 | break; | |
777 | } | |
778 | if (j < PERIODIC_SIZE) | |
779 | continue; | |
1e9a47b6 | 780 | branch = i; |
1da177e4 LT |
781 | } |
782 | } | |
783 | return branch; | |
784 | } | |
785 | ||
786 | /*-------------------------------------------------------------------------*/ | |
787 | ||
788 | static int sl811h_urb_enqueue( | |
789 | struct usb_hcd *hcd, | |
1da177e4 | 790 | struct urb *urb, |
55016f10 | 791 | gfp_t mem_flags |
1da177e4 LT |
792 | ) { |
793 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
794 | struct usb_device *udev = urb->dev; | |
795 | unsigned int pipe = urb->pipe; | |
796 | int is_out = !usb_pipein(pipe); | |
797 | int type = usb_pipetype(pipe); | |
798 | int epnum = usb_pipeendpoint(pipe); | |
799 | struct sl811h_ep *ep = NULL; | |
800 | unsigned long flags; | |
801 | int i; | |
e9df41c5 AS |
802 | int retval; |
803 | struct usb_host_endpoint *hep = urb->ep; | |
1da177e4 LT |
804 | |
805 | #ifdef DISABLE_ISO | |
806 | if (type == PIPE_ISOCHRONOUS) | |
807 | return -ENOSPC; | |
808 | #endif | |
809 | ||
810 | /* avoid all allocations within spinlocks */ | |
811 | if (!hep->hcpriv) | |
7b842b6e | 812 | ep = kzalloc(sizeof *ep, mem_flags); |
1da177e4 LT |
813 | |
814 | spin_lock_irqsave(&sl811->lock, flags); | |
815 | ||
816 | /* don't submit to a dead or disabled port */ | |
817 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)) | |
818 | || !HC_IS_RUNNING(hcd->state)) { | |
819 | retval = -ENODEV; | |
4b2e790a | 820 | kfree(ep); |
e9df41c5 AS |
821 | goto fail_not_linked; |
822 | } | |
823 | retval = usb_hcd_link_urb_to_ep(hcd, urb); | |
824 | if (retval) { | |
825 | kfree(ep); | |
826 | goto fail_not_linked; | |
1da177e4 LT |
827 | } |
828 | ||
829 | if (hep->hcpriv) { | |
830 | kfree(ep); | |
831 | ep = hep->hcpriv; | |
832 | } else if (!ep) { | |
833 | retval = -ENOMEM; | |
834 | goto fail; | |
835 | ||
836 | } else { | |
837 | INIT_LIST_HEAD(&ep->schedule); | |
6a8e87b2 | 838 | ep->udev = udev; |
1da177e4 LT |
839 | ep->epnum = epnum; |
840 | ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); | |
841 | ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE; | |
842 | usb_settoggle(udev, epnum, is_out, 0); | |
843 | ||
844 | if (type == PIPE_CONTROL) | |
845 | ep->nextpid = USB_PID_SETUP; | |
846 | else if (is_out) | |
847 | ep->nextpid = USB_PID_OUT; | |
848 | else | |
849 | ep->nextpid = USB_PID_IN; | |
850 | ||
851 | if (ep->maxpacket > H_MAXPACKET) { | |
852 | /* iso packets up to 240 bytes could work... */ | |
853 | DBG("dev %d ep%d maxpacket %d\n", | |
854 | udev->devnum, epnum, ep->maxpacket); | |
855 | retval = -EINVAL; | |
856 | goto fail; | |
857 | } | |
858 | ||
859 | if (udev->speed == USB_SPEED_LOW) { | |
860 | /* send preamble for external hub? */ | |
861 | if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD)) | |
862 | ep->defctrl |= SL11H_HCTLMASK_PREAMBLE; | |
863 | } | |
864 | switch (type) { | |
865 | case PIPE_ISOCHRONOUS: | |
866 | case PIPE_INTERRUPT: | |
867 | if (urb->interval > PERIODIC_SIZE) | |
868 | urb->interval = PERIODIC_SIZE; | |
869 | ep->period = urb->interval; | |
870 | ep->branch = PERIODIC_SIZE; | |
871 | if (type == PIPE_ISOCHRONOUS) | |
872 | ep->defctrl |= SL11H_HCTLMASK_ISOCH; | |
873 | ep->load = usb_calc_bus_time(udev->speed, !is_out, | |
874 | (type == PIPE_ISOCHRONOUS), | |
875 | usb_maxpacket(udev, pipe, is_out)) | |
876 | / 1000; | |
877 | break; | |
878 | } | |
879 | ||
1e9a47b6 | 880 | ep->hep = hep; |
1da177e4 LT |
881 | hep->hcpriv = ep; |
882 | } | |
883 | ||
884 | /* maybe put endpoint into schedule */ | |
885 | switch (type) { | |
886 | case PIPE_CONTROL: | |
887 | case PIPE_BULK: | |
888 | if (list_empty(&ep->schedule)) | |
889 | list_add_tail(&ep->schedule, &sl811->async); | |
890 | break; | |
891 | case PIPE_ISOCHRONOUS: | |
892 | case PIPE_INTERRUPT: | |
893 | urb->interval = ep->period; | |
4b2e790a DB |
894 | if (ep->branch < PERIODIC_SIZE) { |
895 | /* NOTE: the phase is correct here, but the value | |
896 | * needs offsetting by the transfer queue depth. | |
897 | * All current drivers ignore start_frame, so this | |
898 | * is unlikely to ever matter... | |
899 | */ | |
900 | urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) | |
901 | + ep->branch; | |
1da177e4 | 902 | break; |
4b2e790a | 903 | } |
1da177e4 LT |
904 | |
905 | retval = balance(sl811, ep->period, ep->load); | |
906 | if (retval < 0) | |
907 | goto fail; | |
908 | ep->branch = retval; | |
909 | retval = 0; | |
910 | urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) | |
911 | + ep->branch; | |
912 | ||
913 | /* sort each schedule branch by period (slow before fast) | |
914 | * to share the faster parts of the tree without needing | |
915 | * dummy/placeholder nodes | |
916 | */ | |
917 | DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch); | |
918 | for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { | |
919 | struct sl811h_ep **prev = &sl811->periodic[i]; | |
920 | struct sl811h_ep *here = *prev; | |
921 | ||
922 | while (here && ep != here) { | |
923 | if (ep->period > here->period) | |
924 | break; | |
925 | prev = &here->next; | |
926 | here = *prev; | |
927 | } | |
928 | if (ep != here) { | |
929 | ep->next = here; | |
930 | *prev = ep; | |
931 | } | |
932 | sl811->load[i] += ep->load; | |
933 | } | |
934 | sl811->periodic_count++; | |
935 | hcd->self.bandwidth_allocated += ep->load / ep->period; | |
936 | sofirq_on(sl811); | |
937 | } | |
938 | ||
1da177e4 | 939 | urb->hcpriv = hep; |
1da177e4 LT |
940 | start_transfer(sl811); |
941 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
942 | fail: | |
e9df41c5 AS |
943 | if (retval) |
944 | usb_hcd_unlink_urb_from_ep(hcd, urb); | |
945 | fail_not_linked: | |
1da177e4 LT |
946 | spin_unlock_irqrestore(&sl811->lock, flags); |
947 | return retval; | |
948 | } | |
949 | ||
e9df41c5 | 950 | static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) |
1da177e4 LT |
951 | { |
952 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1e9a47b6 | 953 | struct usb_host_endpoint *hep; |
1da177e4 LT |
954 | unsigned long flags; |
955 | struct sl811h_ep *ep; | |
e9df41c5 | 956 | int retval; |
1da177e4 | 957 | |
1e9a47b6 | 958 | spin_lock_irqsave(&sl811->lock, flags); |
e9df41c5 AS |
959 | retval = usb_hcd_check_unlink_urb(hcd, urb, status); |
960 | if (retval) | |
1e9a47b6 | 961 | goto fail; |
1da177e4 | 962 | |
e9df41c5 | 963 | hep = urb->hcpriv; |
1da177e4 LT |
964 | ep = hep->hcpriv; |
965 | if (ep) { | |
966 | /* finish right away if this urb can't be active ... | |
967 | * note that some drivers wrongly expect delays | |
968 | */ | |
969 | if (ep->hep->urb_list.next != &urb->urb_list) { | |
970 | /* not front of queue? never active */ | |
971 | ||
972 | /* for active transfers, we expect an IRQ */ | |
973 | } else if (sl811->active_a == ep) { | |
974 | if (time_before_eq(sl811->jiffies_a, jiffies)) { | |
975 | /* happens a lot with lowspeed?? */ | |
976 | DBG("giveup on DONE_A: ctrl %02x sts %02x\n", | |
977 | sl811_read(sl811, | |
978 | SL811_EP_A(SL11H_HOSTCTLREG)), | |
979 | sl811_read(sl811, | |
980 | SL811_EP_A(SL11H_PKTSTATREG))); | |
981 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), | |
982 | 0); | |
983 | sl811->active_a = NULL; | |
984 | } else | |
985 | urb = NULL; | |
986 | #ifdef USE_B | |
987 | } else if (sl811->active_b == ep) { | |
988 | if (time_before_eq(sl811->jiffies_a, jiffies)) { | |
989 | /* happens a lot with lowspeed?? */ | |
990 | DBG("giveup on DONE_B: ctrl %02x sts %02x\n", | |
991 | sl811_read(sl811, | |
992 | SL811_EP_B(SL11H_HOSTCTLREG)), | |
993 | sl811_read(sl811, | |
994 | SL811_EP_B(SL11H_PKTSTATREG))); | |
995 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), | |
996 | 0); | |
997 | sl811->active_b = NULL; | |
998 | } else | |
999 | urb = NULL; | |
1000 | #endif | |
1001 | } else { | |
1002 | /* front of queue for inactive endpoint */ | |
1003 | } | |
1004 | ||
1005 | if (urb) | |
7d12e780 | 1006 | finish_request(sl811, ep, urb, 0); |
1da177e4 LT |
1007 | else |
1008 | VDBG("dequeue, urb %p active %s; wait4irq\n", urb, | |
1009 | (sl811->active_a == ep) ? "A" : "B"); | |
1010 | } else | |
1011 | retval = -EINVAL; | |
e9df41c5 | 1012 | fail: |
1da177e4 LT |
1013 | spin_unlock_irqrestore(&sl811->lock, flags); |
1014 | return retval; | |
1015 | } | |
1016 | ||
1017 | static void | |
1018 | sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep) | |
1019 | { | |
1020 | struct sl811h_ep *ep = hep->hcpriv; | |
1021 | ||
1022 | if (!ep) | |
1023 | return; | |
1024 | ||
1025 | /* assume we'd just wait for the irq */ | |
1026 | if (!list_empty(&hep->urb_list)) | |
1027 | msleep(3); | |
1028 | if (!list_empty(&hep->urb_list)) | |
1029 | WARN("ep %p not empty?\n", ep); | |
1030 | ||
1da177e4 LT |
1031 | kfree(ep); |
1032 | hep->hcpriv = NULL; | |
1033 | } | |
1034 | ||
1035 | static int | |
1036 | sl811h_get_frame(struct usb_hcd *hcd) | |
1037 | { | |
1038 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1039 | ||
1040 | /* wrong except while periodic transfers are scheduled; | |
1041 | * never matches the on-the-wire frame; | |
1042 | * subject to overruns. | |
1043 | */ | |
1044 | return sl811->frame; | |
1045 | } | |
1046 | ||
1047 | ||
1048 | /*-------------------------------------------------------------------------*/ | |
1049 | ||
1050 | /* the virtual root hub timer IRQ checks for hub status */ | |
1051 | static int | |
1052 | sl811h_hub_status_data(struct usb_hcd *hcd, char *buf) | |
1053 | { | |
1054 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1055 | #ifdef QUIRK3 | |
1056 | unsigned long flags; | |
1057 | ||
1058 | /* non-SMP HACK: use root hub timer as i/o watchdog | |
1059 | * this seems essential when SOF IRQs aren't in use... | |
1060 | */ | |
1061 | local_irq_save(flags); | |
1062 | if (!timer_pending(&sl811->timer)) { | |
7d12e780 | 1063 | if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE) |
1da177e4 LT |
1064 | sl811->stat_lost++; |
1065 | } | |
1066 | local_irq_restore(flags); | |
1067 | #endif | |
1068 | ||
1069 | if (!(sl811->port1 & (0xffff << 16))) | |
1070 | return 0; | |
1071 | ||
1072 | /* tell khubd port 1 changed */ | |
1073 | *buf = (1 << 1); | |
1074 | return 1; | |
1075 | } | |
1076 | ||
1077 | static void | |
1078 | sl811h_hub_descriptor ( | |
1079 | struct sl811 *sl811, | |
1080 | struct usb_hub_descriptor *desc | |
1081 | ) { | |
1082 | u16 temp = 0; | |
1083 | ||
1084 | desc->bDescriptorType = 0x29; | |
1085 | desc->bHubContrCurrent = 0; | |
1086 | ||
1087 | desc->bNbrPorts = 1; | |
1088 | desc->bDescLength = 9; | |
1089 | ||
1090 | /* per-port power switching (gang of one!), or none */ | |
1091 | desc->bPwrOn2PwrGood = 0; | |
1092 | if (sl811->board && sl811->board->port_power) { | |
1093 | desc->bPwrOn2PwrGood = sl811->board->potpg; | |
1094 | if (!desc->bPwrOn2PwrGood) | |
1095 | desc->bPwrOn2PwrGood = 10; | |
1096 | temp = 0x0001; | |
1097 | } else | |
1098 | temp = 0x0002; | |
1099 | ||
1100 | /* no overcurrent errors detection/handling */ | |
1101 | temp |= 0x0010; | |
1102 | ||
1103 | desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp); | |
1104 | ||
1105 | /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */ | |
4b2e790a | 1106 | desc->bitmap[0] = 0 << 1; |
1da177e4 LT |
1107 | desc->bitmap[1] = ~0; |
1108 | } | |
1109 | ||
1110 | static void | |
1111 | sl811h_timer(unsigned long _sl811) | |
1112 | { | |
1113 | struct sl811 *sl811 = (void *) _sl811; | |
1114 | unsigned long flags; | |
1115 | u8 irqstat; | |
1116 | u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE; | |
1117 | const u32 mask = (1 << USB_PORT_FEAT_CONNECTION) | |
1118 | | (1 << USB_PORT_FEAT_ENABLE) | |
1119 | | (1 << USB_PORT_FEAT_LOWSPEED); | |
1120 | ||
1121 | spin_lock_irqsave(&sl811->lock, flags); | |
1122 | ||
1123 | /* stop special signaling */ | |
1124 | sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE; | |
1125 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1126 | udelay(3); | |
1127 | ||
1128 | irqstat = sl811_read(sl811, SL11H_IRQ_STATUS); | |
1129 | ||
1130 | switch (signaling) { | |
1131 | case SL11H_CTL1MASK_SE0: | |
1132 | DBG("end reset\n"); | |
1133 | sl811->port1 = (1 << USB_PORT_FEAT_C_RESET) | |
1134 | | (1 << USB_PORT_FEAT_POWER); | |
1135 | sl811->ctrl1 = 0; | |
1136 | /* don't wrongly ack RD */ | |
1137 | if (irqstat & SL11H_INTMASK_INSRMV) | |
1138 | irqstat &= ~SL11H_INTMASK_RD; | |
1139 | break; | |
1140 | case SL11H_CTL1MASK_K: | |
1141 | DBG("end resume\n"); | |
1142 | sl811->port1 &= ~(1 << USB_PORT_FEAT_SUSPEND); | |
1143 | break; | |
1144 | default: | |
1145 | DBG("odd timer signaling: %02x\n", signaling); | |
1146 | break; | |
1147 | } | |
1148 | sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); | |
1149 | ||
1150 | if (irqstat & SL11H_INTMASK_RD) { | |
1151 | /* usbcore nukes all pending transactions on disconnect */ | |
1152 | if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) | |
1153 | sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION) | |
1154 | | (1 << USB_PORT_FEAT_C_ENABLE); | |
1155 | sl811->port1 &= ~mask; | |
1156 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
1157 | } else { | |
1158 | sl811->port1 |= mask; | |
1159 | if (irqstat & SL11H_INTMASK_DP) | |
1160 | sl811->port1 &= ~(1 << USB_PORT_FEAT_LOWSPEED); | |
1161 | sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD; | |
1162 | } | |
1163 | ||
1164 | if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) { | |
1165 | u8 ctrl2 = SL811HS_CTL2_INIT; | |
1166 | ||
1167 | sl811->irq_enable |= SL11H_INTMASK_DONE_A; | |
1168 | #ifdef USE_B | |
1169 | sl811->irq_enable |= SL11H_INTMASK_DONE_B; | |
1170 | #endif | |
1171 | if (sl811->port1 & (1 << USB_PORT_FEAT_LOWSPEED)) { | |
1172 | sl811->ctrl1 |= SL11H_CTL1MASK_LSPD; | |
1173 | ctrl2 |= SL811HS_CTL2MASK_DSWAP; | |
1174 | } | |
1175 | ||
1176 | /* start SOFs flowing, kickstarting with A registers */ | |
1177 | sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA; | |
1178 | sl811_write(sl811, SL11H_SOFLOWREG, 0xe0); | |
1179 | sl811_write(sl811, SL811HS_CTLREG2, ctrl2); | |
1180 | ||
1181 | /* autoincrementing */ | |
1182 | sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0); | |
1183 | writeb(SL_SOF, sl811->data_reg); | |
1184 | writeb(0, sl811->data_reg); | |
1185 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), | |
1186 | SL11H_HCTLMASK_ARM); | |
1187 | ||
1188 | /* khubd provides debounce delay */ | |
1189 | } else { | |
1190 | sl811->ctrl1 = 0; | |
1191 | } | |
1192 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1193 | ||
1194 | /* reenable irqs */ | |
1195 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
1196 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1197 | } | |
1198 | ||
1199 | static int | |
1200 | sl811h_hub_control( | |
1201 | struct usb_hcd *hcd, | |
1202 | u16 typeReq, | |
1203 | u16 wValue, | |
1204 | u16 wIndex, | |
1205 | char *buf, | |
1206 | u16 wLength | |
1207 | ) { | |
1208 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1209 | int retval = 0; | |
1210 | unsigned long flags; | |
1211 | ||
1212 | spin_lock_irqsave(&sl811->lock, flags); | |
1213 | ||
1214 | switch (typeReq) { | |
1215 | case ClearHubFeature: | |
1216 | case SetHubFeature: | |
1217 | switch (wValue) { | |
1218 | case C_HUB_OVER_CURRENT: | |
1219 | case C_HUB_LOCAL_POWER: | |
1220 | break; | |
1221 | default: | |
1222 | goto error; | |
1223 | } | |
1224 | break; | |
1225 | case ClearPortFeature: | |
1226 | if (wIndex != 1 || wLength != 0) | |
1227 | goto error; | |
1228 | ||
1229 | switch (wValue) { | |
1230 | case USB_PORT_FEAT_ENABLE: | |
1231 | sl811->port1 &= (1 << USB_PORT_FEAT_POWER); | |
1232 | sl811->ctrl1 = 0; | |
1233 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1234 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
1235 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1236 | sl811->irq_enable); | |
1237 | break; | |
1238 | case USB_PORT_FEAT_SUSPEND: | |
1239 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))) | |
1240 | break; | |
1241 | ||
1242 | /* 20 msec of resume/K signaling, other irqs blocked */ | |
1243 | DBG("start resume...\n"); | |
1244 | sl811->irq_enable = 0; | |
1245 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1246 | sl811->irq_enable); | |
1247 | sl811->ctrl1 |= SL11H_CTL1MASK_K; | |
1248 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1249 | ||
1250 | mod_timer(&sl811->timer, jiffies | |
1251 | + msecs_to_jiffies(20)); | |
1252 | break; | |
1253 | case USB_PORT_FEAT_POWER: | |
1254 | port_power(sl811, 0); | |
1255 | break; | |
1256 | case USB_PORT_FEAT_C_ENABLE: | |
1257 | case USB_PORT_FEAT_C_SUSPEND: | |
1258 | case USB_PORT_FEAT_C_CONNECTION: | |
1259 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
1260 | case USB_PORT_FEAT_C_RESET: | |
1261 | break; | |
1262 | default: | |
1263 | goto error; | |
1264 | } | |
1265 | sl811->port1 &= ~(1 << wValue); | |
1266 | break; | |
1267 | case GetHubDescriptor: | |
1268 | sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf); | |
1269 | break; | |
1270 | case GetHubStatus: | |
1271 | *(__le32 *) buf = cpu_to_le32(0); | |
1272 | break; | |
1273 | case GetPortStatus: | |
1274 | if (wIndex != 1) | |
1275 | goto error; | |
1276 | *(__le32 *) buf = cpu_to_le32(sl811->port1); | |
1277 | ||
1278 | #ifndef VERBOSE | |
1279 | if (*(u16*)(buf+2)) /* only if wPortChange is interesting */ | |
1280 | #endif | |
1281 | DBG("GetPortStatus %08x\n", sl811->port1); | |
1282 | break; | |
1283 | case SetPortFeature: | |
1284 | if (wIndex != 1 || wLength != 0) | |
1285 | goto error; | |
1286 | switch (wValue) { | |
1287 | case USB_PORT_FEAT_SUSPEND: | |
1288 | if (sl811->port1 & (1 << USB_PORT_FEAT_RESET)) | |
1289 | goto error; | |
1290 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))) | |
1291 | goto error; | |
1292 | ||
1293 | DBG("suspend...\n"); | |
1294 | sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA; | |
1295 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1296 | break; | |
1297 | case USB_PORT_FEAT_POWER: | |
1298 | port_power(sl811, 1); | |
1299 | break; | |
1300 | case USB_PORT_FEAT_RESET: | |
1301 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) | |
1302 | goto error; | |
1303 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_POWER))) | |
1304 | break; | |
1305 | ||
1306 | /* 50 msec of reset/SE0 signaling, irqs blocked */ | |
1307 | sl811->irq_enable = 0; | |
1308 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1309 | sl811->irq_enable); | |
1310 | sl811->ctrl1 = SL11H_CTL1MASK_SE0; | |
1311 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1312 | sl811->port1 |= (1 << USB_PORT_FEAT_RESET); | |
1313 | mod_timer(&sl811->timer, jiffies | |
1314 | + msecs_to_jiffies(50)); | |
1315 | break; | |
1316 | default: | |
1317 | goto error; | |
1318 | } | |
1319 | sl811->port1 |= 1 << wValue; | |
1320 | break; | |
1321 | ||
1322 | default: | |
1323 | error: | |
1324 | /* "protocol stall" on error */ | |
1325 | retval = -EPIPE; | |
1326 | } | |
1327 | ||
1328 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1329 | return retval; | |
1330 | } | |
1331 | ||
1332 | #ifdef CONFIG_PM | |
1333 | ||
1334 | static int | |
0c0382e3 | 1335 | sl811h_bus_suspend(struct usb_hcd *hcd) |
1da177e4 LT |
1336 | { |
1337 | // SOFs off | |
1338 | DBG("%s\n", __FUNCTION__); | |
1339 | return 0; | |
1340 | } | |
1341 | ||
1342 | static int | |
0c0382e3 | 1343 | sl811h_bus_resume(struct usb_hcd *hcd) |
1da177e4 LT |
1344 | { |
1345 | // SOFs on | |
1346 | DBG("%s\n", __FUNCTION__); | |
1347 | return 0; | |
1348 | } | |
1349 | ||
1350 | #else | |
1351 | ||
0c0382e3 AS |
1352 | #define sl811h_bus_suspend NULL |
1353 | #define sl811h_bus_resume NULL | |
1da177e4 LT |
1354 | |
1355 | #endif | |
1356 | ||
1357 | ||
1358 | /*-------------------------------------------------------------------------*/ | |
1359 | ||
1360 | #ifdef STUB_DEBUG_FILE | |
1361 | ||
1362 | static inline void create_debug_file(struct sl811 *sl811) { } | |
1363 | static inline void remove_debug_file(struct sl811 *sl811) { } | |
1364 | ||
1365 | #else | |
1366 | ||
1367 | #include <linux/proc_fs.h> | |
1368 | #include <linux/seq_file.h> | |
1369 | ||
1370 | static void dump_irq(struct seq_file *s, char *label, u8 mask) | |
1371 | { | |
1372 | seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask, | |
1373 | (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "", | |
1374 | (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "", | |
1375 | (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "", | |
1376 | (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "", | |
1377 | (mask & SL11H_INTMASK_RD) ? " rd" : "", | |
1378 | (mask & SL11H_INTMASK_DP) ? " dp" : ""); | |
1379 | } | |
1380 | ||
1381 | static int proc_sl811h_show(struct seq_file *s, void *unused) | |
1382 | { | |
1383 | struct sl811 *sl811 = s->private; | |
1384 | struct sl811h_ep *ep; | |
1385 | unsigned i; | |
1386 | ||
1387 | seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n", | |
1388 | sl811_to_hcd(sl811)->product_desc, | |
1389 | hcd_name, DRIVER_VERSION, | |
1390 | sl811->port1); | |
1391 | ||
1392 | seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv); | |
1393 | seq_printf(s, "current session: done_a %ld done_b %ld " | |
1394 | "wake %ld sof %ld overrun %ld lost %ld\n\n", | |
1395 | sl811->stat_a, sl811->stat_b, | |
1396 | sl811->stat_wake, sl811->stat_sof, | |
1397 | sl811->stat_overrun, sl811->stat_lost); | |
1398 | ||
1399 | spin_lock_irq(&sl811->lock); | |
1400 | ||
1401 | if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND) | |
1402 | seq_printf(s, "(suspended)\n\n"); | |
1403 | else { | |
1404 | u8 t = sl811_read(sl811, SL11H_CTLREG1); | |
1405 | ||
1406 | seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t, | |
1407 | (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "", | |
1408 | ({char *s; switch (t & SL11H_CTL1MASK_FORCE) { | |
1409 | case SL11H_CTL1MASK_NORMAL: s = ""; break; | |
1410 | case SL11H_CTL1MASK_SE0: s = " se0/reset"; break; | |
1411 | case SL11H_CTL1MASK_K: s = " k/resume"; break; | |
1412 | default: s = "j"; break; | |
1413 | }; s; }), | |
1414 | (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "", | |
1415 | (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : ""); | |
1416 | ||
1417 | dump_irq(s, "irq_enable", | |
1418 | sl811_read(sl811, SL11H_IRQ_ENABLE)); | |
1419 | dump_irq(s, "irq_status", | |
1420 | sl811_read(sl811, SL11H_IRQ_STATUS)); | |
1421 | seq_printf(s, "frame clocks remaining: %d\n", | |
1422 | sl811_read(sl811, SL11H_SOFTMRREG) << 6); | |
1423 | } | |
1424 | ||
1425 | seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a, | |
1426 | sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)), | |
1427 | sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); | |
1428 | seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b, | |
1429 | sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)), | |
1430 | sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); | |
1431 | seq_printf(s, "\n"); | |
1432 | list_for_each_entry (ep, &sl811->async, schedule) { | |
1433 | struct urb *urb; | |
1434 | ||
1435 | seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d" | |
1436 | " nak %d err %d\n", | |
1437 | (ep == sl811->active_a) ? "(A) " : "", | |
1438 | (ep == sl811->active_b) ? "(B) " : "", | |
1439 | ep, ep->epnum, | |
1440 | ({ char *s; switch (ep->nextpid) { | |
1441 | case USB_PID_IN: s = "in"; break; | |
1442 | case USB_PID_OUT: s = "out"; break; | |
1443 | case USB_PID_SETUP: s = "setup"; break; | |
1444 | case USB_PID_ACK: s = "status"; break; | |
1445 | default: s = "?"; break; | |
1446 | }; s;}), | |
1447 | ep->maxpacket, | |
1448 | ep->nak_count, ep->error_count); | |
1449 | list_for_each_entry (urb, &ep->hep->urb_list, urb_list) { | |
1450 | seq_printf(s, " urb%p, %d/%d\n", urb, | |
1451 | urb->actual_length, | |
1452 | urb->transfer_buffer_length); | |
1453 | } | |
1454 | } | |
1455 | if (!list_empty(&sl811->async)) | |
1456 | seq_printf(s, "\n"); | |
1457 | ||
1458 | seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE); | |
1459 | ||
1460 | for (i = 0; i < PERIODIC_SIZE; i++) { | |
1461 | ep = sl811->periodic[i]; | |
1462 | if (!ep) | |
1463 | continue; | |
1464 | seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]); | |
1465 | ||
1466 | /* DUMB: prints shared entries multiple times */ | |
1467 | do { | |
1468 | seq_printf(s, | |
1469 | " %s%sqh%d/%p (%sdev%d ep%d%s max %d) " | |
1470 | "err %d\n", | |
1471 | (ep == sl811->active_a) ? "(A) " : "", | |
1472 | (ep == sl811->active_b) ? "(B) " : "", | |
1473 | ep->period, ep, | |
1474 | (ep->udev->speed == USB_SPEED_FULL) | |
1475 | ? "" : "ls ", | |
1476 | ep->udev->devnum, ep->epnum, | |
1477 | (ep->epnum == 0) ? "" | |
1478 | : ((ep->nextpid == USB_PID_IN) | |
1479 | ? "in" | |
1480 | : "out"), | |
1481 | ep->maxpacket, ep->error_count); | |
1482 | ep = ep->next; | |
1483 | } while (ep); | |
1484 | } | |
1485 | ||
1486 | spin_unlock_irq(&sl811->lock); | |
1487 | seq_printf(s, "\n"); | |
1488 | ||
1489 | return 0; | |
1490 | } | |
1491 | ||
1492 | static int proc_sl811h_open(struct inode *inode, struct file *file) | |
1493 | { | |
1494 | return single_open(file, proc_sl811h_show, PDE(inode)->data); | |
1495 | } | |
1496 | ||
066202dd | 1497 | static const struct file_operations proc_ops = { |
1da177e4 LT |
1498 | .open = proc_sl811h_open, |
1499 | .read = seq_read, | |
1500 | .llseek = seq_lseek, | |
1501 | .release = single_release, | |
1502 | }; | |
1503 | ||
1504 | /* expect just one sl811 per system */ | |
1505 | static const char proc_filename[] = "driver/sl811h"; | |
1506 | ||
1507 | static void create_debug_file(struct sl811 *sl811) | |
1508 | { | |
1509 | struct proc_dir_entry *pde; | |
1510 | ||
1511 | pde = create_proc_entry(proc_filename, 0, NULL); | |
1512 | if (pde == NULL) | |
1513 | return; | |
1514 | ||
1515 | pde->proc_fops = &proc_ops; | |
1516 | pde->data = sl811; | |
1517 | sl811->pde = pde; | |
1518 | } | |
1519 | ||
1520 | static void remove_debug_file(struct sl811 *sl811) | |
1521 | { | |
1522 | if (sl811->pde) | |
1523 | remove_proc_entry(proc_filename, NULL); | |
1524 | } | |
1525 | ||
1526 | #endif | |
1527 | ||
1528 | /*-------------------------------------------------------------------------*/ | |
1529 | ||
1530 | static void | |
1531 | sl811h_stop(struct usb_hcd *hcd) | |
1532 | { | |
1533 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1534 | unsigned long flags; | |
1535 | ||
1536 | del_timer_sync(&hcd->rh_timer); | |
1537 | ||
1538 | spin_lock_irqsave(&sl811->lock, flags); | |
1539 | port_power(sl811, 0); | |
1540 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1541 | } | |
1542 | ||
1543 | static int | |
1544 | sl811h_start(struct usb_hcd *hcd) | |
1545 | { | |
1546 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1da177e4 LT |
1547 | |
1548 | /* chip has been reset, VBUS power is off */ | |
1da177e4 LT |
1549 | hcd->state = HC_STATE_RUNNING; |
1550 | ||
bc96c0ad | 1551 | if (sl811->board) { |
0c8624f9 DB |
1552 | if (!device_can_wakeup(hcd->self.controller)) |
1553 | device_init_wakeup(hcd->self.controller, | |
1554 | sl811->board->can_wakeup); | |
bc96c0ad AS |
1555 | hcd->power_budget = sl811->board->power * 2; |
1556 | } | |
1da177e4 | 1557 | |
3a4fa0a2 | 1558 | /* enable power and interrupts */ |
1e9a47b6 DB |
1559 | port_power(sl811, 1); |
1560 | ||
1da177e4 LT |
1561 | return 0; |
1562 | } | |
1563 | ||
1564 | /*-------------------------------------------------------------------------*/ | |
1565 | ||
1566 | static struct hc_driver sl811h_hc_driver = { | |
1567 | .description = hcd_name, | |
1568 | .hcd_priv_size = sizeof(struct sl811), | |
1569 | ||
1570 | /* | |
1571 | * generic hardware linkage | |
1572 | */ | |
1573 | .irq = sl811h_irq, | |
1574 | .flags = HCD_USB11 | HCD_MEMORY, | |
1575 | ||
1576 | /* Basic lifecycle operations */ | |
1577 | .start = sl811h_start, | |
1578 | .stop = sl811h_stop, | |
1579 | ||
1580 | /* | |
1581 | * managing i/o requests and associated device resources | |
1582 | */ | |
1583 | .urb_enqueue = sl811h_urb_enqueue, | |
1584 | .urb_dequeue = sl811h_urb_dequeue, | |
1585 | .endpoint_disable = sl811h_endpoint_disable, | |
1586 | ||
1587 | /* | |
1588 | * periodic schedule support | |
1589 | */ | |
1590 | .get_frame_number = sl811h_get_frame, | |
1591 | ||
1592 | /* | |
1593 | * root hub support | |
1594 | */ | |
1595 | .hub_status_data = sl811h_hub_status_data, | |
1596 | .hub_control = sl811h_hub_control, | |
0c0382e3 AS |
1597 | .bus_suspend = sl811h_bus_suspend, |
1598 | .bus_resume = sl811h_bus_resume, | |
1da177e4 LT |
1599 | }; |
1600 | ||
1601 | /*-------------------------------------------------------------------------*/ | |
1602 | ||
1e9a47b6 | 1603 | static int __devexit |
3ae5eaec | 1604 | sl811h_remove(struct platform_device *dev) |
1da177e4 | 1605 | { |
3ae5eaec | 1606 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 | 1607 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1da177e4 LT |
1608 | struct resource *res; |
1609 | ||
1da177e4 LT |
1610 | remove_debug_file(sl811); |
1611 | usb_remove_hcd(hcd); | |
1612 | ||
1e9a47b6 | 1613 | /* some platforms may use IORESOURCE_IO */ |
3ae5eaec | 1614 | res = platform_get_resource(dev, IORESOURCE_MEM, 1); |
1e9a47b6 DB |
1615 | if (res) |
1616 | iounmap(sl811->data_reg); | |
1da177e4 | 1617 | |
3ae5eaec | 1618 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
1e9a47b6 DB |
1619 | if (res) |
1620 | iounmap(sl811->addr_reg); | |
1da177e4 LT |
1621 | |
1622 | usb_put_hcd(hcd); | |
1623 | return 0; | |
1624 | } | |
1625 | ||
1e9a47b6 | 1626 | static int __devinit |
3ae5eaec | 1627 | sl811h_probe(struct platform_device *dev) |
1da177e4 LT |
1628 | { |
1629 | struct usb_hcd *hcd; | |
1630 | struct sl811 *sl811; | |
1da177e4 LT |
1631 | struct resource *addr, *data; |
1632 | int irq; | |
1633 | void __iomem *addr_reg; | |
1634 | void __iomem *data_reg; | |
1635 | int retval; | |
1e9a47b6 | 1636 | u8 tmp, ioaddr = 0; |
1da177e4 LT |
1637 | |
1638 | /* basic sanity checks first. board-specific init logic should | |
1639 | * have initialized these three resources and probably board | |
1640 | * specific platform_data. we don't probe for IRQs, and do only | |
1641 | * minimal sanity checking. | |
1642 | */ | |
3ae5eaec RK |
1643 | irq = platform_get_irq(dev, 0); |
1644 | if (dev->num_resources < 3 || irq < 0) | |
1da177e4 LT |
1645 | return -ENODEV; |
1646 | ||
1647 | /* refuse to confuse usbcore */ | |
3ae5eaec | 1648 | if (dev->dev.dma_mask) { |
1da177e4 LT |
1649 | DBG("no we won't dma\n"); |
1650 | return -EINVAL; | |
1651 | } | |
1652 | ||
1e9a47b6 | 1653 | /* the chip may be wired for either kind of addressing */ |
3ae5eaec RK |
1654 | addr = platform_get_resource(dev, IORESOURCE_MEM, 0); |
1655 | data = platform_get_resource(dev, IORESOURCE_MEM, 1); | |
1e9a47b6 DB |
1656 | retval = -EBUSY; |
1657 | if (!addr || !data) { | |
3ae5eaec RK |
1658 | addr = platform_get_resource(dev, IORESOURCE_IO, 0); |
1659 | data = platform_get_resource(dev, IORESOURCE_IO, 1); | |
1e9a47b6 DB |
1660 | if (!addr || !data) |
1661 | return -ENODEV; | |
1662 | ioaddr = 1; | |
2427ddd8 GKH |
1663 | /* |
1664 | * NOTE: 64-bit resource->start is getting truncated | |
1665 | * to avoid compiler warning, assuming that ->start | |
1666 | * is always 32-bit for this case | |
1667 | */ | |
1668 | addr_reg = (void __iomem *) (unsigned long) addr->start; | |
1669 | data_reg = (void __iomem *) (unsigned long) data->start; | |
1e9a47b6 DB |
1670 | } else { |
1671 | addr_reg = ioremap(addr->start, 1); | |
1672 | if (addr_reg == NULL) { | |
1673 | retval = -ENOMEM; | |
1674 | goto err2; | |
1675 | } | |
1da177e4 | 1676 | |
1e9a47b6 DB |
1677 | data_reg = ioremap(data->start, 1); |
1678 | if (data_reg == NULL) { | |
1679 | retval = -ENOMEM; | |
1680 | goto err4; | |
1681 | } | |
1da177e4 LT |
1682 | } |
1683 | ||
1684 | /* allocate and initialize hcd */ | |
3ae5eaec | 1685 | hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev->dev.bus_id); |
1da177e4 LT |
1686 | if (!hcd) { |
1687 | retval = -ENOMEM; | |
1688 | goto err5; | |
1689 | } | |
1690 | hcd->rsrc_start = addr->start; | |
1691 | sl811 = hcd_to_sl811(hcd); | |
1692 | ||
1693 | spin_lock_init(&sl811->lock); | |
1694 | INIT_LIST_HEAD(&sl811->async); | |
3ae5eaec | 1695 | sl811->board = dev->dev.platform_data; |
1da177e4 LT |
1696 | init_timer(&sl811->timer); |
1697 | sl811->timer.function = sl811h_timer; | |
1698 | sl811->timer.data = (unsigned long) sl811; | |
1699 | sl811->addr_reg = addr_reg; | |
1700 | sl811->data_reg = data_reg; | |
1701 | ||
1702 | spin_lock_irq(&sl811->lock); | |
1703 | port_power(sl811, 0); | |
1704 | spin_unlock_irq(&sl811->lock); | |
1705 | msleep(200); | |
1706 | ||
1707 | tmp = sl811_read(sl811, SL11H_HWREVREG); | |
1708 | switch (tmp >> 4) { | |
1709 | case 1: | |
1710 | hcd->product_desc = "SL811HS v1.2"; | |
1711 | break; | |
1712 | case 2: | |
1713 | hcd->product_desc = "SL811HS v1.5"; | |
1714 | break; | |
1715 | default: | |
1716 | /* reject case 0, SL11S is less functional */ | |
1717 | DBG("chiprev %02x\n", tmp); | |
1718 | retval = -ENXIO; | |
1719 | goto err6; | |
1720 | } | |
1721 | ||
1e9a47b6 DB |
1722 | /* The chip's IRQ is level triggered, active high. A requirement |
1723 | * for platform device setup is to cope with things like signal | |
1724 | * inverters (e.g. CF is active low) or working only with edge | |
1725 | * triggers (e.g. most ARM CPUs). Initial driver stress testing | |
1726 | * was on a system with single edge triggering, so most sorts of | |
1727 | * triggering arrangement should work. | |
1728 | */ | |
d54b5caa | 1729 | retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); |
1da177e4 LT |
1730 | if (retval != 0) |
1731 | goto err6; | |
1732 | ||
1733 | create_debug_file(sl811); | |
1734 | return retval; | |
1735 | ||
1736 | err6: | |
1737 | usb_put_hcd(hcd); | |
1738 | err5: | |
1e9a47b6 DB |
1739 | if (!ioaddr) |
1740 | iounmap(data_reg); | |
1da177e4 | 1741 | err4: |
1e9a47b6 DB |
1742 | if (!ioaddr) |
1743 | iounmap(addr_reg); | |
1da177e4 | 1744 | err2: |
1da177e4 LT |
1745 | DBG("init error, %d\n", retval); |
1746 | return retval; | |
1747 | } | |
1748 | ||
1749 | #ifdef CONFIG_PM | |
1750 | ||
1751 | /* for this device there's no useful distinction between the controller | |
1e9a47b6 | 1752 | * and its root hub, except that the root hub only gets direct PM calls |
1da177e4 LT |
1753 | * when CONFIG_USB_SUSPEND is enabled. |
1754 | */ | |
1755 | ||
1756 | static int | |
3ae5eaec | 1757 | sl811h_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 1758 | { |
3ae5eaec | 1759 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 LT |
1760 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1761 | int retval = 0; | |
1762 | ||
18584999 DB |
1763 | switch (state.event) { |
1764 | case PM_EVENT_FREEZE: | |
0c0382e3 | 1765 | retval = sl811h_bus_suspend(hcd); |
18584999 DB |
1766 | break; |
1767 | case PM_EVENT_SUSPEND: | |
3a2d5b70 | 1768 | case PM_EVENT_HIBERNATE: |
18584999 | 1769 | case PM_EVENT_PRETHAW: /* explicitly discard hw state */ |
1da177e4 | 1770 | port_power(sl811, 0); |
18584999 DB |
1771 | break; |
1772 | } | |
1da177e4 LT |
1773 | return retval; |
1774 | } | |
1775 | ||
1776 | static int | |
3ae5eaec | 1777 | sl811h_resume(struct platform_device *dev) |
1da177e4 | 1778 | { |
3ae5eaec | 1779 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 LT |
1780 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1781 | ||
1da177e4 LT |
1782 | /* with no "check to see if VBUS is still powered" board hook, |
1783 | * let's assume it'd only be powered to enable remote wakeup. | |
1784 | */ | |
70a1c9e0 | 1785 | if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) { |
1da177e4 LT |
1786 | sl811->port1 = 0; |
1787 | port_power(sl811, 1); | |
1c50c317 | 1788 | usb_root_hub_lost_power(hcd->self.root_hub); |
1da177e4 LT |
1789 | return 0; |
1790 | } | |
1791 | ||
0c0382e3 | 1792 | return sl811h_bus_resume(hcd); |
1da177e4 LT |
1793 | } |
1794 | ||
1795 | #else | |
1796 | ||
1797 | #define sl811h_suspend NULL | |
1798 | #define sl811h_resume NULL | |
1799 | ||
1800 | #endif | |
1801 | ||
1802 | ||
1e9a47b6 | 1803 | /* this driver is exported so sl811_cs can depend on it */ |
3ae5eaec | 1804 | struct platform_driver sl811h_driver = { |
1da177e4 | 1805 | .probe = sl811h_probe, |
1e9a47b6 | 1806 | .remove = __devexit_p(sl811h_remove), |
1da177e4 LT |
1807 | |
1808 | .suspend = sl811h_suspend, | |
1809 | .resume = sl811h_resume, | |
3ae5eaec RK |
1810 | .driver = { |
1811 | .name = (char *) hcd_name, | |
1812 | .owner = THIS_MODULE, | |
1813 | }, | |
1da177e4 | 1814 | }; |
1e9a47b6 | 1815 | EXPORT_SYMBOL(sl811h_driver); |
1da177e4 LT |
1816 | |
1817 | /*-------------------------------------------------------------------------*/ | |
1e9a47b6 DB |
1818 | |
1819 | static int __init sl811h_init(void) | |
1da177e4 LT |
1820 | { |
1821 | if (usb_disabled()) | |
1822 | return -ENODEV; | |
1823 | ||
1824 | INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION); | |
3ae5eaec | 1825 | return platform_driver_register(&sl811h_driver); |
1da177e4 LT |
1826 | } |
1827 | module_init(sl811h_init); | |
1828 | ||
1e9a47b6 DB |
1829 | static void __exit sl811h_cleanup(void) |
1830 | { | |
3ae5eaec | 1831 | platform_driver_unregister(&sl811h_driver); |
1da177e4 LT |
1832 | } |
1833 | module_exit(sl811h_cleanup); |