[mirror_ubuntu-bionic-kernel.git] / drivers / usb / mtu3 / mtu3.h

// SPDX-License-Identifier: GPL-2.0
/*
 * mtu3.h - MediaTek USB3 DRD header
 *
 * Copyright (C) 2016 MediaTek Inc.
 *
 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
 */

#ifndef __MTU3_H__
#define __MTU3_H__

#include <linux/device.h>
#include <linux/dmapool.h>
#include <linux/extcon.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/phy/phy.h>
#include <linux/regulator/consumer.h>
#include <linux/usb.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/otg.h>

struct mtu3;
struct mtu3_ep;
struct mtu3_request;

#include "mtu3_hw_regs.h"
#include "mtu3_qmu.h"

#define	MU3D_EP_TXCR0(epnum)	(U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
#define	MU3D_EP_TXCR1(epnum)	(U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
#define	MU3D_EP_TXCR2(epnum)	(U3D_TX1CSR2 + (((epnum) - 1) * 0x10))

#define	MU3D_EP_RXCR0(epnum)	(U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
#define	MU3D_EP_RXCR1(epnum)	(U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
#define	MU3D_EP_RXCR2(epnum)	(U3D_RX1CSR2 + (((epnum) - 1) * 0x10))

#define USB_QMU_TQHIAR(epnum)	(U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
#define USB_QMU_RQHIAR(epnum)	(U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))

#define USB_QMU_RQCSR(epnum)	(U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
#define USB_QMU_RQSAR(epnum)	(U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
#define USB_QMU_RQCPR(epnum)	(U3D_RXQCPR1 + (((epnum) - 1) * 0x10))

#define USB_QMU_TQCSR(epnum)	(U3D_TXQCSR1 + (((epnum) - 1) * 0x10))
#define USB_QMU_TQSAR(epnum)	(U3D_TXQSAR1 + (((epnum) - 1) * 0x10))
#define USB_QMU_TQCPR(epnum)	(U3D_TXQCPR1 + (((epnum) - 1) * 0x10))

#define SSUSB_U3_CTRL(p)	(U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08))
#define SSUSB_U2_CTRL(p)	(U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08))

#define MTU3_DRIVER_NAME	"mtu3"
#define	DMA_ADDR_INVALID	(~(dma_addr_t)0)

#define MTU3_EP_ENABLED		BIT(0)
#define MTU3_EP_STALL		BIT(1)
#define MTU3_EP_WEDGE		BIT(2)
#define MTU3_EP_BUSY		BIT(3)

#define MTU3_U3_IP_SLOT_DEFAULT 2
#define MTU3_U2_IP_SLOT_DEFAULT 1

/**
 * Normally the device works on HS or SS, to simplify fifo management,
 * devide fifo into some 512B parts, use bitmap to manage it; And
 * 128 bits size of bitmap is large enough, that means it can manage
 * up to 64KB fifo size.
 * NOTE: MTU3_EP_FIFO_UNIT should be power of two
 */
#define MTU3_EP_FIFO_UNIT		(1 << 9)
#define MTU3_FIFO_BIT_SIZE		128
#define MTU3_U2_IP_EP0_FIFO_SIZE	64

/**
 * Maximum size of ep0 response buffer for ch9 requests,
 * the SET_SEL request uses 6 so far, and GET_STATUS is 2
 */
#define EP0_RESPONSE_BUF  6

/* device operated link and speed got from DEVICE_CONF register */
enum mtu3_speed {
	MTU3_SPEED_INACTIVE = 0,
	MTU3_SPEED_FULL = 1,
	MTU3_SPEED_HIGH = 3,
	MTU3_SPEED_SUPER = 4,
	MTU3_SPEED_SUPER_PLUS = 5,
};

/**
 * @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
 *		without data stage.
 * @MU3D_EP0_STATE_TX: IN data stage
 * @MU3D_EP0_STATE_RX: OUT data stage
 * @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and
 *		waits for its completion interrupt
 * @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared
 *		after receives a SETUP.
 */
enum mtu3_g_ep0_state {
	MU3D_EP0_STATE_SETUP = 1,
	MU3D_EP0_STATE_TX,
	MU3D_EP0_STATE_RX,
	MU3D_EP0_STATE_TX_END,
	MU3D_EP0_STATE_STALL,
};

/**
 * MTU3_DR_FORCE_NONE: automatically switch host and periperal mode
 *		by IDPIN signal.
 * MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
 *		IDPIN signal.
 * MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
 */
enum mtu3_dr_force_mode {
	MTU3_DR_FORCE_NONE = 0,
	MTU3_DR_FORCE_HOST,
	MTU3_DR_FORCE_DEVICE,
};

/**
 * @base: the base address of fifo
 * @limit: the bitmap size in bits
 * @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
 */
struct mtu3_fifo_info {
	u32 base;
	u32 limit;
	DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE);
};

/**
 * General Purpose Descriptor (GPD):
 *	The format of TX GPD is a little different from RX one.
 *	And the size of GPD is 16 bytes.
 *
 * @flag:
 *	bit0: Hardware Own (HWO)
 *	bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
 *	bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1
 *	bit7: Interrupt On Completion (IOC)
 * @chksum: This is used to validate the contents of this GPD;
 *	If TXQ_CS_EN / RXQ_CS_EN bit is set, an interrupt is issued
 *	when checksum validation fails;
 *	Checksum value is calculated over the 16 bytes of the GPD by default;
 * @data_buf_len (RX ONLY): This value indicates the length of
 *	the assigned data buffer
 * @tx_ext_addr (TX ONLY): [3:0] are 4 extension bits of @buffer,
 *	[7:4] are 4 extension bits of @next_gpd
 * @next_gpd: Physical address of the next GPD
 * @buffer: Physical address of the data buffer
 * @buf_len:
 *	(TX): This value indicates the length of the assigned data buffer
 *	(RX): The total length of data received
 * @ext_len: reserved
 * @rx_ext_addr(RX ONLY): [3:0] are 4 extension bits of @buffer,
 *	[7:4] are 4 extension bits of @next_gpd
 * @ext_flag:
 *	bit5 (TX ONLY): Zero Length Packet (ZLP),
 */
struct qmu_gpd {
	__u8 flag;
	__u8 chksum;
	union {
		__le16 data_buf_len;
		__le16 tx_ext_addr;
	};
	__le32 next_gpd;
	__le32 buffer;
	__le16 buf_len;
	union {
		__u8 ext_len;
		__u8 rx_ext_addr;
	};
	__u8 ext_flag;
} __packed;

/**
* dma: physical base address of GPD segment
* start: virtual base address of GPD segment
* end: the last GPD element
* enqueue: the first empty GPD to use
* dequeue: the first completed GPD serviced by ISR
* NOTE: the size of GPD ring should be >= 2
*/
struct mtu3_gpd_ring {
	dma_addr_t dma;
	struct qmu_gpd *start;
	struct qmu_gpd *end;
	struct qmu_gpd *enqueue;
	struct qmu_gpd *dequeue;
};

/**
* @vbus: vbus 5V used by host mode
* @edev: external connector used to detect vbus and iddig changes
* @vbus_nb: notifier for vbus detection
* @vbus_nb: notifier for iddig(idpin) detection
* @extcon_reg_dwork: delay work for extcon notifier register, waiting for
*		xHCI driver initialization, it's necessary for system bootup
*		as device.
* @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
* @manual_drd_enabled: it's true when supports dual-role device by debugfs
*		to switch host/device modes depending on user input.
*/
struct otg_switch_mtk {
	struct regulator *vbus;
	struct extcon_dev *edev;
	struct notifier_block vbus_nb;
	struct notifier_block id_nb;
	struct delayed_work extcon_reg_dwork;
	bool is_u3_drd;
	bool manual_drd_enabled;
};

/**
 * @mac_base: register base address of device MAC, exclude xHCI's
 * @ippc_base: register base address of IP Power and Clock interface (IPPC)
 * @vusb33: usb3.3V shared by device/host IP
 * @sys_clk: system clock of mtu3, shared by device/host IP
 * @ref_clk: reference clock
 * @mcu_clk: mcu_bus_ck clock for AHB bus etc
 * @dma_clk: dma_bus_ck clock for AXI bus etc
 * @dr_mode: works in which mode:
 *		host only, device only or dual-role mode
 * @u2_ports: number of usb2.0 host ports
 * @u3_ports: number of usb3.0 host ports
 * @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to
 *		disable u3port0, bit1==1 to disable u3port1,... etc
 * @dbgfs_root: only used when supports manual dual-role switch via debugfs
 * @wakeup_en: it's true when supports remote wakeup in host mode
 */
struct ssusb_mtk {
	struct device *dev;
	struct mtu3 *u3d;
	void __iomem *mac_base;
	void __iomem *ippc_base;
	struct phy **phys;
	int num_phys;
	/* common power & clock */
	struct regulator *vusb33;
	struct clk *sys_clk;
	struct clk *ref_clk;
	struct clk *mcu_clk;
	struct clk *dma_clk;
	/* otg */
	struct otg_switch_mtk otg_switch;
	enum usb_dr_mode dr_mode;
	bool is_host;
	int u2_ports;
	int u3_ports;
	int u3p_dis_msk;
	struct dentry *dbgfs_root;
	/* usb wakeup for host mode */
	bool wakeup_en;
	struct regmap *pericfg;
};

/**
 * @fifo_size: it is (@slot + 1) * @fifo_seg_size
 * @fifo_seg_size: it is roundup_pow_of_two(@maxp)
 */
struct mtu3_ep {
	struct usb_ep ep;
	char name[12];
	struct mtu3 *mtu;
	u8 epnum;
	u8 type;
	u8 is_in;
	u16 maxp;
	int slot;
	u32 fifo_size;
	u32 fifo_addr;
	u32 fifo_seg_size;
	struct mtu3_fifo_info *fifo;

	struct list_head req_list;
	struct mtu3_gpd_ring gpd_ring;
	const struct usb_ss_ep_comp_descriptor *comp_desc;
	const struct usb_endpoint_descriptor *desc;

	int flags;
	u8 wedged;
	u8 busy;
};

struct mtu3_request {
	struct usb_request request;
	struct list_head list;
	struct mtu3_ep *mep;
	struct mtu3 *mtu;
	struct qmu_gpd *gpd;
	int epnum;
};

static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev)
{
	return dev_get_drvdata(dev);
}

/**
 * struct mtu3 - device driver instance data.
 * @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only,
 *		MTU3_U3_IP_SLOT_DEFAULT for U3 IP
 * @may_wakeup: means device's remote wakeup is enabled
 * @is_self_powered: is reported in device status and the config descriptor
 * @delayed_status: true when function drivers ask for delayed status
 * @ep0_req: dummy request used while handling standard USB requests
 *		for GET_STATUS and SET_SEL
 * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
 */
struct mtu3 {
	spinlock_t lock;
	struct ssusb_mtk *ssusb;
	struct device *dev;
	void __iomem *mac_base;
	void __iomem *ippc_base;
	int irq;

	struct mtu3_fifo_info tx_fifo;
	struct mtu3_fifo_info rx_fifo;

	struct mtu3_ep *ep_array;
	struct mtu3_ep *in_eps;
	struct mtu3_ep *out_eps;
	struct mtu3_ep *ep0;
	int num_eps;
	int slot;
	int active_ep;

	struct dma_pool	*qmu_gpd_pool;
	enum mtu3_g_ep0_state ep0_state;
	struct usb_gadget g;	/* the gadget */
	struct usb_gadget_driver *gadget_driver;
	struct mtu3_request ep0_req;
	u8 setup_buf[EP0_RESPONSE_BUF];
	u32 max_speed;

	unsigned is_active:1;
	unsigned may_wakeup:1;
	unsigned is_self_powered:1;
	unsigned test_mode:1;
	unsigned softconnect:1;
	unsigned u1_enable:1;
	unsigned u2_enable:1;
	unsigned is_u3_ip:1;
	unsigned delayed_status:1;

	u8 address;
	u8 test_mode_nr;
	u32 hw_version;
};

static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g)
{
	return container_of(g, struct mtu3, g);
}

static inline int is_first_entry(const struct list_head *list,
	const struct list_head *head)
{
	return list_is_last(head, list);
}

static inline struct mtu3_request *to_mtu3_request(struct usb_request *req)
{
	return req ? container_of(req, struct mtu3_request, request) : NULL;
}

static inline struct mtu3_ep *to_mtu3_ep(struct usb_ep *ep)
{
	return ep ? container_of(ep, struct mtu3_ep, ep) : NULL;
}

static inline struct mtu3_request *next_request(struct mtu3_ep *mep)
{
	return list_first_entry_or_null(&mep->req_list, struct mtu3_request,
					list);
}

static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data)
{
	writel(data, base + offset);
}

static inline u32 mtu3_readl(void __iomem *base, u32 offset)
{
	return readl(base + offset);
}

static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits)
{
	void __iomem *addr = base + offset;
	u32 tmp = readl(addr);

	writel((tmp | (bits)), addr);
}

static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits)
{
	void __iomem *addr = base + offset;
	u32 tmp = readl(addr);

	writel((tmp & ~(bits)), addr);
}

int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks);
struct usb_request *mtu3_alloc_request(struct usb_ep *ep, gfp_t gfp_flags);
void mtu3_free_request(struct usb_ep *ep, struct usb_request *req);
void mtu3_req_complete(struct mtu3_ep *mep,
		struct usb_request *req, int status);

int mtu3_config_ep(struct mtu3 *mtu, struct mtu3_ep *mep,
		int interval, int burst, int mult);
void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep);
void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set);
void mtu3_ep0_setup(struct mtu3 *mtu);
void mtu3_start(struct mtu3 *mtu);
void mtu3_stop(struct mtu3 *mtu);
void mtu3_dev_on_off(struct mtu3 *mtu, int is_on);

int mtu3_gadget_setup(struct mtu3 *mtu);
void mtu3_gadget_cleanup(struct mtu3 *mtu);
void mtu3_gadget_reset(struct mtu3 *mtu);
void mtu3_gadget_suspend(struct mtu3 *mtu);
void mtu3_gadget_resume(struct mtu3 *mtu);
void mtu3_gadget_disconnect(struct mtu3 *mtu);

irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu);
extern const struct usb_ep_ops mtu3_ep0_ops;

#endif
Commit	Line	Data
5fd54ace	1	// SPDX-License-Identifier: GPL-2.0
df2069ac CY	2	/*
	3	* mtu3.h - MediaTek USB3 DRD header
	4	*
	5	* Copyright (C) 2016 MediaTek Inc.
	6	*
	7	* Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
df2069ac CY	8	*/
	9
	10	#ifndef __MTU3_H__
	11	#define __MTU3_H__
	12
	13	#include <linux/device.h>
	14	#include <linux/dmapool.h>
d0ed062a	15	#include <linux/extcon.h>
df2069ac CY	16	#include <linux/interrupt.h>
	17	#include <linux/list.h>
	18	#include <linux/phy/phy.h>
	19	#include <linux/regulator/consumer.h>
	20	#include <linux/usb.h>
	21	#include <linux/usb/ch9.h>
	22	#include <linux/usb/gadget.h>
	23	#include <linux/usb/otg.h>
	24
	25	struct mtu3;
	26	struct mtu3_ep;
	27	struct mtu3_request;
	28
	29	#include "mtu3_hw_regs.h"
	30	#include "mtu3_qmu.h"
	31
	32	#define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
	33	#define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
	34	#define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
	35
	36	#define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
	37	#define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
	38	#define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
	39
1a46dfea CY	40	#define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
	41	#define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
	42
df2069ac CY	43	#define USB_QMU_RQCSR(epnum) (U3D_RXQCSR1 + (((epnum) - 1) * 0x10))
	44	#define USB_QMU_RQSAR(epnum) (U3D_RXQSAR1 + (((epnum) - 1) * 0x10))
	45	#define USB_QMU_RQCPR(epnum) (U3D_RXQCPR1 + (((epnum) - 1) * 0x10))
	46
	47	#define USB_QMU_TQCSR(epnum) (U3D_TXQCSR1 + (((epnum) - 1) * 0x10))
	48	#define USB_QMU_TQSAR(epnum) (U3D_TXQSAR1 + (((epnum) - 1) * 0x10))
	49	#define USB_QMU_TQCPR(epnum) (U3D_TXQCPR1 + (((epnum) - 1) * 0x10))
	50
a29de31b	51	#define SSUSB_U3_CTRL(p) (U3D_SSUSB_U3_CTRL_0P + ((p) * 0x08))
df2069ac CY	52	#define SSUSB_U2_CTRL(p) (U3D_SSUSB_U2_CTRL_0P + ((p) * 0x08))
	53
	54	#define MTU3_DRIVER_NAME "mtu3"
	55	#define DMA_ADDR_INVALID (~(dma_addr_t)0)
	56
	57	#define MTU3_EP_ENABLED BIT(0)
	58	#define MTU3_EP_STALL BIT(1)
	59	#define MTU3_EP_WEDGE BIT(2)
	60	#define MTU3_EP_BUSY BIT(3)
	61
a29de31b	62	#define MTU3_U3_IP_SLOT_DEFAULT 2
df2069ac CY	63	#define MTU3_U2_IP_SLOT_DEFAULT 1
	64
	65	/**
	66	* Normally the device works on HS or SS, to simplify fifo management,
	67	* devide fifo into some 512B parts, use bitmap to manage it; And
	68	* 128 bits size of bitmap is large enough, that means it can manage
	69	* up to 64KB fifo size.
	70	* NOTE: MTU3_EP_FIFO_UNIT should be power of two
	71	*/
	72	#define MTU3_EP_FIFO_UNIT (1 << 9)
	73	#define MTU3_FIFO_BIT_SIZE 128
	74	#define MTU3_U2_IP_EP0_FIFO_SIZE 64
	75
	76	/**
	77	* Maximum size of ep0 response buffer for ch9 requests,
	78	* the SET_SEL request uses 6 so far, and GET_STATUS is 2
	79	*/
	80	#define EP0_RESPONSE_BUF 6
	81
	82	/* device operated link and speed got from DEVICE_CONF register */
	83	enum mtu3_speed {
	84	MTU3_SPEED_INACTIVE = 0,
	85	MTU3_SPEED_FULL = 1,
	86	MTU3_SPEED_HIGH = 3,
a29de31b	87	MTU3_SPEED_SUPER = 4,
4d79e042	88	MTU3_SPEED_SUPER_PLUS = 5,
df2069ac CY	89	};
	90
	91	/**
	92	* @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
	93	* without data stage.
	94	* @MU3D_EP0_STATE_TX: IN data stage
	95	* @MU3D_EP0_STATE_RX: OUT data stage
	96	* @MU3D_EP0_STATE_TX_END: the last IN data is transferred, and
	97	* waits for its completion interrupt
	98	* @MU3D_EP0_STATE_STALL: ep0 is in stall status, will be auto-cleared
	99	* after receives a SETUP.
	100	*/
	101	enum mtu3_g_ep0_state {
	102	MU3D_EP0_STATE_SETUP = 1,
	103	MU3D_EP0_STATE_TX,
	104	MU3D_EP0_STATE_RX,
	105	MU3D_EP0_STATE_TX_END,
	106	MU3D_EP0_STATE_STALL,
	107	};
	108
c776f2c3 CY	109	/**
	110	* MTU3_DR_FORCE_NONE: automatically switch host and periperal mode
	111	* by IDPIN signal.
	112	* MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
	113	* IDPIN signal.
	114	* MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
	115	*/
	116	enum mtu3_dr_force_mode {
	117	MTU3_DR_FORCE_NONE = 0,
	118	MTU3_DR_FORCE_HOST,
	119	MTU3_DR_FORCE_DEVICE,
	120	};
	121
df2069ac CY	122	/**
	123	* @base: the base address of fifo
	124	* @limit: the bitmap size in bits
	125	* @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
	126	*/
	127	struct mtu3_fifo_info {
	128	u32 base;
	129	u32 limit;
	130	DECLARE_BITMAP(bitmap, MTU3_FIFO_BIT_SIZE);
	131	};
	132
	133	/**
	134	* General Purpose Descriptor (GPD):
	135	* The format of TX GPD is a little different from RX one.
	136	* And the size of GPD is 16 bytes.
	137	*
	138	* @flag:
	139	* bit0: Hardware Own (HWO)
	140	* bit1: Buffer Descriptor Present (BDP), always 0, BD is not supported
	141	* bit2: Bypass (BPS), 1: HW skips this GPD if HWO = 1
	142	* bit7: Interrupt On Completion (IOC)
	143	* @chksum: This is used to validate the contents of this GPD;
	144	* If TXQ_CS_EN / RXQ_CS_EN bit is set, an interrupt is issued
	145	* when checksum validation fails;
	146	* Checksum value is calculated over the 16 bytes of the GPD by default;
	147	* @data_buf_len (RX ONLY): This value indicates the length of
	148	* the assigned data buffer
1a46dfea CY	149	* @tx_ext_addr (TX ONLY): [3:0] are 4 extension bits of @buffer,
1a46dfea CY	150	* [7:4] are 4 extension bits of @next_gpd
df2069ac CY	151	* @next_gpd: Physical address of the next GPD
	152	* @buffer: Physical address of the data buffer
	153	* @buf_len:
	154	* (TX): This value indicates the length of the assigned data buffer
	155	* (RX): The total length of data received
	156	* @ext_len: reserved
1a46dfea CY	157	* @rx_ext_addr(RX ONLY): [3:0] are 4 extension bits of @buffer,
1a46dfea CY	158	* [7:4] are 4 extension bits of @next_gpd
df2069ac CY	159	* @ext_flag:
	160	* bit5 (TX ONLY): Zero Length Packet (ZLP),
	161	*/
	162	struct qmu_gpd {
	163	__u8 flag;
	164	__u8 chksum;
1a46dfea CY	165	union {
	166	__le16 data_buf_len;
	167	__le16 tx_ext_addr;
	168	};
df2069ac CY	169	__le32 next_gpd;
	170	__le32 buffer;
	171	__le16 buf_len;
1a46dfea CY	172	union {
	173	__u8 ext_len;
	174	__u8 rx_ext_addr;
	175	};
df2069ac CY	176	__u8 ext_flag;
	177	} __packed;
	178
	179	/**
	180	* dma: physical base address of GPD segment
	181	* start: virtual base address of GPD segment
	182	* end: the last GPD element
	183	* enqueue: the first empty GPD to use
	184	* dequeue: the first completed GPD serviced by ISR
	185	* NOTE: the size of GPD ring should be >= 2
	186	*/
	187	struct mtu3_gpd_ring {
	188	dma_addr_t dma;
	189	struct qmu_gpd *start;
	190	struct qmu_gpd *end;
	191	struct qmu_gpd *enqueue;
	192	struct qmu_gpd *dequeue;
	193	};
d0ed062a CY	194
	195	/**
	196	* @vbus: vbus 5V used by host mode
	197	* @edev: external connector used to detect vbus and iddig changes
	198	* @vbus_nb: notifier for vbus detection
	199	* @vbus_nb: notifier for iddig(idpin) detection
	200	* @extcon_reg_dwork: delay work for extcon notifier register, waiting for
	201	* xHCI driver initialization, it's necessary for system bootup
	202	* as device.
	203	* @is_u3_drd: whether port0 supports usb3.0 dual-role device or not
d0ed062a CY	204	* @manual_drd_enabled: it's true when supports dual-role device by debugfs
	205	* to switch host/device modes depending on user input.
	206	*/
	207	struct otg_switch_mtk {
	208	struct regulator *vbus;
	209	struct extcon_dev *edev;
	210	struct notifier_block vbus_nb;
	211	struct notifier_block id_nb;
	212	struct delayed_work extcon_reg_dwork;
	213	bool is_u3_drd;
d0ed062a CY	214	bool manual_drd_enabled;
	215	};
	216
b3f4e727 CY	217	/**
b3f4e727 CY	218	* @mac_base: register base address of device MAC, exclude xHCI's
d0ed062a	219	* @ippc_base: register base address of IP Power and Clock interface (IPPC)
b3f4e727 CY	220	* @vusb33: usb3.3V shared by device/host IP
b3f4e727 CY	221	* @sys_clk: system clock of mtu3, shared by device/host IP
a316da82 CY	222	* @ref_clk: reference clock
	223	* @mcu_clk: mcu_bus_ck clock for AHB bus etc
	224	* @dma_clk: dma_bus_ck clock for AXI bus etc
b3f4e727 CY	225	* @dr_mode: works in which mode:
	226	* host only, device only or dual-role mode
	227	* @u2_ports: number of usb2.0 host ports
	228	* @u3_ports: number of usb3.0 host ports
076f1a89 CY	229	* @u3p_dis_msk: mask of disabling usb3 ports, for example, bit0==1 to
076f1a89 CY	230	* disable u3port0, bit1==1 to disable u3port1,... etc
d0ed062a	231	* @dbgfs_root: only used when supports manual dual-role switch via debugfs
b3f4e727	232	* @wakeup_en: it's true when supports remote wakeup in host mode
b3f4e727 CY	233	*/
	234	struct ssusb_mtk {
	235	struct device *dev;
	236	struct mtu3 *u3d;
	237	void __iomem *mac_base;
	238	void __iomem *ippc_base;
	239	struct phy **phys;
	240	int num_phys;
	241	/* common power & clock */
	242	struct regulator *vusb33;
	243	struct clk *sys_clk;
4d70d0c6	244	struct clk *ref_clk;
a316da82 CY	245	struct clk *mcu_clk;
a316da82 CY	246	struct clk *dma_clk;
b3f4e727	247	/* otg */
d0ed062a	248	struct otg_switch_mtk otg_switch;
b3f4e727 CY	249	enum usb_dr_mode dr_mode;
	250	bool is_host;
	251	int u2_ports;
	252	int u3_ports;
076f1a89	253	int u3p_dis_msk;
d0ed062a	254	struct dentry *dbgfs_root;
b3f4e727 CY	255	/* usb wakeup for host mode */
b3f4e727 CY	256	bool wakeup_en;
b3f4e727 CY	257	struct regmap *pericfg;
b3f4e727 CY	258	};
df2069ac CY	259
	260	/**
	261	* @fifo_size: it is (@slot + 1) * @fifo_seg_size
	262	* @fifo_seg_size: it is roundup_pow_of_two(@maxp)
	263	*/
	264	struct mtu3_ep {
	265	struct usb_ep ep;
	266	char name[12];
	267	struct mtu3 *mtu;
	268	u8 epnum;
	269	u8 type;
	270	u8 is_in;
	271	u16 maxp;
	272	int slot;
	273	u32 fifo_size;
	274	u32 fifo_addr;
	275	u32 fifo_seg_size;
	276	struct mtu3_fifo_info *fifo;
	277
	278	struct list_head req_list;
	279	struct mtu3_gpd_ring gpd_ring;
a29de31b	280	const struct usb_ss_ep_comp_descriptor *comp_desc;
df2069ac CY	281	const struct usb_endpoint_descriptor *desc;
	282
	283	int flags;
	284	u8 wedged;
	285	u8 busy;
	286	};
	287
	288	struct mtu3_request {
	289	struct usb_request request;
	290	struct list_head list;
	291	struct mtu3_ep *mep;
	292	struct mtu3 *mtu;
	293	struct qmu_gpd *gpd;
	294	int epnum;
	295	};
	296
b3f4e727 CY	297	static inline struct ssusb_mtk dev_to_ssusb(struct device dev)
	298	{
	299	return dev_get_drvdata(dev);
	300	}
	301
df2069ac CY	302	/**
df2069ac CY	303	* struct mtu3 - device driver instance data.
a29de31b CY	304	* @slot: MTU3_U2_IP_SLOT_DEFAULT for U2 IP only,
a29de31b CY	305	* MTU3_U3_IP_SLOT_DEFAULT for U3 IP
df2069ac CY	306	* @may_wakeup: means device's remote wakeup is enabled
df2069ac CY	307	* @is_self_powered: is reported in device status and the config descriptor
fe7c994a	308	* @delayed_status: true when function drivers ask for delayed status
df2069ac CY	309	* @ep0_req: dummy request used while handling standard USB requests
	310	* for GET_STATUS and SET_SEL
	311	* @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests
	312	*/
	313	struct mtu3 {
	314	spinlock_t lock;
b3f4e727	315	struct ssusb_mtk *ssusb;
df2069ac CY	316	struct device *dev;
	317	void __iomem *mac_base;
	318	void __iomem *ippc_base;
df2069ac CY	319	int irq;
	320
	321	struct mtu3_fifo_info tx_fifo;
	322	struct mtu3_fifo_info rx_fifo;
	323
	324	struct mtu3_ep *ep_array;
	325	struct mtu3_ep *in_eps;
	326	struct mtu3_ep *out_eps;
	327	struct mtu3_ep *ep0;
	328	int num_eps;
	329	int slot;
	330	int active_ep;
	331
	332	struct dma_pool *qmu_gpd_pool;
	333	enum mtu3_g_ep0_state ep0_state;
	334	struct usb_gadget g; /* the gadget */
	335	struct usb_gadget_driver *gadget_driver;
	336	struct mtu3_request ep0_req;
	337	u8 setup_buf[EP0_RESPONSE_BUF];
a29de31b	338	u32 max_speed;
df2069ac CY	339
	340	unsigned is_active:1;
	341	unsigned may_wakeup:1;
	342	unsigned is_self_powered:1;
	343	unsigned test_mode:1;
	344	unsigned softconnect:1;
a29de31b CY	345	unsigned u1_enable:1;
	346	unsigned u2_enable:1;
	347	unsigned is_u3_ip:1;
fe7c994a	348	unsigned delayed_status:1;
df2069ac CY	349
	350	u8 address;
	351	u8 test_mode_nr;
	352	u32 hw_version;
	353	};
	354
	355	static inline struct mtu3 gadget_to_mtu3(struct usb_gadget g)
	356	{
	357	return container_of(g, struct mtu3, g);
	358	}
	359
	360	static inline int is_first_entry(const struct list_head *list,
	361	const struct list_head *head)
	362	{
	363	return list_is_last(head, list);
	364	}
	365
	366	static inline struct mtu3_request to_mtu3_request(struct usb_request req)
	367	{
	368	return req ? container_of(req, struct mtu3_request, request) : NULL;
	369	}
	370
	371	static inline struct mtu3_ep to_mtu3_ep(struct usb_ep ep)
	372	{
	373	return ep ? container_of(ep, struct mtu3_ep, ep) : NULL;
	374	}
	375
	376	static inline struct mtu3_request next_request(struct mtu3_ep mep)
	377	{
9b4632ef MY	378	return list_first_entry_or_null(&mep->req_list, struct mtu3_request,
9b4632ef MY	379	list);
df2069ac CY	380	}
	381
	382	static inline void mtu3_writel(void __iomem *base, u32 offset, u32 data)
	383	{
	384	writel(data, base + offset);
	385	}
	386
	387	static inline u32 mtu3_readl(void __iomem *base, u32 offset)
	388	{
	389	return readl(base + offset);
	390	}
	391
	392	static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits)
	393	{
	394	void __iomem *addr = base + offset;
	395	u32 tmp = readl(addr);
	396
	397	writel((tmp \| (bits)), addr);
	398	}
	399
	400	static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits)
	401	{
	402	void __iomem *addr = base + offset;
	403	u32 tmp = readl(addr);
	404
	405	writel((tmp & ~(bits)), addr);
	406	}
	407
b3f4e727	408	int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks);
df2069ac CY	409	struct usb_request mtu3_alloc_request(struct usb_ep ep, gfp_t gfp_flags);
	410	void mtu3_free_request(struct usb_ep ep, struct usb_request req);
	411	void mtu3_req_complete(struct mtu3_ep *mep,
	412	struct usb_request *req, int status);
	413
	414	int mtu3_config_ep(struct mtu3 mtu, struct mtu3_ep mep,
	415	int interval, int burst, int mult);
	416	void mtu3_deconfig_ep(struct mtu3 mtu, struct mtu3_ep mep);
	417	void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set);
	418	void mtu3_ep0_setup(struct mtu3 *mtu);
	419	void mtu3_start(struct mtu3 *mtu);
	420	void mtu3_stop(struct mtu3 *mtu);
a29de31b	421	void mtu3_dev_on_off(struct mtu3 *mtu, int is_on);
df2069ac CY	422
	423	int mtu3_gadget_setup(struct mtu3 *mtu);
	424	void mtu3_gadget_cleanup(struct mtu3 *mtu);
	425	void mtu3_gadget_reset(struct mtu3 *mtu);
	426	void mtu3_gadget_suspend(struct mtu3 *mtu);
	427	void mtu3_gadget_resume(struct mtu3 *mtu);
	428	void mtu3_gadget_disconnect(struct mtu3 *mtu);
df2069ac CY	429
	430	irqreturn_t mtu3_ep0_isr(struct mtu3 *mtu);
	431	extern const struct usb_ep_ops mtu3_ep0_ops;
	432
	433	#endif