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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0 |
3ee076de SS |
2 | /* |
3 | * Texas Instruments DA8xx/OMAP-L1x "glue layer" | |
4 | * | |
5 | * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com> | |
6 | * | |
7 | * Based on the DaVinci "glue layer" code. | |
8 | * Copyright (C) 2005-2006 by Texas Instruments | |
9 | * | |
35bd67b2 PK |
10 | * DT support |
11 | * Copyright (c) 2016 Petr Kulhavy <petr@barix.com> | |
12 | * | |
3ee076de | 13 | * This file is part of the Inventra Controller Driver for Linux. |
3ee076de SS |
14 | */ |
15 | ||
ab570da2 | 16 | #include <linux/module.h> |
3ee076de | 17 | #include <linux/clk.h> |
ded017ee | 18 | #include <linux/err.h> |
3ee076de | 19 | #include <linux/io.h> |
d6299b6e | 20 | #include <linux/of_platform.h> |
947c49af | 21 | #include <linux/phy/phy.h> |
8ceae51e FB |
22 | #include <linux/platform_device.h> |
23 | #include <linux/dma-mapping.h> | |
d7078df6 | 24 | #include <linux/usb/usb_phy_generic.h> |
3ee076de | 25 | |
3ee076de SS |
26 | #include "musb_core.h" |
27 | ||
28 | /* | |
29 | * DA8XX specific definitions | |
30 | */ | |
31 | ||
32 | /* USB 2.0 OTG module registers */ | |
33 | #define DA8XX_USB_REVISION_REG 0x00 | |
34 | #define DA8XX_USB_CTRL_REG 0x04 | |
35 | #define DA8XX_USB_STAT_REG 0x08 | |
36 | #define DA8XX_USB_EMULATION_REG 0x0c | |
3ee076de | 37 | #define DA8XX_USB_SRP_FIX_TIME_REG 0x18 |
3ee076de SS |
38 | #define DA8XX_USB_INTR_SRC_REG 0x20 |
39 | #define DA8XX_USB_INTR_SRC_SET_REG 0x24 | |
40 | #define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28 | |
41 | #define DA8XX_USB_INTR_MASK_REG 0x2c | |
42 | #define DA8XX_USB_INTR_MASK_SET_REG 0x30 | |
43 | #define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34 | |
44 | #define DA8XX_USB_INTR_SRC_MASKED_REG 0x38 | |
45 | #define DA8XX_USB_END_OF_INTR_REG 0x3c | |
46 | #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2)) | |
47 | ||
48 | /* Control register bits */ | |
49 | #define DA8XX_SOFT_RESET_MASK 1 | |
50 | ||
51 | #define DA8XX_USB_TX_EP_MASK 0x1f /* EP0 + 4 Tx EPs */ | |
52 | #define DA8XX_USB_RX_EP_MASK 0x1e /* 4 Rx EPs */ | |
53 | ||
54 | /* USB interrupt register bits */ | |
55 | #define DA8XX_INTR_USB_SHIFT 16 | |
56 | #define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */ | |
57 | /* interrupts and DRVVBUS interrupt */ | |
58 | #define DA8XX_INTR_DRVVBUS 0x100 | |
59 | #define DA8XX_INTR_RX_SHIFT 8 | |
60 | #define DA8XX_INTR_RX_MASK (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT) | |
61 | #define DA8XX_INTR_TX_SHIFT 0 | |
62 | #define DA8XX_INTR_TX_MASK (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT) | |
63 | ||
64 | #define DA8XX_MENTOR_CORE_OFFSET 0x400 | |
65 | ||
e6480faa FB |
66 | struct da8xx_glue { |
67 | struct device *dev; | |
68 | struct platform_device *musb; | |
947c49af | 69 | struct platform_device *usb_phy; |
03491761 | 70 | struct clk *clk; |
947c49af | 71 | struct phy *phy; |
e6480faa FB |
72 | }; |
73 | ||
3ee076de SS |
74 | /* |
75 | * Because we don't set CTRL.UINT, it's "important" to: | |
76 | * - not read/write INTRUSB/INTRUSBE (except during | |
77 | * initial setup, as a workaround); | |
78 | * - use INTSET/INTCLR instead. | |
79 | */ | |
80 | ||
81 | /** | |
743411b3 | 82 | * da8xx_musb_enable - enable interrupts |
3ee076de | 83 | */ |
743411b3 | 84 | static void da8xx_musb_enable(struct musb *musb) |
3ee076de SS |
85 | { |
86 | void __iomem *reg_base = musb->ctrl_base; | |
87 | u32 mask; | |
88 | ||
89 | /* Workaround: setup IRQs through both register sets. */ | |
90 | mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) | | |
91 | ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) | | |
92 | DA8XX_INTR_USB_MASK; | |
93 | musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask); | |
94 | ||
95 | /* Force the DRVVBUS IRQ so we can start polling for ID change. */ | |
032ec49f FB |
96 | musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG, |
97 | DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT); | |
3ee076de SS |
98 | } |
99 | ||
100 | /** | |
743411b3 | 101 | * da8xx_musb_disable - disable HDRC and flush interrupts |
3ee076de | 102 | */ |
743411b3 | 103 | static void da8xx_musb_disable(struct musb *musb) |
3ee076de SS |
104 | { |
105 | void __iomem *reg_base = musb->ctrl_base; | |
106 | ||
107 | musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG, | |
108 | DA8XX_INTR_USB_MASK | | |
109 | DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK); | |
3ee076de SS |
110 | musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); |
111 | } | |
112 | ||
62285963 | 113 | #define portstate(stmt) stmt |
3ee076de | 114 | |
743411b3 | 115 | static void da8xx_musb_set_vbus(struct musb *musb, int is_on) |
3ee076de SS |
116 | { |
117 | WARN_ON(is_on && is_peripheral_active(musb)); | |
118 | } | |
119 | ||
120 | #define POLL_SECONDS 2 | |
121 | ||
05678497 | 122 | static void otg_timer(struct timer_list *t) |
3ee076de | 123 | { |
05678497 | 124 | struct musb *musb = from_timer(musb, t, dev_timer); |
3ee076de SS |
125 | void __iomem *mregs = musb->mregs; |
126 | u8 devctl; | |
127 | unsigned long flags; | |
128 | ||
129 | /* | |
130 | * We poll because DaVinci's won't expose several OTG-critical | |
131 | * status change events (from the transceiver) otherwise. | |
132 | */ | |
133 | devctl = musb_readb(mregs, MUSB_DEVCTL); | |
5c8a86e1 | 134 | dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, |
e47d9254 | 135 | usb_otg_state_string(musb->xceiv->otg->state)); |
3ee076de SS |
136 | |
137 | spin_lock_irqsave(&musb->lock, flags); | |
e47d9254 | 138 | switch (musb->xceiv->otg->state) { |
3ee076de SS |
139 | case OTG_STATE_A_WAIT_BCON: |
140 | devctl &= ~MUSB_DEVCTL_SESSION; | |
141 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
142 | ||
143 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
144 | if (devctl & MUSB_DEVCTL_BDEVICE) { | |
e47d9254 | 145 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
3ee076de SS |
146 | MUSB_DEV_MODE(musb); |
147 | } else { | |
e47d9254 | 148 | musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
3ee076de SS |
149 | MUSB_HST_MODE(musb); |
150 | } | |
151 | break; | |
152 | case OTG_STATE_A_WAIT_VFALL: | |
153 | /* | |
154 | * Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3 | |
155 | * RTL seems to mis-handle session "start" otherwise (or in | |
156 | * our case "recover"), in routine "VBUS was valid by the time | |
157 | * VBUSERR got reported during enumeration" cases. | |
158 | */ | |
159 | if (devctl & MUSB_DEVCTL_VBUS) { | |
05678497 | 160 | mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ); |
3ee076de SS |
161 | break; |
162 | } | |
e47d9254 | 163 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
3ee076de SS |
164 | musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG, |
165 | MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT); | |
166 | break; | |
167 | case OTG_STATE_B_IDLE: | |
3ee076de SS |
168 | /* |
169 | * There's no ID-changed IRQ, so we have no good way to tell | |
170 | * when to switch to the A-Default state machine (by setting | |
171 | * the DEVCTL.Session bit). | |
172 | * | |
173 | * Workaround: whenever we're in B_IDLE, try setting the | |
174 | * session flag every few seconds. If it works, ID was | |
175 | * grounded and we're now in the A-Default state machine. | |
176 | * | |
177 | * NOTE: setting the session flag is _supposed_ to trigger | |
178 | * SRP but clearly it doesn't. | |
179 | */ | |
180 | musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION); | |
181 | devctl = musb_readb(mregs, MUSB_DEVCTL); | |
182 | if (devctl & MUSB_DEVCTL_BDEVICE) | |
05678497 | 183 | mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ); |
3ee076de | 184 | else |
e47d9254 | 185 | musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
3ee076de SS |
186 | break; |
187 | default: | |
188 | break; | |
189 | } | |
190 | spin_unlock_irqrestore(&musb->lock, flags); | |
191 | } | |
192 | ||
743411b3 | 193 | static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout) |
3ee076de SS |
194 | { |
195 | static unsigned long last_timer; | |
196 | ||
3ee076de SS |
197 | if (timeout == 0) |
198 | timeout = jiffies + msecs_to_jiffies(3); | |
199 | ||
200 | /* Never idle if active, or when VBUS timeout is not set as host */ | |
201 | if (musb->is_active || (musb->a_wait_bcon == 0 && | |
e47d9254 | 202 | musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) { |
5c8a86e1 | 203 | dev_dbg(musb->controller, "%s active, deleting timer\n", |
e47d9254 | 204 | usb_otg_state_string(musb->xceiv->otg->state)); |
05678497 | 205 | del_timer(&musb->dev_timer); |
3ee076de SS |
206 | last_timer = jiffies; |
207 | return; | |
208 | } | |
209 | ||
05678497 | 210 | if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) { |
5c8a86e1 | 211 | dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n"); |
3ee076de SS |
212 | return; |
213 | } | |
214 | last_timer = timeout; | |
215 | ||
5c8a86e1 | 216 | dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", |
e47d9254 | 217 | usb_otg_state_string(musb->xceiv->otg->state), |
3df00453 | 218 | jiffies_to_msecs(timeout - jiffies)); |
05678497 | 219 | mod_timer(&musb->dev_timer, timeout); |
3ee076de SS |
220 | } |
221 | ||
743411b3 | 222 | static irqreturn_t da8xx_musb_interrupt(int irq, void *hci) |
3ee076de SS |
223 | { |
224 | struct musb *musb = hci; | |
225 | void __iomem *reg_base = musb->ctrl_base; | |
d445b6da | 226 | struct usb_otg *otg = musb->xceiv->otg; |
3ee076de SS |
227 | unsigned long flags; |
228 | irqreturn_t ret = IRQ_NONE; | |
229 | u32 status; | |
230 | ||
231 | spin_lock_irqsave(&musb->lock, flags); | |
232 | ||
233 | /* | |
234 | * NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through | |
235 | * the Mentor registers (except for setup), use the TI ones and EOI. | |
236 | */ | |
237 | ||
238 | /* Acknowledge and handle non-CPPI interrupts */ | |
239 | status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG); | |
240 | if (!status) | |
241 | goto eoi; | |
242 | ||
243 | musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status); | |
5c8a86e1 | 244 | dev_dbg(musb->controller, "USB IRQ %08x\n", status); |
3ee076de SS |
245 | |
246 | musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT; | |
247 | musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT; | |
248 | musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT; | |
249 | ||
250 | /* | |
251 | * DRVVBUS IRQs are the only proxy we have (a very poor one!) for | |
252 | * DA8xx's missing ID change IRQ. We need an ID change IRQ to | |
253 | * switch appropriately between halves of the OTG state machine. | |
254 | * Managing DEVCTL.Session per Mentor docs requires that we know its | |
255 | * value but DEVCTL.BDevice is invalid without DEVCTL.Session set. | |
256 | * Also, DRVVBUS pulses for SRP (but not at 5 V)... | |
257 | */ | |
258 | if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) { | |
259 | int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG); | |
260 | void __iomem *mregs = musb->mregs; | |
261 | u8 devctl = musb_readb(mregs, MUSB_DEVCTL); | |
262 | int err; | |
263 | ||
db9e5161 | 264 | err = musb->int_usb & MUSB_INTR_VBUSERROR; |
3ee076de SS |
265 | if (err) { |
266 | /* | |
267 | * The Mentor core doesn't debounce VBUS as needed | |
268 | * to cope with device connect current spikes. This | |
269 | * means it's not uncommon for bus-powered devices | |
270 | * to get VBUS errors during enumeration. | |
271 | * | |
272 | * This is a workaround, but newer RTL from Mentor | |
273 | * seems to allow a better one: "re"-starting sessions | |
274 | * without waiting for VBUS to stop registering in | |
275 | * devctl. | |
276 | */ | |
277 | musb->int_usb &= ~MUSB_INTR_VBUSERROR; | |
e47d9254 | 278 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; |
05678497 | 279 | mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ); |
3ee076de | 280 | WARNING("VBUS error workaround (delay coming)\n"); |
032ec49f | 281 | } else if (drvvbus) { |
3ee076de | 282 | MUSB_HST_MODE(musb); |
d445b6da | 283 | otg->default_a = 1; |
e47d9254 | 284 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
3ee076de | 285 | portstate(musb->port1_status |= USB_PORT_STAT_POWER); |
05678497 | 286 | del_timer(&musb->dev_timer); |
3ee076de SS |
287 | } else { |
288 | musb->is_active = 0; | |
289 | MUSB_DEV_MODE(musb); | |
d445b6da | 290 | otg->default_a = 0; |
e47d9254 | 291 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
3ee076de SS |
292 | portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); |
293 | } | |
294 | ||
5c8a86e1 | 295 | dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", |
3ee076de | 296 | drvvbus ? "on" : "off", |
e47d9254 | 297 | usb_otg_state_string(musb->xceiv->otg->state), |
3ee076de SS |
298 | err ? " ERROR" : "", |
299 | devctl); | |
300 | ret = IRQ_HANDLED; | |
301 | } | |
302 | ||
303 | if (musb->int_tx || musb->int_rx || musb->int_usb) | |
304 | ret |= musb_interrupt(musb); | |
305 | ||
306 | eoi: | |
307 | /* EOI needs to be written for the IRQ to be re-asserted. */ | |
308 | if (ret == IRQ_HANDLED || status) | |
309 | musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); | |
310 | ||
311 | /* Poll for ID change */ | |
e47d9254 | 312 | if (musb->xceiv->otg->state == OTG_STATE_B_IDLE) |
05678497 | 313 | mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ); |
3ee076de SS |
314 | |
315 | spin_unlock_irqrestore(&musb->lock, flags); | |
316 | ||
317 | return ret; | |
318 | } | |
319 | ||
743411b3 | 320 | static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode) |
3ee076de | 321 | { |
947c49af DL |
322 | struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent); |
323 | enum phy_mode phy_mode; | |
3ee076de | 324 | |
7ccf6294 AB |
325 | /* |
326 | * The PHY has some issues when it is forced in device or host mode. | |
327 | * Unless the user request another mode, configure the PHY in OTG mode. | |
328 | */ | |
329 | if (!musb->is_initialized) | |
330 | return phy_set_mode(glue->phy, PHY_MODE_USB_OTG); | |
331 | ||
3ee076de | 332 | switch (musb_mode) { |
3ee076de | 333 | case MUSB_HOST: /* Force VBUS valid, ID = 0 */ |
947c49af | 334 | phy_mode = PHY_MODE_USB_HOST; |
3ee076de | 335 | break; |
3ee076de | 336 | case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ |
947c49af | 337 | phy_mode = PHY_MODE_USB_DEVICE; |
3ee076de | 338 | break; |
3ee076de | 339 | case MUSB_OTG: /* Don't override the VBUS/ID comparators */ |
947c49af | 340 | phy_mode = PHY_MODE_USB_OTG; |
3ee076de | 341 | break; |
3ee076de | 342 | default: |
947c49af | 343 | return -EINVAL; |
3ee076de SS |
344 | } |
345 | ||
947c49af | 346 | return phy_set_mode(glue->phy, phy_mode); |
3ee076de SS |
347 | } |
348 | ||
743411b3 | 349 | static int da8xx_musb_init(struct musb *musb) |
3ee076de | 350 | { |
947c49af | 351 | struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent); |
3ee076de SS |
352 | void __iomem *reg_base = musb->ctrl_base; |
353 | u32 rev; | |
25736e0c | 354 | int ret = -ENODEV; |
3ee076de SS |
355 | |
356 | musb->mregs += DA8XX_MENTOR_CORE_OFFSET; | |
357 | ||
09721ba6 AB |
358 | ret = clk_prepare_enable(glue->clk); |
359 | if (ret) { | |
360 | dev_err(glue->dev, "failed to enable clock\n"); | |
361 | return ret; | |
362 | } | |
363 | ||
3ee076de SS |
364 | /* Returns zero if e.g. not clocked */ |
365 | rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG); | |
366 | if (!rev) | |
367 | goto fail; | |
368 | ||
662dca54 | 369 | musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); |
25736e0c ML |
370 | if (IS_ERR_OR_NULL(musb->xceiv)) { |
371 | ret = -EPROBE_DEFER; | |
3ee076de | 372 | goto fail; |
25736e0c | 373 | } |
3ee076de | 374 | |
05678497 | 375 | timer_setup(&musb->dev_timer, otg_timer, 0); |
3ee076de | 376 | |
3ee076de SS |
377 | /* Reset the controller */ |
378 | musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK); | |
379 | ||
380 | /* Start the on-chip PHY and its PLL. */ | |
947c49af DL |
381 | ret = phy_init(glue->phy); |
382 | if (ret) { | |
383 | dev_err(glue->dev, "Failed to init phy.\n"); | |
09721ba6 | 384 | goto fail; |
947c49af DL |
385 | } |
386 | ||
387 | ret = phy_power_on(glue->phy); | |
388 | if (ret) { | |
389 | dev_err(glue->dev, "Failed to power on phy.\n"); | |
390 | goto err_phy_power_on; | |
391 | } | |
3ee076de SS |
392 | |
393 | msleep(5); | |
394 | ||
395 | /* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */ | |
947c49af | 396 | pr_debug("DA8xx OTG revision %08x, control %02x\n", rev, |
3ee076de SS |
397 | musb_readb(reg_base, DA8XX_USB_CTRL_REG)); |
398 | ||
743411b3 | 399 | musb->isr = da8xx_musb_interrupt; |
3ee076de | 400 | return 0; |
947c49af DL |
401 | |
402 | err_phy_power_on: | |
403 | phy_exit(glue->phy); | |
3ee076de | 404 | fail: |
09721ba6 | 405 | clk_disable_unprepare(glue->clk); |
25736e0c | 406 | return ret; |
3ee076de SS |
407 | } |
408 | ||
743411b3 | 409 | static int da8xx_musb_exit(struct musb *musb) |
3ee076de | 410 | { |
947c49af DL |
411 | struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent); |
412 | ||
05678497 | 413 | del_timer_sync(&musb->dev_timer); |
3ee076de | 414 | |
947c49af DL |
415 | phy_power_off(glue->phy); |
416 | phy_exit(glue->phy); | |
417 | clk_disable_unprepare(glue->clk); | |
3ee076de | 418 | |
721002ec | 419 | usb_put_phy(musb->xceiv); |
3ee076de | 420 | |
3ee076de SS |
421 | return 0; |
422 | } | |
743411b3 | 423 | |
35bd67b2 PK |
424 | static inline u8 get_vbus_power(struct device *dev) |
425 | { | |
426 | struct regulator *vbus_supply; | |
427 | int current_uA; | |
428 | ||
429 | vbus_supply = regulator_get_optional(dev, "vbus"); | |
430 | if (IS_ERR(vbus_supply)) | |
431 | return 255; | |
432 | current_uA = regulator_get_current_limit(vbus_supply); | |
433 | regulator_put(vbus_supply); | |
434 | if (current_uA <= 0 || current_uA > 510000) | |
435 | return 255; | |
436 | return current_uA / 1000 / 2; | |
437 | } | |
438 | ||
d6299b6e AB |
439 | #ifdef CONFIG_USB_TI_CPPI41_DMA |
440 | static void da8xx_dma_controller_callback(struct dma_controller *c) | |
441 | { | |
442 | struct musb *musb = c->musb; | |
443 | void __iomem *reg_base = musb->ctrl_base; | |
444 | ||
445 | musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); | |
446 | } | |
447 | ||
448 | static struct dma_controller * | |
449 | da8xx_dma_controller_create(struct musb *musb, void __iomem *base) | |
450 | { | |
451 | struct dma_controller *controller; | |
452 | ||
453 | controller = cppi41_dma_controller_create(musb, base); | |
454 | if (IS_ERR_OR_NULL(controller)) | |
455 | return controller; | |
456 | ||
457 | controller->dma_callback = da8xx_dma_controller_callback; | |
458 | ||
459 | return controller; | |
460 | } | |
461 | #endif | |
462 | ||
f7ec9437 | 463 | static const struct musb_platform_ops da8xx_ops = { |
d6299b6e | 464 | .quirks = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION | |
593bc462 | 465 | MUSB_DMA_CPPI41 | MUSB_DA8XX, |
743411b3 FB |
466 | .init = da8xx_musb_init, |
467 | .exit = da8xx_musb_exit, | |
468 | ||
8a77f05a | 469 | .fifo_mode = 2, |
d6299b6e AB |
470 | #ifdef CONFIG_USB_TI_CPPI41_DMA |
471 | .dma_init = da8xx_dma_controller_create, | |
472 | .dma_exit = cppi41_dma_controller_destroy, | |
473 | #endif | |
743411b3 FB |
474 | .enable = da8xx_musb_enable, |
475 | .disable = da8xx_musb_disable, | |
476 | ||
477 | .set_mode = da8xx_musb_set_mode, | |
478 | .try_idle = da8xx_musb_try_idle, | |
479 | ||
480 | .set_vbus = da8xx_musb_set_vbus, | |
481 | }; | |
8ceae51e | 482 | |
af384875 RK |
483 | static const struct platform_device_info da8xx_dev_info = { |
484 | .name = "musb-hdrc", | |
485 | .id = PLATFORM_DEVID_AUTO, | |
486 | .dma_mask = DMA_BIT_MASK(32), | |
487 | }; | |
8ceae51e | 488 | |
35bd67b2 PK |
489 | static const struct musb_hdrc_config da8xx_config = { |
490 | .ram_bits = 10, | |
491 | .num_eps = 5, | |
492 | .multipoint = 1, | |
493 | }; | |
494 | ||
9f41ebfb | 495 | static struct of_dev_auxdata da8xx_auxdata_lookup[] = { |
d6299b6e AB |
496 | OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine", |
497 | NULL), | |
498 | {} | |
499 | }; | |
500 | ||
41ac7b3a | 501 | static int da8xx_probe(struct platform_device *pdev) |
8ceae51e | 502 | { |
09fc7d22 | 503 | struct resource musb_resources[2]; |
c1a7d67c | 504 | struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev); |
e6480faa | 505 | struct da8xx_glue *glue; |
af384875 | 506 | struct platform_device_info pinfo; |
03491761 | 507 | struct clk *clk; |
35bd67b2 | 508 | struct device_node *np = pdev->dev.of_node; |
d458fe9a | 509 | int ret; |
03491761 | 510 | |
d458fe9a | 511 | glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); |
92c0c490 | 512 | if (!glue) |
d458fe9a | 513 | return -ENOMEM; |
e6480faa | 514 | |
d458fe9a | 515 | clk = devm_clk_get(&pdev->dev, "usb20"); |
03491761 FB |
516 | if (IS_ERR(clk)) { |
517 | dev_err(&pdev->dev, "failed to get clock\n"); | |
d458fe9a | 518 | return PTR_ERR(clk); |
03491761 FB |
519 | } |
520 | ||
947c49af DL |
521 | glue->phy = devm_phy_get(&pdev->dev, "usb-phy"); |
522 | if (IS_ERR(glue->phy)) { | |
355f1a39 DL |
523 | if (PTR_ERR(glue->phy) != -EPROBE_DEFER) |
524 | dev_err(&pdev->dev, "failed to get phy\n"); | |
947c49af | 525 | return PTR_ERR(glue->phy); |
03491761 FB |
526 | } |
527 | ||
e6480faa | 528 | glue->dev = &pdev->dev; |
03491761 | 529 | glue->clk = clk; |
e6480faa | 530 | |
35bd67b2 PK |
531 | if (IS_ENABLED(CONFIG_OF) && np) { |
532 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); | |
533 | if (!pdata) | |
534 | return -ENOMEM; | |
535 | ||
536 | pdata->config = &da8xx_config; | |
537 | pdata->mode = musb_get_mode(&pdev->dev); | |
538 | pdata->power = get_vbus_power(&pdev->dev); | |
539 | } | |
540 | ||
f7ec9437 FB |
541 | pdata->platform_ops = &da8xx_ops; |
542 | ||
947c49af | 543 | glue->usb_phy = usb_phy_generic_register(); |
984f3be5 AB |
544 | ret = PTR_ERR_OR_ZERO(glue->usb_phy); |
545 | if (ret) { | |
947c49af | 546 | dev_err(&pdev->dev, "failed to register usb_phy\n"); |
984f3be5 | 547 | return ret; |
2f36ff69 | 548 | } |
e6480faa | 549 | platform_set_drvdata(pdev, glue); |
8ceae51e | 550 | |
d6299b6e AB |
551 | ret = of_platform_populate(pdev->dev.of_node, NULL, |
552 | da8xx_auxdata_lookup, &pdev->dev); | |
553 | if (ret) | |
554 | return ret; | |
555 | ||
09fc7d22 FB |
556 | memset(musb_resources, 0x00, sizeof(*musb_resources) * |
557 | ARRAY_SIZE(musb_resources)); | |
558 | ||
559 | musb_resources[0].name = pdev->resource[0].name; | |
560 | musb_resources[0].start = pdev->resource[0].start; | |
561 | musb_resources[0].end = pdev->resource[0].end; | |
562 | musb_resources[0].flags = pdev->resource[0].flags; | |
563 | ||
564 | musb_resources[1].name = pdev->resource[1].name; | |
565 | musb_resources[1].start = pdev->resource[1].start; | |
566 | musb_resources[1].end = pdev->resource[1].end; | |
567 | musb_resources[1].flags = pdev->resource[1].flags; | |
568 | ||
af384875 RK |
569 | pinfo = da8xx_dev_info; |
570 | pinfo.parent = &pdev->dev; | |
571 | pinfo.res = musb_resources; | |
572 | pinfo.num_res = ARRAY_SIZE(musb_resources); | |
573 | pinfo.data = pdata; | |
574 | pinfo.size_data = sizeof(*pdata); | |
575 | ||
984f3be5 AB |
576 | glue->musb = platform_device_register_full(&pinfo); |
577 | ret = PTR_ERR_OR_ZERO(glue->musb); | |
578 | if (ret) { | |
af384875 | 579 | dev_err(&pdev->dev, "failed to register musb device: %d\n", ret); |
947c49af | 580 | usb_phy_generic_unregister(glue->usb_phy); |
8ceae51e FB |
581 | } |
582 | ||
984f3be5 | 583 | return ret; |
8ceae51e FB |
584 | } |
585 | ||
fb4e98ab | 586 | static int da8xx_remove(struct platform_device *pdev) |
8ceae51e | 587 | { |
e6480faa | 588 | struct da8xx_glue *glue = platform_get_drvdata(pdev); |
8ceae51e | 589 | |
b59e906c | 590 | platform_device_unregister(glue->musb); |
947c49af | 591 | usb_phy_generic_unregister(glue->usb_phy); |
8ceae51e FB |
592 | |
593 | return 0; | |
594 | } | |
595 | ||
71f5a0ad AB |
596 | #ifdef CONFIG_PM_SLEEP |
597 | static int da8xx_suspend(struct device *dev) | |
598 | { | |
599 | int ret; | |
600 | struct da8xx_glue *glue = dev_get_drvdata(dev); | |
601 | ||
602 | ret = phy_power_off(glue->phy); | |
603 | if (ret) | |
604 | return ret; | |
605 | clk_disable_unprepare(glue->clk); | |
606 | ||
607 | return 0; | |
608 | } | |
609 | ||
610 | static int da8xx_resume(struct device *dev) | |
611 | { | |
612 | int ret; | |
613 | struct da8xx_glue *glue = dev_get_drvdata(dev); | |
614 | ||
615 | ret = clk_prepare_enable(glue->clk); | |
616 | if (ret) | |
617 | return ret; | |
618 | return phy_power_on(glue->phy); | |
619 | } | |
620 | #endif | |
621 | ||
622 | static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume); | |
623 | ||
35bd67b2 PK |
624 | #ifdef CONFIG_OF |
625 | static const struct of_device_id da8xx_id_table[] = { | |
626 | { | |
627 | .compatible = "ti,da830-musb", | |
628 | }, | |
629 | {}, | |
630 | }; | |
631 | MODULE_DEVICE_TABLE(of, da8xx_id_table); | |
632 | #endif | |
633 | ||
8ceae51e | 634 | static struct platform_driver da8xx_driver = { |
e9e8c85e | 635 | .probe = da8xx_probe, |
7690417d | 636 | .remove = da8xx_remove, |
8ceae51e FB |
637 | .driver = { |
638 | .name = "musb-da8xx", | |
71f5a0ad | 639 | .pm = &da8xx_pm_ops, |
35bd67b2 | 640 | .of_match_table = of_match_ptr(da8xx_id_table), |
8ceae51e FB |
641 | }, |
642 | }; | |
643 | ||
644 | MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer"); | |
645 | MODULE_AUTHOR("Sergei Shtylyov <sshtylyov@ru.mvista.com>"); | |
646 | MODULE_LICENSE("GPL v2"); | |
0b07734d | 647 | module_platform_driver(da8xx_driver); |