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0990366b MG |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Copyright (C) 2019 MediaTek Inc. | |
4 | * | |
5 | * Author: | |
6 | * Min Guo <min.guo@mediatek.com> | |
7 | * Yonglong Wu <yonglong.wu@mediatek.com> | |
8 | */ | |
9 | ||
10 | #include <linux/clk.h> | |
11 | #include <linux/dma-mapping.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/of_platform.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/usb/role.h> | |
16 | #include <linux/usb/usb_phy_generic.h> | |
17 | #include "musb_core.h" | |
18 | #include "musb_dma.h" | |
19 | ||
20 | #define USB_L1INTS 0x00a0 | |
21 | #define USB_L1INTM 0x00a4 | |
22 | #define MTK_MUSB_TXFUNCADDR 0x0480 | |
23 | ||
24 | /* MediaTek controller toggle enable and status reg */ | |
25 | #define MUSB_RXTOG 0x80 | |
26 | #define MUSB_RXTOGEN 0x82 | |
27 | #define MUSB_TXTOG 0x84 | |
28 | #define MUSB_TXTOGEN 0x86 | |
29 | #define MTK_TOGGLE_EN GENMASK(15, 0) | |
30 | ||
31 | #define TX_INT_STATUS BIT(0) | |
32 | #define RX_INT_STATUS BIT(1) | |
33 | #define USBCOM_INT_STATUS BIT(2) | |
34 | #define DMA_INT_STATUS BIT(3) | |
35 | ||
36 | #define DMA_INTR_STATUS_MSK GENMASK(7, 0) | |
37 | #define DMA_INTR_UNMASK_SET_MSK GENMASK(31, 24) | |
38 | ||
39 | struct mtk_glue { | |
40 | struct device *dev; | |
41 | struct musb *musb; | |
42 | struct platform_device *musb_pdev; | |
43 | struct platform_device *usb_phy; | |
44 | struct phy *phy; | |
45 | struct usb_phy *xceiv; | |
46 | enum phy_mode phy_mode; | |
47 | struct clk *main; | |
48 | struct clk *mcu; | |
49 | struct clk *univpll; | |
50 | enum usb_role role; | |
51 | struct usb_role_switch *role_sw; | |
52 | }; | |
53 | ||
54 | static int mtk_musb_clks_get(struct mtk_glue *glue) | |
55 | { | |
56 | struct device *dev = glue->dev; | |
57 | ||
58 | glue->main = devm_clk_get(dev, "main"); | |
59 | if (IS_ERR(glue->main)) { | |
60 | dev_err(dev, "fail to get main clock\n"); | |
61 | return PTR_ERR(glue->main); | |
62 | } | |
63 | ||
64 | glue->mcu = devm_clk_get(dev, "mcu"); | |
65 | if (IS_ERR(glue->mcu)) { | |
66 | dev_err(dev, "fail to get mcu clock\n"); | |
67 | return PTR_ERR(glue->mcu); | |
68 | } | |
69 | ||
70 | glue->univpll = devm_clk_get(dev, "univpll"); | |
71 | if (IS_ERR(glue->univpll)) { | |
72 | dev_err(dev, "fail to get univpll clock\n"); | |
73 | return PTR_ERR(glue->univpll); | |
74 | } | |
75 | ||
76 | return 0; | |
77 | } | |
78 | ||
79 | static int mtk_musb_clks_enable(struct mtk_glue *glue) | |
80 | { | |
81 | int ret; | |
82 | ||
83 | ret = clk_prepare_enable(glue->main); | |
84 | if (ret) { | |
85 | dev_err(glue->dev, "failed to enable main clock\n"); | |
86 | goto err_main_clk; | |
87 | } | |
88 | ||
89 | ret = clk_prepare_enable(glue->mcu); | |
90 | if (ret) { | |
91 | dev_err(glue->dev, "failed to enable mcu clock\n"); | |
92 | goto err_mcu_clk; | |
93 | } | |
94 | ||
95 | ret = clk_prepare_enable(glue->univpll); | |
96 | if (ret) { | |
97 | dev_err(glue->dev, "failed to enable univpll clock\n"); | |
98 | goto err_univpll_clk; | |
99 | } | |
100 | ||
101 | return 0; | |
102 | ||
103 | err_univpll_clk: | |
104 | clk_disable_unprepare(glue->mcu); | |
105 | err_mcu_clk: | |
106 | clk_disable_unprepare(glue->main); | |
107 | err_main_clk: | |
108 | return ret; | |
109 | } | |
110 | ||
111 | static void mtk_musb_clks_disable(struct mtk_glue *glue) | |
112 | { | |
113 | clk_disable_unprepare(glue->univpll); | |
114 | clk_disable_unprepare(glue->mcu); | |
115 | clk_disable_unprepare(glue->main); | |
116 | } | |
117 | ||
bce3052f | 118 | static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role) |
0990366b | 119 | { |
0990366b MG |
120 | struct musb *musb = glue->musb; |
121 | u8 devctl = readb(musb->mregs + MUSB_DEVCTL); | |
122 | enum usb_role new_role; | |
123 | ||
124 | if (role == glue->role) | |
125 | return 0; | |
126 | ||
127 | switch (role) { | |
128 | case USB_ROLE_HOST: | |
129 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; | |
130 | glue->phy_mode = PHY_MODE_USB_HOST; | |
131 | new_role = USB_ROLE_HOST; | |
132 | if (glue->role == USB_ROLE_NONE) | |
133 | phy_power_on(glue->phy); | |
134 | ||
135 | devctl |= MUSB_DEVCTL_SESSION; | |
136 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
137 | MUSB_HST_MODE(musb); | |
138 | break; | |
139 | case USB_ROLE_DEVICE: | |
140 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; | |
141 | glue->phy_mode = PHY_MODE_USB_DEVICE; | |
142 | new_role = USB_ROLE_DEVICE; | |
143 | devctl &= ~MUSB_DEVCTL_SESSION; | |
144 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
145 | if (glue->role == USB_ROLE_NONE) | |
146 | phy_power_on(glue->phy); | |
147 | ||
148 | MUSB_DEV_MODE(musb); | |
149 | break; | |
150 | case USB_ROLE_NONE: | |
151 | glue->phy_mode = PHY_MODE_USB_OTG; | |
152 | new_role = USB_ROLE_NONE; | |
153 | devctl &= ~MUSB_DEVCTL_SESSION; | |
154 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
155 | if (glue->role != USB_ROLE_NONE) | |
156 | phy_power_off(glue->phy); | |
157 | ||
158 | break; | |
159 | default: | |
160 | dev_err(glue->dev, "Invalid State\n"); | |
161 | return -EINVAL; | |
162 | } | |
163 | ||
164 | glue->role = new_role; | |
165 | phy_set_mode(glue->phy, glue->phy_mode); | |
166 | ||
167 | return 0; | |
168 | } | |
169 | ||
bce3052f | 170 | static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role) |
0990366b | 171 | { |
bce3052f HK |
172 | return mtk_otg_switch_set(usb_role_switch_get_drvdata(sw), role); |
173 | } | |
174 | ||
175 | static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw) | |
176 | { | |
177 | struct mtk_glue *glue = usb_role_switch_get_drvdata(sw); | |
0990366b MG |
178 | |
179 | return glue->role; | |
180 | } | |
181 | ||
182 | static int mtk_otg_switch_init(struct mtk_glue *glue) | |
183 | { | |
184 | struct usb_role_switch_desc role_sx_desc = { 0 }; | |
185 | ||
186 | role_sx_desc.set = musb_usb_role_sx_set; | |
187 | role_sx_desc.get = musb_usb_role_sx_get; | |
188 | role_sx_desc.fwnode = dev_fwnode(glue->dev); | |
bce3052f | 189 | role_sx_desc.driver_data = glue; |
0990366b MG |
190 | glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc); |
191 | ||
192 | return PTR_ERR_OR_ZERO(glue->role_sw); | |
193 | } | |
194 | ||
195 | static void mtk_otg_switch_exit(struct mtk_glue *glue) | |
196 | { | |
197 | return usb_role_switch_unregister(glue->role_sw); | |
198 | } | |
199 | ||
200 | static irqreturn_t generic_interrupt(int irq, void *__hci) | |
201 | { | |
202 | unsigned long flags; | |
203 | irqreturn_t retval = IRQ_NONE; | |
204 | struct musb *musb = __hci; | |
205 | ||
206 | spin_lock_irqsave(&musb->lock, flags); | |
207 | musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB); | |
208 | musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX); | |
209 | musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX); | |
210 | ||
402bcac4 ML |
211 | if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) { |
212 | /* ep0 FADDR must be 0 when (re)entering peripheral mode */ | |
213 | musb_ep_select(musb->mregs, 0); | |
214 | musb_writeb(musb->mregs, MUSB_FADDR, 0); | |
215 | } | |
216 | ||
0990366b MG |
217 | if (musb->int_usb || musb->int_tx || musb->int_rx) |
218 | retval = musb_interrupt(musb); | |
219 | ||
220 | spin_unlock_irqrestore(&musb->lock, flags); | |
221 | ||
222 | return retval; | |
223 | } | |
224 | ||
225 | static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id) | |
226 | { | |
227 | irqreturn_t retval = IRQ_NONE; | |
228 | struct musb *musb = (struct musb *)dev_id; | |
229 | u32 l1_ints; | |
230 | ||
231 | l1_ints = musb_readl(musb->mregs, USB_L1INTS) & | |
232 | musb_readl(musb->mregs, USB_L1INTM); | |
233 | ||
234 | if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS)) | |
235 | retval = generic_interrupt(irq, musb); | |
236 | ||
237 | #if defined(CONFIG_USB_INVENTRA_DMA) | |
238 | if (l1_ints & DMA_INT_STATUS) | |
239 | retval = dma_controller_irq(irq, musb->dma_controller); | |
240 | #endif | |
241 | return retval; | |
242 | } | |
243 | ||
244 | static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset) | |
245 | { | |
246 | return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum; | |
247 | } | |
248 | ||
249 | static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset) | |
250 | { | |
251 | u8 data; | |
252 | ||
253 | /* W1C */ | |
254 | data = musb_readb(addr, offset); | |
255 | musb_writeb(addr, offset, data); | |
256 | return data; | |
257 | } | |
258 | ||
259 | static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset) | |
260 | { | |
261 | u16 data; | |
262 | ||
263 | /* W1C */ | |
264 | data = musb_readw(addr, offset); | |
265 | musb_writew(addr, offset, data); | |
266 | return data; | |
267 | } | |
268 | ||
269 | static int mtk_musb_set_mode(struct musb *musb, u8 mode) | |
270 | { | |
271 | struct device *dev = musb->controller; | |
272 | struct mtk_glue *glue = dev_get_drvdata(dev->parent); | |
273 | enum phy_mode new_mode; | |
274 | enum usb_role new_role; | |
275 | ||
276 | switch (mode) { | |
277 | case MUSB_HOST: | |
278 | new_mode = PHY_MODE_USB_HOST; | |
279 | new_role = USB_ROLE_HOST; | |
280 | break; | |
281 | case MUSB_PERIPHERAL: | |
282 | new_mode = PHY_MODE_USB_DEVICE; | |
283 | new_role = USB_ROLE_DEVICE; | |
284 | break; | |
285 | case MUSB_OTG: | |
286 | new_mode = PHY_MODE_USB_OTG; | |
287 | new_role = USB_ROLE_NONE; | |
288 | break; | |
289 | default: | |
290 | dev_err(glue->dev, "Invalid mode request\n"); | |
291 | return -EINVAL; | |
292 | } | |
293 | ||
294 | if (glue->phy_mode == new_mode) | |
295 | return 0; | |
296 | ||
297 | if (musb->port_mode != MUSB_OTG) { | |
298 | dev_err(glue->dev, "Does not support changing modes\n"); | |
299 | return -EINVAL; | |
300 | } | |
301 | ||
bce3052f | 302 | mtk_otg_switch_set(glue, new_role); |
0990366b MG |
303 | return 0; |
304 | } | |
305 | ||
306 | static int mtk_musb_init(struct musb *musb) | |
307 | { | |
308 | struct device *dev = musb->controller; | |
309 | struct mtk_glue *glue = dev_get_drvdata(dev->parent); | |
310 | int ret; | |
311 | ||
312 | glue->musb = musb; | |
313 | musb->phy = glue->phy; | |
314 | musb->xceiv = glue->xceiv; | |
315 | musb->is_host = false; | |
316 | musb->isr = mtk_musb_interrupt; | |
317 | ||
318 | /* Set TX/RX toggle enable */ | |
319 | musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN); | |
320 | musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN); | |
321 | ||
322 | if (musb->port_mode == MUSB_OTG) { | |
323 | ret = mtk_otg_switch_init(glue); | |
324 | if (ret) | |
325 | return ret; | |
326 | } | |
327 | ||
328 | ret = phy_init(glue->phy); | |
329 | if (ret) | |
330 | goto err_phy_init; | |
331 | ||
332 | ret = phy_power_on(glue->phy); | |
333 | if (ret) | |
334 | goto err_phy_power_on; | |
335 | ||
336 | phy_set_mode(glue->phy, glue->phy_mode); | |
337 | ||
338 | #if defined(CONFIG_USB_INVENTRA_DMA) | |
339 | musb_writel(musb->mregs, MUSB_HSDMA_INTR, | |
340 | DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK); | |
341 | #endif | |
342 | musb_writel(musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS | | |
343 | USBCOM_INT_STATUS | DMA_INT_STATUS); | |
344 | return 0; | |
345 | ||
346 | err_phy_power_on: | |
347 | phy_exit(glue->phy); | |
348 | err_phy_init: | |
349 | mtk_otg_switch_exit(glue); | |
350 | return ret; | |
351 | } | |
352 | ||
353 | static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out) | |
354 | { | |
355 | struct musb *musb = qh->hw_ep->musb; | |
356 | u8 epnum = qh->hw_ep->epnum; | |
357 | u16 toggle; | |
358 | ||
359 | toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG); | |
360 | return toggle & (1 << epnum); | |
361 | } | |
362 | ||
363 | static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb) | |
364 | { | |
365 | struct musb *musb = qh->hw_ep->musb; | |
366 | u8 epnum = qh->hw_ep->epnum; | |
367 | u16 value, toggle; | |
368 | ||
369 | toggle = usb_gettoggle(urb->dev, qh->epnum, is_out); | |
370 | ||
371 | if (is_out) { | |
372 | value = musb_readw(musb->mregs, MUSB_TXTOG); | |
373 | value |= toggle << epnum; | |
374 | musb_writew(musb->mregs, MUSB_TXTOG, value); | |
375 | } else { | |
376 | value = musb_readw(musb->mregs, MUSB_RXTOG); | |
377 | value |= toggle << epnum; | |
378 | musb_writew(musb->mregs, MUSB_RXTOG, value); | |
379 | } | |
380 | ||
381 | return 0; | |
382 | } | |
383 | ||
384 | static int mtk_musb_exit(struct musb *musb) | |
385 | { | |
386 | struct device *dev = musb->controller; | |
387 | struct mtk_glue *glue = dev_get_drvdata(dev->parent); | |
388 | ||
389 | mtk_otg_switch_exit(glue); | |
390 | phy_power_off(glue->phy); | |
391 | phy_exit(glue->phy); | |
392 | mtk_musb_clks_disable(glue); | |
393 | ||
394 | pm_runtime_put_sync(dev); | |
395 | pm_runtime_disable(dev); | |
396 | return 0; | |
397 | } | |
398 | ||
399 | static const struct musb_platform_ops mtk_musb_ops = { | |
400 | .quirks = MUSB_DMA_INVENTRA, | |
401 | .init = mtk_musb_init, | |
402 | .get_toggle = mtk_musb_get_toggle, | |
403 | .set_toggle = mtk_musb_set_toggle, | |
404 | .exit = mtk_musb_exit, | |
405 | #ifdef CONFIG_USB_INVENTRA_DMA | |
406 | .dma_init = musbhs_dma_controller_create_noirq, | |
407 | .dma_exit = musbhs_dma_controller_destroy, | |
408 | #endif | |
409 | .clearb = mtk_musb_clearb, | |
410 | .clearw = mtk_musb_clearw, | |
411 | .busctl_offset = mtk_musb_busctl_offset, | |
412 | .set_mode = mtk_musb_set_mode, | |
413 | }; | |
414 | ||
415 | #define MTK_MUSB_MAX_EP_NUM 8 | |
416 | #define MTK_MUSB_RAM_BITS 11 | |
417 | ||
418 | static struct musb_fifo_cfg mtk_musb_mode_cfg[] = { | |
419 | { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, | |
420 | { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, | |
421 | { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, | |
422 | { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, | |
423 | { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, | |
424 | { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, | |
425 | { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, | |
426 | { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, | |
427 | { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, }, | |
428 | { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, }, | |
429 | { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, }, | |
430 | { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, }, | |
431 | { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, }, | |
432 | { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, }, | |
433 | }; | |
434 | ||
435 | static const struct musb_hdrc_config mtk_musb_hdrc_config = { | |
436 | .fifo_cfg = mtk_musb_mode_cfg, | |
437 | .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg), | |
438 | .multipoint = true, | |
439 | .dyn_fifo = true, | |
440 | .num_eps = MTK_MUSB_MAX_EP_NUM, | |
441 | .ram_bits = MTK_MUSB_RAM_BITS, | |
442 | }; | |
443 | ||
444 | static const struct platform_device_info mtk_dev_info = { | |
445 | .name = "musb-hdrc", | |
446 | .id = PLATFORM_DEVID_AUTO, | |
447 | .dma_mask = DMA_BIT_MASK(32), | |
448 | }; | |
449 | ||
450 | static int mtk_musb_probe(struct platform_device *pdev) | |
451 | { | |
452 | struct musb_hdrc_platform_data *pdata; | |
453 | struct mtk_glue *glue; | |
454 | struct platform_device_info pinfo; | |
455 | struct device *dev = &pdev->dev; | |
456 | struct device_node *np = dev->of_node; | |
c87c2731 | 457 | int ret; |
0990366b MG |
458 | |
459 | glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL); | |
460 | if (!glue) | |
461 | return -ENOMEM; | |
462 | ||
463 | glue->dev = dev; | |
464 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
465 | if (!pdata) | |
466 | return -ENOMEM; | |
467 | ||
468 | ret = of_platform_populate(np, NULL, NULL, dev); | |
469 | if (ret) { | |
470 | dev_err(dev, "failed to create child devices at %p\n", np); | |
471 | return ret; | |
472 | } | |
473 | ||
474 | ret = mtk_musb_clks_get(glue); | |
475 | if (ret) | |
476 | return ret; | |
477 | ||
478 | pdata->config = &mtk_musb_hdrc_config; | |
479 | pdata->platform_ops = &mtk_musb_ops; | |
480 | pdata->mode = usb_get_dr_mode(dev); | |
481 | ||
482 | if (IS_ENABLED(CONFIG_USB_MUSB_HOST)) | |
483 | pdata->mode = USB_DR_MODE_HOST; | |
484 | else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET)) | |
485 | pdata->mode = USB_DR_MODE_PERIPHERAL; | |
486 | ||
487 | switch (pdata->mode) { | |
488 | case USB_DR_MODE_HOST: | |
489 | glue->phy_mode = PHY_MODE_USB_HOST; | |
490 | glue->role = USB_ROLE_HOST; | |
491 | break; | |
492 | case USB_DR_MODE_PERIPHERAL: | |
493 | glue->phy_mode = PHY_MODE_USB_DEVICE; | |
494 | glue->role = USB_ROLE_DEVICE; | |
495 | break; | |
496 | case USB_DR_MODE_OTG: | |
497 | glue->phy_mode = PHY_MODE_USB_OTG; | |
498 | glue->role = USB_ROLE_NONE; | |
499 | break; | |
500 | default: | |
501 | dev_err(&pdev->dev, "Error 'dr_mode' property\n"); | |
502 | return -EINVAL; | |
503 | } | |
504 | ||
505 | glue->phy = devm_of_phy_get_by_index(dev, np, 0); | |
506 | if (IS_ERR(glue->phy)) { | |
507 | dev_err(dev, "fail to getting phy %ld\n", | |
508 | PTR_ERR(glue->phy)); | |
509 | return PTR_ERR(glue->phy); | |
510 | } | |
511 | ||
512 | glue->usb_phy = usb_phy_generic_register(); | |
513 | if (IS_ERR(glue->usb_phy)) { | |
514 | dev_err(dev, "fail to registering usb-phy %ld\n", | |
515 | PTR_ERR(glue->usb_phy)); | |
516 | return PTR_ERR(glue->usb_phy); | |
517 | } | |
518 | ||
519 | glue->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2); | |
520 | if (IS_ERR(glue->xceiv)) { | |
521 | dev_err(dev, "fail to getting usb-phy %d\n", ret); | |
522 | ret = PTR_ERR(glue->xceiv); | |
523 | goto err_unregister_usb_phy; | |
524 | } | |
525 | ||
526 | platform_set_drvdata(pdev, glue); | |
527 | pm_runtime_enable(dev); | |
528 | pm_runtime_get_sync(dev); | |
529 | ||
530 | ret = mtk_musb_clks_enable(glue); | |
531 | if (ret) | |
532 | goto err_enable_clk; | |
533 | ||
534 | pinfo = mtk_dev_info; | |
535 | pinfo.parent = dev; | |
536 | pinfo.res = pdev->resource; | |
537 | pinfo.num_res = pdev->num_resources; | |
538 | pinfo.data = pdata; | |
539 | pinfo.size_data = sizeof(*pdata); | |
540 | ||
541 | glue->musb_pdev = platform_device_register_full(&pinfo); | |
542 | if (IS_ERR(glue->musb_pdev)) { | |
543 | ret = PTR_ERR(glue->musb_pdev); | |
544 | dev_err(dev, "failed to register musb device: %d\n", ret); | |
545 | goto err_device_register; | |
546 | } | |
547 | ||
548 | return 0; | |
549 | ||
550 | err_device_register: | |
551 | mtk_musb_clks_disable(glue); | |
552 | err_enable_clk: | |
553 | pm_runtime_put_sync(dev); | |
554 | pm_runtime_disable(dev); | |
555 | err_unregister_usb_phy: | |
556 | usb_phy_generic_unregister(glue->usb_phy); | |
557 | return ret; | |
558 | } | |
559 | ||
560 | static int mtk_musb_remove(struct platform_device *pdev) | |
561 | { | |
562 | struct mtk_glue *glue = platform_get_drvdata(pdev); | |
563 | struct platform_device *usb_phy = glue->usb_phy; | |
564 | ||
565 | platform_device_unregister(glue->musb_pdev); | |
566 | usb_phy_generic_unregister(usb_phy); | |
567 | ||
568 | return 0; | |
569 | } | |
570 | ||
571 | #ifdef CONFIG_OF | |
572 | static const struct of_device_id mtk_musb_match[] = { | |
573 | {.compatible = "mediatek,mtk-musb",}, | |
574 | {}, | |
575 | }; | |
576 | MODULE_DEVICE_TABLE(of, mtk_musb_match); | |
577 | #endif | |
578 | ||
579 | static struct platform_driver mtk_musb_driver = { | |
580 | .probe = mtk_musb_probe, | |
581 | .remove = mtk_musb_remove, | |
582 | .driver = { | |
583 | .name = "musb-mtk", | |
584 | .of_match_table = of_match_ptr(mtk_musb_match), | |
585 | }, | |
586 | }; | |
587 | ||
588 | module_platform_driver(mtk_musb_driver); | |
589 | ||
590 | MODULE_DESCRIPTION("MediaTek MUSB Glue Layer"); | |
591 | MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>"); | |
592 | MODULE_LICENSE("GPL v2"); |