[mirror_ubuntu-focal-kernel.git] / drivers / usb / musb / musb_core.h

/*
 * MUSB OTG driver defines
 *
 * Copyright 2005 Mentor Graphics Corporation
 * Copyright (C) 2005-2006 by Texas Instruments
 * Copyright (C) 2006-2007 Nokia Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#ifndef __MUSB_CORE_H__
#define __MUSB_CORE_H__

#include <linux/slab.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/timer.h>
#include <linux/device.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb.h>
#include <linux/usb/otg.h>
#include <linux/usb/musb.h>

struct musb;
struct musb_hw_ep;
struct musb_ep;

/* Helper defines for struct musb->hwvers */
#define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
#define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
#define MUSB_HWVERS_RC		0x8000
#define MUSB_HWVERS_1300	0x52C
#define MUSB_HWVERS_1400	0x590
#define MUSB_HWVERS_1800	0x720
#define MUSB_HWVERS_1900	0x784
#define MUSB_HWVERS_2000	0x800

#include "musb_debug.h"
#include "musb_dma.h"

#include "musb_io.h"
#include "musb_regs.h"

#include "musb_gadget.h"
#include <linux/usb/hcd.h>
#include "musb_host.h"

/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
 * OTG or host-only go to A_IDLE when ID is sensed.
 */
#define is_peripheral_active(m)		(!(m)->is_host)
#define is_host_active(m)		((m)->is_host)

enum {
	MUSB_PORT_MODE_HOST	= 1,
	MUSB_PORT_MODE_GADGET,
	MUSB_PORT_MODE_DUAL_ROLE,
};

/****************************** CONSTANTS ********************************/

#ifndef MUSB_C_NUM_EPS
#define MUSB_C_NUM_EPS ((u8)16)
#endif

#ifndef MUSB_MAX_END0_PACKET
#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
#endif

/* host side ep0 states */
enum musb_h_ep0_state {
	MUSB_EP0_IDLE,
	MUSB_EP0_START,			/* expect ack of setup */
	MUSB_EP0_IN,			/* expect IN DATA */
	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
	MUSB_EP0_STATUS,		/* expect ack of STATUS */
} __attribute__ ((packed));

/* peripheral side ep0 states */
enum musb_g_ep0_state {
	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
	MUSB_EP0_STAGE_TX,		/* IN data */
	MUSB_EP0_STAGE_RX,		/* OUT data */
	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
} __attribute__ ((packed));

/*
 * OTG protocol constants.  See USB OTG 1.3 spec,
 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 */
#define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
#define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
#define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
#define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */


/*************************** REGISTER ACCESS ********************************/

/* Endpoint registers (other than dynfifo setup) can be accessed either
 * directly with the "flat" model, or after setting up an index register.
 */

#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
		|| defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
		|| defined(CONFIG_ARCH_OMAP4)
/* REVISIT indexed access seemed to
 * misbehave (on DaVinci) for at least peripheral IN ...
 */
#define	MUSB_FLAT_REG
#endif

/* TUSB mapping: "flat" plus ep0 special cases */
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_TUSB_OFFSET

/* "flat" mapping: each endpoint has its own i/o address */
#elif	defined(MUSB_FLAT_REG)
#define musb_ep_select(_mbase, _epnum)	(((void)(_mbase)), ((void)(_epnum)))
#define	MUSB_EP_OFFSET			MUSB_FLAT_OFFSET

/* "indexed" mapping: INDEX register controls register bank select */
#else
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_INDEXED_OFFSET
#endif

/****************************** FUNCTIONS ********************************/

#define MUSB_HST_MODE(_musb)\
	{ (_musb)->is_host = true; }
#define MUSB_DEV_MODE(_musb) \
	{ (_musb)->is_host = false; }

#define test_devctl_hst_mode(_x) \
	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)

#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")

/******************************** TYPES *************************************/

/**
 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 * @init:	turns on clocks, sets up platform-specific registers, etc
 * @exit:	undoes @init
 * @set_mode:	forcefully changes operating mode
 * @try_ilde:	tries to idle the IP
 * @vbus_status: returns vbus status if possible
 * @set_vbus:	forces vbus status
 * @adjust_channel_params: pre check for standard dma channel_program func
 */
struct musb_platform_ops {
	int	(*init)(struct musb *musb);
	int	(*exit)(struct musb *musb);

	void	(*enable)(struct musb *musb);
	void	(*disable)(struct musb *musb);

	int	(*set_mode)(struct musb *musb, u8 mode);
	void	(*try_idle)(struct musb *musb, unsigned long timeout);

	int	(*vbus_status)(struct musb *musb);
	void	(*set_vbus)(struct musb *musb, int on);

	int	(*adjust_channel_params)(struct dma_channel *channel,
				u16 packet_sz, u8 *mode,
				dma_addr_t *dma_addr, u32 *len);
};

/*
 * struct musb_hw_ep - endpoint hardware (bidirectional)
 *
 * Ordered slightly for better cacheline locality.
 */
struct musb_hw_ep {
	struct musb		*musb;
	void __iomem		*fifo;
	void __iomem		*regs;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	void __iomem		*conf;
#endif

	/* index in musb->endpoints[]  */
	u8			epnum;

	/* hardware configuration, possibly dynamic */
	bool			is_shared_fifo;
	bool			tx_double_buffered;
	bool			rx_double_buffered;
	u16			max_packet_sz_tx;
	u16			max_packet_sz_rx;

	struct dma_channel	*tx_channel;
	struct dma_channel	*rx_channel;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	/* TUSB has "asynchronous" and "synchronous" dma modes */
	dma_addr_t		fifo_async;
	dma_addr_t		fifo_sync;
	void __iomem		*fifo_sync_va;
#endif

	void __iomem		*target_regs;

	/* currently scheduled peripheral endpoint */
	struct musb_qh		*in_qh;
	struct musb_qh		*out_qh;

	u8			rx_reinit;
	u8			tx_reinit;

	/* peripheral side */
	struct musb_ep		ep_in;			/* TX */
	struct musb_ep		ep_out;			/* RX */
};

static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
{
	return next_request(&hw_ep->ep_in);
}

static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
{
	return next_request(&hw_ep->ep_out);
}

struct musb_csr_regs {
	/* FIFO registers */
	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	u16 rxfifoadd, txfifoadd;
	u8 txtype, txinterval, rxtype, rxinterval;
	u8 rxfifosz, txfifosz;
	u8 txfunaddr, txhubaddr, txhubport;
	u8 rxfunaddr, rxhubaddr, rxhubport;
};

struct musb_context_registers {

	u8 power;
	u8 intrusbe;
	u16 frame;
	u8 index, testmode;

	u8 devctl, busctl, misc;
	u32 otg_interfsel;

	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
};

/*
 * struct musb - Driver instance data.
 */
struct musb {
	/* device lock */
	spinlock_t		lock;

	const struct musb_platform_ops *ops;
	struct musb_context_registers context;

	irqreturn_t		(*isr)(int, void *);
	struct work_struct	irq_work;
	u16			hwvers;

	u16			intrrxe;
	u16			intrtxe;
/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
#define MUSB_PORT_STAT_RESUME	(1 << 31)

	u32			port1_status;

	unsigned long		rh_timer;

	enum musb_h_ep0_state	ep0_stage;

	/* bulk traffic normally dedicates endpoint hardware, and each
	 * direction has its own ring of host side endpoints.
	 * we try to progress the transfer at the head of each endpoint's
	 * queue until it completes or NAKs too much; then we try the next
	 * endpoint.
	 */
	struct musb_hw_ep	*bulk_ep;

	struct list_head	control;	/* of musb_qh */
	struct list_head	in_bulk;	/* of musb_qh */
	struct list_head	out_bulk;	/* of musb_qh */

	struct timer_list	otg_timer;
	struct notifier_block	nb;

	struct dma_controller	*dma_controller;

	struct device		*controller;
	void __iomem		*ctrl_base;
	void __iomem		*mregs;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	dma_addr_t		async;
	dma_addr_t		sync;
	void __iomem		*sync_va;
#endif

	/* passed down from chip/board specific irq handlers */
	u8			int_usb;
	u16			int_rx;
	u16			int_tx;

	struct usb_phy		*xceiv;

	int nIrq;
	unsigned		irq_wake:1;

	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
#define control_ep		endpoints

#define VBUSERR_RETRY_COUNT	3
	u16			vbuserr_retry;
	u16 epmask;
	u8 nr_endpoints;

	int			(*board_set_power)(int state);

	u8			min_power;	/* vbus for periph, in mA/2 */

	int			port_mode;	/* MUSB_PORT_MODE_* */
	bool			is_host;

	int			a_wait_bcon;	/* VBUS timeout in msecs */
	unsigned long		idle_timeout;	/* Next timeout in jiffies */

	/* active means connected and not suspended */
	unsigned		is_active:1;

	unsigned is_multipoint:1;

	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */

	unsigned		bulk_split:1;
#define	can_bulk_split(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)

	unsigned		bulk_combine:1;
#define	can_bulk_combine(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)

	/* is_suspended means USB B_PERIPHERAL suspend */
	unsigned		is_suspended:1;

	/* may_wakeup means remote wakeup is enabled */
	unsigned		may_wakeup:1;

	/* is_self_powered is reported in device status and the
	 * config descriptor.  is_bus_powered means B_PERIPHERAL
	 * draws some VBUS current; both can be true.
	 */
	unsigned		is_self_powered:1;
	unsigned		is_bus_powered:1;

	unsigned		set_address:1;
	unsigned		test_mode:1;
	unsigned		softconnect:1;

	u8			address;
	u8			test_mode_nr;
	u16			ackpend;		/* ep0 */
	enum musb_g_ep0_state	ep0_state;
	struct usb_gadget	g;			/* the gadget */
	struct usb_gadget_driver *gadget_driver;	/* its driver */
	struct usb_hcd		*hcd;			/* the usb hcd */

	/*
	 * FIXME: Remove this flag.
	 *
	 * This is only added to allow Blackfin to work
	 * with current driver. For some unknown reason
	 * Blackfin doesn't work with double buffering
	 * and that's enabled by default.
	 *
	 * We added this flag to forcefully disable double
	 * buffering until we get it working.
	 */
	unsigned                double_buffer_not_ok:1;

	struct musb_hdrc_config	*config;

	int			xceiv_old_state;
#ifdef CONFIG_DEBUG_FS
	struct dentry		*debugfs_root;
#endif
};

static inline struct musb *gadget_to_musb(struct usb_gadget *g)
{
	return container_of(g, struct musb, g);
}

#ifdef CONFIG_BLACKFIN
static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	if (epnum < 5) {
		hw_ep->max_packet_sz_tx = 128;
		hw_ep->max_packet_sz_rx = 128;
	} else {
		hw_ep->max_packet_sz_tx = 1024;
		hw_ep->max_packet_sz_rx = 1024;
	}
	hw_ep->is_shared_fifo = false;

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}

#else

static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	void __iomem *mbase = musb->mregs;
	u8 reg = 0;

	/* read from core using indexed model */
	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
	/* 0's returned when no more endpoints */
	if (!reg)
		return -ENODEV;

	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);

	/* shared TX/RX FIFO? */
	if ((reg & 0xf0) == 0xf0) {
		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
		hw_ep->is_shared_fifo = true;
		return 0;
	} else {
		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
		hw_ep->is_shared_fifo = false;
	}

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}
#endif /* CONFIG_BLACKFIN */


/***************************** Glue it together *****************************/

extern const char musb_driver_name[];

extern void musb_stop(struct musb *musb);

extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);

extern void musb_load_testpacket(struct musb *);

extern irqreturn_t musb_interrupt(struct musb *);

extern void musb_hnp_stop(struct musb *musb);

static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
{
	if (musb->ops->set_vbus)
		musb->ops->set_vbus(musb, is_on);
}

static inline void musb_platform_enable(struct musb *musb)
{
	if (musb->ops->enable)
		musb->ops->enable(musb);
}

static inline void musb_platform_disable(struct musb *musb)
{
	if (musb->ops->disable)
		musb->ops->disable(musb);
}

static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
{
	if (!musb->ops->set_mode)
		return 0;

	return musb->ops->set_mode(musb, mode);
}

static inline void musb_platform_try_idle(struct musb *musb,
		unsigned long timeout)
{
	if (musb->ops->try_idle)
		musb->ops->try_idle(musb, timeout);
}

static inline int musb_platform_get_vbus_status(struct musb *musb)
{
	if (!musb->ops->vbus_status)
		return 0;

	return musb->ops->vbus_status(musb);
}

static inline int musb_platform_init(struct musb *musb)
{
	if (!musb->ops->init)
		return -EINVAL;

	return musb->ops->init(musb);
}

static inline int musb_platform_exit(struct musb *musb)
{
	if (!musb->ops->exit)
		return -EINVAL;

	return musb->ops->exit(musb);
}

#endif	/* __MUSB_CORE_H__ */
Commit	Line	Data
550a7375 FB	1	/*
	2	* MUSB OTG driver defines
	3	*
	4	* Copyright 2005 Mentor Graphics Corporation
	5	* Copyright (C) 2005-2006 by Texas Instruments
	6	* Copyright (C) 2006-2007 Nokia Corporation
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
	23	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	24	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	25	* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
	26	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	27	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	28	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	29	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	31	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	*/
	34
	35	#ifndef __MUSB_CORE_H__
	36	#define __MUSB_CORE_H__
	37
	38	#include <linux/slab.h>
	39	#include <linux/list.h>
	40	#include <linux/interrupt.h>
550a7375	41	#include <linux/errno.h>
f7f9d63e	42	#include <linux/timer.h>
550a7375 FB	43	#include <linux/device.h>
	44	#include <linux/usb/ch9.h>
	45	#include <linux/usb/gadget.h>
	46	#include <linux/usb.h>
	47	#include <linux/usb/otg.h>
	48	#include <linux/usb/musb.h>
	49
	50	struct musb;
	51	struct musb_hw_ep;
	52	struct musb_ep;
	53
0ded2f14 CC	54	/* Helper defines for struct musb->hwvers */
	55	#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
	56	#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
	57	#define MUSB_HWVERS_RC 0x8000
	58	#define MUSB_HWVERS_1300 0x52C
	59	#define MUSB_HWVERS_1400 0x590
	60	#define MUSB_HWVERS_1800 0x720
	61	#define MUSB_HWVERS_1900 0x784
	62	#define MUSB_HWVERS_2000 0x800
550a7375 FB	63
	64	#include "musb_debug.h"
	65	#include "musb_dma.h"
	66
550a7375 FB	67	#include "musb_io.h"
	68	#include "musb_regs.h"
	69
	70	#include "musb_gadget.h"
27729aad	71	#include <linux/usb/hcd.h>
550a7375 FB	72	#include "musb_host.h"
550a7375 FB	73
550a7375 FB	74	/* NOTE: otg and peripheral-only state machines start at B_IDLE.
	75	* OTG or host-only go to A_IDLE when ID is sensed.
	76	*/
	77	#define is_peripheral_active(m) (!(m)->is_host)
	78	#define is_host_active(m) ((m)->is_host)
	79
9ad96e69 DM	80	enum {
	81	MUSB_PORT_MODE_HOST = 1,
	82	MUSB_PORT_MODE_GADGET,
	83	MUSB_PORT_MODE_DUAL_ROLE,
	84	};
	85
550a7375 FB	86	/**************************** CONSTANTS ******************************/
	87
	88	#ifndef MUSB_C_NUM_EPS
	89	#define MUSB_C_NUM_EPS ((u8)16)
	90	#endif
	91
	92	#ifndef MUSB_MAX_END0_PACKET
	93	#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
	94	#endif
	95
	96	/* host side ep0 states */
	97	enum musb_h_ep0_state {
	98	MUSB_EP0_IDLE,
	99	MUSB_EP0_START, /* expect ack of setup */
	100	MUSB_EP0_IN, /* expect IN DATA */
	101	MUSB_EP0_OUT, /* expect ack of OUT DATA */
	102	MUSB_EP0_STATUS, /* expect ack of STATUS */
	103	} __attribute__ ((packed));
	104
	105	/* peripheral side ep0 states */
	106	enum musb_g_ep0_state {
a5073b52 SS	107	MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
a5073b52 SS	108	MUSB_EP0_STAGE_SETUP, /* received SETUP */
550a7375 FB	109	MUSB_EP0_STAGE_TX, /* IN data */
	110	MUSB_EP0_STAGE_RX, /* OUT data */
	111	MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
	112	MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
	113	MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
	114	} __attribute__ ((packed));
	115
f7f9d63e DB	116	/*
	117	* OTG protocol constants. See USB OTG 1.3 spec,
	118	* sections 5.5 "Device Timings" and 6.6.5 "Timers".
	119	*/
550a7375	120	#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
f7f9d63e DB	121	#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
	122	#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
	123	#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
	124
550a7375 FB	125
	126	/************************* REGISTER ACCESS ******************************/
	127
	128	/* Endpoint registers (other than dynfifo setup) can be accessed either
	129	* directly with the "flat" model, or after setting up an index register.
	130	*/
	131
59b479e0 TL	132	#if defined(CONFIG_ARCH_DAVINCI) \|\| defined(CONFIG_SOC_OMAP2430) \
59b479e0 TL	133	\|\| defined(CONFIG_SOC_OMAP3430) \|\| defined(CONFIG_BLACKFIN) \
fb9c58ed	134	\|\| defined(CONFIG_ARCH_OMAP4)
550a7375 FB	135	/* REVISIT indexed access seemed to
	136	* misbehave (on DaVinci) for at least peripheral IN ...
	137	*/
	138	#define MUSB_FLAT_REG
	139	#endif
	140
	141	/* TUSB mapping: "flat" plus ep0 special cases */
240a16e2 FB	142	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	143	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	144	#define musb_ep_select(_mbase, _epnum) \
	145	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	146	#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
	147
	148	/* "flat" mapping: each endpoint has its own i/o address */
	149	#elif defined(MUSB_FLAT_REG)
	150	#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
	151	#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
	152
	153	/* "indexed" mapping: INDEX register controls register bank select */
	154	#else
	155	#define musb_ep_select(_mbase, _epnum) \
	156	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	157	#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
	158	#endif
	159
	160	/**************************** FUNCTIONS ******************************/
	161
	162	#define MUSB_HST_MODE(_musb)\
	163	{ (_musb)->is_host = true; }
	164	#define MUSB_DEV_MODE(_musb) \
	165	{ (_musb)->is_host = false; }
	166
	167	#define test_devctl_hst_mode(_x) \
	168	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
	169
	170	#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
	171
	172	/****************************** TYPES ***********************************/
	173
3ca8abb8 FB	174	/**
	175	* struct musb_platform_ops - Operations passed to musb_core by HW glue layer
	176	* @init: turns on clocks, sets up platform-specific registers, etc
	177	* @exit: undoes @init
3ca8abb8 FB	178	* @set_mode: forcefully changes operating mode
	179	* @try_ilde: tries to idle the IP
	180	* @vbus_status: returns vbus status if possible
	181	* @set_vbus: forces vbus status
9ea35331	182	* @adjust_channel_params: pre check for standard dma channel_program func
3ca8abb8 FB	183	*/
	184	struct musb_platform_ops {
	185	int (init)(struct musb musb);
	186	int (exit)(struct musb musb);
	187
3ca8abb8 FB	188	void (enable)(struct musb musb);
	189	void (disable)(struct musb musb);
	190
	191	int (set_mode)(struct musb musb, u8 mode);
	192	void (try_idle)(struct musb musb, unsigned long timeout);
	193
	194	int (vbus_status)(struct musb musb);
	195	void (set_vbus)(struct musb musb, int on);
13254307 MF	196
	197	int (adjust_channel_params)(struct dma_channel channel,
	198	u16 packet_sz, u8 *mode,
	199	dma_addr_t dma_addr, u32 len);
3ca8abb8 FB	200	};
3ca8abb8 FB	201
550a7375 FB	202	/*
	203	* struct musb_hw_ep - endpoint hardware (bidirectional)
	204	*
	205	* Ordered slightly for better cacheline locality.
	206	*/
	207	struct musb_hw_ep {
	208	struct musb *musb;
	209	void __iomem *fifo;
	210	void __iomem *regs;
	211
240a16e2 FB	212	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	213	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	214	void __iomem *conf;
	215	#endif
	216
	217	/* index in musb->endpoints[] */
	218	u8 epnum;
	219
	220	/* hardware configuration, possibly dynamic */
	221	bool is_shared_fifo;
	222	bool tx_double_buffered;
	223	bool rx_double_buffered;
	224	u16 max_packet_sz_tx;
	225	u16 max_packet_sz_rx;
	226
	227	struct dma_channel *tx_channel;
	228	struct dma_channel *rx_channel;
	229
240a16e2 FB	230	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	231	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	232	/* TUSB has "asynchronous" and "synchronous" dma modes */
	233	dma_addr_t fifo_async;
	234	dma_addr_t fifo_sync;
	235	void __iomem *fifo_sync_va;
	236	#endif
	237
550a7375 FB	238	void __iomem *target_regs;
	239
	240	/* currently scheduled peripheral endpoint */
	241	struct musb_qh *in_qh;
	242	struct musb_qh *out_qh;
	243
	244	u8 rx_reinit;
	245	u8 tx_reinit;
550a7375	246
550a7375 FB	247	/* peripheral side */
	248	struct musb_ep ep_in; /* TX */
	249	struct musb_ep ep_out; /* RX */
550a7375 FB	250	};
550a7375 FB	251
ad1adb89	252	static inline struct musb_request next_in_request(struct musb_hw_ep hw_ep)
550a7375	253	{
550a7375	254	return next_request(&hw_ep->ep_in);
550a7375 FB	255	}
550a7375 FB	256
ad1adb89	257	static inline struct musb_request next_out_request(struct musb_hw_ep hw_ep)
550a7375	258	{
550a7375	259	return next_request(&hw_ep->ep_out);
550a7375 FB	260	}
550a7375 FB	261
7421107b FB	262	struct musb_csr_regs {
	263	/* FIFO registers */
	264	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	265	u16 rxfifoadd, txfifoadd;
	266	u8 txtype, txinterval, rxtype, rxinterval;
	267	u8 rxfifosz, txfifosz;
	268	u8 txfunaddr, txhubaddr, txhubport;
	269	u8 rxfunaddr, rxhubaddr, rxhubport;
	270	};
	271
	272	struct musb_context_registers {
	273
7421107b	274	u8 power;
7421107b FB	275	u8 intrusbe;
	276	u16 frame;
	277	u8 index, testmode;
	278
	279	u8 devctl, busctl, misc;
e25bec16	280	u32 otg_interfsel;
7421107b FB	281
	282	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
	283	};
	284
550a7375 FB	285	/*
	286	* struct musb - Driver instance data.
	287	*/
	288	struct musb {
	289	/* device lock */
	290	spinlock_t lock;
743411b3 FB	291
743411b3 FB	292	const struct musb_platform_ops *ops;
7421107b	293	struct musb_context_registers context;
743411b3	294
550a7375 FB	295	irqreturn_t (isr)(int, void );
550a7375 FB	296	struct work_struct irq_work;
32c3b94e	297	u16 hwvers;
550a7375	298
af5ec14d	299	u16 intrrxe;
b18d26f6	300	u16 intrtxe;
550a7375 FB	301	/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
	302	#define MUSB_PORT_STAT_RESUME (1 << 31)
	303
	304	u32 port1_status;
	305
550a7375 FB	306	unsigned long rh_timer;
	307
	308	enum musb_h_ep0_state ep0_stage;
	309
	310	/* bulk traffic normally dedicates endpoint hardware, and each
	311	* direction has its own ring of host side endpoints.
	312	* we try to progress the transfer at the head of each endpoint's
	313	* queue until it completes or NAKs too much; then we try the next
	314	* endpoint.
	315	*/
	316	struct musb_hw_ep *bulk_ep;
	317
	318	struct list_head control; /* of musb_qh */
	319	struct list_head in_bulk; /* of musb_qh */
	320	struct list_head out_bulk; /* of musb_qh */
f7f9d63e DB	321
f7f9d63e DB	322	struct timer_list otg_timer;
594632ef	323	struct notifier_block nb;
550a7375	324
550a7375 FB	325	struct dma_controller *dma_controller;
	326
	327	struct device *controller;
	328	void __iomem *ctrl_base;
	329	void __iomem *mregs;
	330
240a16e2 FB	331	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	332	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	333	dma_addr_t async;
	334	dma_addr_t sync;
	335	void __iomem *sync_va;
	336	#endif
	337
	338	/* passed down from chip/board specific irq handlers */
	339	u8 int_usb;
	340	u16 int_rx;
	341	u16 int_tx;
	342
86753811	343	struct usb_phy *xceiv;
550a7375 FB	344
550a7375 FB	345	int nIrq;
c48a5155	346	unsigned irq_wake:1;
550a7375 FB	347
	348	struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
	349	#define control_ep endpoints
	350
	351	#define VBUSERR_RETRY_COUNT 3
	352	u16 vbuserr_retry;
	353	u16 epmask;
	354	u8 nr_endpoints;
	355
550a7375 FB	356	int (*board_set_power)(int state);
550a7375 FB	357
550a7375 FB	358	u8 min_power; /* vbus for periph, in mA/2 */
550a7375 FB	359
9ad96e69	360	int port_mode; /* MUSB_PORT_MODE_* */
550a7375 FB	361	bool is_host;
	362
	363	int a_wait_bcon; /* VBUS timeout in msecs */
	364	unsigned long idle_timeout; /* Next timeout in jiffies */
	365
	366	/* active means connected and not suspended */
	367	unsigned is_active:1;
	368
	369	unsigned is_multipoint:1;
550a7375	370
a483d706 AKG	371	unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
a483d706 AKG	372	unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
51bf0d0e	373	unsigned dyn_fifo:1; /* dynamic FIFO supported? */
a483d706	374
7ed069c1	375	unsigned bulk_split:1;
550a7375	376	#define can_bulk_split(musb,type) \
7ed069c1	377	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
550a7375	378
7ed069c1	379	unsigned bulk_combine:1;
550a7375	380	#define can_bulk_combine(musb,type) \
7ed069c1	381	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
550a7375	382
550a7375 FB	383	/* is_suspended means USB B_PERIPHERAL suspend */
	384	unsigned is_suspended:1;
	385
	386	/* may_wakeup means remote wakeup is enabled */
	387	unsigned may_wakeup:1;
	388
	389	/* is_self_powered is reported in device status and the
	390	* config descriptor. is_bus_powered means B_PERIPHERAL
	391	* draws some VBUS current; both can be true.
	392	*/
	393	unsigned is_self_powered:1;
	394	unsigned is_bus_powered:1;
	395
	396	unsigned set_address:1;
	397	unsigned test_mode:1;
	398	unsigned softconnect:1;
5990378b FB	399
	400	u8 address;
	401	u8 test_mode_nr;
	402	u16 ackpend; /* ep0 */
	403	enum musb_g_ep0_state ep0_state;
	404	struct usb_gadget g; /* the gadget */
	405	struct usb_gadget_driver gadget_driver; / its driver */
74c2e936	406	struct usb_hcd hcd; / the usb hcd */
5990378b	407
06624818 FB	408	/*
	409	* FIXME: Remove this flag.
	410	*
	411	* This is only added to allow Blackfin to work
	412	* with current driver. For some unknown reason
	413	* Blackfin doesn't work with double buffering
	414	* and that's enabled by default.
	415	*
	416	* We added this flag to forcefully disable double
	417	* buffering until we get it working.
	418	*/
fc87e080	419	unsigned double_buffer_not_ok:1;
550a7375	420
ca6d1b13 FB	421	struct musb_hdrc_config *config;
ca6d1b13 FB	422
8d2421e6 AKG	423	int xceiv_old_state;
	424	#ifdef CONFIG_DEBUG_FS
	425	struct dentry *debugfs_root;
550a7375 FB	426	#endif
	427	};
	428
550a7375 FB	429	static inline struct musb gadget_to_musb(struct usb_gadget g)
	430	{
	431	return container_of(g, struct musb, g);
	432	}
550a7375	433
c6cf8b00 BW	434	#ifdef CONFIG_BLACKFIN
	435	static inline int musb_read_fifosize(struct musb *musb,
	436	struct musb_hw_ep *hw_ep, u8 epnum)
	437	{
	438	musb->nr_endpoints++;
	439	musb->epmask \|= (1 << epnum);
	440
	441	if (epnum < 5) {
	442	hw_ep->max_packet_sz_tx = 128;
	443	hw_ep->max_packet_sz_rx = 128;
	444	} else {
	445	hw_ep->max_packet_sz_tx = 1024;
	446	hw_ep->max_packet_sz_rx = 1024;
	447	}
	448	hw_ep->is_shared_fifo = false;
	449
	450	return 0;
	451	}
	452
	453	static inline void musb_configure_ep0(struct musb *musb)
	454	{
	455	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	456	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	457	musb->endpoints[0].is_shared_fifo = true;
	458	}
	459
	460	#else
	461
	462	static inline int musb_read_fifosize(struct musb *musb,
	463	struct musb_hw_ep *hw_ep, u8 epnum)
	464	{
a156544b	465	void __iomem *mbase = musb->mregs;
c6cf8b00 BW	466	u8 reg = 0;
	467
	468	/* read from core using indexed model */
32233716	469	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
c6cf8b00 BW	470	/* 0's returned when no more endpoints */
	471	if (!reg)
	472	return -ENODEV;
	473
	474	musb->nr_endpoints++;
	475	musb->epmask \|= (1 << epnum);
	476
	477	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
	478
	479	/* shared TX/RX FIFO? */
	480	if ((reg & 0xf0) == 0xf0) {
	481	hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
	482	hw_ep->is_shared_fifo = true;
	483	return 0;
	484	} else {
	485	hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
	486	hw_ep->is_shared_fifo = false;
	487	}
	488
	489	return 0;
	490	}
	491
	492	static inline void musb_configure_ep0(struct musb *musb)
	493	{
	494	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	495	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716	496	musb->endpoints[0].is_shared_fifo = true;
c6cf8b00 BW	497	}
	498	#endif /* CONFIG_BLACKFIN */
	499
550a7375 FB	500
	501	/*************************** Glue it together ***************************/
	502
	503	extern const char musb_driver_name[];
	504
550a7375 FB	505	extern void musb_stop(struct musb *musb);
	506
	507	extern void musb_write_fifo(struct musb_hw_ep ep, u16 len, const u8 src);
	508	extern void musb_read_fifo(struct musb_hw_ep ep, u16 len, u8 dst);
	509
	510	extern void musb_load_testpacket(struct musb *);
	511
	512	extern irqreturn_t musb_interrupt(struct musb *);
	513
550a7375 FB	514	extern void musb_hnp_stop(struct musb *musb);
550a7375 FB	515
743411b3 FB	516	static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
	517	{
	518	if (musb->ops->set_vbus)
	519	musb->ops->set_vbus(musb, is_on);
	520	}
	521
	522	static inline void musb_platform_enable(struct musb *musb)
	523	{
	524	if (musb->ops->enable)
	525	musb->ops->enable(musb);
	526	}
	527
	528	static inline void musb_platform_disable(struct musb *musb)
	529	{
	530	if (musb->ops->disable)
	531	musb->ops->disable(musb);
	532	}
	533
	534	static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
	535	{
	536	if (!musb->ops->set_mode)
	537	return 0;
	538
	539	return musb->ops->set_mode(musb, mode);
	540	}
	541
	542	static inline void musb_platform_try_idle(struct musb *musb,
	543	unsigned long timeout)
	544	{
	545	if (musb->ops->try_idle)
	546	musb->ops->try_idle(musb, timeout);
	547	}
	548
	549	static inline int musb_platform_get_vbus_status(struct musb *musb)
	550	{
	551	if (!musb->ops->vbus_status)
	552	return 0;
	553
	554	return musb->ops->vbus_status(musb);
	555	}
	556
	557	static inline int musb_platform_init(struct musb *musb)
	558	{
	559	if (!musb->ops->init)
	560	return -EINVAL;
	561
	562	return musb->ops->init(musb);
	563	}
	564
	565	static inline int musb_platform_exit(struct musb *musb)
	566	{
	567	if (!musb->ops->exit)
	568	return -EINVAL;
	569
	570	return musb->ops->exit(musb);
	571	}
	572
550a7375	573	#endif /* __MUSB_CORE_H__ */