[mirror_ubuntu-focal-kernel.git] / drivers / usb / musb / musb_core.h

/*
 * MUSB OTG driver defines
 *
 * Copyright 2005 Mentor Graphics Corporation
 * Copyright (C) 2005-2006 by Texas Instruments
 * Copyright (C) 2006-2007 Nokia Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#ifndef __MUSB_CORE_H__
#define __MUSB_CORE_H__

#include <linux/slab.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/timer.h>
#include <linux/device.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb.h>
#include <linux/usb/otg.h>
#include <linux/usb/musb.h>
#include <linux/phy/phy.h>
#include <linux/workqueue.h>

struct musb;
struct musb_hw_ep;
struct musb_ep;

/* Helper defines for struct musb->hwvers */
#define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
#define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
#define MUSB_HWVERS_RC		0x8000
#define MUSB_HWVERS_1300	0x52C
#define MUSB_HWVERS_1400	0x590
#define MUSB_HWVERS_1800	0x720
#define MUSB_HWVERS_1900	0x784
#define MUSB_HWVERS_2000	0x800

#include "musb_debug.h"
#include "musb_dma.h"

#include "musb_io.h"

#include "musb_gadget.h"
#include <linux/usb/hcd.h>
#include "musb_host.h"

/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
 * OTG or host-only go to A_IDLE when ID is sensed.
 */
#define is_peripheral_active(m)		(!(m)->is_host)
#define is_host_active(m)		((m)->is_host)

enum {
	MUSB_PORT_MODE_HOST	= 1,
	MUSB_PORT_MODE_GADGET,
	MUSB_PORT_MODE_DUAL_ROLE,
};

/****************************** CONSTANTS ********************************/

#ifndef MUSB_C_NUM_EPS
#define MUSB_C_NUM_EPS ((u8)16)
#endif

#ifndef MUSB_MAX_END0_PACKET
#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
#endif

/* host side ep0 states */
enum musb_h_ep0_state {
	MUSB_EP0_IDLE,
	MUSB_EP0_START,			/* expect ack of setup */
	MUSB_EP0_IN,			/* expect IN DATA */
	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
	MUSB_EP0_STATUS,		/* expect ack of STATUS */
} __attribute__ ((packed));

/* peripheral side ep0 states */
enum musb_g_ep0_state {
	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
	MUSB_EP0_STAGE_TX,		/* IN data */
	MUSB_EP0_STAGE_RX,		/* OUT data */
	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
} __attribute__ ((packed));

/*
 * OTG protocol constants.  See USB OTG 1.3 spec,
 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 */
#define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
#define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
#define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
#define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */

/****************************** FUNCTIONS ********************************/

#define MUSB_HST_MODE(_musb)\
	{ (_musb)->is_host = true; }
#define MUSB_DEV_MODE(_musb) \
	{ (_musb)->is_host = false; }

#define test_devctl_hst_mode(_x) \
	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)

#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")

/******************************** TYPES *************************************/

struct musb_io;

/**
 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 * @quirks:	flags for platform specific quirks
 * @enable:	enable device
 * @disable:	disable device
 * @ep_offset:	returns the end point offset
 * @ep_select:	selects the specified end point
 * @fifo_mode:	sets the fifo mode
 * @fifo_offset: returns the fifo offset
 * @readb:	read 8 bits
 * @writeb:	write 8 bits
 * @readw:	read 16 bits
 * @writew:	write 16 bits
 * @readl:	read 32 bits
 * @writel:	write 32 bits
 * @read_fifo:	reads the fifo
 * @write_fifo:	writes to fifo
 * @dma_init:	platform specific dma init function
 * @dma_exit:	platform specific dma exit function
 * @init:	turns on clocks, sets up platform-specific registers, etc
 * @exit:	undoes @init
 * @set_mode:	forcefully changes operating mode
 * @try_idle:	tries to idle the IP
 * @recover:	platform-specific babble recovery
 * @vbus_status: returns vbus status if possible
 * @set_vbus:	forces vbus status
 * @adjust_channel_params: pre check for standard dma channel_program func
 * @pre_root_reset_end: called before the root usb port reset flag gets cleared
 * @post_root_reset_end: called after the root usb port reset flag gets cleared
 * @phy_callback: optional callback function for the phy to call
 */
struct musb_platform_ops {

#define MUSB_DMA_UX500		BIT(6)
#define MUSB_DMA_CPPI41		BIT(5)
#define MUSB_DMA_CPPI		BIT(4)
#define MUSB_DMA_TUSB_OMAP	BIT(3)
#define MUSB_DMA_INVENTRA	BIT(2)
#define MUSB_IN_TUSB		BIT(1)
#define MUSB_INDEXED_EP		BIT(0)
	u32	quirks;

	int	(*init)(struct musb *musb);
	int	(*exit)(struct musb *musb);

	void	(*enable)(struct musb *musb);
	void	(*disable)(struct musb *musb);

	u32	(*ep_offset)(u8 epnum, u16 offset);
	void	(*ep_select)(void __iomem *mbase, u8 epnum);
	u16	fifo_mode;
	u32	(*fifo_offset)(u8 epnum);
	u32	(*busctl_offset)(u8 epnum, u16 offset);
	u8	(*readb)(const void __iomem *addr, unsigned offset);
	void	(*writeb)(void __iomem *addr, unsigned offset, u8 data);
	u16	(*readw)(const void __iomem *addr, unsigned offset);
	void	(*writew)(void __iomem *addr, unsigned offset, u16 data);
	u32	(*readl)(const void __iomem *addr, unsigned offset);
	void	(*writel)(void __iomem *addr, unsigned offset, u32 data);
	void	(*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
	void	(*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
	struct dma_controller *
		(*dma_init) (struct musb *musb, void __iomem *base);
	void	(*dma_exit)(struct dma_controller *c);
	int	(*set_mode)(struct musb *musb, u8 mode);
	void	(*try_idle)(struct musb *musb, unsigned long timeout);
	int	(*recover)(struct musb *musb);

	int	(*vbus_status)(struct musb *musb);
	void	(*set_vbus)(struct musb *musb, int on);

	int	(*adjust_channel_params)(struct dma_channel *channel,
				u16 packet_sz, u8 *mode,
				dma_addr_t *dma_addr, u32 *len);
	void	(*pre_root_reset_end)(struct musb *musb);
	void	(*post_root_reset_end)(struct musb *musb);
	int	(*phy_callback)(enum musb_vbus_id_status status);
};

/*
 * struct musb_hw_ep - endpoint hardware (bidirectional)
 *
 * Ordered slightly for better cacheline locality.
 */
struct musb_hw_ep {
	struct musb		*musb;
	void __iomem		*fifo;
	void __iomem		*regs;

#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
	void __iomem		*conf;
#endif

	/* index in musb->endpoints[]  */
	u8			epnum;

	/* hardware configuration, possibly dynamic */
	bool			is_shared_fifo;
	bool			tx_double_buffered;
	bool			rx_double_buffered;
	u16			max_packet_sz_tx;
	u16			max_packet_sz_rx;

	struct dma_channel	*tx_channel;
	struct dma_channel	*rx_channel;

#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
	/* TUSB has "asynchronous" and "synchronous" dma modes */
	dma_addr_t		fifo_async;
	dma_addr_t		fifo_sync;
	void __iomem		*fifo_sync_va;
#endif

	/* currently scheduled peripheral endpoint */
	struct musb_qh		*in_qh;
	struct musb_qh		*out_qh;

	u8			rx_reinit;
	u8			tx_reinit;

	/* peripheral side */
	struct musb_ep		ep_in;			/* TX */
	struct musb_ep		ep_out;			/* RX */
};

static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
{
	return next_request(&hw_ep->ep_in);
}

static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
{
	return next_request(&hw_ep->ep_out);
}

struct musb_csr_regs {
	/* FIFO registers */
	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	u16 rxfifoadd, txfifoadd;
	u8 txtype, txinterval, rxtype, rxinterval;
	u8 rxfifosz, txfifosz;
	u8 txfunaddr, txhubaddr, txhubport;
	u8 rxfunaddr, rxhubaddr, rxhubport;
};

struct musb_context_registers {

	u8 power;
	u8 intrusbe;
	u16 frame;
	u8 index, testmode;

	u8 devctl, busctl, misc;
	u32 otg_interfsel;

	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
};

/*
 * struct musb - Driver instance data.
 */
struct musb {
	/* device lock */
	spinlock_t		lock;
	spinlock_t		list_lock;	/* resume work list lock */

	struct musb_io		io;
	const struct musb_platform_ops *ops;
	struct musb_context_registers context;

	irqreturn_t		(*isr)(int, void *);
	struct delayed_work	irq_work;
	struct delayed_work	deassert_reset_work;
	struct delayed_work	finish_resume_work;
	struct delayed_work	gadget_work;
	u16			hwvers;

	u16			intrrxe;
	u16			intrtxe;
/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
#define MUSB_PORT_STAT_RESUME	(1 << 31)

	u32			port1_status;

	unsigned long		rh_timer;

	enum musb_h_ep0_state	ep0_stage;

	/* bulk traffic normally dedicates endpoint hardware, and each
	 * direction has its own ring of host side endpoints.
	 * we try to progress the transfer at the head of each endpoint's
	 * queue until it completes or NAKs too much; then we try the next
	 * endpoint.
	 */
	struct musb_hw_ep	*bulk_ep;

	struct list_head	control;	/* of musb_qh */
	struct list_head	in_bulk;	/* of musb_qh */
	struct list_head	out_bulk;	/* of musb_qh */
	struct list_head	pending_list;	/* pending work list */

	struct timer_list	otg_timer;
	struct notifier_block	nb;

	struct dma_controller	*dma_controller;

	struct device		*controller;
	void __iomem		*ctrl_base;
	void __iomem		*mregs;

#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
	dma_addr_t		async;
	dma_addr_t		sync;
	void __iomem		*sync_va;
	u8			tusb_revision;
#endif

	/* passed down from chip/board specific irq handlers */
	u8			int_usb;
	u16			int_rx;
	u16			int_tx;

	struct usb_phy		*xceiv;
	struct phy		*phy;

	int nIrq;
	unsigned		irq_wake:1;

	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
#define control_ep		endpoints

#define VBUSERR_RETRY_COUNT	3
	u16			vbuserr_retry;
	u16 epmask;
	u8 nr_endpoints;

	int			(*board_set_power)(int state);

	u8			min_power;	/* vbus for periph, in mA/2 */

	int			port_mode;	/* MUSB_PORT_MODE_* */
	bool			session;
	unsigned long		quirk_retries;
	bool			is_host;

	int			a_wait_bcon;	/* VBUS timeout in msecs */
	unsigned long		idle_timeout;	/* Next timeout in jiffies */

	unsigned		is_initialized:1;
	unsigned		is_runtime_suspended:1;

	/* active means connected and not suspended */
	unsigned		is_active:1;

	unsigned is_multipoint:1;

	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */

	unsigned		bulk_split:1;
#define	can_bulk_split(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)

	unsigned		bulk_combine:1;
#define	can_bulk_combine(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)

	/* is_suspended means USB B_PERIPHERAL suspend */
	unsigned		is_suspended:1;
	unsigned		need_finish_resume :1;

	/* may_wakeup means remote wakeup is enabled */
	unsigned		may_wakeup:1;

	/* is_self_powered is reported in device status and the
	 * config descriptor.  is_bus_powered means B_PERIPHERAL
	 * draws some VBUS current; both can be true.
	 */
	unsigned		is_self_powered:1;
	unsigned		is_bus_powered:1;

	unsigned		set_address:1;
	unsigned		test_mode:1;
	unsigned		softconnect:1;

	u8			address;
	u8			test_mode_nr;
	u16			ackpend;		/* ep0 */
	enum musb_g_ep0_state	ep0_state;
	struct usb_gadget	g;			/* the gadget */
	struct usb_gadget_driver *gadget_driver;	/* its driver */
	struct usb_hcd		*hcd;			/* the usb hcd */

	/*
	 * FIXME: Remove this flag.
	 *
	 * This is only added to allow Blackfin to work
	 * with current driver. For some unknown reason
	 * Blackfin doesn't work with double buffering
	 * and that's enabled by default.
	 *
	 * We added this flag to forcefully disable double
	 * buffering until we get it working.
	 */
	unsigned                double_buffer_not_ok:1;

	const struct musb_hdrc_config *config;

	int			xceiv_old_state;
#ifdef CONFIG_DEBUG_FS
	struct dentry		*debugfs_root;
#endif
};

/* This must be included after struct musb is defined */
#include "musb_regs.h"

static inline struct musb *gadget_to_musb(struct usb_gadget *g)
{
	return container_of(g, struct musb, g);
}

#ifdef CONFIG_BLACKFIN
static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	if (epnum < 5) {
		hw_ep->max_packet_sz_tx = 128;
		hw_ep->max_packet_sz_rx = 128;
	} else {
		hw_ep->max_packet_sz_tx = 1024;
		hw_ep->max_packet_sz_rx = 1024;
	}
	hw_ep->is_shared_fifo = false;

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}

#else

static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	void __iomem *mbase = musb->mregs;
	u8 reg = 0;

	/* read from core using indexed model */
	reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
	/* 0's returned when no more endpoints */
	if (!reg)
		return -ENODEV;

	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);

	/* shared TX/RX FIFO? */
	if ((reg & 0xf0) == 0xf0) {
		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
		hw_ep->is_shared_fifo = true;
		return 0;
	} else {
		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
		hw_ep->is_shared_fifo = false;
	}

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}
#endif /* CONFIG_BLACKFIN */


/***************************** Glue it together *****************************/

extern const char musb_driver_name[];

extern void musb_stop(struct musb *musb);
extern void musb_start(struct musb *musb);

extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);

extern void musb_load_testpacket(struct musb *);

extern irqreturn_t musb_interrupt(struct musb *);

extern void musb_hnp_stop(struct musb *musb);

int musb_queue_resume_work(struct musb *musb,
			   int (*callback)(struct musb *musb, void *data),
			   void *data);

static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
{
	if (musb->ops->set_vbus)
		musb->ops->set_vbus(musb, is_on);
}

static inline void musb_platform_enable(struct musb *musb)
{
	if (musb->ops->enable)
		musb->ops->enable(musb);
}

static inline void musb_platform_disable(struct musb *musb)
{
	if (musb->ops->disable)
		musb->ops->disable(musb);
}

static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
{
	if (!musb->ops->set_mode)
		return 0;

	return musb->ops->set_mode(musb, mode);
}

static inline void musb_platform_try_idle(struct musb *musb,
		unsigned long timeout)
{
	if (musb->ops->try_idle)
		musb->ops->try_idle(musb, timeout);
}

static inline int  musb_platform_recover(struct musb *musb)
{
	if (!musb->ops->recover)
		return 0;

	return musb->ops->recover(musb);
}

static inline int musb_platform_get_vbus_status(struct musb *musb)
{
	if (!musb->ops->vbus_status)
		return -EINVAL;

	return musb->ops->vbus_status(musb);
}

static inline int musb_platform_init(struct musb *musb)
{
	if (!musb->ops->init)
		return -EINVAL;

	return musb->ops->init(musb);
}

static inline int musb_platform_exit(struct musb *musb)
{
	if (!musb->ops->exit)
		return -EINVAL;

	return musb->ops->exit(musb);
}

static inline void musb_platform_pre_root_reset_end(struct musb *musb)
{
	if (musb->ops->pre_root_reset_end)
		musb->ops->pre_root_reset_end(musb);
}

static inline void musb_platform_post_root_reset_end(struct musb *musb)
{
	if (musb->ops->post_root_reset_end)
		musb->ops->post_root_reset_end(musb);
}

/*
 * gets the "dr_mode" property from DT and converts it into musb_mode
 * if the property is not found or not recognized returns MUSB_OTG
 */
extern enum musb_mode musb_get_mode(struct device *dev);

#endif	/* __MUSB_CORE_H__ */
Commit	Line	Data
550a7375 FB	1	/*
	2	* MUSB OTG driver defines
	3	*
	4	* Copyright 2005 Mentor Graphics Corporation
	5	* Copyright (C) 2005-2006 by Texas Instruments
	6	* Copyright (C) 2006-2007 Nokia Corporation
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
	23	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	24	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	25	* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
	26	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	27	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	28	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	29	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	31	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	*/
	34
	35	#ifndef __MUSB_CORE_H__
	36	#define __MUSB_CORE_H__
	37
	38	#include <linux/slab.h>
	39	#include <linux/list.h>
	40	#include <linux/interrupt.h>
550a7375	41	#include <linux/errno.h>
f7f9d63e	42	#include <linux/timer.h>
550a7375 FB	43	#include <linux/device.h>
	44	#include <linux/usb/ch9.h>
	45	#include <linux/usb/gadget.h>
	46	#include <linux/usb.h>
	47	#include <linux/usb/otg.h>
	48	#include <linux/usb/musb.h>
3e3101d5	49	#include <linux/phy/phy.h>
8ed1fb79	50	#include <linux/workqueue.h>
550a7375 FB	51
	52	struct musb;
	53	struct musb_hw_ep;
	54	struct musb_ep;
	55
0ded2f14 CC	56	/* Helper defines for struct musb->hwvers */
	57	#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
	58	#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
	59	#define MUSB_HWVERS_RC 0x8000
	60	#define MUSB_HWVERS_1300 0x52C
	61	#define MUSB_HWVERS_1400 0x590
	62	#define MUSB_HWVERS_1800 0x720
	63	#define MUSB_HWVERS_1900 0x784
	64	#define MUSB_HWVERS_2000 0x800
550a7375 FB	65
	66	#include "musb_debug.h"
	67	#include "musb_dma.h"
	68
550a7375	69	#include "musb_io.h"
550a7375 FB	70
550a7375 FB	71	#include "musb_gadget.h"
27729aad	72	#include <linux/usb/hcd.h>
550a7375 FB	73	#include "musb_host.h"
550a7375 FB	74
550a7375 FB	75	/* NOTE: otg and peripheral-only state machines start at B_IDLE.
	76	* OTG or host-only go to A_IDLE when ID is sensed.
	77	*/
	78	#define is_peripheral_active(m) (!(m)->is_host)
	79	#define is_host_active(m) ((m)->is_host)
	80
9ad96e69 DM	81	enum {
	82	MUSB_PORT_MODE_HOST = 1,
	83	MUSB_PORT_MODE_GADGET,
	84	MUSB_PORT_MODE_DUAL_ROLE,
	85	};
	86
550a7375 FB	87	/**************************** CONSTANTS ******************************/
	88
	89	#ifndef MUSB_C_NUM_EPS
	90	#define MUSB_C_NUM_EPS ((u8)16)
	91	#endif
	92
	93	#ifndef MUSB_MAX_END0_PACKET
	94	#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
	95	#endif
	96
	97	/* host side ep0 states */
	98	enum musb_h_ep0_state {
	99	MUSB_EP0_IDLE,
	100	MUSB_EP0_START, /* expect ack of setup */
	101	MUSB_EP0_IN, /* expect IN DATA */
	102	MUSB_EP0_OUT, /* expect ack of OUT DATA */
	103	MUSB_EP0_STATUS, /* expect ack of STATUS */
	104	} __attribute__ ((packed));
	105
	106	/* peripheral side ep0 states */
	107	enum musb_g_ep0_state {
a5073b52 SS	108	MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
a5073b52 SS	109	MUSB_EP0_STAGE_SETUP, /* received SETUP */
550a7375 FB	110	MUSB_EP0_STAGE_TX, /* IN data */
	111	MUSB_EP0_STAGE_RX, /* OUT data */
	112	MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
	113	MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
	114	MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
	115	} __attribute__ ((packed));
	116
f7f9d63e DB	117	/*
	118	* OTG protocol constants. See USB OTG 1.3 spec,
	119	* sections 5.5 "Device Timings" and 6.6.5 "Timers".
	120	*/
550a7375	121	#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
f7f9d63e DB	122	#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
	123	#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
	124	#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
	125
550a7375 FB	126	/**************************** FUNCTIONS ******************************/
	127
	128	#define MUSB_HST_MODE(_musb)\
	129	{ (_musb)->is_host = true; }
	130	#define MUSB_DEV_MODE(_musb) \
	131	{ (_musb)->is_host = false; }
	132
	133	#define test_devctl_hst_mode(_x) \
	134	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
	135
	136	#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
	137
	138	/****************************** TYPES ***********************************/
	139
5450ac88 TL	140	struct musb_io;
5450ac88 TL	141
3ca8abb8 FB	142	/**
3ca8abb8 FB	143	* struct musb_platform_ops - Operations passed to musb_core by HW glue layer
5450ac88 TL	144	* @quirks: flags for platform specific quirks
	145	* @enable: enable device
	146	* @disable: disable device
	147	* @ep_offset: returns the end point offset
	148	* @ep_select: selects the specified end point
	149	* @fifo_mode: sets the fifo mode
	150	* @fifo_offset: returns the fifo offset
	151	* @readb: read 8 bits
	152	* @writeb: write 8 bits
	153	* @readw: read 16 bits
	154	* @writew: write 16 bits
	155	* @readl: read 32 bits
	156	* @writel: write 32 bits
	157	* @read_fifo: reads the fifo
	158	* @write_fifo: writes to fifo
7f6283ed TL	159	* @dma_init: platform specific dma init function
7f6283ed TL	160	* @dma_exit: platform specific dma exit function
3ca8abb8 FB	161	* @init: turns on clocks, sets up platform-specific registers, etc
3ca8abb8 FB	162	* @exit: undoes @init
3ca8abb8	163	* @set_mode: forcefully changes operating mode
b28a6432 FB	164	* @try_idle: tries to idle the IP
b28a6432 FB	165	* @recover: platform-specific babble recovery
3ca8abb8 FB	166	* @vbus_status: returns vbus status if possible
3ca8abb8 FB	167	* @set_vbus: forces vbus status
9ea35331	168	* @adjust_channel_params: pre check for standard dma channel_program func
591fa9dd HG	169	* @pre_root_reset_end: called before the root usb port reset flag gets cleared
591fa9dd HG	170	* @post_root_reset_end: called after the root usb port reset flag gets cleared
8055555f	171	* @phy_callback: optional callback function for the phy to call
3ca8abb8 FB	172	*/
3ca8abb8 FB	173	struct musb_platform_ops {
5450ac88 TL	174
	175	#define MUSB_DMA_UX500 BIT(6)
	176	#define MUSB_DMA_CPPI41 BIT(5)
	177	#define MUSB_DMA_CPPI BIT(4)
	178	#define MUSB_DMA_TUSB_OMAP BIT(3)
	179	#define MUSB_DMA_INVENTRA BIT(2)
	180	#define MUSB_IN_TUSB BIT(1)
	181	#define MUSB_INDEXED_EP BIT(0)
	182	u32 quirks;
	183
3ca8abb8 FB	184	int (init)(struct musb musb);
	185	int (exit)(struct musb musb);
	186
3ca8abb8 FB	187	void (enable)(struct musb musb);
	188	void (disable)(struct musb musb);
	189
5450ac88 TL	190	u32 (*ep_offset)(u8 epnum, u16 offset);
	191	void (ep_select)(void __iomem mbase, u8 epnum);
	192	u16 fifo_mode;
	193	u32 (*fifo_offset)(u8 epnum);
6cc2af6d	194	u32 (*busctl_offset)(u8 epnum, u16 offset);
5450ac88 TL	195	u8 (readb)(const void __iomem addr, unsigned offset);
	196	void (writeb)(void __iomem addr, unsigned offset, u8 data);
	197	u16 (readw)(const void __iomem addr, unsigned offset);
	198	void (writew)(void __iomem addr, unsigned offset, u16 data);
	199	u32 (readl)(const void __iomem addr, unsigned offset);
	200	void (writel)(void __iomem addr, unsigned offset, u32 data);
	201	void (read_fifo)(struct musb_hw_ep hw_ep, u16 len, u8 *buf);
	202	void (write_fifo)(struct musb_hw_ep hw_ep, u16 len, const u8 *buf);
7f6283ed TL	203	struct dma_controller *
	204	(dma_init) (struct musb musb, void __iomem *base);
	205	void (dma_exit)(struct dma_controller c);
3ca8abb8 FB	206	int (set_mode)(struct musb musb, u8 mode);
3ca8abb8 FB	207	void (try_idle)(struct musb musb, unsigned long timeout);
b28a6432	208	int (recover)(struct musb musb);
3ca8abb8 FB	209
	210	int (vbus_status)(struct musb musb);
	211	void (set_vbus)(struct musb musb, int on);
13254307 MF	212
	213	int (adjust_channel_params)(struct dma_channel channel,
	214	u16 packet_sz, u8 *mode,
	215	dma_addr_t dma_addr, u32 len);
591fa9dd HG	216	void (pre_root_reset_end)(struct musb musb);
591fa9dd HG	217	void (post_root_reset_end)(struct musb musb);
12b7db2b	218	int (*phy_callback)(enum musb_vbus_id_status status);
3ca8abb8 FB	219	};
3ca8abb8 FB	220
550a7375 FB	221	/*
	222	* struct musb_hw_ep - endpoint hardware (bidirectional)
	223	*
	224	* Ordered slightly for better cacheline locality.
	225	*/
	226	struct musb_hw_ep {
	227	struct musb *musb;
	228	void __iomem *fifo;
	229	void __iomem *regs;
	230
ebf39920	231	#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
550a7375 FB	232	void __iomem *conf;
	233	#endif
	234
	235	/* index in musb->endpoints[] */
	236	u8 epnum;
	237
	238	/* hardware configuration, possibly dynamic */
	239	bool is_shared_fifo;
	240	bool tx_double_buffered;
	241	bool rx_double_buffered;
	242	u16 max_packet_sz_tx;
	243	u16 max_packet_sz_rx;
	244
	245	struct dma_channel *tx_channel;
	246	struct dma_channel *rx_channel;
	247
ebf39920	248	#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
550a7375 FB	249	/* TUSB has "asynchronous" and "synchronous" dma modes */
	250	dma_addr_t fifo_async;
	251	dma_addr_t fifo_sync;
	252	void __iomem *fifo_sync_va;
	253	#endif
	254
550a7375 FB	255	/* currently scheduled peripheral endpoint */
	256	struct musb_qh *in_qh;
	257	struct musb_qh *out_qh;
	258
	259	u8 rx_reinit;
	260	u8 tx_reinit;
550a7375	261
550a7375 FB	262	/* peripheral side */
	263	struct musb_ep ep_in; /* TX */
	264	struct musb_ep ep_out; /* RX */
550a7375 FB	265	};
550a7375 FB	266
ad1adb89	267	static inline struct musb_request next_in_request(struct musb_hw_ep hw_ep)
550a7375	268	{
550a7375	269	return next_request(&hw_ep->ep_in);
550a7375 FB	270	}
550a7375 FB	271
ad1adb89	272	static inline struct musb_request next_out_request(struct musb_hw_ep hw_ep)
550a7375	273	{
550a7375	274	return next_request(&hw_ep->ep_out);
550a7375 FB	275	}
550a7375 FB	276
7421107b FB	277	struct musb_csr_regs {
	278	/* FIFO registers */
	279	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	280	u16 rxfifoadd, txfifoadd;
	281	u8 txtype, txinterval, rxtype, rxinterval;
	282	u8 rxfifosz, txfifosz;
	283	u8 txfunaddr, txhubaddr, txhubport;
	284	u8 rxfunaddr, rxhubaddr, rxhubport;
	285	};
	286
	287	struct musb_context_registers {
	288
7421107b	289	u8 power;
7421107b FB	290	u8 intrusbe;
	291	u16 frame;
	292	u8 index, testmode;
	293
	294	u8 devctl, busctl, misc;
e25bec16	295	u32 otg_interfsel;
7421107b FB	296
	297	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
	298	};
	299
550a7375 FB	300	/*
	301	* struct musb - Driver instance data.
	302	*/
	303	struct musb {
	304	/* device lock */
	305	spinlock_t lock;
ea2f35c0	306	spinlock_t list_lock; /* resume work list lock */
743411b3	307
5450ac88	308	struct musb_io io;
743411b3	309	const struct musb_platform_ops *ops;
7421107b	310	struct musb_context_registers context;
743411b3	311
550a7375	312	irqreturn_t (isr)(int, void );
2bff3916	313	struct delayed_work irq_work;
8ed1fb79 DM	314	struct delayed_work deassert_reset_work;
8ed1fb79 DM	315	struct delayed_work finish_resume_work;
517bafff	316	struct delayed_work gadget_work;
32c3b94e	317	u16 hwvers;
550a7375	318
af5ec14d	319	u16 intrrxe;
b18d26f6	320	u16 intrtxe;
550a7375 FB	321	/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
	322	#define MUSB_PORT_STAT_RESUME (1 << 31)
	323
	324	u32 port1_status;
	325
550a7375 FB	326	unsigned long rh_timer;
	327
	328	enum musb_h_ep0_state ep0_stage;
	329
	330	/* bulk traffic normally dedicates endpoint hardware, and each
	331	* direction has its own ring of host side endpoints.
	332	* we try to progress the transfer at the head of each endpoint's
	333	* queue until it completes or NAKs too much; then we try the next
	334	* endpoint.
	335	*/
	336	struct musb_hw_ep *bulk_ep;
	337
	338	struct list_head control; /* of musb_qh */
	339	struct list_head in_bulk; /* of musb_qh */
	340	struct list_head out_bulk; /* of musb_qh */
ea2f35c0	341	struct list_head pending_list; /* pending work list */
f7f9d63e DB	342
f7f9d63e DB	343	struct timer_list otg_timer;
594632ef	344	struct notifier_block nb;
550a7375	345
550a7375 FB	346	struct dma_controller *dma_controller;
	347
	348	struct device *controller;
	349	void __iomem *ctrl_base;
	350	void __iomem *mregs;
	351
ebf39920	352	#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
550a7375 FB	353	dma_addr_t async;
	354	dma_addr_t sync;
	355	void __iomem *sync_va;
8c240dc1	356	u8 tusb_revision;
550a7375 FB	357	#endif
	358
	359	/* passed down from chip/board specific irq handlers */
	360	u8 int_usb;
	361	u16 int_rx;
	362	u16 int_tx;
	363
86753811	364	struct usb_phy *xceiv;
3e3101d5	365	struct phy *phy;
550a7375 FB	366
550a7375 FB	367	int nIrq;
c48a5155	368	unsigned irq_wake:1;
550a7375 FB	369
	370	struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
	371	#define control_ep endpoints
	372
	373	#define VBUSERR_RETRY_COUNT 3
	374	u16 vbuserr_retry;
	375	u16 epmask;
	376	u8 nr_endpoints;
	377
550a7375 FB	378	int (*board_set_power)(int state);
550a7375 FB	379
550a7375 FB	380	u8 min_power; /* vbus for periph, in mA/2 */
550a7375 FB	381
9ad96e69	382	int port_mode; /* MUSB_PORT_MODE_* */
467d5c98	383	bool session;
2bff3916	384	unsigned long quirk_retries;
550a7375 FB	385	bool is_host;
	386
	387	int a_wait_bcon; /* VBUS timeout in msecs */
	388	unsigned long idle_timeout; /* Next timeout in jiffies */
	389
c723bd6e	390	unsigned is_initialized:1;
ea2f35c0	391	unsigned is_runtime_suspended:1;
c723bd6e	392
550a7375 FB	393	/* active means connected and not suspended */
	394	unsigned is_active:1;
	395
	396	unsigned is_multipoint:1;
550a7375	397
a483d706 AKG	398	unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
a483d706 AKG	399	unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
51bf0d0e	400	unsigned dyn_fifo:1; /* dynamic FIFO supported? */
a483d706	401
7ed069c1	402	unsigned bulk_split:1;
550a7375	403	#define can_bulk_split(musb,type) \
7ed069c1	404	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
550a7375	405
7ed069c1	406	unsigned bulk_combine:1;
550a7375	407	#define can_bulk_combine(musb,type) \
7ed069c1	408	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
550a7375	409
550a7375 FB	410	/* is_suspended means USB B_PERIPHERAL suspend */
550a7375 FB	411	unsigned is_suspended:1;
baadd52f	412	unsigned need_finish_resume :1;
550a7375 FB	413
	414	/* may_wakeup means remote wakeup is enabled */
	415	unsigned may_wakeup:1;
	416
	417	/* is_self_powered is reported in device status and the
	418	* config descriptor. is_bus_powered means B_PERIPHERAL
	419	* draws some VBUS current; both can be true.
	420	*/
	421	unsigned is_self_powered:1;
	422	unsigned is_bus_powered:1;
	423
	424	unsigned set_address:1;
	425	unsigned test_mode:1;
	426	unsigned softconnect:1;
5990378b FB	427
	428	u8 address;
	429	u8 test_mode_nr;
	430	u16 ackpend; /* ep0 */
	431	enum musb_g_ep0_state ep0_state;
	432	struct usb_gadget g; /* the gadget */
	433	struct usb_gadget_driver gadget_driver; / its driver */
74c2e936	434	struct usb_hcd hcd; / the usb hcd */
5990378b	435
06624818 FB	436	/*
	437	* FIXME: Remove this flag.
	438	*
	439	* This is only added to allow Blackfin to work
	440	* with current driver. For some unknown reason
	441	* Blackfin doesn't work with double buffering
	442	* and that's enabled by default.
	443	*
	444	* We added this flag to forcefully disable double
	445	* buffering until we get it working.
	446	*/
fc87e080	447	unsigned double_buffer_not_ok:1;
550a7375	448
ead22caf	449	const struct musb_hdrc_config *config;
ca6d1b13	450
8d2421e6 AKG	451	int xceiv_old_state;
	452	#ifdef CONFIG_DEBUG_FS
	453	struct dentry *debugfs_root;
550a7375 FB	454	#endif
	455	};
	456
6cc2af6d HG	457	/* This must be included after struct musb is defined */
	458	#include "musb_regs.h"
	459
550a7375 FB	460	static inline struct musb gadget_to_musb(struct usb_gadget g)
	461	{
	462	return container_of(g, struct musb, g);
	463	}
550a7375	464
c6cf8b00 BW	465	#ifdef CONFIG_BLACKFIN
	466	static inline int musb_read_fifosize(struct musb *musb,
	467	struct musb_hw_ep *hw_ep, u8 epnum)
	468	{
	469	musb->nr_endpoints++;
	470	musb->epmask \|= (1 << epnum);
	471
	472	if (epnum < 5) {
	473	hw_ep->max_packet_sz_tx = 128;
	474	hw_ep->max_packet_sz_rx = 128;
	475	} else {
	476	hw_ep->max_packet_sz_tx = 1024;
	477	hw_ep->max_packet_sz_rx = 1024;
	478	}
	479	hw_ep->is_shared_fifo = false;
	480
	481	return 0;
	482	}
	483
	484	static inline void musb_configure_ep0(struct musb *musb)
	485	{
	486	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	487	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	488	musb->endpoints[0].is_shared_fifo = true;
	489	}
	490
	491	#else
	492
	493	static inline int musb_read_fifosize(struct musb *musb,
	494	struct musb_hw_ep *hw_ep, u8 epnum)
	495	{
a156544b	496	void __iomem *mbase = musb->mregs;
c6cf8b00 BW	497	u8 reg = 0;
	498
	499	/* read from core using indexed model */
d026e9c7	500	reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
c6cf8b00 BW	501	/* 0's returned when no more endpoints */
	502	if (!reg)
	503	return -ENODEV;
	504
	505	musb->nr_endpoints++;
	506	musb->epmask \|= (1 << epnum);
	507
	508	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
	509
	510	/* shared TX/RX FIFO? */
	511	if ((reg & 0xf0) == 0xf0) {
	512	hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
	513	hw_ep->is_shared_fifo = true;
	514	return 0;
	515	} else {
	516	hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
	517	hw_ep->is_shared_fifo = false;
	518	}
	519
	520	return 0;
	521	}
	522
	523	static inline void musb_configure_ep0(struct musb *musb)
	524	{
	525	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	526	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716	527	musb->endpoints[0].is_shared_fifo = true;
c6cf8b00 BW	528	}
	529	#endif /* CONFIG_BLACKFIN */
	530
550a7375 FB	531
	532	/*************************** Glue it together ***************************/
	533
	534	extern const char musb_driver_name[];
	535
550a7375	536	extern void musb_stop(struct musb *musb);
001dd84a	537	extern void musb_start(struct musb *musb);
550a7375 FB	538
	539	extern void musb_write_fifo(struct musb_hw_ep ep, u16 len, const u8 src);
	540	extern void musb_read_fifo(struct musb_hw_ep ep, u16 len, u8 dst);
	541
	542	extern void musb_load_testpacket(struct musb *);
	543
	544	extern irqreturn_t musb_interrupt(struct musb *);
	545
550a7375 FB	546	extern void musb_hnp_stop(struct musb *musb);
550a7375 FB	547
ea2f35c0 TL	548	int musb_queue_resume_work(struct musb *musb,
	549	int (callback)(struct musb musb, void *data),
	550	void *data);
	551
743411b3 FB	552	static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
	553	{
	554	if (musb->ops->set_vbus)
	555	musb->ops->set_vbus(musb, is_on);
	556	}
	557
	558	static inline void musb_platform_enable(struct musb *musb)
	559	{
	560	if (musb->ops->enable)
	561	musb->ops->enable(musb);
	562	}
	563
	564	static inline void musb_platform_disable(struct musb *musb)
	565	{
	566	if (musb->ops->disable)
	567	musb->ops->disable(musb);
	568	}
	569
	570	static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
	571	{
	572	if (!musb->ops->set_mode)
	573	return 0;
	574
	575	return musb->ops->set_mode(musb, mode);
	576	}
	577
	578	static inline void musb_platform_try_idle(struct musb *musb,
	579	unsigned long timeout)
	580	{
	581	if (musb->ops->try_idle)
	582	musb->ops->try_idle(musb, timeout);
	583	}
	584
b28a6432	585	static inline int musb_platform_recover(struct musb *musb)
1e42d20c	586	{
b28a6432 FB	587	if (!musb->ops->recover)
b28a6432 FB	588	return 0;
d871c622	589
b28a6432	590	return musb->ops->recover(musb);
1e42d20c DM	591	}
1e42d20c DM	592
743411b3 FB	593	static inline int musb_platform_get_vbus_status(struct musb *musb)
	594	{
	595	if (!musb->ops->vbus_status)
3bbafac8	596	return -EINVAL;
743411b3 FB	597
	598	return musb->ops->vbus_status(musb);
	599	}
	600
	601	static inline int musb_platform_init(struct musb *musb)
	602	{
	603	if (!musb->ops->init)
	604	return -EINVAL;
	605
	606	return musb->ops->init(musb);
	607	}
	608
	609	static inline int musb_platform_exit(struct musb *musb)
	610	{
	611	if (!musb->ops->exit)
	612	return -EINVAL;
	613
	614	return musb->ops->exit(musb);
	615	}
	616
591fa9dd HG	617	static inline void musb_platform_pre_root_reset_end(struct musb *musb)
	618	{
	619	if (musb->ops->pre_root_reset_end)
	620	musb->ops->pre_root_reset_end(musb);
	621	}
	622
	623	static inline void musb_platform_post_root_reset_end(struct musb *musb)
	624	{
	625	if (musb->ops->post_root_reset_end)
	626	musb->ops->post_root_reset_end(musb);
	627	}
	628
830fc64c PK	629	/*
	630	* gets the "dr_mode" property from DT and converts it into musb_mode
	631	* if the property is not found or not recognized returns MUSB_OTG
	632	*/
	633	extern enum musb_mode musb_get_mode(struct device *dev);
	634
550a7375	635	#endif /* __MUSB_CORE_H__ */