[mirror_ubuntu-focal-kernel.git] / drivers / usb / musb / musb_debugfs.c

// SPDX-License-Identifier: GPL-2.0
/*
 * MUSB OTG driver debugfs support
 *
 * Copyright 2010 Nokia Corporation
 * Contact: Felipe Balbi <felipe.balbi@nokia.com>
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>

#include <linux/uaccess.h>

#include "musb_core.h"
#include "musb_debug.h"

struct musb_register_map {
	char			*name;
	unsigned		offset;
	unsigned		size;
};

static const struct musb_register_map musb_regmap[] = {
	{ "FAddr",	MUSB_FADDR,	8 },
	{ "Power",	MUSB_POWER,	8 },
	{ "Frame",	MUSB_FRAME,	16 },
	{ "Index",	MUSB_INDEX,	8 },
	{ "Testmode",	MUSB_TESTMODE,	8 },
	{ "TxMaxPp",	MUSB_TXMAXP,	16 },
	{ "TxCSRp",	MUSB_TXCSR,	16 },
	{ "RxMaxPp",	MUSB_RXMAXP,	16 },
	{ "RxCSR",	MUSB_RXCSR,	16 },
	{ "RxCount",	MUSB_RXCOUNT,	16 },
	{ "IntrRxE",	MUSB_INTRRXE,	16 },
	{ "IntrTxE",	MUSB_INTRTXE,	16 },
	{ "IntrUsbE",	MUSB_INTRUSBE,	8 },
	{ "DevCtl",	MUSB_DEVCTL,	8 },
	{ "VControl",	0x68,		32 },
	{ "HWVers",	0x69,		16 },
	{ "LinkInfo",	MUSB_LINKINFO,	8 },
	{ "VPLen",	MUSB_VPLEN,	8 },
	{ "HS_EOF1",	MUSB_HS_EOF1,	8 },
	{ "FS_EOF1",	MUSB_FS_EOF1,	8 },
	{ "LS_EOF1",	MUSB_LS_EOF1,	8 },
	{ "SOFT_RST",	0x7F,		8 },
	{ "DMA_CNTLch0",	0x204,	16 },
	{ "DMA_ADDRch0",	0x208,	32 },
	{ "DMA_COUNTch0",	0x20C,	32 },
	{ "DMA_CNTLch1",	0x214,	16 },
	{ "DMA_ADDRch1",	0x218,	32 },
	{ "DMA_COUNTch1",	0x21C,	32 },
	{ "DMA_CNTLch2",	0x224,	16 },
	{ "DMA_ADDRch2",	0x228,	32 },
	{ "DMA_COUNTch2",	0x22C,	32 },
	{ "DMA_CNTLch3",	0x234,	16 },
	{ "DMA_ADDRch3",	0x238,	32 },
	{ "DMA_COUNTch3",	0x23C,	32 },
	{ "DMA_CNTLch4",	0x244,	16 },
	{ "DMA_ADDRch4",	0x248,	32 },
	{ "DMA_COUNTch4",	0x24C,	32 },
	{ "DMA_CNTLch5",	0x254,	16 },
	{ "DMA_ADDRch5",	0x258,	32 },
	{ "DMA_COUNTch5",	0x25C,	32 },
	{ "DMA_CNTLch6",	0x264,	16 },
	{ "DMA_ADDRch6",	0x268,	32 },
	{ "DMA_COUNTch6",	0x26C,	32 },
	{ "DMA_CNTLch7",	0x274,	16 },
	{ "DMA_ADDRch7",	0x278,	32 },
	{ "DMA_COUNTch7",	0x27C,	32 },
	{ "ConfigData",	MUSB_CONFIGDATA,8 },
	{ "BabbleCtl",	MUSB_BABBLE_CTL,8 },
	{ "TxFIFOsz",	MUSB_TXFIFOSZ,	8 },
	{ "RxFIFOsz",	MUSB_RXFIFOSZ,	8 },
	{ "TxFIFOadd",	MUSB_TXFIFOADD,	16 },
	{ "RxFIFOadd",	MUSB_RXFIFOADD,	16 },
	{ "EPInfo",	MUSB_EPINFO,	8 },
	{ "RAMInfo",	MUSB_RAMINFO,	8 },
	{  }	/* Terminating Entry */
};

static int musb_regdump_show(struct seq_file *s, void *unused)
{
	struct musb		*musb = s->private;
	unsigned		i;

	seq_printf(s, "MUSB (M)HDRC Register Dump\n");
	pm_runtime_get_sync(musb->controller);

	for (i = 0; i < ARRAY_SIZE(musb_regmap); i++) {
		switch (musb_regmap[i].size) {
		case 8:
			seq_printf(s, "%-12s: %02x\n", musb_regmap[i].name,
					musb_readb(musb->mregs, musb_regmap[i].offset));
			break;
		case 16:
			seq_printf(s, "%-12s: %04x\n", musb_regmap[i].name,
					musb_readw(musb->mregs, musb_regmap[i].offset));
			break;
		case 32:
			seq_printf(s, "%-12s: %08x\n", musb_regmap[i].name,
					musb_readl(musb->mregs, musb_regmap[i].offset));
			break;
		}
	}

	pm_runtime_mark_last_busy(musb->controller);
	pm_runtime_put_autosuspend(musb->controller);
	return 0;
}

static int musb_regdump_open(struct inode *inode, struct file *file)
{
	return single_open(file, musb_regdump_show, inode->i_private);
}

static int musb_test_mode_show(struct seq_file *s, void *unused)
{
	struct musb		*musb = s->private;
	unsigned		test;

	pm_runtime_get_sync(musb->controller);
	test = musb_readb(musb->mregs, MUSB_TESTMODE);
	pm_runtime_mark_last_busy(musb->controller);
	pm_runtime_put_autosuspend(musb->controller);

	if (test == (MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_FS))
		seq_printf(s, "force host full-speed\n");

	else if (test == (MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_HS))
		seq_printf(s, "force host high-speed\n");

	else if (test == MUSB_TEST_FORCE_HOST)
		seq_printf(s, "force host\n");

	else if (test == MUSB_TEST_FIFO_ACCESS)
		seq_printf(s, "fifo access\n");

	else if (test == MUSB_TEST_FORCE_FS)
		seq_printf(s, "force full-speed\n");

	else if (test == MUSB_TEST_FORCE_HS)
		seq_printf(s, "force high-speed\n");

	else if (test == MUSB_TEST_PACKET)
		seq_printf(s, "test packet\n");

	else if (test == MUSB_TEST_K)
		seq_printf(s, "test K\n");

	else if (test == MUSB_TEST_J)
		seq_printf(s, "test J\n");

	else if (test == MUSB_TEST_SE0_NAK)
		seq_printf(s, "test SE0 NAK\n");

	return 0;
}

static const struct file_operations musb_regdump_fops = {
	.open			= musb_regdump_open,
	.read			= seq_read,
	.llseek			= seq_lseek,
	.release		= single_release,
};

static int musb_test_mode_open(struct inode *inode, struct file *file)
{
	return single_open(file, musb_test_mode_show, inode->i_private);
}

static ssize_t musb_test_mode_write(struct file *file,
		const char __user *ubuf, size_t count, loff_t *ppos)
{
	struct seq_file		*s = file->private_data;
	struct musb		*musb = s->private;
	u8			test;
	char			buf[24];

	pm_runtime_get_sync(musb->controller);
	test = musb_readb(musb->mregs, MUSB_TESTMODE);
	if (test) {
		dev_err(musb->controller, "Error: test mode is already set. "
			"Please do USB Bus Reset to start a new test.\n");
		goto ret;
	}

	memset(buf, 0x00, sizeof(buf));

	if (copy_from_user(buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
		return -EFAULT;

	if (strstarts(buf, "force host full-speed"))
		test = MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_FS;

	else if (strstarts(buf, "force host high-speed"))
		test = MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_HS;

	else if (strstarts(buf, "force host"))
		test = MUSB_TEST_FORCE_HOST;

	else if (strstarts(buf, "fifo access"))
		test = MUSB_TEST_FIFO_ACCESS;

	else if (strstarts(buf, "force full-speed"))
		test = MUSB_TEST_FORCE_FS;

	else if (strstarts(buf, "force high-speed"))
		test = MUSB_TEST_FORCE_HS;

	else if (strstarts(buf, "test packet")) {
		test = MUSB_TEST_PACKET;
		musb_load_testpacket(musb);
	}

	else if (strstarts(buf, "test K"))
		test = MUSB_TEST_K;

	else if (strstarts(buf, "test J"))
		test = MUSB_TEST_J;

	else if (strstarts(buf, "test SE0 NAK"))
		test = MUSB_TEST_SE0_NAK;

	musb_writeb(musb->mregs, MUSB_TESTMODE, test);

ret:
	pm_runtime_mark_last_busy(musb->controller);
	pm_runtime_put_autosuspend(musb->controller);
	return count;
}

static const struct file_operations musb_test_mode_fops = {
	.open			= musb_test_mode_open,
	.write			= musb_test_mode_write,
	.read			= seq_read,
	.llseek			= seq_lseek,
	.release		= single_release,
};

static int musb_softconnect_show(struct seq_file *s, void *unused)
{
	struct musb	*musb = s->private;
	u8		reg;
	int		connect;

	switch (musb->xceiv->otg->state) {
	case OTG_STATE_A_HOST:
	case OTG_STATE_A_WAIT_BCON:
		pm_runtime_get_sync(musb->controller);

		reg = musb_readb(musb->mregs, MUSB_DEVCTL);
		connect = reg & MUSB_DEVCTL_SESSION ? 1 : 0;

		pm_runtime_mark_last_busy(musb->controller);
		pm_runtime_put_autosuspend(musb->controller);
		break;
	default:
		connect = -1;
	}

	seq_printf(s, "%d\n", connect);

	return 0;
}

static int musb_softconnect_open(struct inode *inode, struct file *file)
{
	return single_open(file, musb_softconnect_show, inode->i_private);
}

static ssize_t musb_softconnect_write(struct file *file,
		const char __user *ubuf, size_t count, loff_t *ppos)
{
	struct seq_file		*s = file->private_data;
	struct musb		*musb = s->private;
	char			buf[2];
	u8			reg;

	memset(buf, 0x00, sizeof(buf));

	if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
		return -EFAULT;

	pm_runtime_get_sync(musb->controller);
	if (!strncmp(buf, "0", 1)) {
		switch (musb->xceiv->otg->state) {
		case OTG_STATE_A_HOST:
			musb_root_disconnect(musb);
			reg = musb_readb(musb->mregs, MUSB_DEVCTL);
			reg &= ~MUSB_DEVCTL_SESSION;
			musb_writeb(musb->mregs, MUSB_DEVCTL, reg);
			break;
		default:
			break;
		}
	} else if (!strncmp(buf, "1", 1)) {
		switch (musb->xceiv->otg->state) {
		case OTG_STATE_A_WAIT_BCON:
			/*
			 * musb_save_context() called in musb_runtime_suspend()
			 * might cache devctl with SESSION bit cleared during
			 * soft-disconnect, so specifically set SESSION bit
			 * here to preserve it for musb_runtime_resume().
			 */
			musb->context.devctl |= MUSB_DEVCTL_SESSION;
			reg = musb_readb(musb->mregs, MUSB_DEVCTL);
			reg |= MUSB_DEVCTL_SESSION;
			musb_writeb(musb->mregs, MUSB_DEVCTL, reg);
			break;
		default:
			break;
		}
	}

	pm_runtime_mark_last_busy(musb->controller);
	pm_runtime_put_autosuspend(musb->controller);
	return count;
}

/*
 * In host mode, connect/disconnect the bus without physically
 * remove the devices.
 */
static const struct file_operations musb_softconnect_fops = {
	.open			= musb_softconnect_open,
	.write			= musb_softconnect_write,
	.read			= seq_read,
	.llseek			= seq_lseek,
	.release		= single_release,
};

int musb_init_debugfs(struct musb *musb)
{
	struct dentry		*root;
	struct dentry		*file;
	int			ret;

	root = debugfs_create_dir(dev_name(musb->controller), NULL);
	if (!root) {
		ret = -ENOMEM;
		goto err0;
	}

	file = debugfs_create_file("regdump", S_IRUGO, root, musb,
			&musb_regdump_fops);
	if (!file) {
		ret = -ENOMEM;
		goto err1;
	}

	file = debugfs_create_file("testmode", S_IRUGO | S_IWUSR,
			root, musb, &musb_test_mode_fops);
	if (!file) {
		ret = -ENOMEM;
		goto err1;
	}

	file = debugfs_create_file("softconnect", S_IRUGO | S_IWUSR,
			root, musb, &musb_softconnect_fops);
	if (!file) {
		ret = -ENOMEM;
		goto err1;
	}

	musb->debugfs_root = root;

	return 0;

err1:
	debugfs_remove_recursive(root);

err0:
	return ret;
}

void /* __init_or_exit */ musb_exit_debugfs(struct musb *musb)
{
	debugfs_remove_recursive(musb->debugfs_root);
}
Commit	Line	Data
5fd54ace	1	// SPDX-License-Identifier: GPL-2.0
7f7f9e2a FB	2	/*
	3	* MUSB OTG driver debugfs support
	4	*
	5	* Copyright 2010 Nokia Corporation
	6	* Contact: Felipe Balbi <felipe.balbi@nokia.com>
7f7f9e2a FB	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/kernel.h>
7f7f9e2a	11	#include <linux/init.h>
7f7f9e2a FB	12	#include <linux/debugfs.h>
	13	#include <linux/seq_file.h>
	14
7c0f6ba6	15	#include <linux/uaccess.h>
7f7f9e2a FB	16
	17	#include "musb_core.h"
	18	#include "musb_debug.h"
	19
7f7f9e2a FB	20	struct musb_register_map {
	21	char *name;
	22	unsigned offset;
	23	unsigned size;
	24	};
	25
	26	static const struct musb_register_map musb_regmap[] = {
c2365ce5 RB	27	{ "FAddr", MUSB_FADDR, 8 },
	28	{ "Power", MUSB_POWER, 8 },
	29	{ "Frame", MUSB_FRAME, 16 },
	30	{ "Index", MUSB_INDEX, 8 },
	31	{ "Testmode", MUSB_TESTMODE, 8 },
	32	{ "TxMaxPp", MUSB_TXMAXP, 16 },
	33	{ "TxCSRp", MUSB_TXCSR, 16 },
	34	{ "RxMaxPp", MUSB_RXMAXP, 16 },
	35	{ "RxCSR", MUSB_RXCSR, 16 },
	36	{ "RxCount", MUSB_RXCOUNT, 16 },
c2365ce5 RB	37	{ "IntrRxE", MUSB_INTRRXE, 16 },
	38	{ "IntrTxE", MUSB_INTRTXE, 16 },
	39	{ "IntrUsbE", MUSB_INTRUSBE, 8 },
	40	{ "DevCtl", MUSB_DEVCTL, 8 },
c2365ce5 RB	41	{ "VControl", 0x68, 32 },
c2365ce5 RB	42	{ "HWVers", 0x69, 16 },
c2365ce5 RB	43	{ "LinkInfo", MUSB_LINKINFO, 8 },
	44	{ "VPLen", MUSB_VPLEN, 8 },
	45	{ "HS_EOF1", MUSB_HS_EOF1, 8 },
	46	{ "FS_EOF1", MUSB_FS_EOF1, 8 },
	47	{ "LS_EOF1", MUSB_LS_EOF1, 8 },
	48	{ "SOFT_RST", 0x7F, 8 },
7f7f9e2a	49	{ "DMA_CNTLch0", 0x204, 16 },
0936fb5e AG	50	{ "DMA_ADDRch0", 0x208, 32 },
0936fb5e AG	51	{ "DMA_COUNTch0", 0x20C, 32 },
7f7f9e2a	52	{ "DMA_CNTLch1", 0x214, 16 },
0936fb5e AG	53	{ "DMA_ADDRch1", 0x218, 32 },
0936fb5e AG	54	{ "DMA_COUNTch1", 0x21C, 32 },
7f7f9e2a	55	{ "DMA_CNTLch2", 0x224, 16 },
0936fb5e AG	56	{ "DMA_ADDRch2", 0x228, 32 },
0936fb5e AG	57	{ "DMA_COUNTch2", 0x22C, 32 },
7f7f9e2a	58	{ "DMA_CNTLch3", 0x234, 16 },
0936fb5e AG	59	{ "DMA_ADDRch3", 0x238, 32 },
0936fb5e AG	60	{ "DMA_COUNTch3", 0x23C, 32 },
7f7f9e2a	61	{ "DMA_CNTLch4", 0x244, 16 },
0936fb5e AG	62	{ "DMA_ADDRch4", 0x248, 32 },
0936fb5e AG	63	{ "DMA_COUNTch4", 0x24C, 32 },
7f7f9e2a	64	{ "DMA_CNTLch5", 0x254, 16 },
0936fb5e AG	65	{ "DMA_ADDRch5", 0x258, 32 },
0936fb5e AG	66	{ "DMA_COUNTch5", 0x25C, 32 },
7f7f9e2a	67	{ "DMA_CNTLch6", 0x264, 16 },
0936fb5e AG	68	{ "DMA_ADDRch6", 0x268, 32 },
0936fb5e AG	69	{ "DMA_COUNTch6", 0x26C, 32 },
7f7f9e2a	70	{ "DMA_CNTLch7", 0x274, 16 },
0936fb5e AG	71	{ "DMA_ADDRch7", 0x278, 32 },
0936fb5e AG	72	{ "DMA_COUNTch7", 0x27C, 32 },
449a7e99 FB	73	{ "ConfigData", MUSB_CONFIGDATA,8 },
	74	{ "BabbleCtl", MUSB_BABBLE_CTL,8 },
	75	{ "TxFIFOsz", MUSB_TXFIFOSZ, 8 },
	76	{ "RxFIFOsz", MUSB_RXFIFOSZ, 8 },
	77	{ "TxFIFOadd", MUSB_TXFIFOADD, 16 },
	78	{ "RxFIFOadd", MUSB_RXFIFOADD, 16 },
	79	{ "EPInfo", MUSB_EPINFO, 8 },
	80	{ "RAMInfo", MUSB_RAMINFO, 8 },
7f7f9e2a FB	81	{ } /* Terminating Entry */
	82	};
	83
7f7f9e2a FB	84	static int musb_regdump_show(struct seq_file s, void unused)
	85	{
	86	struct musb *musb = s->private;
	87	unsigned i;
	88
	89	seq_printf(s, "MUSB (M)HDRC Register Dump\n");
7b6c1b4c	90	pm_runtime_get_sync(musb->controller);
7f7f9e2a FB	91
	92	for (i = 0; i < ARRAY_SIZE(musb_regmap); i++) {
	93	switch (musb_regmap[i].size) {
	94	case 8:
	95	seq_printf(s, "%-12s: %02x\n", musb_regmap[i].name,
	96	musb_readb(musb->mregs, musb_regmap[i].offset));
	97	break;
	98	case 16:
	99	seq_printf(s, "%-12s: %04x\n", musb_regmap[i].name,
	100	musb_readw(musb->mregs, musb_regmap[i].offset));
	101	break;
	102	case 32:
	103	seq_printf(s, "%-12s: %08x\n", musb_regmap[i].name,
	104	musb_readl(musb->mregs, musb_regmap[i].offset));
	105	break;
	106	}
	107	}
	108
7b6c1b4c BL	109	pm_runtime_mark_last_busy(musb->controller);
7b6c1b4c BL	110	pm_runtime_put_autosuspend(musb->controller);
7f7f9e2a FB	111	return 0;
	112	}
	113
	114	static int musb_regdump_open(struct inode inode, struct file file)
	115	{
	116	return single_open(file, musb_regdump_show, inode->i_private);
	117	}
	118
	119	static int musb_test_mode_show(struct seq_file s, void unused)
	120	{
	121	struct musb *musb = s->private;
	122	unsigned test;
	123
7b6c1b4c	124	pm_runtime_get_sync(musb->controller);
7f7f9e2a	125	test = musb_readb(musb->mregs, MUSB_TESTMODE);
7b6c1b4c BL	126	pm_runtime_mark_last_busy(musb->controller);
7b6c1b4c BL	127	pm_runtime_put_autosuspend(musb->controller);
7f7f9e2a	128
7eebe4ec PR	129	if (test == (MUSB_TEST_FORCE_HOST \| MUSB_TEST_FORCE_FS))
	130	seq_printf(s, "force host full-speed\n");
	131
	132	else if (test == (MUSB_TEST_FORCE_HOST \| MUSB_TEST_FORCE_HS))
	133	seq_printf(s, "force host high-speed\n");
	134
	135	else if (test == MUSB_TEST_FORCE_HOST)
7f7f9e2a FB	136	seq_printf(s, "force host\n");
7f7f9e2a FB	137
7eebe4ec	138	else if (test == MUSB_TEST_FIFO_ACCESS)
7f7f9e2a FB	139	seq_printf(s, "fifo access\n");
7f7f9e2a FB	140
7eebe4ec	141	else if (test == MUSB_TEST_FORCE_FS)
7f7f9e2a FB	142	seq_printf(s, "force full-speed\n");
7f7f9e2a FB	143
7eebe4ec	144	else if (test == MUSB_TEST_FORCE_HS)
7f7f9e2a FB	145	seq_printf(s, "force high-speed\n");
7f7f9e2a FB	146
7eebe4ec	147	else if (test == MUSB_TEST_PACKET)
7f7f9e2a FB	148	seq_printf(s, "test packet\n");
7f7f9e2a FB	149
7eebe4ec	150	else if (test == MUSB_TEST_K)
7f7f9e2a FB	151	seq_printf(s, "test K\n");
7f7f9e2a FB	152
7eebe4ec	153	else if (test == MUSB_TEST_J)
7f7f9e2a FB	154	seq_printf(s, "test J\n");
7f7f9e2a FB	155
7eebe4ec	156	else if (test == MUSB_TEST_SE0_NAK)
7f7f9e2a FB	157	seq_printf(s, "test SE0 NAK\n");
	158
	159	return 0;
	160	}
	161
	162	static const struct file_operations musb_regdump_fops = {
	163	.open = musb_regdump_open,
	164	.read = seq_read,
	165	.llseek = seq_lseek,
	166	.release = single_release,
	167	};
	168
	169	static int musb_test_mode_open(struct inode inode, struct file file)
	170	{
7f7f9e2a FB	171	return single_open(file, musb_test_mode_show, inode->i_private);
	172	}
	173
	174	static ssize_t musb_test_mode_write(struct file *file,
	175	const char __user ubuf, size_t count, loff_t ppos)
	176	{
024cfa59 MN	177	struct seq_file *s = file->private_data;
024cfa59 MN	178	struct musb *musb = s->private;
205845ef	179	u8 test;
7eebe4ec	180	char buf[24];
7f7f9e2a	181
7b6c1b4c	182	pm_runtime_get_sync(musb->controller);
205845ef BL	183	test = musb_readb(musb->mregs, MUSB_TESTMODE);
	184	if (test) {
	185	dev_err(musb->controller, "Error: test mode is already set. "
	186	"Please do USB Bus Reset to start a new test.\n");
7b6c1b4c	187	goto ret;
205845ef BL	188	}
205845ef BL	189
7f7f9e2a FB	190	memset(buf, 0x00, sizeof(buf));
7f7f9e2a FB	191
fe198e34	192	if (copy_from_user(buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
7f7f9e2a FB	193	return -EFAULT;
7f7f9e2a FB	194
7eebe4ec PR	195	if (strstarts(buf, "force host full-speed"))
	196	test = MUSB_TEST_FORCE_HOST \| MUSB_TEST_FORCE_FS;
	197
	198	else if (strstarts(buf, "force host high-speed"))
	199	test = MUSB_TEST_FORCE_HOST \| MUSB_TEST_FORCE_HS;
	200
	201	else if (strstarts(buf, "force host"))
7f7f9e2a FB	202	test = MUSB_TEST_FORCE_HOST;
7f7f9e2a FB	203
7eebe4ec	204	else if (strstarts(buf, "fifo access"))
7f7f9e2a FB	205	test = MUSB_TEST_FIFO_ACCESS;
7f7f9e2a FB	206
7eebe4ec	207	else if (strstarts(buf, "force full-speed"))
7f7f9e2a FB	208	test = MUSB_TEST_FORCE_FS;
7f7f9e2a FB	209
7eebe4ec	210	else if (strstarts(buf, "force high-speed"))
7f7f9e2a FB	211	test = MUSB_TEST_FORCE_HS;
7f7f9e2a FB	212
7eebe4ec	213	else if (strstarts(buf, "test packet")) {
7f7f9e2a FB	214	test = MUSB_TEST_PACKET;
	215	musb_load_testpacket(musb);
	216	}
	217
7eebe4ec	218	else if (strstarts(buf, "test K"))
7f7f9e2a FB	219	test = MUSB_TEST_K;
7f7f9e2a FB	220
7eebe4ec	221	else if (strstarts(buf, "test J"))
7f7f9e2a FB	222	test = MUSB_TEST_J;
7f7f9e2a FB	223
7eebe4ec	224	else if (strstarts(buf, "test SE0 NAK"))
7f7f9e2a FB	225	test = MUSB_TEST_SE0_NAK;
	226
	227	musb_writeb(musb->mregs, MUSB_TESTMODE, test);
	228
7b6c1b4c BL	229	ret:
	230	pm_runtime_mark_last_busy(musb->controller);
	231	pm_runtime_put_autosuspend(musb->controller);
7f7f9e2a FB	232	return count;
	233	}
	234
	235	static const struct file_operations musb_test_mode_fops = {
	236	.open = musb_test_mode_open,
	237	.write = musb_test_mode_write,
	238	.read = seq_read,
	239	.llseek = seq_lseek,
	240	.release = single_release,
	241	};
	242
ffc1d299 BL	243	static int musb_softconnect_show(struct seq_file s, void unused)
	244	{
	245	struct musb *musb = s->private;
	246	u8 reg;
	247	int connect;
	248
	249	switch (musb->xceiv->otg->state) {
	250	case OTG_STATE_A_HOST:
	251	case OTG_STATE_A_WAIT_BCON:
7b6c1b4c BL	252	pm_runtime_get_sync(musb->controller);
7b6c1b4c BL	253
ffc1d299 BL	254	reg = musb_readb(musb->mregs, MUSB_DEVCTL);
ffc1d299 BL	255	connect = reg & MUSB_DEVCTL_SESSION ? 1 : 0;
7b6c1b4c BL	256
	257	pm_runtime_mark_last_busy(musb->controller);
	258	pm_runtime_put_autosuspend(musb->controller);
ffc1d299 BL	259	break;
	260	default:
	261	connect = -1;
	262	}
	263
	264	seq_printf(s, "%d\n", connect);
	265
	266	return 0;
	267	}
	268
	269	static int musb_softconnect_open(struct inode inode, struct file file)
	270	{
	271	return single_open(file, musb_softconnect_show, inode->i_private);
	272	}
	273
	274	static ssize_t musb_softconnect_write(struct file *file,
	275	const char __user ubuf, size_t count, loff_t ppos)
	276	{
	277	struct seq_file *s = file->private_data;
	278	struct musb *musb = s->private;
	279	char buf[2];
	280	u8 reg;
	281
	282	memset(buf, 0x00, sizeof(buf));
	283
	284	if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
	285	return -EFAULT;
	286
7b6c1b4c	287	pm_runtime_get_sync(musb->controller);
ffc1d299 BL	288	if (!strncmp(buf, "0", 1)) {
	289	switch (musb->xceiv->otg->state) {
	290	case OTG_STATE_A_HOST:
	291	musb_root_disconnect(musb);
	292	reg = musb_readb(musb->mregs, MUSB_DEVCTL);
	293	reg &= ~MUSB_DEVCTL_SESSION;
	294	musb_writeb(musb->mregs, MUSB_DEVCTL, reg);
	295	break;
	296	default:
	297	break;
	298	}
	299	} else if (!strncmp(buf, "1", 1)) {
	300	switch (musb->xceiv->otg->state) {
	301	case OTG_STATE_A_WAIT_BCON:
	302	/*
	303	* musb_save_context() called in musb_runtime_suspend()
	304	* might cache devctl with SESSION bit cleared during
	305	* soft-disconnect, so specifically set SESSION bit
	306	* here to preserve it for musb_runtime_resume().
	307	*/
	308	musb->context.devctl \|= MUSB_DEVCTL_SESSION;
	309	reg = musb_readb(musb->mregs, MUSB_DEVCTL);
	310	reg \|= MUSB_DEVCTL_SESSION;
	311	musb_writeb(musb->mregs, MUSB_DEVCTL, reg);
	312	break;
	313	default:
	314	break;
	315	}
	316	}
	317
7b6c1b4c BL	318	pm_runtime_mark_last_busy(musb->controller);
7b6c1b4c BL	319	pm_runtime_put_autosuspend(musb->controller);
ffc1d299 BL	320	return count;
	321	}
	322
	323	/*
	324	* In host mode, connect/disconnect the bus without physically
	325	* remove the devices.
	326	*/
	327	static const struct file_operations musb_softconnect_fops = {
	328	.open = musb_softconnect_open,
	329	.write = musb_softconnect_write,
	330	.read = seq_read,
	331	.llseek = seq_lseek,
	332	.release = single_release,
	333	};
	334
41ac7b3a	335	int musb_init_debugfs(struct musb *musb)
7f7f9e2a FB	336	{
	337	struct dentry *root;
	338	struct dentry *file;
	339	int ret;
	340
8d2421e6	341	root = debugfs_create_dir(dev_name(musb->controller), NULL);
6c2abcdd FB	342	if (!root) {
6c2abcdd FB	343	ret = -ENOMEM;
7f7f9e2a FB	344	goto err0;
	345	}
	346
	347	file = debugfs_create_file("regdump", S_IRUGO, root, musb,
	348	&musb_regdump_fops);
6c2abcdd FB	349	if (!file) {
6c2abcdd FB	350	ret = -ENOMEM;
7f7f9e2a FB	351	goto err1;
	352	}
	353
	354	file = debugfs_create_file("testmode", S_IRUGO \| S_IWUSR,
	355	root, musb, &musb_test_mode_fops);
6c2abcdd FB	356	if (!file) {
6c2abcdd FB	357	ret = -ENOMEM;
7f7f9e2a FB	358	goto err1;
	359	}
	360
ffc1d299 BL	361	file = debugfs_create_file("softconnect", S_IRUGO \| S_IWUSR,
	362	root, musb, &musb_softconnect_fops);
	363	if (!file) {
	364	ret = -ENOMEM;
	365	goto err1;
	366	}
	367
8d2421e6	368	musb->debugfs_root = root;
7f7f9e2a FB	369
	370	return 0;
	371
	372	err1:
	373	debugfs_remove_recursive(root);
	374
	375	err0:
	376	return ret;
	377	}
	378
b0f9da7e	379	void /* __init_or_exit / musb_exit_debugfs(struct musb musb)
7f7f9e2a	380	{
8d2421e6	381	debugfs_remove_recursive(musb->debugfs_root);
7f7f9e2a	382	}