[mirror_ubuntu-hirsute-kernel.git] / drivers / usb / musb / musb_dma.h

// SPDX-License-Identifier: GPL-2.0
/*
 * MUSB OTG driver DMA controller abstraction
 *
 * Copyright 2005 Mentor Graphics Corporation
 * Copyright (C) 2005-2006 by Texas Instruments
 * Copyright (C) 2006-2007 Nokia Corporation
 */

#ifndef __MUSB_DMA_H__
#define __MUSB_DMA_H__

struct musb_hw_ep;

/*
 * DMA Controller Abstraction
 *
 * DMA Controllers are abstracted to allow use of a variety of different
 * implementations of DMA, as allowed by the Inventra USB cores.  On the
 * host side, usbcore sets up the DMA mappings and flushes caches; on the
 * peripheral side, the gadget controller driver does.  Responsibilities
 * of a DMA controller driver include:
 *
 *  - Handling the details of moving multiple USB packets
 *    in cooperation with the Inventra USB core, including especially
 *    the correct RX side treatment of short packets and buffer-full
 *    states (both of which terminate transfers).
 *
 *  - Knowing the correlation between dma channels and the
 *    Inventra core's local endpoint resources and data direction.
 *
 *  - Maintaining a list of allocated/available channels.
 *
 *  - Updating channel status on interrupts,
 *    whether shared with the Inventra core or separate.
 */

#define	DMA_ADDR_INVALID	(~(dma_addr_t)0)

#ifdef CONFIG_MUSB_PIO_ONLY
#define	is_dma_capable()	(0)
#else
#define	is_dma_capable()	(1)
#endif

#ifdef CONFIG_USB_UX500_DMA
#define musb_dma_ux500(musb)		(musb->ops->quirks & MUSB_DMA_UX500)
#else
#define musb_dma_ux500(musb)		0
#endif

#ifdef CONFIG_USB_TI_CPPI41_DMA
#define musb_dma_cppi41(musb)		(musb->ops->quirks & MUSB_DMA_CPPI41)
#else
#define musb_dma_cppi41(musb)		0
#endif

#ifdef CONFIG_USB_TI_CPPI_DMA
#define musb_dma_cppi(musb)		(musb->ops->quirks & MUSB_DMA_CPPI)
#else
#define musb_dma_cppi(musb)		0
#endif

#ifdef CONFIG_USB_TUSB_OMAP_DMA
#define tusb_dma_omap(musb)		(musb->ops->quirks & MUSB_DMA_TUSB_OMAP)
#else
#define tusb_dma_omap(musb)		0
#endif

#ifdef CONFIG_USB_INVENTRA_DMA
#define musb_dma_inventra(musb)		(musb->ops->quirks & MUSB_DMA_INVENTRA)
#else
#define musb_dma_inventra(musb)		0
#endif

#if defined(CONFIG_USB_TI_CPPI_DMA) || defined(CONFIG_USB_TI_CPPI41_DMA)
#define	is_cppi_enabled(musb)		\
	(musb_dma_cppi(musb) || musb_dma_cppi41(musb))
#else
#define	is_cppi_enabled(musb)	0
#endif

/*
 * DMA channel status ... updated by the dma controller driver whenever that
 * status changes, and protected by the overall controller spinlock.
 */
enum dma_channel_status {
	/* unallocated */
	MUSB_DMA_STATUS_UNKNOWN,
	/* allocated ... but not busy, no errors */
	MUSB_DMA_STATUS_FREE,
	/* busy ... transactions are active */
	MUSB_DMA_STATUS_BUSY,
	/* transaction(s) aborted due to ... dma or memory bus error */
	MUSB_DMA_STATUS_BUS_ABORT,
	/* transaction(s) aborted due to ... core error or USB fault */
	MUSB_DMA_STATUS_CORE_ABORT
};

struct dma_controller;

/**
 * struct dma_channel - A DMA channel.
 * @private_data: channel-private data
 * @max_len: the maximum number of bytes the channel can move in one
 *	transaction (typically representing many USB maximum-sized packets)
 * @actual_len: how many bytes have been transferred
 * @status: current channel status (updated e.g. on interrupt)
 * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
 *
 * channels are associated with an endpoint for the duration of at least
 * one usb transfer.
 */
struct dma_channel {
	void			*private_data;
	/* FIXME not void* private_data, but a dma_controller * */
	size_t			max_len;
	size_t			actual_len;
	enum dma_channel_status	status;
	bool			desired_mode;
	bool			rx_packet_done;
};

/*
 * dma_channel_status - return status of dma channel
 * @c: the channel
 *
 * Returns the software's view of the channel status.  If that status is BUSY
 * then it's possible that the hardware has completed (or aborted) a transfer,
 * so the driver needs to update that status.
 */
static inline enum dma_channel_status
dma_channel_status(struct dma_channel *c)
{
	return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
}

/**
 * struct dma_controller - A DMA Controller.
 * @musb: the usb controller
 * @start: call this to start a DMA controller;
 *	return 0 on success, else negative errno
 * @stop: call this to stop a DMA controller
 *	return 0 on success, else negative errno
 * @channel_alloc: call this to allocate a DMA channel
 * @channel_release: call this to release a DMA channel
 * @channel_abort: call this to abort a pending DMA transaction,
 *	returning it to FREE (but allocated) state
 * @dma_callback: invoked on DMA completion, useful to run platform
 *	code such IRQ acknowledgment.
 *
 * Controllers manage dma channels.
 */
struct dma_controller {
	struct musb *musb;
	struct dma_channel	*(*channel_alloc)(struct dma_controller *,
					struct musb_hw_ep *, u8 is_tx);
	void			(*channel_release)(struct dma_channel *);
	int			(*channel_program)(struct dma_channel *channel,
							u16 maxpacket, u8 mode,
							dma_addr_t dma_addr,
							u32 length);
	int			(*channel_abort)(struct dma_channel *);
	int			(*is_compatible)(struct dma_channel *channel,
							u16 maxpacket,
							void *buf, u32 length);
	void			(*dma_callback)(struct dma_controller *);
};

/* called after channel_program(), may indicate a fault */
extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);

#ifdef CONFIG_MUSB_PIO_ONLY
static inline struct dma_controller *
musb_dma_controller_create(struct musb *m, void __iomem *io)
{
	return NULL;
}

static inline void musb_dma_controller_destroy(struct dma_controller *d) { }

#else

extern struct dma_controller *
(*musb_dma_controller_create)(struct musb *, void __iomem *);

extern void (*musb_dma_controller_destroy)(struct dma_controller *);
#endif

/* Platform specific DMA functions */
extern struct dma_controller *
musbhs_dma_controller_create(struct musb *musb, void __iomem *base);
extern void musbhs_dma_controller_destroy(struct dma_controller *c);

extern struct dma_controller *
tusb_dma_controller_create(struct musb *musb, void __iomem *base);
extern void tusb_dma_controller_destroy(struct dma_controller *c);

extern struct dma_controller *
cppi_dma_controller_create(struct musb *musb, void __iomem *base);
extern void cppi_dma_controller_destroy(struct dma_controller *c);

extern struct dma_controller *
cppi41_dma_controller_create(struct musb *musb, void __iomem *base);
extern void cppi41_dma_controller_destroy(struct dma_controller *c);

extern struct dma_controller *
ux500_dma_controller_create(struct musb *musb, void __iomem *base);
extern void ux500_dma_controller_destroy(struct dma_controller *c);

#endif	/* __MUSB_DMA_H__ */
Commit	Line	Data
5fd54ace	1	// SPDX-License-Identifier: GPL-2.0
550a7375 FB	2	/*
	3	* MUSB OTG driver DMA controller abstraction
	4	*
	5	* Copyright 2005 Mentor Graphics Corporation
	6	* Copyright (C) 2005-2006 by Texas Instruments
	7	* Copyright (C) 2006-2007 Nokia Corporation
550a7375 FB	8	*/
	9
	10	#ifndef __MUSB_DMA_H__
	11	#define __MUSB_DMA_H__
	12
	13	struct musb_hw_ep;
	14
	15	/*
	16	* DMA Controller Abstraction
	17	*
	18	* DMA Controllers are abstracted to allow use of a variety of different
	19	* implementations of DMA, as allowed by the Inventra USB cores. On the
	20	* host side, usbcore sets up the DMA mappings and flushes caches; on the
	21	* peripheral side, the gadget controller driver does. Responsibilities
	22	* of a DMA controller driver include:
	23	*
	24	* - Handling the details of moving multiple USB packets
	25	* in cooperation with the Inventra USB core, including especially
	26	* the correct RX side treatment of short packets and buffer-full
	27	* states (both of which terminate transfers).
	28	*
	29	* - Knowing the correlation between dma channels and the
	30	* Inventra core's local endpoint resources and data direction.
	31	*
	32	* - Maintaining a list of allocated/available channels.
	33	*
	34	* - Updating channel status on interrupts,
	35	* whether shared with the Inventra core or separate.
	36	*/
	37
	38	#define DMA_ADDR_INVALID (~(dma_addr_t)0)
	39
260eba39	40	#ifdef CONFIG_MUSB_PIO_ONLY
550a7375	41	#define is_dma_capable() (0)
260eba39 SAS	42	#else
260eba39 SAS	43	#define is_dma_capable() (1)
550a7375 FB	44	#endif
550a7375 FB	45
f8e9f34f	46	#ifdef CONFIG_USB_UX500_DMA
dc8fca6c	47	#define musb_dma_ux500(musb) (musb->ops->quirks & MUSB_DMA_UX500)
f8e9f34f TL	48	#else
	49	#define musb_dma_ux500(musb) 0
	50	#endif
	51
	52	#ifdef CONFIG_USB_TI_CPPI41_DMA
dc8fca6c	53	#define musb_dma_cppi41(musb) (musb->ops->quirks & MUSB_DMA_CPPI41)
f8e9f34f TL	54	#else
	55	#define musb_dma_cppi41(musb) 0
	56	#endif
	57
	58	#ifdef CONFIG_USB_TI_CPPI_DMA
dc8fca6c	59	#define musb_dma_cppi(musb) (musb->ops->quirks & MUSB_DMA_CPPI)
550a7375	60	#else
f8e9f34f	61	#define musb_dma_cppi(musb) 0
550a7375 FB	62	#endif
	63
	64	#ifdef CONFIG_USB_TUSB_OMAP_DMA
dc8fca6c	65	#define tusb_dma_omap(musb) (musb->ops->quirks & MUSB_DMA_TUSB_OMAP)
f8e9f34f TL	66	#else
	67	#define tusb_dma_omap(musb) 0
	68	#endif
	69
	70	#ifdef CONFIG_USB_INVENTRA_DMA
dc8fca6c	71	#define musb_dma_inventra(musb) (musb->ops->quirks & MUSB_DMA_INVENTRA)
f8e9f34f TL	72	#else
	73	#define musb_dma_inventra(musb) 0
	74	#endif
	75
	76	#if defined(CONFIG_USB_TI_CPPI_DMA) \|\| defined(CONFIG_USB_TI_CPPI41_DMA)
	77	#define is_cppi_enabled(musb) \
	78	(musb_dma_cppi(musb) \|\| musb_dma_cppi41(musb))
550a7375	79	#else
f8e9f34f	80	#define is_cppi_enabled(musb) 0
550a7375 FB	81	#endif
	82
	83	/*
	84	* DMA channel status ... updated by the dma controller driver whenever that
	85	* status changes, and protected by the overall controller spinlock.
	86	*/
	87	enum dma_channel_status {
	88	/* unallocated */
	89	MUSB_DMA_STATUS_UNKNOWN,
	90	/* allocated ... but not busy, no errors */
	91	MUSB_DMA_STATUS_FREE,
	92	/* busy ... transactions are active */
	93	MUSB_DMA_STATUS_BUSY,
	94	/* transaction(s) aborted due to ... dma or memory bus error */
	95	MUSB_DMA_STATUS_BUS_ABORT,
	96	/* transaction(s) aborted due to ... core error or USB fault */
	97	MUSB_DMA_STATUS_CORE_ABORT
	98	};
	99
	100	struct dma_controller;
	101
	102	/**
	103	* struct dma_channel - A DMA channel.
	104	* @private_data: channel-private data
	105	* @max_len: the maximum number of bytes the channel can move in one
	106	* transaction (typically representing many USB maximum-sized packets)
	107	* @actual_len: how many bytes have been transferred
	108	* @status: current channel status (updated e.g. on interrupt)
	109	* @desired_mode: true if mode 1 is desired; false if mode 0 is desired
	110	*
	111	* channels are associated with an endpoint for the duration of at least
	112	* one usb transfer.
	113	*/
	114	struct dma_channel {
	115	void *private_data;
	116	/* FIXME not void* private_data, but a dma_controller * */
	117	size_t max_len;
	118	size_t actual_len;
	119	enum dma_channel_status status;
	120	bool desired_mode;
ff3fcac9	121	bool rx_packet_done;
550a7375 FB	122	};
	123
	124	/*
	125	* dma_channel_status - return status of dma channel
	126	* @c: the channel
	127	*
	128	* Returns the software's view of the channel status. If that status is BUSY
	129	* then it's possible that the hardware has completed (or aborted) a transfer,
	130	* so the driver needs to update that status.
	131	*/
	132	static inline enum dma_channel_status
	133	dma_channel_status(struct dma_channel *c)
	134	{
	135	return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
	136	}
	137
	138	/**
	139	* struct dma_controller - A DMA Controller.
050dc900	140	* @musb: the usb controller
550a7375 FB	141	* @start: call this to start a DMA controller;
	142	* return 0 on success, else negative errno
	143	* @stop: call this to stop a DMA controller
	144	* return 0 on success, else negative errno
	145	* @channel_alloc: call this to allocate a DMA channel
	146	* @channel_release: call this to release a DMA channel
	147	* @channel_abort: call this to abort a pending DMA transaction,
	148	* returning it to FREE (but allocated) state
050dc900 AB	149	* @dma_callback: invoked on DMA completion, useful to run platform
050dc900 AB	150	* code such IRQ acknowledgment.
550a7375 FB	151	*
	152	* Controllers manage dma channels.
	153	*/
	154	struct dma_controller {
050dc900	155	struct musb *musb;
550a7375 FB	156	struct dma_channel (channel_alloc)(struct dma_controller *,
	157	struct musb_hw_ep *, u8 is_tx);
	158	void (channel_release)(struct dma_channel );
	159	int (channel_program)(struct dma_channel channel,
	160	u16 maxpacket, u8 mode,
	161	dma_addr_t dma_addr,
	162	u32 length);
	163	int (channel_abort)(struct dma_channel );
5f5761cb MYK	164	int (is_compatible)(struct dma_channel channel,
	165	u16 maxpacket,
	166	void *buf, u32 length);
050dc900	167	void (dma_callback)(struct dma_controller );
550a7375 FB	168	};
	169
	170	/* called after channel_program(), may indicate a fault */
	171	extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
	172
a6a20885	173	#ifdef CONFIG_MUSB_PIO_ONLY
7f6283ed TL	174	static inline struct dma_controller *
7f6283ed TL	175	musb_dma_controller_create(struct musb m, void __iomem io)
a6a20885 SAS	176	{
	177	return NULL;
	178	}
	179
7f6283ed	180	static inline void musb_dma_controller_destroy(struct dma_controller *d) { }
a6a20885 SAS	181
a6a20885 SAS	182	#else
550a7375	183
7f6283ed TL	184	extern struct dma_controller *
7f6283ed TL	185	(musb_dma_controller_create)(struct musb , void __iomem *);
550a7375	186
7f6283ed	187	extern void (musb_dma_controller_destroy)(struct dma_controller );
a6a20885	188	#endif
550a7375	189
7f6283ed TL	190	/* Platform specific DMA functions */
	191	extern struct dma_controller *
	192	musbhs_dma_controller_create(struct musb musb, void __iomem base);
	193	extern void musbhs_dma_controller_destroy(struct dma_controller *c);
	194
	195	extern struct dma_controller *
	196	tusb_dma_controller_create(struct musb musb, void __iomem base);
	197	extern void tusb_dma_controller_destroy(struct dma_controller *c);
	198
	199	extern struct dma_controller *
	200	cppi_dma_controller_create(struct musb musb, void __iomem base);
	201	extern void cppi_dma_controller_destroy(struct dma_controller *c);
	202
	203	extern struct dma_controller *
	204	cppi41_dma_controller_create(struct musb musb, void __iomem base);
	205	extern void cppi41_dma_controller_destroy(struct dma_controller *c);
	206
	207	extern struct dma_controller *
	208	ux500_dma_controller_create(struct musb musb, void __iomem base);
	209	extern void ux500_dma_controller_destroy(struct dma_controller *c);
	210
550a7375	211	#endif /* __MUSB_DMA_H__ */