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9ecb8875 AKG |
1 | /* |
2 | * Texas Instruments DSPS platforms "glue layer" | |
3 | * | |
4 | * Copyright (C) 2012, by Texas Instruments | |
5 | * | |
6 | * Based on the am35x "glue layer" code. | |
7 | * | |
8 | * This file is part of the Inventra Controller Driver for Linux. | |
9 | * | |
10 | * The Inventra Controller Driver for Linux is free software; you | |
11 | * can redistribute it and/or modify it under the terms of the GNU | |
12 | * General Public License version 2 as published by the Free Software | |
13 | * Foundation. | |
14 | * | |
15 | * The Inventra Controller Driver for Linux is distributed in | |
16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; | |
17 | * without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
19 | * License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with The Inventra Controller Driver for Linux ; if not, | |
23 | * write to the Free Software Foundation, Inc., 59 Temple Place, | |
24 | * Suite 330, Boston, MA 02111-1307 USA | |
25 | * | |
26 | * musb_dsps.c will be a common file for all the TI DSPS platforms | |
27 | * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. | |
28 | * For now only ti81x is using this and in future davinci.c, am35x.c | |
29 | * da8xx.c would be merged to this file after testing. | |
30 | */ | |
31 | ||
9ecb8875 | 32 | #include <linux/io.h> |
ded017ee | 33 | #include <linux/err.h> |
9ecb8875 AKG |
34 | #include <linux/platform_device.h> |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/pm_runtime.h> | |
37 | #include <linux/module.h> | |
d7078df6 | 38 | #include <linux/usb/usb_phy_generic.h> |
e8c4a7ac | 39 | #include <linux/platform_data/usb-omap.h> |
0f53e481 | 40 | #include <linux/sizes.h> |
9ecb8875 AKG |
41 | |
42 | #include <linux/of.h> | |
43 | #include <linux/of_device.h> | |
44 | #include <linux/of_address.h> | |
97238b35 | 45 | #include <linux/of_irq.h> |
c031a7d4 | 46 | #include <linux/usb/of.h> |
9ecb8875 | 47 | |
40f099e3 MP |
48 | #include <linux/debugfs.h> |
49 | ||
9ecb8875 AKG |
50 | #include "musb_core.h" |
51 | ||
65145677 | 52 | static const struct of_device_id musb_dsps_of_match[]; |
65145677 | 53 | |
9ecb8875 AKG |
54 | /** |
55 | * DSPS musb wrapper register offset. | |
56 | * FIXME: This should be expanded to have all the wrapper registers from TI DSPS | |
57 | * musb ips. | |
58 | */ | |
59 | struct dsps_musb_wrapper { | |
60 | u16 revision; | |
61 | u16 control; | |
62 | u16 status; | |
9ecb8875 AKG |
63 | u16 epintr_set; |
64 | u16 epintr_clear; | |
65 | u16 epintr_status; | |
66 | u16 coreintr_set; | |
67 | u16 coreintr_clear; | |
68 | u16 coreintr_status; | |
69 | u16 phy_utmi; | |
70 | u16 mode; | |
b991f9b7 DM |
71 | u16 tx_mode; |
72 | u16 rx_mode; | |
9ecb8875 AKG |
73 | |
74 | /* bit positions for control */ | |
75 | unsigned reset:5; | |
76 | ||
77 | /* bit positions for interrupt */ | |
78 | unsigned usb_shift:5; | |
79 | u32 usb_mask; | |
80 | u32 usb_bitmap; | |
81 | unsigned drvvbus:5; | |
82 | ||
83 | unsigned txep_shift:5; | |
84 | u32 txep_mask; | |
85 | u32 txep_bitmap; | |
86 | ||
87 | unsigned rxep_shift:5; | |
88 | u32 rxep_mask; | |
89 | u32 rxep_bitmap; | |
90 | ||
91 | /* bit positions for phy_utmi */ | |
92 | unsigned otg_disable:5; | |
93 | ||
94 | /* bit positions for mode */ | |
95 | unsigned iddig:5; | |
943c1397 | 96 | unsigned iddig_mux:5; |
9ecb8875 | 97 | /* miscellaneous stuff */ |
9e204d88 | 98 | unsigned poll_timeout; |
9ecb8875 AKG |
99 | }; |
100 | ||
869c5978 DM |
101 | /* |
102 | * register shadow for suspend | |
103 | */ | |
104 | struct dsps_context { | |
105 | u32 control; | |
106 | u32 epintr; | |
107 | u32 coreintr; | |
108 | u32 phy_utmi; | |
109 | u32 mode; | |
110 | u32 tx_mode; | |
111 | u32 rx_mode; | |
112 | }; | |
113 | ||
9ecb8875 AKG |
114 | /** |
115 | * DSPS glue structure. | |
116 | */ | |
117 | struct dsps_glue { | |
118 | struct device *dev; | |
97238b35 | 119 | struct platform_device *musb; /* child musb pdev */ |
9ecb8875 | 120 | const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ |
369469a9 | 121 | int vbus_irq; /* optional vbus irq */ |
97238b35 SAS |
122 | struct timer_list timer; /* otg_workaround timer */ |
123 | unsigned long last_timer; /* last timer data for each instance */ | |
371254ce | 124 | bool sw_babble_enabled; |
25534828 | 125 | void __iomem *usbss_base; |
869c5978 DM |
126 | |
127 | struct dsps_context context; | |
40f099e3 MP |
128 | struct debugfs_regset32 regset; |
129 | struct dentry *dbgfs_root; | |
130 | }; | |
131 | ||
132 | static const struct debugfs_reg32 dsps_musb_regs[] = { | |
133 | { "revision", 0x00 }, | |
134 | { "control", 0x14 }, | |
135 | { "status", 0x18 }, | |
136 | { "eoi", 0x24 }, | |
137 | { "intr0_stat", 0x30 }, | |
138 | { "intr1_stat", 0x34 }, | |
139 | { "intr0_set", 0x38 }, | |
140 | { "intr1_set", 0x3c }, | |
141 | { "txmode", 0x70 }, | |
142 | { "rxmode", 0x74 }, | |
143 | { "autoreq", 0xd0 }, | |
144 | { "srpfixtime", 0xd4 }, | |
145 | { "tdown", 0xd8 }, | |
146 | { "phy_utmi", 0xe0 }, | |
147 | { "mode", 0xe8 }, | |
9ecb8875 AKG |
148 | }; |
149 | ||
369469a9 TL |
150 | static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms) |
151 | { | |
152 | int wait; | |
153 | ||
154 | if (wait_ms < 0) | |
155 | wait = msecs_to_jiffies(glue->wrp->poll_timeout); | |
156 | else | |
157 | wait = msecs_to_jiffies(wait_ms); | |
158 | ||
159 | mod_timer(&glue->timer, jiffies + wait); | |
160 | } | |
161 | ||
162 | /* | |
163 | * If no vbus irq from the PMIC is configured, we need to poll VBUS status. | |
164 | */ | |
165 | static void dsps_mod_timer_optional(struct dsps_glue *glue) | |
166 | { | |
167 | if (glue->vbus_irq) | |
168 | return; | |
169 | ||
170 | dsps_mod_timer(glue, -1); | |
171 | } | |
172 | ||
25534828 AB |
173 | /* USBSS / USB AM335x */ |
174 | #define USBSS_IRQ_STATUS 0x28 | |
175 | #define USBSS_IRQ_ENABLER 0x2c | |
176 | #define USBSS_IRQ_CLEARR 0x30 | |
177 | ||
178 | #define USBSS_IRQ_PD_COMP (1 << 2) | |
179 | ||
9ecb8875 AKG |
180 | /** |
181 | * dsps_musb_enable - enable interrupts | |
182 | */ | |
183 | static void dsps_musb_enable(struct musb *musb) | |
184 | { | |
185 | struct device *dev = musb->controller; | |
186 | struct platform_device *pdev = to_platform_device(dev->parent); | |
187 | struct dsps_glue *glue = platform_get_drvdata(pdev); | |
188 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
189 | void __iomem *reg_base = musb->ctrl_base; | |
190 | u32 epmask, coremask; | |
191 | ||
192 | /* Workaround: setup IRQs through both register sets. */ | |
193 | epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | | |
194 | ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); | |
195 | coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); | |
196 | ||
086b2882 BL |
197 | musb_writel(reg_base, wrp->epintr_set, epmask); |
198 | musb_writel(reg_base, wrp->coreintr_set, coremask); | |
b8239dcc BL |
199 | /* start polling for ID change in dual-role idle mode */ |
200 | if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && | |
201 | musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) | |
369469a9 | 202 | dsps_mod_timer(glue, -1); |
9ecb8875 AKG |
203 | } |
204 | ||
205 | /** | |
206 | * dsps_musb_disable - disable HDRC and flush interrupts | |
207 | */ | |
208 | static void dsps_musb_disable(struct musb *musb) | |
209 | { | |
210 | struct device *dev = musb->controller; | |
211 | struct platform_device *pdev = to_platform_device(dev->parent); | |
212 | struct dsps_glue *glue = platform_get_drvdata(pdev); | |
213 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
214 | void __iomem *reg_base = musb->ctrl_base; | |
215 | ||
086b2882 BL |
216 | musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); |
217 | musb_writel(reg_base, wrp->epintr_clear, | |
9ecb8875 | 218 | wrp->txep_bitmap | wrp->rxep_bitmap); |
ea2f35c0 | 219 | del_timer_sync(&glue->timer); |
9ecb8875 AKG |
220 | } |
221 | ||
ea2f35c0 TL |
222 | /* Caller must take musb->lock */ |
223 | static int dsps_check_status(struct musb *musb, void *unused) | |
9ecb8875 | 224 | { |
9ecb8875 AKG |
225 | void __iomem *mregs = musb->mregs; |
226 | struct device *dev = musb->controller; | |
db4a9320 | 227 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
9ecb8875 AKG |
228 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
229 | u8 devctl; | |
0f901c98 | 230 | int skip_session = 0; |
9ecb8875 | 231 | |
369469a9 TL |
232 | if (glue->vbus_irq) |
233 | del_timer(&glue->timer); | |
234 | ||
9ecb8875 AKG |
235 | /* |
236 | * We poll because DSPS IP's won't expose several OTG-critical | |
237 | * status change events (from the transceiver) otherwise. | |
238 | */ | |
086b2882 | 239 | devctl = musb_readb(mregs, MUSB_DEVCTL); |
9ecb8875 | 240 | dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, |
e47d9254 | 241 | usb_otg_state_string(musb->xceiv->otg->state)); |
9ecb8875 | 242 | |
e47d9254 | 243 | switch (musb->xceiv->otg->state) { |
2f3fd2c5 | 244 | case OTG_STATE_A_WAIT_VRISE: |
369469a9 | 245 | dsps_mod_timer_optional(glue); |
2f3fd2c5 | 246 | break; |
9ecb8875 | 247 | case OTG_STATE_A_WAIT_BCON: |
b3addcf0 BL |
248 | /* keep VBUS on for host-only mode */ |
249 | if (musb->port_mode == MUSB_PORT_MODE_HOST) { | |
250 | dsps_mod_timer_optional(glue); | |
251 | break; | |
252 | } | |
086b2882 | 253 | musb_writeb(musb->mregs, MUSB_DEVCTL, 0); |
0f901c98 SAS |
254 | skip_session = 1; |
255 | /* fall */ | |
9ecb8875 | 256 | |
0f901c98 SAS |
257 | case OTG_STATE_A_IDLE: |
258 | case OTG_STATE_B_IDLE: | |
369469a9 TL |
259 | if (!glue->vbus_irq) { |
260 | if (devctl & MUSB_DEVCTL_BDEVICE) { | |
261 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; | |
262 | MUSB_DEV_MODE(musb); | |
263 | } else { | |
264 | musb->xceiv->otg->state = OTG_STATE_A_IDLE; | |
265 | MUSB_HST_MODE(musb); | |
266 | } | |
267 | if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) | |
268 | musb_writeb(mregs, MUSB_DEVCTL, | |
269 | MUSB_DEVCTL_SESSION); | |
9ecb8875 | 270 | } |
369469a9 | 271 | dsps_mod_timer_optional(glue); |
9ecb8875 AKG |
272 | break; |
273 | case OTG_STATE_A_WAIT_VFALL: | |
e47d9254 | 274 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
086b2882 | 275 | musb_writel(musb->ctrl_base, wrp->coreintr_set, |
9ecb8875 AKG |
276 | MUSB_INTR_VBUSERROR << wrp->usb_shift); |
277 | break; | |
9ecb8875 AKG |
278 | default: |
279 | break; | |
280 | } | |
65b3f50e | 281 | |
ea2f35c0 TL |
282 | return 0; |
283 | } | |
284 | ||
05678497 | 285 | static void otg_timer(struct timer_list *t) |
ea2f35c0 | 286 | { |
05678497 KC |
287 | struct dsps_glue *glue = from_timer(glue, t, timer); |
288 | struct musb *musb = platform_get_drvdata(glue->musb); | |
ea2f35c0 TL |
289 | struct device *dev = musb->controller; |
290 | unsigned long flags; | |
291 | int err; | |
292 | ||
293 | err = pm_runtime_get(dev); | |
294 | if ((err != -EINPROGRESS) && err < 0) { | |
295 | dev_err(dev, "Poll could not pm_runtime_get: %i\n", err); | |
296 | pm_runtime_put_noidle(dev); | |
297 | ||
298 | return; | |
299 | } | |
300 | ||
301 | spin_lock_irqsave(&musb->lock, flags); | |
302 | err = musb_queue_resume_work(musb, dsps_check_status, NULL); | |
303 | if (err < 0) | |
304 | dev_err(dev, "%s resume work: %i\n", __func__, err); | |
305 | spin_unlock_irqrestore(&musb->lock, flags); | |
65b3f50e TL |
306 | pm_runtime_mark_last_busy(dev); |
307 | pm_runtime_put_autosuspend(dev); | |
9ecb8875 AKG |
308 | } |
309 | ||
4ab53a69 | 310 | static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum) |
c48400ba BL |
311 | { |
312 | u32 epintr; | |
313 | struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); | |
314 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
315 | ||
316 | /* musb->lock might already been held */ | |
317 | epintr = (1 << epnum) << wrp->rxep_shift; | |
318 | musb_writel(musb->ctrl_base, wrp->epintr_status, epintr); | |
319 | } | |
320 | ||
9ecb8875 AKG |
321 | static irqreturn_t dsps_interrupt(int irq, void *hci) |
322 | { | |
323 | struct musb *musb = hci; | |
324 | void __iomem *reg_base = musb->ctrl_base; | |
325 | struct device *dev = musb->controller; | |
db4a9320 | 326 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
9ecb8875 AKG |
327 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
328 | unsigned long flags; | |
329 | irqreturn_t ret = IRQ_NONE; | |
330 | u32 epintr, usbintr; | |
331 | ||
332 | spin_lock_irqsave(&musb->lock, flags); | |
333 | ||
334 | /* Get endpoint interrupts */ | |
086b2882 | 335 | epintr = musb_readl(reg_base, wrp->epintr_status); |
9ecb8875 AKG |
336 | musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; |
337 | musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; | |
338 | ||
339 | if (epintr) | |
086b2882 | 340 | musb_writel(reg_base, wrp->epintr_status, epintr); |
9ecb8875 AKG |
341 | |
342 | /* Get usb core interrupts */ | |
086b2882 | 343 | usbintr = musb_readl(reg_base, wrp->coreintr_status); |
9ecb8875 | 344 | if (!usbintr && !epintr) |
9be73bae | 345 | goto out; |
9ecb8875 AKG |
346 | |
347 | musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; | |
348 | if (usbintr) | |
086b2882 | 349 | musb_writel(reg_base, wrp->coreintr_status, usbintr); |
9ecb8875 AKG |
350 | |
351 | dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", | |
352 | usbintr, epintr); | |
1d57de30 | 353 | |
9ecb8875 | 354 | if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { |
086b2882 | 355 | int drvvbus = musb_readl(reg_base, wrp->status); |
9ecb8875 | 356 | void __iomem *mregs = musb->mregs; |
086b2882 | 357 | u8 devctl = musb_readb(mregs, MUSB_DEVCTL); |
9ecb8875 AKG |
358 | int err; |
359 | ||
032ec49f | 360 | err = musb->int_usb & MUSB_INTR_VBUSERROR; |
9ecb8875 AKG |
361 | if (err) { |
362 | /* | |
363 | * The Mentor core doesn't debounce VBUS as needed | |
364 | * to cope with device connect current spikes. This | |
365 | * means it's not uncommon for bus-powered devices | |
366 | * to get VBUS errors during enumeration. | |
367 | * | |
368 | * This is a workaround, but newer RTL from Mentor | |
369 | * seems to allow a better one: "re"-starting sessions | |
370 | * without waiting for VBUS to stop registering in | |
371 | * devctl. | |
372 | */ | |
373 | musb->int_usb &= ~MUSB_INTR_VBUSERROR; | |
e47d9254 | 374 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; |
369469a9 | 375 | dsps_mod_timer_optional(glue); |
9ecb8875 | 376 | WARNING("VBUS error workaround (delay coming)\n"); |
032ec49f | 377 | } else if (drvvbus) { |
9ecb8875 AKG |
378 | MUSB_HST_MODE(musb); |
379 | musb->xceiv->otg->default_a = 1; | |
e47d9254 | 380 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
369469a9 | 381 | dsps_mod_timer_optional(glue); |
9ecb8875 AKG |
382 | } else { |
383 | musb->is_active = 0; | |
384 | MUSB_DEV_MODE(musb); | |
385 | musb->xceiv->otg->default_a = 0; | |
e47d9254 | 386 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
9ecb8875 AKG |
387 | } |
388 | ||
389 | /* NOTE: this must complete power-on within 100 ms. */ | |
390 | dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", | |
391 | drvvbus ? "on" : "off", | |
e47d9254 | 392 | usb_otg_state_string(musb->xceiv->otg->state), |
9ecb8875 AKG |
393 | err ? " ERROR" : "", |
394 | devctl); | |
395 | ret = IRQ_HANDLED; | |
396 | } | |
397 | ||
398 | if (musb->int_tx || musb->int_rx || musb->int_usb) | |
399 | ret |= musb_interrupt(musb); | |
400 | ||
2f3fd2c5 TL |
401 | /* Poll for ID change and connect */ |
402 | switch (musb->xceiv->otg->state) { | |
403 | case OTG_STATE_B_IDLE: | |
404 | case OTG_STATE_A_WAIT_BCON: | |
369469a9 | 405 | dsps_mod_timer_optional(glue); |
2f3fd2c5 TL |
406 | break; |
407 | default: | |
408 | break; | |
409 | } | |
410 | ||
9be73bae | 411 | out: |
9ecb8875 AKG |
412 | spin_unlock_irqrestore(&musb->lock, flags); |
413 | ||
414 | return ret; | |
415 | } | |
416 | ||
40f099e3 MP |
417 | static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) |
418 | { | |
419 | struct dentry *root; | |
420 | struct dentry *file; | |
421 | char buf[128]; | |
422 | ||
423 | sprintf(buf, "%s.dsps", dev_name(musb->controller)); | |
424 | root = debugfs_create_dir(buf, NULL); | |
425 | if (!root) | |
426 | return -ENOMEM; | |
427 | glue->dbgfs_root = root; | |
428 | ||
429 | glue->regset.regs = dsps_musb_regs; | |
430 | glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); | |
431 | glue->regset.base = musb->ctrl_base; | |
432 | ||
433 | file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); | |
434 | if (!file) { | |
435 | debugfs_remove_recursive(root); | |
436 | return -ENOMEM; | |
437 | } | |
438 | return 0; | |
439 | } | |
440 | ||
9ecb8875 AKG |
441 | static int dsps_musb_init(struct musb *musb) |
442 | { | |
443 | struct device *dev = musb->controller; | |
db4a9320 | 444 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
97238b35 | 445 | struct platform_device *parent = to_platform_device(dev->parent); |
9ecb8875 | 446 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
97238b35 SAS |
447 | void __iomem *reg_base; |
448 | struct resource *r; | |
9ecb8875 | 449 | u32 rev, val; |
40f099e3 | 450 | int ret; |
9ecb8875 | 451 | |
97238b35 | 452 | r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); |
97238b35 | 453 | reg_base = devm_ioremap_resource(dev, r); |
51ef74f6 JL |
454 | if (IS_ERR(reg_base)) |
455 | return PTR_ERR(reg_base); | |
97238b35 | 456 | musb->ctrl_base = reg_base; |
9ecb8875 | 457 | |
d7554226 | 458 | /* NOP driver needs change if supporting dual instance */ |
983f3cab | 459 | musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0); |
97238b35 SAS |
460 | if (IS_ERR(musb->xceiv)) |
461 | return PTR_ERR(musb->xceiv); | |
9ecb8875 | 462 | |
bb90600d TL |
463 | musb->phy = devm_phy_get(dev->parent, "usb2-phy"); |
464 | ||
9ecb8875 | 465 | /* Returns zero if e.g. not clocked */ |
086b2882 | 466 | rev = musb_readl(reg_base, wrp->revision); |
97238b35 SAS |
467 | if (!rev) |
468 | return -ENODEV; | |
9ecb8875 | 469 | |
7557a57f | 470 | usb_phy_init(musb->xceiv); |
bb90600d TL |
471 | if (IS_ERR(musb->phy)) { |
472 | musb->phy = NULL; | |
473 | } else { | |
474 | ret = phy_init(musb->phy); | |
475 | if (ret < 0) | |
476 | return ret; | |
477 | ret = phy_power_on(musb->phy); | |
478 | if (ret) { | |
479 | phy_exit(musb->phy); | |
480 | return ret; | |
481 | } | |
482 | } | |
483 | ||
05678497 | 484 | timer_setup(&glue->timer, otg_timer, 0); |
9ecb8875 AKG |
485 | |
486 | /* Reset the musb */ | |
086b2882 | 487 | musb_writel(reg_base, wrp->control, (1 << wrp->reset)); |
9ecb8875 | 488 | |
9ecb8875 AKG |
489 | musb->isr = dsps_interrupt; |
490 | ||
491 | /* reset the otgdisable bit, needed for host mode to work */ | |
086b2882 | 492 | val = musb_readl(reg_base, wrp->phy_utmi); |
9ecb8875 | 493 | val &= ~(1 << wrp->otg_disable); |
086b2882 | 494 | musb_writel(musb->ctrl_base, wrp->phy_utmi, val); |
9ecb8875 | 495 | |
371254ce GC |
496 | /* |
497 | * Check whether the dsps version has babble control enabled. | |
498 | * In latest silicon revision the babble control logic is enabled. | |
499 | * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control | |
500 | * logic enabled. | |
501 | */ | |
086b2882 | 502 | val = musb_readb(musb->mregs, MUSB_BABBLE_CTL); |
f860f0b1 | 503 | if (val & MUSB_BABBLE_RCV_DISABLE) { |
371254ce GC |
504 | glue->sw_babble_enabled = true; |
505 | val |= MUSB_BABBLE_SW_SESSION_CTRL; | |
086b2882 | 506 | musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val); |
371254ce GC |
507 | } |
508 | ||
369469a9 | 509 | dsps_mod_timer(glue, -1); |
2f3fd2c5 | 510 | |
e94a7369 | 511 | return dsps_musb_dbg_init(musb, glue); |
9ecb8875 AKG |
512 | } |
513 | ||
514 | static int dsps_musb_exit(struct musb *musb) | |
515 | { | |
516 | struct device *dev = musb->controller; | |
db4a9320 | 517 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
9ecb8875 | 518 | |
97238b35 | 519 | del_timer_sync(&glue->timer); |
7557a57f | 520 | usb_phy_shutdown(musb->xceiv); |
bb90600d TL |
521 | phy_power_off(musb->phy); |
522 | phy_exit(musb->phy); | |
0fca91b8 DM |
523 | debugfs_remove_recursive(glue->dbgfs_root); |
524 | ||
9ecb8875 AKG |
525 | return 0; |
526 | } | |
527 | ||
943c1397 FB |
528 | static int dsps_musb_set_mode(struct musb *musb, u8 mode) |
529 | { | |
530 | struct device *dev = musb->controller; | |
531 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | |
532 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
533 | void __iomem *ctrl_base = musb->ctrl_base; | |
943c1397 FB |
534 | u32 reg; |
535 | ||
086b2882 | 536 | reg = musb_readl(ctrl_base, wrp->mode); |
943c1397 FB |
537 | |
538 | switch (mode) { | |
539 | case MUSB_HOST: | |
540 | reg &= ~(1 << wrp->iddig); | |
541 | ||
542 | /* | |
543 | * if we're setting mode to host-only or device-only, we're | |
544 | * going to ignore whatever the PHY sends us and just force | |
545 | * ID pin status by SW | |
546 | */ | |
547 | reg |= (1 << wrp->iddig_mux); | |
548 | ||
086b2882 BL |
549 | musb_writel(ctrl_base, wrp->mode, reg); |
550 | musb_writel(ctrl_base, wrp->phy_utmi, 0x02); | |
943c1397 FB |
551 | break; |
552 | case MUSB_PERIPHERAL: | |
553 | reg |= (1 << wrp->iddig); | |
554 | ||
555 | /* | |
556 | * if we're setting mode to host-only or device-only, we're | |
557 | * going to ignore whatever the PHY sends us and just force | |
558 | * ID pin status by SW | |
559 | */ | |
560 | reg |= (1 << wrp->iddig_mux); | |
561 | ||
086b2882 | 562 | musb_writel(ctrl_base, wrp->mode, reg); |
943c1397 FB |
563 | break; |
564 | case MUSB_OTG: | |
086b2882 | 565 | musb_writel(ctrl_base, wrp->phy_utmi, 0x02); |
943c1397 FB |
566 | break; |
567 | default: | |
568 | dev_err(glue->dev, "unsupported mode %d\n", mode); | |
569 | return -EINVAL; | |
570 | } | |
571 | ||
572 | return 0; | |
573 | } | |
574 | ||
3709ffca | 575 | static bool dsps_sw_babble_control(struct musb *musb) |
371254ce GC |
576 | { |
577 | u8 babble_ctl; | |
578 | bool session_restart = false; | |
579 | ||
086b2882 | 580 | babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); |
371254ce GC |
581 | dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n", |
582 | babble_ctl); | |
583 | /* | |
584 | * check line monitor flag to check whether babble is | |
585 | * due to noise | |
586 | */ | |
587 | dev_dbg(musb->controller, "STUCK_J is %s\n", | |
588 | babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); | |
589 | ||
590 | if (babble_ctl & MUSB_BABBLE_STUCK_J) { | |
591 | int timeout = 10; | |
592 | ||
593 | /* | |
594 | * babble is due to noise, then set transmit idle (d7 bit) | |
595 | * to resume normal operation | |
596 | */ | |
086b2882 | 597 | babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); |
371254ce | 598 | babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE; |
086b2882 | 599 | musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl); |
371254ce GC |
600 | |
601 | /* wait till line monitor flag cleared */ | |
602 | dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n"); | |
603 | do { | |
086b2882 | 604 | babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); |
371254ce GC |
605 | udelay(1); |
606 | } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--); | |
607 | ||
608 | /* check whether stuck_at_j bit cleared */ | |
609 | if (babble_ctl & MUSB_BABBLE_STUCK_J) { | |
610 | /* | |
611 | * real babble condition has occurred | |
612 | * restart the controller to start the | |
613 | * session again | |
614 | */ | |
615 | dev_dbg(musb->controller, "J not cleared, misc (%x)\n", | |
616 | babble_ctl); | |
617 | session_restart = true; | |
618 | } | |
619 | } else { | |
620 | session_restart = true; | |
621 | } | |
622 | ||
623 | return session_restart; | |
624 | } | |
625 | ||
b28a6432 | 626 | static int dsps_musb_recover(struct musb *musb) |
1d57de30 DM |
627 | { |
628 | struct device *dev = musb->controller; | |
629 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | |
011d0dd5 | 630 | int session_restart = 0; |
1d57de30 | 631 | |
371254ce | 632 | if (glue->sw_babble_enabled) |
3709ffca | 633 | session_restart = dsps_sw_babble_control(musb); |
011d0dd5 | 634 | else |
371254ce | 635 | session_restart = 1; |
1d57de30 | 636 | |
d0cddae7 | 637 | return session_restart ? 0 : -EPIPE; |
1d57de30 DM |
638 | } |
639 | ||
3e457371 TL |
640 | /* Similar to am35x, dm81xx support only 32-bit read operation */ |
641 | static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) | |
642 | { | |
643 | void __iomem *fifo = hw_ep->fifo; | |
644 | ||
645 | if (len >= 4) { | |
d30323f8 | 646 | ioread32_rep(fifo, dst, len >> 2); |
3e457371 TL |
647 | dst += len & ~0x03; |
648 | len &= 0x03; | |
649 | } | |
650 | ||
651 | /* Read any remaining 1 to 3 bytes */ | |
652 | if (len > 0) { | |
653 | u32 val = musb_readl(fifo, 0); | |
654 | memcpy(dst, &val, len); | |
655 | } | |
656 | } | |
657 | ||
25534828 AB |
658 | #ifdef CONFIG_USB_TI_CPPI41_DMA |
659 | static void dsps_dma_controller_callback(struct dma_controller *c) | |
660 | { | |
661 | struct musb *musb = c->musb; | |
662 | struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); | |
663 | void __iomem *usbss_base = glue->usbss_base; | |
664 | u32 status; | |
665 | ||
666 | status = musb_readl(usbss_base, USBSS_IRQ_STATUS); | |
667 | if (status & USBSS_IRQ_PD_COMP) | |
668 | musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP); | |
669 | } | |
670 | ||
671 | static struct dma_controller * | |
672 | dsps_dma_controller_create(struct musb *musb, void __iomem *base) | |
673 | { | |
674 | struct dma_controller *controller; | |
675 | struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); | |
676 | void __iomem *usbss_base = glue->usbss_base; | |
677 | ||
678 | controller = cppi41_dma_controller_create(musb, base); | |
679 | if (IS_ERR_OR_NULL(controller)) | |
680 | return controller; | |
681 | ||
682 | musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP); | |
683 | controller->dma_callback = dsps_dma_controller_callback; | |
684 | ||
685 | return controller; | |
686 | } | |
687 | ||
688 | static void dsps_dma_controller_destroy(struct dma_controller *c) | |
689 | { | |
690 | struct musb *musb = c->musb; | |
691 | struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); | |
692 | void __iomem *usbss_base = glue->usbss_base; | |
693 | ||
694 | musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP); | |
695 | cppi41_dma_controller_destroy(c); | |
696 | } | |
697 | ||
698 | #ifdef CONFIG_PM_SLEEP | |
699 | static void dsps_dma_controller_suspend(struct dsps_glue *glue) | |
700 | { | |
701 | void __iomem *usbss_base = glue->usbss_base; | |
702 | ||
703 | musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP); | |
704 | } | |
705 | ||
706 | static void dsps_dma_controller_resume(struct dsps_glue *glue) | |
707 | { | |
708 | void __iomem *usbss_base = glue->usbss_base; | |
709 | ||
710 | musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP); | |
711 | } | |
712 | #endif | |
713 | #else /* CONFIG_USB_TI_CPPI41_DMA */ | |
714 | #ifdef CONFIG_PM_SLEEP | |
715 | static void dsps_dma_controller_suspend(struct dsps_glue *glue) {} | |
716 | static void dsps_dma_controller_resume(struct dsps_glue *glue) {} | |
717 | #endif | |
718 | #endif /* CONFIG_USB_TI_CPPI41_DMA */ | |
719 | ||
9ecb8875 | 720 | static struct musb_platform_ops dsps_ops = { |
f8e9f34f | 721 | .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP, |
9ecb8875 AKG |
722 | .init = dsps_musb_init, |
723 | .exit = dsps_musb_exit, | |
724 | ||
7f6283ed | 725 | #ifdef CONFIG_USB_TI_CPPI41_DMA |
25534828 AB |
726 | .dma_init = dsps_dma_controller_create, |
727 | .dma_exit = dsps_dma_controller_destroy, | |
7f6283ed | 728 | #endif |
9ecb8875 AKG |
729 | .enable = dsps_musb_enable, |
730 | .disable = dsps_musb_disable, | |
731 | ||
943c1397 | 732 | .set_mode = dsps_musb_set_mode, |
b28a6432 | 733 | .recover = dsps_musb_recover, |
c48400ba | 734 | .clear_ep_rxintr = dsps_musb_clear_ep_rxintr, |
9ecb8875 AKG |
735 | }; |
736 | ||
737 | static u64 musb_dmamask = DMA_BIT_MASK(32); | |
738 | ||
97238b35 | 739 | static int get_int_prop(struct device_node *dn, const char *s) |
9ecb8875 | 740 | { |
97238b35 SAS |
741 | int ret; |
742 | u32 val; | |
743 | ||
744 | ret = of_property_read_u32(dn, s, &val); | |
745 | if (ret) | |
746 | return 0; | |
747 | return val; | |
748 | } | |
749 | ||
c031a7d4 SAS |
750 | static int get_musb_port_mode(struct device *dev) |
751 | { | |
752 | enum usb_dr_mode mode; | |
753 | ||
06e7114f | 754 | mode = usb_get_dr_mode(dev); |
c031a7d4 SAS |
755 | switch (mode) { |
756 | case USB_DR_MODE_HOST: | |
757 | return MUSB_PORT_MODE_HOST; | |
758 | ||
759 | case USB_DR_MODE_PERIPHERAL: | |
760 | return MUSB_PORT_MODE_GADGET; | |
761 | ||
762 | case USB_DR_MODE_UNKNOWN: | |
763 | case USB_DR_MODE_OTG: | |
764 | default: | |
765 | return MUSB_PORT_MODE_DUAL_ROLE; | |
2b84f92b | 766 | } |
c031a7d4 SAS |
767 | } |
768 | ||
97238b35 SAS |
769 | static int dsps_create_musb_pdev(struct dsps_glue *glue, |
770 | struct platform_device *parent) | |
771 | { | |
772 | struct musb_hdrc_platform_data pdata; | |
9ecb8875 | 773 | struct resource resources[2]; |
c031a7d4 | 774 | struct resource *res; |
97238b35 SAS |
775 | struct device *dev = &parent->dev; |
776 | struct musb_hdrc_config *config; | |
777 | struct platform_device *musb; | |
778 | struct device_node *dn = parent->dev.of_node; | |
606bf4d5 | 779 | int ret, val; |
9ecb8875 | 780 | |
97238b35 | 781 | memset(resources, 0, sizeof(resources)); |
c031a7d4 SAS |
782 | res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); |
783 | if (!res) { | |
97238b35 | 784 | dev_err(dev, "failed to get memory.\n"); |
c031a7d4 | 785 | return -EINVAL; |
9ecb8875 | 786 | } |
c031a7d4 | 787 | resources[0] = *res; |
97238b35 | 788 | |
c031a7d4 SAS |
789 | res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); |
790 | if (!res) { | |
97238b35 | 791 | dev_err(dev, "failed to get irq.\n"); |
c031a7d4 | 792 | return -EINVAL; |
9ecb8875 | 793 | } |
c031a7d4 | 794 | resources[1] = *res; |
9ecb8875 AKG |
795 | |
796 | /* allocate the child platform device */ | |
45abfa68 BL |
797 | musb = platform_device_alloc("musb-hdrc", |
798 | (resources[0].start & 0xFFF) == 0x400 ? 0 : 1); | |
9ecb8875 AKG |
799 | if (!musb) { |
800 | dev_err(dev, "failed to allocate musb device\n"); | |
97238b35 | 801 | return -ENOMEM; |
9ecb8875 AKG |
802 | } |
803 | ||
804 | musb->dev.parent = dev; | |
805 | musb->dev.dma_mask = &musb_dmamask; | |
806 | musb->dev.coherent_dma_mask = musb_dmamask; | |
807 | ||
97238b35 | 808 | glue->musb = musb; |
9ecb8875 | 809 | |
97238b35 SAS |
810 | ret = platform_device_add_resources(musb, resources, |
811 | ARRAY_SIZE(resources)); | |
9ecb8875 AKG |
812 | if (ret) { |
813 | dev_err(dev, "failed to add resources\n"); | |
97238b35 | 814 | goto err; |
9ecb8875 AKG |
815 | } |
816 | ||
97238b35 SAS |
817 | config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); |
818 | if (!config) { | |
97238b35 SAS |
819 | ret = -ENOMEM; |
820 | goto err; | |
65145677 | 821 | } |
97238b35 SAS |
822 | pdata.config = config; |
823 | pdata.platform_ops = &dsps_ops; | |
65145677 | 824 | |
c031a7d4 SAS |
825 | config->num_eps = get_int_prop(dn, "mentor,num-eps"); |
826 | config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); | |
869c5978 | 827 | config->host_port_deassert_reset_at_resume = 1; |
c031a7d4 SAS |
828 | pdata.mode = get_musb_port_mode(dev); |
829 | /* DT keeps this entry in mA, musb expects it as per USB spec */ | |
830 | pdata.power = get_int_prop(dn, "mentor,power") / 2; | |
606bf4d5 TL |
831 | |
832 | ret = of_property_read_u32(dn, "mentor,multipoint", &val); | |
833 | if (!ret && val) | |
834 | config->multipoint = true; | |
65145677 | 835 | |
63863b98 | 836 | config->maximum_speed = usb_get_maximum_speed(&parent->dev); |
41932b9b BL |
837 | switch (config->maximum_speed) { |
838 | case USB_SPEED_LOW: | |
839 | case USB_SPEED_FULL: | |
840 | break; | |
841 | case USB_SPEED_SUPER: | |
842 | dev_warn(dev, "ignore incorrect maximum_speed " | |
843 | "(super-speed) setting in dts"); | |
844 | /* fall through */ | |
845 | default: | |
846 | config->maximum_speed = USB_SPEED_HIGH; | |
847 | } | |
848 | ||
97238b35 | 849 | ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); |
9ecb8875 AKG |
850 | if (ret) { |
851 | dev_err(dev, "failed to add platform_data\n"); | |
97238b35 | 852 | goto err; |
9ecb8875 AKG |
853 | } |
854 | ||
855 | ret = platform_device_add(musb); | |
856 | if (ret) { | |
857 | dev_err(dev, "failed to register musb device\n"); | |
97238b35 | 858 | goto err; |
9ecb8875 | 859 | } |
9ecb8875 AKG |
860 | return 0; |
861 | ||
97238b35 | 862 | err: |
9ecb8875 | 863 | platform_device_put(musb); |
9ecb8875 AKG |
864 | return ret; |
865 | } | |
866 | ||
369469a9 TL |
867 | static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv) |
868 | { | |
869 | struct dsps_glue *glue = priv; | |
870 | struct musb *musb = platform_get_drvdata(glue->musb); | |
871 | ||
872 | if (!musb) | |
873 | return IRQ_NONE; | |
874 | ||
875 | dev_dbg(glue->dev, "VBUS interrupt\n"); | |
876 | dsps_mod_timer(glue, 0); | |
877 | ||
878 | return IRQ_HANDLED; | |
879 | } | |
880 | ||
881 | static int dsps_setup_optional_vbus_irq(struct platform_device *pdev, | |
882 | struct dsps_glue *glue) | |
883 | { | |
884 | int error; | |
885 | ||
886 | glue->vbus_irq = platform_get_irq_byname(pdev, "vbus"); | |
887 | if (glue->vbus_irq == -EPROBE_DEFER) | |
888 | return -EPROBE_DEFER; | |
889 | ||
890 | if (glue->vbus_irq <= 0) { | |
891 | glue->vbus_irq = 0; | |
892 | return 0; | |
893 | } | |
894 | ||
895 | error = devm_request_threaded_irq(glue->dev, glue->vbus_irq, | |
896 | NULL, dsps_vbus_threaded_irq, | |
897 | IRQF_ONESHOT, | |
898 | "vbus", glue); | |
899 | if (error) { | |
900 | glue->vbus_irq = 0; | |
901 | return error; | |
902 | } | |
903 | dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq); | |
904 | ||
905 | return 0; | |
906 | } | |
907 | ||
41ac7b3a | 908 | static int dsps_probe(struct platform_device *pdev) |
9ecb8875 | 909 | { |
65145677 AKG |
910 | const struct of_device_id *match; |
911 | const struct dsps_musb_wrapper *wrp; | |
9ecb8875 | 912 | struct dsps_glue *glue; |
97238b35 | 913 | int ret; |
9ecb8875 | 914 | |
4fc4b274 SAS |
915 | if (!strcmp(pdev->name, "musb-hdrc")) |
916 | return -ENODEV; | |
917 | ||
cc506036 | 918 | match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); |
65145677 AKG |
919 | if (!match) { |
920 | dev_err(&pdev->dev, "fail to get matching of_match struct\n"); | |
97238b35 | 921 | return -EINVAL; |
65145677 AKG |
922 | } |
923 | wrp = match->data; | |
9ecb8875 | 924 | |
3e457371 TL |
925 | if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816")) |
926 | dsps_ops.read_fifo = dsps_read_fifo32; | |
927 | ||
9ecb8875 | 928 | /* allocate glue */ |
de9db572 | 929 | glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); |
0816ea2f | 930 | if (!glue) |
97238b35 | 931 | return -ENOMEM; |
9ecb8875 AKG |
932 | |
933 | glue->dev = &pdev->dev; | |
97238b35 | 934 | glue->wrp = wrp; |
25534828 AB |
935 | glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0); |
936 | if (!glue->usbss_base) | |
937 | return -ENXIO; | |
9ecb8875 | 938 | |
369469a9 TL |
939 | if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) { |
940 | ret = dsps_setup_optional_vbus_irq(pdev, glue); | |
941 | if (ret) | |
6b7ad496 | 942 | goto err_iounmap; |
369469a9 TL |
943 | } |
944 | ||
9ecb8875 | 945 | platform_set_drvdata(pdev, glue); |
9ecb8875 | 946 | pm_runtime_enable(&pdev->dev); |
97238b35 SAS |
947 | ret = dsps_create_musb_pdev(glue, pdev); |
948 | if (ret) | |
24752917 | 949 | goto err; |
65b3f50e | 950 | |
9ecb8875 AKG |
951 | return 0; |
952 | ||
24752917 | 953 | err: |
0e38c4ed | 954 | pm_runtime_disable(&pdev->dev); |
6b7ad496 BL |
955 | err_iounmap: |
956 | iounmap(glue->usbss_base); | |
9ecb8875 AKG |
957 | return ret; |
958 | } | |
97238b35 | 959 | |
fb4e98ab | 960 | static int dsps_remove(struct platform_device *pdev) |
9ecb8875 AKG |
961 | { |
962 | struct dsps_glue *glue = platform_get_drvdata(pdev); | |
963 | ||
97238b35 | 964 | platform_device_unregister(glue->musb); |
9ecb8875 | 965 | |
9ecb8875 | 966 | pm_runtime_disable(&pdev->dev); |
6b7ad496 | 967 | iounmap(glue->usbss_base); |
40f099e3 | 968 | |
9ecb8875 AKG |
969 | return 0; |
970 | } | |
971 | ||
fa7b4ca5 | 972 | static const struct dsps_musb_wrapper am33xx_driver_data = { |
9ecb8875 AKG |
973 | .revision = 0x00, |
974 | .control = 0x14, | |
975 | .status = 0x18, | |
9ecb8875 AKG |
976 | .epintr_set = 0x38, |
977 | .epintr_clear = 0x40, | |
978 | .epintr_status = 0x30, | |
979 | .coreintr_set = 0x3c, | |
980 | .coreintr_clear = 0x44, | |
981 | .coreintr_status = 0x34, | |
982 | .phy_utmi = 0xe0, | |
983 | .mode = 0xe8, | |
b991f9b7 DM |
984 | .tx_mode = 0x70, |
985 | .rx_mode = 0x74, | |
9ecb8875 AKG |
986 | .reset = 0, |
987 | .otg_disable = 21, | |
988 | .iddig = 8, | |
943c1397 | 989 | .iddig_mux = 7, |
9ecb8875 AKG |
990 | .usb_shift = 0, |
991 | .usb_mask = 0x1ff, | |
992 | .usb_bitmap = (0x1ff << 0), | |
993 | .drvvbus = 8, | |
994 | .txep_shift = 0, | |
995 | .txep_mask = 0xffff, | |
996 | .txep_bitmap = (0xffff << 0), | |
997 | .rxep_shift = 16, | |
998 | .rxep_mask = 0xfffe, | |
999 | .rxep_bitmap = (0xfffe << 16), | |
9e204d88 | 1000 | .poll_timeout = 2000, /* ms */ |
9ecb8875 AKG |
1001 | }; |
1002 | ||
2f82686e | 1003 | static const struct of_device_id musb_dsps_of_match[] = { |
65145677 | 1004 | { .compatible = "ti,musb-am33xx", |
3e457371 TL |
1005 | .data = &am33xx_driver_data, }, |
1006 | { .compatible = "ti,musb-dm816", | |
1007 | .data = &am33xx_driver_data, }, | |
9ecb8875 AKG |
1008 | { }, |
1009 | }; | |
1010 | MODULE_DEVICE_TABLE(of, musb_dsps_of_match); | |
1011 | ||
5b783983 | 1012 | #ifdef CONFIG_PM_SLEEP |
869c5978 DM |
1013 | static int dsps_suspend(struct device *dev) |
1014 | { | |
1015 | struct dsps_glue *glue = dev_get_drvdata(dev); | |
1016 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
1017 | struct musb *musb = platform_get_drvdata(glue->musb); | |
f042e9cb | 1018 | void __iomem *mbase; |
706d61b2 | 1019 | int ret; |
f042e9cb SAS |
1020 | |
1021 | if (!musb) | |
1022 | /* This can happen if the musb device is in -EPROBE_DEFER */ | |
1023 | return 0; | |
1024 | ||
706d61b2 JH |
1025 | ret = pm_runtime_get_sync(dev); |
1026 | if (ret < 0) { | |
1027 | pm_runtime_put_noidle(dev); | |
1028 | return ret; | |
1029 | } | |
1030 | ||
1031 | del_timer_sync(&glue->timer); | |
1032 | ||
f042e9cb | 1033 | mbase = musb->ctrl_base; |
086b2882 BL |
1034 | glue->context.control = musb_readl(mbase, wrp->control); |
1035 | glue->context.epintr = musb_readl(mbase, wrp->epintr_set); | |
1036 | glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set); | |
1037 | glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi); | |
1038 | glue->context.mode = musb_readl(mbase, wrp->mode); | |
1039 | glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode); | |
1040 | glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode); | |
869c5978 | 1041 | |
25534828 AB |
1042 | dsps_dma_controller_suspend(glue); |
1043 | ||
869c5978 DM |
1044 | return 0; |
1045 | } | |
1046 | ||
1047 | static int dsps_resume(struct device *dev) | |
1048 | { | |
1049 | struct dsps_glue *glue = dev_get_drvdata(dev); | |
1050 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
1051 | struct musb *musb = platform_get_drvdata(glue->musb); | |
f042e9cb SAS |
1052 | void __iomem *mbase; |
1053 | ||
1054 | if (!musb) | |
1055 | return 0; | |
869c5978 | 1056 | |
25534828 AB |
1057 | dsps_dma_controller_resume(glue); |
1058 | ||
f042e9cb | 1059 | mbase = musb->ctrl_base; |
086b2882 BL |
1060 | musb_writel(mbase, wrp->control, glue->context.control); |
1061 | musb_writel(mbase, wrp->epintr_set, glue->context.epintr); | |
1062 | musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr); | |
1063 | musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); | |
1064 | musb_writel(mbase, wrp->mode, glue->context.mode); | |
1065 | musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode); | |
1066 | musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode); | |
e47d9254 | 1067 | if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && |
53185b3a | 1068 | musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) |
369469a9 | 1069 | dsps_mod_timer(glue, -1); |
869c5978 | 1070 | |
706d61b2 JH |
1071 | pm_runtime_put(dev); |
1072 | ||
869c5978 DM |
1073 | return 0; |
1074 | } | |
1075 | #endif | |
1076 | ||
1077 | static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); | |
1078 | ||
9ecb8875 AKG |
1079 | static struct platform_driver dsps_usbss_driver = { |
1080 | .probe = dsps_probe, | |
7690417d | 1081 | .remove = dsps_remove, |
9ecb8875 AKG |
1082 | .driver = { |
1083 | .name = "musb-dsps", | |
869c5978 | 1084 | .pm = &dsps_pm_ops, |
b432cb83 | 1085 | .of_match_table = musb_dsps_of_match, |
9ecb8875 | 1086 | }, |
9ecb8875 AKG |
1087 | }; |
1088 | ||
1089 | MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); | |
1090 | MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); | |
1091 | MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); | |
1092 | MODULE_LICENSE("GPL v2"); | |
1093 | ||
97238b35 | 1094 | module_platform_driver(dsps_usbss_driver); |