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9ecb8875 AKG |
1 | /* |
2 | * Texas Instruments DSPS platforms "glue layer" | |
3 | * | |
4 | * Copyright (C) 2012, by Texas Instruments | |
5 | * | |
6 | * Based on the am35x "glue layer" code. | |
7 | * | |
8 | * This file is part of the Inventra Controller Driver for Linux. | |
9 | * | |
10 | * The Inventra Controller Driver for Linux is free software; you | |
11 | * can redistribute it and/or modify it under the terms of the GNU | |
12 | * General Public License version 2 as published by the Free Software | |
13 | * Foundation. | |
14 | * | |
15 | * The Inventra Controller Driver for Linux is distributed in | |
16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; | |
17 | * without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
19 | * License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with The Inventra Controller Driver for Linux ; if not, | |
23 | * write to the Free Software Foundation, Inc., 59 Temple Place, | |
24 | * Suite 330, Boston, MA 02111-1307 USA | |
25 | * | |
26 | * musb_dsps.c will be a common file for all the TI DSPS platforms | |
27 | * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. | |
28 | * For now only ti81x is using this and in future davinci.c, am35x.c | |
29 | * da8xx.c would be merged to this file after testing. | |
30 | */ | |
31 | ||
9ecb8875 | 32 | #include <linux/io.h> |
ded017ee | 33 | #include <linux/err.h> |
9ecb8875 AKG |
34 | #include <linux/platform_device.h> |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/pm_runtime.h> | |
37 | #include <linux/module.h> | |
d7078df6 | 38 | #include <linux/usb/usb_phy_generic.h> |
e8c4a7ac | 39 | #include <linux/platform_data/usb-omap.h> |
0f53e481 | 40 | #include <linux/sizes.h> |
9ecb8875 AKG |
41 | |
42 | #include <linux/of.h> | |
43 | #include <linux/of_device.h> | |
44 | #include <linux/of_address.h> | |
97238b35 | 45 | #include <linux/of_irq.h> |
c031a7d4 | 46 | #include <linux/usb/of.h> |
9ecb8875 | 47 | |
40f099e3 MP |
48 | #include <linux/debugfs.h> |
49 | ||
9ecb8875 AKG |
50 | #include "musb_core.h" |
51 | ||
65145677 | 52 | static const struct of_device_id musb_dsps_of_match[]; |
65145677 | 53 | |
9ecb8875 AKG |
54 | /** |
55 | * DSPS musb wrapper register offset. | |
56 | * FIXME: This should be expanded to have all the wrapper registers from TI DSPS | |
57 | * musb ips. | |
58 | */ | |
59 | struct dsps_musb_wrapper { | |
60 | u16 revision; | |
61 | u16 control; | |
62 | u16 status; | |
9ecb8875 AKG |
63 | u16 epintr_set; |
64 | u16 epintr_clear; | |
65 | u16 epintr_status; | |
66 | u16 coreintr_set; | |
67 | u16 coreintr_clear; | |
68 | u16 coreintr_status; | |
69 | u16 phy_utmi; | |
70 | u16 mode; | |
b991f9b7 DM |
71 | u16 tx_mode; |
72 | u16 rx_mode; | |
9ecb8875 AKG |
73 | |
74 | /* bit positions for control */ | |
75 | unsigned reset:5; | |
76 | ||
77 | /* bit positions for interrupt */ | |
78 | unsigned usb_shift:5; | |
79 | u32 usb_mask; | |
80 | u32 usb_bitmap; | |
81 | unsigned drvvbus:5; | |
82 | ||
83 | unsigned txep_shift:5; | |
84 | u32 txep_mask; | |
85 | u32 txep_bitmap; | |
86 | ||
87 | unsigned rxep_shift:5; | |
88 | u32 rxep_mask; | |
89 | u32 rxep_bitmap; | |
90 | ||
91 | /* bit positions for phy_utmi */ | |
92 | unsigned otg_disable:5; | |
93 | ||
94 | /* bit positions for mode */ | |
95 | unsigned iddig:5; | |
943c1397 | 96 | unsigned iddig_mux:5; |
9ecb8875 | 97 | /* miscellaneous stuff */ |
9e204d88 | 98 | unsigned poll_timeout; |
9ecb8875 AKG |
99 | }; |
100 | ||
869c5978 DM |
101 | /* |
102 | * register shadow for suspend | |
103 | */ | |
104 | struct dsps_context { | |
105 | u32 control; | |
106 | u32 epintr; | |
107 | u32 coreintr; | |
108 | u32 phy_utmi; | |
109 | u32 mode; | |
110 | u32 tx_mode; | |
111 | u32 rx_mode; | |
112 | }; | |
113 | ||
9ecb8875 AKG |
114 | /** |
115 | * DSPS glue structure. | |
116 | */ | |
117 | struct dsps_glue { | |
118 | struct device *dev; | |
97238b35 | 119 | struct platform_device *musb; /* child musb pdev */ |
9ecb8875 | 120 | const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ |
97238b35 SAS |
121 | struct timer_list timer; /* otg_workaround timer */ |
122 | unsigned long last_timer; /* last timer data for each instance */ | |
371254ce | 123 | bool sw_babble_enabled; |
869c5978 DM |
124 | |
125 | struct dsps_context context; | |
40f099e3 MP |
126 | struct debugfs_regset32 regset; |
127 | struct dentry *dbgfs_root; | |
128 | }; | |
129 | ||
130 | static const struct debugfs_reg32 dsps_musb_regs[] = { | |
131 | { "revision", 0x00 }, | |
132 | { "control", 0x14 }, | |
133 | { "status", 0x18 }, | |
134 | { "eoi", 0x24 }, | |
135 | { "intr0_stat", 0x30 }, | |
136 | { "intr1_stat", 0x34 }, | |
137 | { "intr0_set", 0x38 }, | |
138 | { "intr1_set", 0x3c }, | |
139 | { "txmode", 0x70 }, | |
140 | { "rxmode", 0x74 }, | |
141 | { "autoreq", 0xd0 }, | |
142 | { "srpfixtime", 0xd4 }, | |
143 | { "tdown", 0xd8 }, | |
144 | { "phy_utmi", 0xe0 }, | |
145 | { "mode", 0xe8 }, | |
9ecb8875 AKG |
146 | }; |
147 | ||
807d0d2b SAS |
148 | static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) |
149 | { | |
150 | struct device *dev = musb->controller; | |
151 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | |
152 | ||
153 | if (timeout == 0) | |
154 | timeout = jiffies + msecs_to_jiffies(3); | |
155 | ||
156 | /* Never idle if active, or when VBUS timeout is not set as host */ | |
157 | if (musb->is_active || (musb->a_wait_bcon == 0 && | |
e47d9254 | 158 | musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) { |
807d0d2b | 159 | dev_dbg(musb->controller, "%s active, deleting timer\n", |
e47d9254 | 160 | usb_otg_state_string(musb->xceiv->otg->state)); |
807d0d2b SAS |
161 | del_timer(&glue->timer); |
162 | glue->last_timer = jiffies; | |
163 | return; | |
164 | } | |
24616eb6 | 165 | if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE) |
807d0d2b SAS |
166 | return; |
167 | ||
168 | if (!musb->g.dev.driver) | |
169 | return; | |
170 | ||
171 | if (time_after(glue->last_timer, timeout) && | |
172 | timer_pending(&glue->timer)) { | |
173 | dev_dbg(musb->controller, | |
174 | "Longer idle timer already pending, ignoring...\n"); | |
175 | return; | |
176 | } | |
177 | glue->last_timer = timeout; | |
178 | ||
179 | dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", | |
e47d9254 | 180 | usb_otg_state_string(musb->xceiv->otg->state), |
807d0d2b SAS |
181 | jiffies_to_msecs(timeout - jiffies)); |
182 | mod_timer(&glue->timer, timeout); | |
183 | } | |
184 | ||
9ecb8875 AKG |
185 | /** |
186 | * dsps_musb_enable - enable interrupts | |
187 | */ | |
188 | static void dsps_musb_enable(struct musb *musb) | |
189 | { | |
190 | struct device *dev = musb->controller; | |
191 | struct platform_device *pdev = to_platform_device(dev->parent); | |
192 | struct dsps_glue *glue = platform_get_drvdata(pdev); | |
193 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
194 | void __iomem *reg_base = musb->ctrl_base; | |
195 | u32 epmask, coremask; | |
196 | ||
197 | /* Workaround: setup IRQs through both register sets. */ | |
198 | epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | | |
199 | ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); | |
200 | coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); | |
201 | ||
086b2882 BL |
202 | musb_writel(reg_base, wrp->epintr_set, epmask); |
203 | musb_writel(reg_base, wrp->coreintr_set, coremask); | |
b8239dcc BL |
204 | /* start polling for ID change in dual-role idle mode */ |
205 | if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && | |
206 | musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) | |
207 | mod_timer(&glue->timer, jiffies + | |
208 | msecs_to_jiffies(wrp->poll_timeout)); | |
8b9fcce2 | 209 | dsps_musb_try_idle(musb, 0); |
9ecb8875 AKG |
210 | } |
211 | ||
212 | /** | |
213 | * dsps_musb_disable - disable HDRC and flush interrupts | |
214 | */ | |
215 | static void dsps_musb_disable(struct musb *musb) | |
216 | { | |
217 | struct device *dev = musb->controller; | |
218 | struct platform_device *pdev = to_platform_device(dev->parent); | |
219 | struct dsps_glue *glue = platform_get_drvdata(pdev); | |
220 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
221 | void __iomem *reg_base = musb->ctrl_base; | |
222 | ||
086b2882 BL |
223 | musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); |
224 | musb_writel(reg_base, wrp->epintr_clear, | |
9ecb8875 | 225 | wrp->txep_bitmap | wrp->rxep_bitmap); |
086b2882 | 226 | musb_writeb(musb->mregs, MUSB_DEVCTL, 0); |
9ecb8875 AKG |
227 | } |
228 | ||
229 | static void otg_timer(unsigned long _musb) | |
230 | { | |
231 | struct musb *musb = (void *)_musb; | |
232 | void __iomem *mregs = musb->mregs; | |
233 | struct device *dev = musb->controller; | |
db4a9320 | 234 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
9ecb8875 AKG |
235 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
236 | u8 devctl; | |
237 | unsigned long flags; | |
0f901c98 | 238 | int skip_session = 0; |
9ecb8875 AKG |
239 | |
240 | /* | |
241 | * We poll because DSPS IP's won't expose several OTG-critical | |
242 | * status change events (from the transceiver) otherwise. | |
243 | */ | |
086b2882 | 244 | devctl = musb_readb(mregs, MUSB_DEVCTL); |
9ecb8875 | 245 | dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, |
e47d9254 | 246 | usb_otg_state_string(musb->xceiv->otg->state)); |
9ecb8875 AKG |
247 | |
248 | spin_lock_irqsave(&musb->lock, flags); | |
e47d9254 | 249 | switch (musb->xceiv->otg->state) { |
9ecb8875 | 250 | case OTG_STATE_A_WAIT_BCON: |
086b2882 | 251 | musb_writeb(musb->mregs, MUSB_DEVCTL, 0); |
0f901c98 SAS |
252 | skip_session = 1; |
253 | /* fall */ | |
9ecb8875 | 254 | |
0f901c98 SAS |
255 | case OTG_STATE_A_IDLE: |
256 | case OTG_STATE_B_IDLE: | |
9ecb8875 | 257 | if (devctl & MUSB_DEVCTL_BDEVICE) { |
e47d9254 | 258 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
9ecb8875 AKG |
259 | MUSB_DEV_MODE(musb); |
260 | } else { | |
e47d9254 | 261 | musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
9ecb8875 AKG |
262 | MUSB_HST_MODE(musb); |
263 | } | |
0f901c98 | 264 | if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) |
086b2882 | 265 | musb_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); |
9e204d88 FB |
266 | mod_timer(&glue->timer, jiffies + |
267 | msecs_to_jiffies(wrp->poll_timeout)); | |
9ecb8875 AKG |
268 | break; |
269 | case OTG_STATE_A_WAIT_VFALL: | |
e47d9254 | 270 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
086b2882 | 271 | musb_writel(musb->ctrl_base, wrp->coreintr_set, |
9ecb8875 AKG |
272 | MUSB_INTR_VBUSERROR << wrp->usb_shift); |
273 | break; | |
9ecb8875 AKG |
274 | default: |
275 | break; | |
276 | } | |
277 | spin_unlock_irqrestore(&musb->lock, flags); | |
278 | } | |
279 | ||
9ecb8875 AKG |
280 | static irqreturn_t dsps_interrupt(int irq, void *hci) |
281 | { | |
282 | struct musb *musb = hci; | |
283 | void __iomem *reg_base = musb->ctrl_base; | |
284 | struct device *dev = musb->controller; | |
db4a9320 | 285 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
9ecb8875 AKG |
286 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
287 | unsigned long flags; | |
288 | irqreturn_t ret = IRQ_NONE; | |
289 | u32 epintr, usbintr; | |
290 | ||
291 | spin_lock_irqsave(&musb->lock, flags); | |
292 | ||
293 | /* Get endpoint interrupts */ | |
086b2882 | 294 | epintr = musb_readl(reg_base, wrp->epintr_status); |
9ecb8875 AKG |
295 | musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; |
296 | musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; | |
297 | ||
298 | if (epintr) | |
086b2882 | 299 | musb_writel(reg_base, wrp->epintr_status, epintr); |
9ecb8875 AKG |
300 | |
301 | /* Get usb core interrupts */ | |
086b2882 | 302 | usbintr = musb_readl(reg_base, wrp->coreintr_status); |
9ecb8875 | 303 | if (!usbintr && !epintr) |
9be73bae | 304 | goto out; |
9ecb8875 AKG |
305 | |
306 | musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; | |
307 | if (usbintr) | |
086b2882 | 308 | musb_writel(reg_base, wrp->coreintr_status, usbintr); |
9ecb8875 AKG |
309 | |
310 | dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", | |
311 | usbintr, epintr); | |
1d57de30 | 312 | |
9ecb8875 | 313 | if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { |
086b2882 | 314 | int drvvbus = musb_readl(reg_base, wrp->status); |
9ecb8875 | 315 | void __iomem *mregs = musb->mregs; |
086b2882 | 316 | u8 devctl = musb_readb(mregs, MUSB_DEVCTL); |
9ecb8875 AKG |
317 | int err; |
318 | ||
032ec49f | 319 | err = musb->int_usb & MUSB_INTR_VBUSERROR; |
9ecb8875 AKG |
320 | if (err) { |
321 | /* | |
322 | * The Mentor core doesn't debounce VBUS as needed | |
323 | * to cope with device connect current spikes. This | |
324 | * means it's not uncommon for bus-powered devices | |
325 | * to get VBUS errors during enumeration. | |
326 | * | |
327 | * This is a workaround, but newer RTL from Mentor | |
328 | * seems to allow a better one: "re"-starting sessions | |
329 | * without waiting for VBUS to stop registering in | |
330 | * devctl. | |
331 | */ | |
332 | musb->int_usb &= ~MUSB_INTR_VBUSERROR; | |
e47d9254 | 333 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; |
9e204d88 FB |
334 | mod_timer(&glue->timer, jiffies + |
335 | msecs_to_jiffies(wrp->poll_timeout)); | |
9ecb8875 | 336 | WARNING("VBUS error workaround (delay coming)\n"); |
032ec49f | 337 | } else if (drvvbus) { |
9ecb8875 AKG |
338 | MUSB_HST_MODE(musb); |
339 | musb->xceiv->otg->default_a = 1; | |
e47d9254 | 340 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
97238b35 | 341 | del_timer(&glue->timer); |
9ecb8875 AKG |
342 | } else { |
343 | musb->is_active = 0; | |
344 | MUSB_DEV_MODE(musb); | |
345 | musb->xceiv->otg->default_a = 0; | |
e47d9254 | 346 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
9ecb8875 AKG |
347 | } |
348 | ||
349 | /* NOTE: this must complete power-on within 100 ms. */ | |
350 | dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", | |
351 | drvvbus ? "on" : "off", | |
e47d9254 | 352 | usb_otg_state_string(musb->xceiv->otg->state), |
9ecb8875 AKG |
353 | err ? " ERROR" : "", |
354 | devctl); | |
355 | ret = IRQ_HANDLED; | |
356 | } | |
357 | ||
358 | if (musb->int_tx || musb->int_rx || musb->int_usb) | |
359 | ret |= musb_interrupt(musb); | |
360 | ||
5ace3d00 | 361 | /* Poll for ID change in OTG port mode */ |
e47d9254 | 362 | if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && |
5ace3d00 | 363 | musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) |
9e204d88 FB |
364 | mod_timer(&glue->timer, jiffies + |
365 | msecs_to_jiffies(wrp->poll_timeout)); | |
9be73bae | 366 | out: |
9ecb8875 AKG |
367 | spin_unlock_irqrestore(&musb->lock, flags); |
368 | ||
369 | return ret; | |
370 | } | |
371 | ||
40f099e3 MP |
372 | static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) |
373 | { | |
374 | struct dentry *root; | |
375 | struct dentry *file; | |
376 | char buf[128]; | |
377 | ||
378 | sprintf(buf, "%s.dsps", dev_name(musb->controller)); | |
379 | root = debugfs_create_dir(buf, NULL); | |
380 | if (!root) | |
381 | return -ENOMEM; | |
382 | glue->dbgfs_root = root; | |
383 | ||
384 | glue->regset.regs = dsps_musb_regs; | |
385 | glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); | |
386 | glue->regset.base = musb->ctrl_base; | |
387 | ||
388 | file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); | |
389 | if (!file) { | |
390 | debugfs_remove_recursive(root); | |
391 | return -ENOMEM; | |
392 | } | |
393 | return 0; | |
394 | } | |
395 | ||
9ecb8875 AKG |
396 | static int dsps_musb_init(struct musb *musb) |
397 | { | |
398 | struct device *dev = musb->controller; | |
db4a9320 | 399 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
97238b35 | 400 | struct platform_device *parent = to_platform_device(dev->parent); |
9ecb8875 | 401 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
97238b35 SAS |
402 | void __iomem *reg_base; |
403 | struct resource *r; | |
9ecb8875 | 404 | u32 rev, val; |
40f099e3 | 405 | int ret; |
9ecb8875 | 406 | |
97238b35 | 407 | r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); |
97238b35 | 408 | reg_base = devm_ioremap_resource(dev, r); |
51ef74f6 JL |
409 | if (IS_ERR(reg_base)) |
410 | return PTR_ERR(reg_base); | |
97238b35 | 411 | musb->ctrl_base = reg_base; |
9ecb8875 | 412 | |
d7554226 | 413 | /* NOP driver needs change if supporting dual instance */ |
983f3cab | 414 | musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0); |
97238b35 SAS |
415 | if (IS_ERR(musb->xceiv)) |
416 | return PTR_ERR(musb->xceiv); | |
9ecb8875 | 417 | |
bb90600d TL |
418 | musb->phy = devm_phy_get(dev->parent, "usb2-phy"); |
419 | ||
9ecb8875 | 420 | /* Returns zero if e.g. not clocked */ |
086b2882 | 421 | rev = musb_readl(reg_base, wrp->revision); |
97238b35 SAS |
422 | if (!rev) |
423 | return -ENODEV; | |
9ecb8875 | 424 | |
7557a57f | 425 | usb_phy_init(musb->xceiv); |
bb90600d TL |
426 | if (IS_ERR(musb->phy)) { |
427 | musb->phy = NULL; | |
428 | } else { | |
429 | ret = phy_init(musb->phy); | |
430 | if (ret < 0) | |
431 | return ret; | |
432 | ret = phy_power_on(musb->phy); | |
433 | if (ret) { | |
434 | phy_exit(musb->phy); | |
435 | return ret; | |
436 | } | |
437 | } | |
438 | ||
97238b35 | 439 | setup_timer(&glue->timer, otg_timer, (unsigned long) musb); |
9ecb8875 AKG |
440 | |
441 | /* Reset the musb */ | |
086b2882 | 442 | musb_writel(reg_base, wrp->control, (1 << wrp->reset)); |
9ecb8875 | 443 | |
9ecb8875 AKG |
444 | musb->isr = dsps_interrupt; |
445 | ||
446 | /* reset the otgdisable bit, needed for host mode to work */ | |
086b2882 | 447 | val = musb_readl(reg_base, wrp->phy_utmi); |
9ecb8875 | 448 | val &= ~(1 << wrp->otg_disable); |
086b2882 | 449 | musb_writel(musb->ctrl_base, wrp->phy_utmi, val); |
9ecb8875 | 450 | |
371254ce GC |
451 | /* |
452 | * Check whether the dsps version has babble control enabled. | |
453 | * In latest silicon revision the babble control logic is enabled. | |
454 | * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control | |
455 | * logic enabled. | |
456 | */ | |
086b2882 | 457 | val = musb_readb(musb->mregs, MUSB_BABBLE_CTL); |
f860f0b1 | 458 | if (val & MUSB_BABBLE_RCV_DISABLE) { |
371254ce GC |
459 | glue->sw_babble_enabled = true; |
460 | val |= MUSB_BABBLE_SW_SESSION_CTRL; | |
086b2882 | 461 | musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val); |
371254ce GC |
462 | } |
463 | ||
e94a7369 | 464 | return dsps_musb_dbg_init(musb, glue); |
9ecb8875 AKG |
465 | } |
466 | ||
467 | static int dsps_musb_exit(struct musb *musb) | |
468 | { | |
469 | struct device *dev = musb->controller; | |
db4a9320 | 470 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
9ecb8875 | 471 | |
97238b35 | 472 | del_timer_sync(&glue->timer); |
7557a57f | 473 | usb_phy_shutdown(musb->xceiv); |
bb90600d TL |
474 | phy_power_off(musb->phy); |
475 | phy_exit(musb->phy); | |
0fca91b8 DM |
476 | debugfs_remove_recursive(glue->dbgfs_root); |
477 | ||
9ecb8875 AKG |
478 | return 0; |
479 | } | |
480 | ||
943c1397 FB |
481 | static int dsps_musb_set_mode(struct musb *musb, u8 mode) |
482 | { | |
483 | struct device *dev = musb->controller; | |
484 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | |
485 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
486 | void __iomem *ctrl_base = musb->ctrl_base; | |
943c1397 FB |
487 | u32 reg; |
488 | ||
086b2882 | 489 | reg = musb_readl(ctrl_base, wrp->mode); |
943c1397 FB |
490 | |
491 | switch (mode) { | |
492 | case MUSB_HOST: | |
493 | reg &= ~(1 << wrp->iddig); | |
494 | ||
495 | /* | |
496 | * if we're setting mode to host-only or device-only, we're | |
497 | * going to ignore whatever the PHY sends us and just force | |
498 | * ID pin status by SW | |
499 | */ | |
500 | reg |= (1 << wrp->iddig_mux); | |
501 | ||
086b2882 BL |
502 | musb_writel(ctrl_base, wrp->mode, reg); |
503 | musb_writel(ctrl_base, wrp->phy_utmi, 0x02); | |
943c1397 FB |
504 | break; |
505 | case MUSB_PERIPHERAL: | |
506 | reg |= (1 << wrp->iddig); | |
507 | ||
508 | /* | |
509 | * if we're setting mode to host-only or device-only, we're | |
510 | * going to ignore whatever the PHY sends us and just force | |
511 | * ID pin status by SW | |
512 | */ | |
513 | reg |= (1 << wrp->iddig_mux); | |
514 | ||
086b2882 | 515 | musb_writel(ctrl_base, wrp->mode, reg); |
943c1397 FB |
516 | break; |
517 | case MUSB_OTG: | |
086b2882 | 518 | musb_writel(ctrl_base, wrp->phy_utmi, 0x02); |
943c1397 FB |
519 | break; |
520 | default: | |
521 | dev_err(glue->dev, "unsupported mode %d\n", mode); | |
522 | return -EINVAL; | |
523 | } | |
524 | ||
525 | return 0; | |
526 | } | |
527 | ||
3709ffca | 528 | static bool dsps_sw_babble_control(struct musb *musb) |
371254ce GC |
529 | { |
530 | u8 babble_ctl; | |
531 | bool session_restart = false; | |
532 | ||
086b2882 | 533 | babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); |
371254ce GC |
534 | dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n", |
535 | babble_ctl); | |
536 | /* | |
537 | * check line monitor flag to check whether babble is | |
538 | * due to noise | |
539 | */ | |
540 | dev_dbg(musb->controller, "STUCK_J is %s\n", | |
541 | babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); | |
542 | ||
543 | if (babble_ctl & MUSB_BABBLE_STUCK_J) { | |
544 | int timeout = 10; | |
545 | ||
546 | /* | |
547 | * babble is due to noise, then set transmit idle (d7 bit) | |
548 | * to resume normal operation | |
549 | */ | |
086b2882 | 550 | babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); |
371254ce | 551 | babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE; |
086b2882 | 552 | musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl); |
371254ce GC |
553 | |
554 | /* wait till line monitor flag cleared */ | |
555 | dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n"); | |
556 | do { | |
086b2882 | 557 | babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); |
371254ce GC |
558 | udelay(1); |
559 | } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--); | |
560 | ||
561 | /* check whether stuck_at_j bit cleared */ | |
562 | if (babble_ctl & MUSB_BABBLE_STUCK_J) { | |
563 | /* | |
564 | * real babble condition has occurred | |
565 | * restart the controller to start the | |
566 | * session again | |
567 | */ | |
568 | dev_dbg(musb->controller, "J not cleared, misc (%x)\n", | |
569 | babble_ctl); | |
570 | session_restart = true; | |
571 | } | |
572 | } else { | |
573 | session_restart = true; | |
574 | } | |
575 | ||
576 | return session_restart; | |
577 | } | |
578 | ||
b28a6432 | 579 | static int dsps_musb_recover(struct musb *musb) |
1d57de30 DM |
580 | { |
581 | struct device *dev = musb->controller; | |
582 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | |
011d0dd5 | 583 | int session_restart = 0; |
1d57de30 | 584 | |
371254ce | 585 | if (glue->sw_babble_enabled) |
3709ffca | 586 | session_restart = dsps_sw_babble_control(musb); |
011d0dd5 | 587 | else |
371254ce | 588 | session_restart = 1; |
1d57de30 | 589 | |
d0cddae7 | 590 | return session_restart ? 0 : -EPIPE; |
1d57de30 DM |
591 | } |
592 | ||
3e457371 TL |
593 | /* Similar to am35x, dm81xx support only 32-bit read operation */ |
594 | static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) | |
595 | { | |
596 | void __iomem *fifo = hw_ep->fifo; | |
597 | ||
598 | if (len >= 4) { | |
d30323f8 | 599 | ioread32_rep(fifo, dst, len >> 2); |
3e457371 TL |
600 | dst += len & ~0x03; |
601 | len &= 0x03; | |
602 | } | |
603 | ||
604 | /* Read any remaining 1 to 3 bytes */ | |
605 | if (len > 0) { | |
606 | u32 val = musb_readl(fifo, 0); | |
607 | memcpy(dst, &val, len); | |
608 | } | |
609 | } | |
610 | ||
9ecb8875 | 611 | static struct musb_platform_ops dsps_ops = { |
f8e9f34f | 612 | .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP, |
9ecb8875 AKG |
613 | .init = dsps_musb_init, |
614 | .exit = dsps_musb_exit, | |
615 | ||
7f6283ed TL |
616 | #ifdef CONFIG_USB_TI_CPPI41_DMA |
617 | .dma_init = cppi41_dma_controller_create, | |
618 | .dma_exit = cppi41_dma_controller_destroy, | |
619 | #endif | |
9ecb8875 AKG |
620 | .enable = dsps_musb_enable, |
621 | .disable = dsps_musb_disable, | |
622 | ||
623 | .try_idle = dsps_musb_try_idle, | |
943c1397 | 624 | .set_mode = dsps_musb_set_mode, |
b28a6432 | 625 | .recover = dsps_musb_recover, |
9ecb8875 AKG |
626 | }; |
627 | ||
628 | static u64 musb_dmamask = DMA_BIT_MASK(32); | |
629 | ||
97238b35 | 630 | static int get_int_prop(struct device_node *dn, const char *s) |
9ecb8875 | 631 | { |
97238b35 SAS |
632 | int ret; |
633 | u32 val; | |
634 | ||
635 | ret = of_property_read_u32(dn, s, &val); | |
636 | if (ret) | |
637 | return 0; | |
638 | return val; | |
639 | } | |
640 | ||
c031a7d4 SAS |
641 | static int get_musb_port_mode(struct device *dev) |
642 | { | |
643 | enum usb_dr_mode mode; | |
644 | ||
06e7114f | 645 | mode = usb_get_dr_mode(dev); |
c031a7d4 SAS |
646 | switch (mode) { |
647 | case USB_DR_MODE_HOST: | |
648 | return MUSB_PORT_MODE_HOST; | |
649 | ||
650 | case USB_DR_MODE_PERIPHERAL: | |
651 | return MUSB_PORT_MODE_GADGET; | |
652 | ||
653 | case USB_DR_MODE_UNKNOWN: | |
654 | case USB_DR_MODE_OTG: | |
655 | default: | |
656 | return MUSB_PORT_MODE_DUAL_ROLE; | |
2b84f92b | 657 | } |
c031a7d4 SAS |
658 | } |
659 | ||
97238b35 SAS |
660 | static int dsps_create_musb_pdev(struct dsps_glue *glue, |
661 | struct platform_device *parent) | |
662 | { | |
663 | struct musb_hdrc_platform_data pdata; | |
9ecb8875 | 664 | struct resource resources[2]; |
c031a7d4 | 665 | struct resource *res; |
97238b35 SAS |
666 | struct device *dev = &parent->dev; |
667 | struct musb_hdrc_config *config; | |
668 | struct platform_device *musb; | |
669 | struct device_node *dn = parent->dev.of_node; | |
606bf4d5 | 670 | int ret, val; |
9ecb8875 | 671 | |
97238b35 | 672 | memset(resources, 0, sizeof(resources)); |
c031a7d4 SAS |
673 | res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); |
674 | if (!res) { | |
97238b35 | 675 | dev_err(dev, "failed to get memory.\n"); |
c031a7d4 | 676 | return -EINVAL; |
9ecb8875 | 677 | } |
c031a7d4 | 678 | resources[0] = *res; |
97238b35 | 679 | |
c031a7d4 SAS |
680 | res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); |
681 | if (!res) { | |
97238b35 | 682 | dev_err(dev, "failed to get irq.\n"); |
c031a7d4 | 683 | return -EINVAL; |
9ecb8875 | 684 | } |
c031a7d4 | 685 | resources[1] = *res; |
9ecb8875 AKG |
686 | |
687 | /* allocate the child platform device */ | |
2f771164 | 688 | musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); |
9ecb8875 AKG |
689 | if (!musb) { |
690 | dev_err(dev, "failed to allocate musb device\n"); | |
97238b35 | 691 | return -ENOMEM; |
9ecb8875 AKG |
692 | } |
693 | ||
694 | musb->dev.parent = dev; | |
695 | musb->dev.dma_mask = &musb_dmamask; | |
696 | musb->dev.coherent_dma_mask = musb_dmamask; | |
697 | ||
97238b35 | 698 | glue->musb = musb; |
9ecb8875 | 699 | |
97238b35 SAS |
700 | ret = platform_device_add_resources(musb, resources, |
701 | ARRAY_SIZE(resources)); | |
9ecb8875 AKG |
702 | if (ret) { |
703 | dev_err(dev, "failed to add resources\n"); | |
97238b35 | 704 | goto err; |
9ecb8875 AKG |
705 | } |
706 | ||
97238b35 SAS |
707 | config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); |
708 | if (!config) { | |
97238b35 SAS |
709 | ret = -ENOMEM; |
710 | goto err; | |
65145677 | 711 | } |
97238b35 SAS |
712 | pdata.config = config; |
713 | pdata.platform_ops = &dsps_ops; | |
65145677 | 714 | |
c031a7d4 SAS |
715 | config->num_eps = get_int_prop(dn, "mentor,num-eps"); |
716 | config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); | |
869c5978 | 717 | config->host_port_deassert_reset_at_resume = 1; |
c031a7d4 SAS |
718 | pdata.mode = get_musb_port_mode(dev); |
719 | /* DT keeps this entry in mA, musb expects it as per USB spec */ | |
720 | pdata.power = get_int_prop(dn, "mentor,power") / 2; | |
606bf4d5 TL |
721 | |
722 | ret = of_property_read_u32(dn, "mentor,multipoint", &val); | |
723 | if (!ret && val) | |
724 | config->multipoint = true; | |
65145677 | 725 | |
63863b98 | 726 | config->maximum_speed = usb_get_maximum_speed(&parent->dev); |
41932b9b BL |
727 | switch (config->maximum_speed) { |
728 | case USB_SPEED_LOW: | |
729 | case USB_SPEED_FULL: | |
730 | break; | |
731 | case USB_SPEED_SUPER: | |
732 | dev_warn(dev, "ignore incorrect maximum_speed " | |
733 | "(super-speed) setting in dts"); | |
734 | /* fall through */ | |
735 | default: | |
736 | config->maximum_speed = USB_SPEED_HIGH; | |
737 | } | |
738 | ||
97238b35 | 739 | ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); |
9ecb8875 AKG |
740 | if (ret) { |
741 | dev_err(dev, "failed to add platform_data\n"); | |
97238b35 | 742 | goto err; |
9ecb8875 AKG |
743 | } |
744 | ||
745 | ret = platform_device_add(musb); | |
746 | if (ret) { | |
747 | dev_err(dev, "failed to register musb device\n"); | |
97238b35 | 748 | goto err; |
9ecb8875 | 749 | } |
9ecb8875 AKG |
750 | return 0; |
751 | ||
97238b35 | 752 | err: |
9ecb8875 | 753 | platform_device_put(musb); |
9ecb8875 AKG |
754 | return ret; |
755 | } | |
756 | ||
41ac7b3a | 757 | static int dsps_probe(struct platform_device *pdev) |
9ecb8875 | 758 | { |
65145677 AKG |
759 | const struct of_device_id *match; |
760 | const struct dsps_musb_wrapper *wrp; | |
9ecb8875 | 761 | struct dsps_glue *glue; |
97238b35 | 762 | int ret; |
9ecb8875 | 763 | |
4fc4b274 SAS |
764 | if (!strcmp(pdev->name, "musb-hdrc")) |
765 | return -ENODEV; | |
766 | ||
cc506036 | 767 | match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); |
65145677 AKG |
768 | if (!match) { |
769 | dev_err(&pdev->dev, "fail to get matching of_match struct\n"); | |
97238b35 | 770 | return -EINVAL; |
65145677 AKG |
771 | } |
772 | wrp = match->data; | |
9ecb8875 | 773 | |
3e457371 TL |
774 | if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816")) |
775 | dsps_ops.read_fifo = dsps_read_fifo32; | |
776 | ||
9ecb8875 | 777 | /* allocate glue */ |
de9db572 | 778 | glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); |
0816ea2f | 779 | if (!glue) |
97238b35 | 780 | return -ENOMEM; |
9ecb8875 AKG |
781 | |
782 | glue->dev = &pdev->dev; | |
97238b35 | 783 | glue->wrp = wrp; |
9ecb8875 | 784 | |
9ecb8875 | 785 | platform_set_drvdata(pdev, glue); |
9ecb8875 AKG |
786 | pm_runtime_enable(&pdev->dev); |
787 | ||
788 | ret = pm_runtime_get_sync(&pdev->dev); | |
789 | if (ret < 0) { | |
790 | dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); | |
0e38c4ed AKG |
791 | goto err2; |
792 | } | |
793 | ||
97238b35 SAS |
794 | ret = dsps_create_musb_pdev(glue, pdev); |
795 | if (ret) | |
796 | goto err3; | |
9ecb8875 AKG |
797 | |
798 | return 0; | |
799 | ||
800 | err3: | |
0e38c4ed | 801 | pm_runtime_put(&pdev->dev); |
9ecb8875 | 802 | err2: |
0e38c4ed | 803 | pm_runtime_disable(&pdev->dev); |
9ecb8875 AKG |
804 | return ret; |
805 | } | |
97238b35 | 806 | |
fb4e98ab | 807 | static int dsps_remove(struct platform_device *pdev) |
9ecb8875 AKG |
808 | { |
809 | struct dsps_glue *glue = platform_get_drvdata(pdev); | |
810 | ||
97238b35 | 811 | platform_device_unregister(glue->musb); |
9ecb8875 AKG |
812 | |
813 | /* disable usbss clocks */ | |
814 | pm_runtime_put(&pdev->dev); | |
815 | pm_runtime_disable(&pdev->dev); | |
40f099e3 | 816 | |
9ecb8875 AKG |
817 | return 0; |
818 | } | |
819 | ||
fa7b4ca5 | 820 | static const struct dsps_musb_wrapper am33xx_driver_data = { |
9ecb8875 AKG |
821 | .revision = 0x00, |
822 | .control = 0x14, | |
823 | .status = 0x18, | |
9ecb8875 AKG |
824 | .epintr_set = 0x38, |
825 | .epintr_clear = 0x40, | |
826 | .epintr_status = 0x30, | |
827 | .coreintr_set = 0x3c, | |
828 | .coreintr_clear = 0x44, | |
829 | .coreintr_status = 0x34, | |
830 | .phy_utmi = 0xe0, | |
831 | .mode = 0xe8, | |
b991f9b7 DM |
832 | .tx_mode = 0x70, |
833 | .rx_mode = 0x74, | |
9ecb8875 AKG |
834 | .reset = 0, |
835 | .otg_disable = 21, | |
836 | .iddig = 8, | |
943c1397 | 837 | .iddig_mux = 7, |
9ecb8875 AKG |
838 | .usb_shift = 0, |
839 | .usb_mask = 0x1ff, | |
840 | .usb_bitmap = (0x1ff << 0), | |
841 | .drvvbus = 8, | |
842 | .txep_shift = 0, | |
843 | .txep_mask = 0xffff, | |
844 | .txep_bitmap = (0xffff << 0), | |
845 | .rxep_shift = 16, | |
846 | .rxep_mask = 0xfffe, | |
847 | .rxep_bitmap = (0xfffe << 16), | |
9e204d88 | 848 | .poll_timeout = 2000, /* ms */ |
9ecb8875 AKG |
849 | }; |
850 | ||
2f82686e | 851 | static const struct of_device_id musb_dsps_of_match[] = { |
65145677 | 852 | { .compatible = "ti,musb-am33xx", |
3e457371 TL |
853 | .data = &am33xx_driver_data, }, |
854 | { .compatible = "ti,musb-dm816", | |
855 | .data = &am33xx_driver_data, }, | |
9ecb8875 AKG |
856 | { }, |
857 | }; | |
858 | MODULE_DEVICE_TABLE(of, musb_dsps_of_match); | |
859 | ||
5b783983 | 860 | #ifdef CONFIG_PM_SLEEP |
869c5978 DM |
861 | static int dsps_suspend(struct device *dev) |
862 | { | |
863 | struct dsps_glue *glue = dev_get_drvdata(dev); | |
864 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
865 | struct musb *musb = platform_get_drvdata(glue->musb); | |
f042e9cb | 866 | void __iomem *mbase; |
869c5978 | 867 | |
468bcc2a | 868 | del_timer_sync(&glue->timer); |
f042e9cb SAS |
869 | |
870 | if (!musb) | |
871 | /* This can happen if the musb device is in -EPROBE_DEFER */ | |
872 | return 0; | |
873 | ||
874 | mbase = musb->ctrl_base; | |
086b2882 BL |
875 | glue->context.control = musb_readl(mbase, wrp->control); |
876 | glue->context.epintr = musb_readl(mbase, wrp->epintr_set); | |
877 | glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set); | |
878 | glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi); | |
879 | glue->context.mode = musb_readl(mbase, wrp->mode); | |
880 | glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode); | |
881 | glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode); | |
869c5978 DM |
882 | |
883 | return 0; | |
884 | } | |
885 | ||
886 | static int dsps_resume(struct device *dev) | |
887 | { | |
888 | struct dsps_glue *glue = dev_get_drvdata(dev); | |
889 | const struct dsps_musb_wrapper *wrp = glue->wrp; | |
890 | struct musb *musb = platform_get_drvdata(glue->musb); | |
f042e9cb SAS |
891 | void __iomem *mbase; |
892 | ||
893 | if (!musb) | |
894 | return 0; | |
869c5978 | 895 | |
f042e9cb | 896 | mbase = musb->ctrl_base; |
086b2882 BL |
897 | musb_writel(mbase, wrp->control, glue->context.control); |
898 | musb_writel(mbase, wrp->epintr_set, glue->context.epintr); | |
899 | musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr); | |
900 | musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); | |
901 | musb_writel(mbase, wrp->mode, glue->context.mode); | |
902 | musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode); | |
903 | musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode); | |
e47d9254 | 904 | if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && |
53185b3a | 905 | musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) |
9e204d88 FB |
906 | mod_timer(&glue->timer, jiffies + |
907 | msecs_to_jiffies(wrp->poll_timeout)); | |
869c5978 DM |
908 | |
909 | return 0; | |
910 | } | |
911 | #endif | |
912 | ||
913 | static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); | |
914 | ||
9ecb8875 AKG |
915 | static struct platform_driver dsps_usbss_driver = { |
916 | .probe = dsps_probe, | |
7690417d | 917 | .remove = dsps_remove, |
9ecb8875 AKG |
918 | .driver = { |
919 | .name = "musb-dsps", | |
869c5978 | 920 | .pm = &dsps_pm_ops, |
b432cb83 | 921 | .of_match_table = musb_dsps_of_match, |
9ecb8875 | 922 | }, |
9ecb8875 AKG |
923 | }; |
924 | ||
925 | MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); | |
926 | MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); | |
927 | MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); | |
928 | MODULE_LICENSE("GPL v2"); | |
929 | ||
97238b35 | 930 | module_platform_driver(dsps_usbss_driver); |