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CommitLineData
9ecb8875
AKG
1/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
9ecb8875 32#include <linux/io.h>
ded017ee 33#include <linux/err.h>
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AKG
34#include <linux/platform_device.h>
35#include <linux/dma-mapping.h>
36#include <linux/pm_runtime.h>
37#include <linux/module.h>
d7078df6 38#include <linux/usb/usb_phy_generic.h>
e8c4a7ac 39#include <linux/platform_data/usb-omap.h>
0f53e481 40#include <linux/sizes.h>
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41
42#include <linux/of.h>
43#include <linux/of_device.h>
44#include <linux/of_address.h>
97238b35 45#include <linux/of_irq.h>
c031a7d4 46#include <linux/usb/of.h>
9ecb8875 47
40f099e3
MP
48#include <linux/debugfs.h>
49
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AKG
50#include "musb_core.h"
51
65145677 52static const struct of_device_id musb_dsps_of_match[];
65145677 53
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AKG
54/**
55 * DSPS musb wrapper register offset.
56 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
57 * musb ips.
58 */
59struct dsps_musb_wrapper {
60 u16 revision;
61 u16 control;
62 u16 status;
9ecb8875
AKG
63 u16 epintr_set;
64 u16 epintr_clear;
65 u16 epintr_status;
66 u16 coreintr_set;
67 u16 coreintr_clear;
68 u16 coreintr_status;
69 u16 phy_utmi;
70 u16 mode;
b991f9b7
DM
71 u16 tx_mode;
72 u16 rx_mode;
9ecb8875
AKG
73
74 /* bit positions for control */
75 unsigned reset:5;
76
77 /* bit positions for interrupt */
78 unsigned usb_shift:5;
79 u32 usb_mask;
80 u32 usb_bitmap;
81 unsigned drvvbus:5;
82
83 unsigned txep_shift:5;
84 u32 txep_mask;
85 u32 txep_bitmap;
86
87 unsigned rxep_shift:5;
88 u32 rxep_mask;
89 u32 rxep_bitmap;
90
91 /* bit positions for phy_utmi */
92 unsigned otg_disable:5;
93
94 /* bit positions for mode */
95 unsigned iddig:5;
943c1397 96 unsigned iddig_mux:5;
9ecb8875 97 /* miscellaneous stuff */
9e204d88 98 unsigned poll_timeout;
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AKG
99};
100
869c5978
DM
101/*
102 * register shadow for suspend
103 */
104struct dsps_context {
105 u32 control;
106 u32 epintr;
107 u32 coreintr;
108 u32 phy_utmi;
109 u32 mode;
110 u32 tx_mode;
111 u32 rx_mode;
112};
113
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AKG
114/**
115 * DSPS glue structure.
116 */
117struct dsps_glue {
118 struct device *dev;
97238b35 119 struct platform_device *musb; /* child musb pdev */
9ecb8875 120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
97238b35
SAS
121 struct timer_list timer; /* otg_workaround timer */
122 unsigned long last_timer; /* last timer data for each instance */
371254ce 123 bool sw_babble_enabled;
869c5978
DM
124
125 struct dsps_context context;
40f099e3
MP
126 struct debugfs_regset32 regset;
127 struct dentry *dbgfs_root;
128};
129
130static const struct debugfs_reg32 dsps_musb_regs[] = {
131 { "revision", 0x00 },
132 { "control", 0x14 },
133 { "status", 0x18 },
134 { "eoi", 0x24 },
135 { "intr0_stat", 0x30 },
136 { "intr1_stat", 0x34 },
137 { "intr0_set", 0x38 },
138 { "intr1_set", 0x3c },
139 { "txmode", 0x70 },
140 { "rxmode", 0x74 },
141 { "autoreq", 0xd0 },
142 { "srpfixtime", 0xd4 },
143 { "tdown", 0xd8 },
144 { "phy_utmi", 0xe0 },
145 { "mode", 0xe8 },
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AKG
146};
147
148/**
149 * dsps_musb_enable - enable interrupts
150 */
151static void dsps_musb_enable(struct musb *musb)
152{
153 struct device *dev = musb->controller;
154 struct platform_device *pdev = to_platform_device(dev->parent);
155 struct dsps_glue *glue = platform_get_drvdata(pdev);
156 const struct dsps_musb_wrapper *wrp = glue->wrp;
157 void __iomem *reg_base = musb->ctrl_base;
158 u32 epmask, coremask;
159
160 /* Workaround: setup IRQs through both register sets. */
161 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
162 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
163 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
164
086b2882
BL
165 musb_writel(reg_base, wrp->epintr_set, epmask);
166 musb_writel(reg_base, wrp->coreintr_set, coremask);
b8239dcc
BL
167 /* start polling for ID change in dual-role idle mode */
168 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
169 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
170 mod_timer(&glue->timer, jiffies +
171 msecs_to_jiffies(wrp->poll_timeout));
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172}
173
174/**
175 * dsps_musb_disable - disable HDRC and flush interrupts
176 */
177static void dsps_musb_disable(struct musb *musb)
178{
179 struct device *dev = musb->controller;
180 struct platform_device *pdev = to_platform_device(dev->parent);
181 struct dsps_glue *glue = platform_get_drvdata(pdev);
182 const struct dsps_musb_wrapper *wrp = glue->wrp;
183 void __iomem *reg_base = musb->ctrl_base;
184
086b2882
BL
185 musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
186 musb_writel(reg_base, wrp->epintr_clear,
9ecb8875 187 wrp->txep_bitmap | wrp->rxep_bitmap);
ea2f35c0 188 del_timer_sync(&glue->timer);
086b2882 189 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
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AKG
190}
191
ea2f35c0
TL
192/* Caller must take musb->lock */
193static int dsps_check_status(struct musb *musb, void *unused)
9ecb8875 194{
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195 void __iomem *mregs = musb->mregs;
196 struct device *dev = musb->controller;
db4a9320 197 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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198 const struct dsps_musb_wrapper *wrp = glue->wrp;
199 u8 devctl;
0f901c98 200 int skip_session = 0;
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201
202 /*
203 * We poll because DSPS IP's won't expose several OTG-critical
204 * status change events (from the transceiver) otherwise.
205 */
086b2882 206 devctl = musb_readb(mregs, MUSB_DEVCTL);
9ecb8875 207 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
e47d9254 208 usb_otg_state_string(musb->xceiv->otg->state));
9ecb8875 209
e47d9254 210 switch (musb->xceiv->otg->state) {
2f3fd2c5
TL
211 case OTG_STATE_A_WAIT_VRISE:
212 mod_timer(&glue->timer, jiffies +
213 msecs_to_jiffies(wrp->poll_timeout));
214 break;
9ecb8875 215 case OTG_STATE_A_WAIT_BCON:
086b2882 216 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
0f901c98
SAS
217 skip_session = 1;
218 /* fall */
9ecb8875 219
0f901c98
SAS
220 case OTG_STATE_A_IDLE:
221 case OTG_STATE_B_IDLE:
9ecb8875 222 if (devctl & MUSB_DEVCTL_BDEVICE) {
e47d9254 223 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
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224 MUSB_DEV_MODE(musb);
225 } else {
e47d9254 226 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
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227 MUSB_HST_MODE(musb);
228 }
0f901c98 229 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
086b2882 230 musb_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
9e204d88
FB
231 mod_timer(&glue->timer, jiffies +
232 msecs_to_jiffies(wrp->poll_timeout));
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AKG
233 break;
234 case OTG_STATE_A_WAIT_VFALL:
e47d9254 235 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
086b2882 236 musb_writel(musb->ctrl_base, wrp->coreintr_set,
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AKG
237 MUSB_INTR_VBUSERROR << wrp->usb_shift);
238 break;
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AKG
239 default:
240 break;
241 }
65b3f50e 242
ea2f35c0
TL
243 return 0;
244}
245
246static void otg_timer(unsigned long _musb)
247{
248 struct musb *musb = (void *)_musb;
249 struct device *dev = musb->controller;
250 unsigned long flags;
251 int err;
252
253 err = pm_runtime_get(dev);
254 if ((err != -EINPROGRESS) && err < 0) {
255 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err);
256 pm_runtime_put_noidle(dev);
257
258 return;
259 }
260
261 spin_lock_irqsave(&musb->lock, flags);
262 err = musb_queue_resume_work(musb, dsps_check_status, NULL);
263 if (err < 0)
264 dev_err(dev, "%s resume work: %i\n", __func__, err);
265 spin_unlock_irqrestore(&musb->lock, flags);
65b3f50e
TL
266 pm_runtime_mark_last_busy(dev);
267 pm_runtime_put_autosuspend(dev);
9ecb8875
AKG
268}
269
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AKG
270static irqreturn_t dsps_interrupt(int irq, void *hci)
271{
272 struct musb *musb = hci;
273 void __iomem *reg_base = musb->ctrl_base;
274 struct device *dev = musb->controller;
db4a9320 275 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
9ecb8875
AKG
276 const struct dsps_musb_wrapper *wrp = glue->wrp;
277 unsigned long flags;
278 irqreturn_t ret = IRQ_NONE;
279 u32 epintr, usbintr;
280
281 spin_lock_irqsave(&musb->lock, flags);
282
283 /* Get endpoint interrupts */
086b2882 284 epintr = musb_readl(reg_base, wrp->epintr_status);
9ecb8875
AKG
285 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
286 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
287
288 if (epintr)
086b2882 289 musb_writel(reg_base, wrp->epintr_status, epintr);
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AKG
290
291 /* Get usb core interrupts */
086b2882 292 usbintr = musb_readl(reg_base, wrp->coreintr_status);
9ecb8875 293 if (!usbintr && !epintr)
9be73bae 294 goto out;
9ecb8875
AKG
295
296 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
297 if (usbintr)
086b2882 298 musb_writel(reg_base, wrp->coreintr_status, usbintr);
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AKG
299
300 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
301 usbintr, epintr);
1d57de30 302
9ecb8875 303 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
086b2882 304 int drvvbus = musb_readl(reg_base, wrp->status);
9ecb8875 305 void __iomem *mregs = musb->mregs;
086b2882 306 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
9ecb8875
AKG
307 int err;
308
032ec49f 309 err = musb->int_usb & MUSB_INTR_VBUSERROR;
9ecb8875
AKG
310 if (err) {
311 /*
312 * The Mentor core doesn't debounce VBUS as needed
313 * to cope with device connect current spikes. This
314 * means it's not uncommon for bus-powered devices
315 * to get VBUS errors during enumeration.
316 *
317 * This is a workaround, but newer RTL from Mentor
318 * seems to allow a better one: "re"-starting sessions
319 * without waiting for VBUS to stop registering in
320 * devctl.
321 */
322 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
e47d9254 323 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
9e204d88
FB
324 mod_timer(&glue->timer, jiffies +
325 msecs_to_jiffies(wrp->poll_timeout));
9ecb8875 326 WARNING("VBUS error workaround (delay coming)\n");
032ec49f 327 } else if (drvvbus) {
9ecb8875
AKG
328 MUSB_HST_MODE(musb);
329 musb->xceiv->otg->default_a = 1;
e47d9254 330 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
2f3fd2c5
TL
331 mod_timer(&glue->timer, jiffies +
332 msecs_to_jiffies(wrp->poll_timeout));
9ecb8875
AKG
333 } else {
334 musb->is_active = 0;
335 MUSB_DEV_MODE(musb);
336 musb->xceiv->otg->default_a = 0;
e47d9254 337 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
9ecb8875
AKG
338 }
339
340 /* NOTE: this must complete power-on within 100 ms. */
341 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
342 drvvbus ? "on" : "off",
e47d9254 343 usb_otg_state_string(musb->xceiv->otg->state),
9ecb8875
AKG
344 err ? " ERROR" : "",
345 devctl);
346 ret = IRQ_HANDLED;
347 }
348
349 if (musb->int_tx || musb->int_rx || musb->int_usb)
350 ret |= musb_interrupt(musb);
351
2f3fd2c5
TL
352 /* Poll for ID change and connect */
353 switch (musb->xceiv->otg->state) {
354 case OTG_STATE_B_IDLE:
355 case OTG_STATE_A_WAIT_BCON:
9e204d88
FB
356 mod_timer(&glue->timer, jiffies +
357 msecs_to_jiffies(wrp->poll_timeout));
2f3fd2c5
TL
358 break;
359 default:
360 break;
361 }
362
9be73bae 363out:
9ecb8875
AKG
364 spin_unlock_irqrestore(&musb->lock, flags);
365
366 return ret;
367}
368
40f099e3
MP
369static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
370{
371 struct dentry *root;
372 struct dentry *file;
373 char buf[128];
374
375 sprintf(buf, "%s.dsps", dev_name(musb->controller));
376 root = debugfs_create_dir(buf, NULL);
377 if (!root)
378 return -ENOMEM;
379 glue->dbgfs_root = root;
380
381 glue->regset.regs = dsps_musb_regs;
382 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
383 glue->regset.base = musb->ctrl_base;
384
385 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
386 if (!file) {
387 debugfs_remove_recursive(root);
388 return -ENOMEM;
389 }
390 return 0;
391}
392
9ecb8875
AKG
393static int dsps_musb_init(struct musb *musb)
394{
395 struct device *dev = musb->controller;
db4a9320 396 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
97238b35 397 struct platform_device *parent = to_platform_device(dev->parent);
9ecb8875 398 const struct dsps_musb_wrapper *wrp = glue->wrp;
97238b35
SAS
399 void __iomem *reg_base;
400 struct resource *r;
9ecb8875 401 u32 rev, val;
40f099e3 402 int ret;
9ecb8875 403
97238b35 404 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
97238b35 405 reg_base = devm_ioremap_resource(dev, r);
51ef74f6
JL
406 if (IS_ERR(reg_base))
407 return PTR_ERR(reg_base);
97238b35 408 musb->ctrl_base = reg_base;
9ecb8875 409
d7554226 410 /* NOP driver needs change if supporting dual instance */
983f3cab 411 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
97238b35
SAS
412 if (IS_ERR(musb->xceiv))
413 return PTR_ERR(musb->xceiv);
9ecb8875 414
bb90600d
TL
415 musb->phy = devm_phy_get(dev->parent, "usb2-phy");
416
9ecb8875 417 /* Returns zero if e.g. not clocked */
086b2882 418 rev = musb_readl(reg_base, wrp->revision);
97238b35
SAS
419 if (!rev)
420 return -ENODEV;
9ecb8875 421
7557a57f 422 usb_phy_init(musb->xceiv);
bb90600d
TL
423 if (IS_ERR(musb->phy)) {
424 musb->phy = NULL;
425 } else {
426 ret = phy_init(musb->phy);
427 if (ret < 0)
428 return ret;
429 ret = phy_power_on(musb->phy);
430 if (ret) {
431 phy_exit(musb->phy);
432 return ret;
433 }
434 }
435
97238b35 436 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
9ecb8875
AKG
437
438 /* Reset the musb */
086b2882 439 musb_writel(reg_base, wrp->control, (1 << wrp->reset));
9ecb8875 440
9ecb8875
AKG
441 musb->isr = dsps_interrupt;
442
443 /* reset the otgdisable bit, needed for host mode to work */
086b2882 444 val = musb_readl(reg_base, wrp->phy_utmi);
9ecb8875 445 val &= ~(1 << wrp->otg_disable);
086b2882 446 musb_writel(musb->ctrl_base, wrp->phy_utmi, val);
9ecb8875 447
371254ce
GC
448 /*
449 * Check whether the dsps version has babble control enabled.
450 * In latest silicon revision the babble control logic is enabled.
451 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
452 * logic enabled.
453 */
086b2882 454 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
f860f0b1 455 if (val & MUSB_BABBLE_RCV_DISABLE) {
371254ce
GC
456 glue->sw_babble_enabled = true;
457 val |= MUSB_BABBLE_SW_SESSION_CTRL;
086b2882 458 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
371254ce
GC
459 }
460
2f3fd2c5
TL
461 mod_timer(&glue->timer, jiffies +
462 msecs_to_jiffies(glue->wrp->poll_timeout));
463
e94a7369 464 return dsps_musb_dbg_init(musb, glue);
9ecb8875
AKG
465}
466
467static int dsps_musb_exit(struct musb *musb)
468{
469 struct device *dev = musb->controller;
db4a9320 470 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
9ecb8875 471
97238b35 472 del_timer_sync(&glue->timer);
7557a57f 473 usb_phy_shutdown(musb->xceiv);
bb90600d
TL
474 phy_power_off(musb->phy);
475 phy_exit(musb->phy);
0fca91b8
DM
476 debugfs_remove_recursive(glue->dbgfs_root);
477
9ecb8875
AKG
478 return 0;
479}
480
943c1397
FB
481static int dsps_musb_set_mode(struct musb *musb, u8 mode)
482{
483 struct device *dev = musb->controller;
484 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
485 const struct dsps_musb_wrapper *wrp = glue->wrp;
486 void __iomem *ctrl_base = musb->ctrl_base;
943c1397
FB
487 u32 reg;
488
086b2882 489 reg = musb_readl(ctrl_base, wrp->mode);
943c1397
FB
490
491 switch (mode) {
492 case MUSB_HOST:
493 reg &= ~(1 << wrp->iddig);
494
495 /*
496 * if we're setting mode to host-only or device-only, we're
497 * going to ignore whatever the PHY sends us and just force
498 * ID pin status by SW
499 */
500 reg |= (1 << wrp->iddig_mux);
501
086b2882
BL
502 musb_writel(ctrl_base, wrp->mode, reg);
503 musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
943c1397
FB
504 break;
505 case MUSB_PERIPHERAL:
506 reg |= (1 << wrp->iddig);
507
508 /*
509 * if we're setting mode to host-only or device-only, we're
510 * going to ignore whatever the PHY sends us and just force
511 * ID pin status by SW
512 */
513 reg |= (1 << wrp->iddig_mux);
514
086b2882 515 musb_writel(ctrl_base, wrp->mode, reg);
943c1397
FB
516 break;
517 case MUSB_OTG:
086b2882 518 musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
943c1397
FB
519 break;
520 default:
521 dev_err(glue->dev, "unsupported mode %d\n", mode);
522 return -EINVAL;
523 }
524
525 return 0;
526}
527
3709ffca 528static bool dsps_sw_babble_control(struct musb *musb)
371254ce
GC
529{
530 u8 babble_ctl;
531 bool session_restart = false;
532
086b2882 533 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
371254ce
GC
534 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
535 babble_ctl);
536 /*
537 * check line monitor flag to check whether babble is
538 * due to noise
539 */
540 dev_dbg(musb->controller, "STUCK_J is %s\n",
541 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
542
543 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
544 int timeout = 10;
545
546 /*
547 * babble is due to noise, then set transmit idle (d7 bit)
548 * to resume normal operation
549 */
086b2882 550 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
371254ce 551 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
086b2882 552 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
371254ce
GC
553
554 /* wait till line monitor flag cleared */
555 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
556 do {
086b2882 557 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
371254ce
GC
558 udelay(1);
559 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
560
561 /* check whether stuck_at_j bit cleared */
562 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
563 /*
564 * real babble condition has occurred
565 * restart the controller to start the
566 * session again
567 */
568 dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
569 babble_ctl);
570 session_restart = true;
571 }
572 } else {
573 session_restart = true;
574 }
575
576 return session_restart;
577}
578
b28a6432 579static int dsps_musb_recover(struct musb *musb)
1d57de30
DM
580{
581 struct device *dev = musb->controller;
582 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
011d0dd5 583 int session_restart = 0;
1d57de30 584
371254ce 585 if (glue->sw_babble_enabled)
3709ffca 586 session_restart = dsps_sw_babble_control(musb);
011d0dd5 587 else
371254ce 588 session_restart = 1;
1d57de30 589
d0cddae7 590 return session_restart ? 0 : -EPIPE;
1d57de30
DM
591}
592
3e457371
TL
593/* Similar to am35x, dm81xx support only 32-bit read operation */
594static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
595{
596 void __iomem *fifo = hw_ep->fifo;
597
598 if (len >= 4) {
d30323f8 599 ioread32_rep(fifo, dst, len >> 2);
3e457371
TL
600 dst += len & ~0x03;
601 len &= 0x03;
602 }
603
604 /* Read any remaining 1 to 3 bytes */
605 if (len > 0) {
606 u32 val = musb_readl(fifo, 0);
607 memcpy(dst, &val, len);
608 }
609}
610
9ecb8875 611static struct musb_platform_ops dsps_ops = {
f8e9f34f 612 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
9ecb8875
AKG
613 .init = dsps_musb_init,
614 .exit = dsps_musb_exit,
615
7f6283ed
TL
616#ifdef CONFIG_USB_TI_CPPI41_DMA
617 .dma_init = cppi41_dma_controller_create,
618 .dma_exit = cppi41_dma_controller_destroy,
619#endif
9ecb8875
AKG
620 .enable = dsps_musb_enable,
621 .disable = dsps_musb_disable,
622
943c1397 623 .set_mode = dsps_musb_set_mode,
b28a6432 624 .recover = dsps_musb_recover,
9ecb8875
AKG
625};
626
627static u64 musb_dmamask = DMA_BIT_MASK(32);
628
97238b35 629static int get_int_prop(struct device_node *dn, const char *s)
9ecb8875 630{
97238b35
SAS
631 int ret;
632 u32 val;
633
634 ret = of_property_read_u32(dn, s, &val);
635 if (ret)
636 return 0;
637 return val;
638}
639
c031a7d4
SAS
640static int get_musb_port_mode(struct device *dev)
641{
642 enum usb_dr_mode mode;
643
06e7114f 644 mode = usb_get_dr_mode(dev);
c031a7d4
SAS
645 switch (mode) {
646 case USB_DR_MODE_HOST:
647 return MUSB_PORT_MODE_HOST;
648
649 case USB_DR_MODE_PERIPHERAL:
650 return MUSB_PORT_MODE_GADGET;
651
652 case USB_DR_MODE_UNKNOWN:
653 case USB_DR_MODE_OTG:
654 default:
655 return MUSB_PORT_MODE_DUAL_ROLE;
2b84f92b 656 }
c031a7d4
SAS
657}
658
97238b35
SAS
659static int dsps_create_musb_pdev(struct dsps_glue *glue,
660 struct platform_device *parent)
661{
662 struct musb_hdrc_platform_data pdata;
9ecb8875 663 struct resource resources[2];
c031a7d4 664 struct resource *res;
97238b35
SAS
665 struct device *dev = &parent->dev;
666 struct musb_hdrc_config *config;
667 struct platform_device *musb;
668 struct device_node *dn = parent->dev.of_node;
606bf4d5 669 int ret, val;
9ecb8875 670
97238b35 671 memset(resources, 0, sizeof(resources));
c031a7d4
SAS
672 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
673 if (!res) {
97238b35 674 dev_err(dev, "failed to get memory.\n");
c031a7d4 675 return -EINVAL;
9ecb8875 676 }
c031a7d4 677 resources[0] = *res;
97238b35 678
c031a7d4
SAS
679 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
680 if (!res) {
97238b35 681 dev_err(dev, "failed to get irq.\n");
c031a7d4 682 return -EINVAL;
9ecb8875 683 }
c031a7d4 684 resources[1] = *res;
9ecb8875
AKG
685
686 /* allocate the child platform device */
2f771164 687 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
9ecb8875
AKG
688 if (!musb) {
689 dev_err(dev, "failed to allocate musb device\n");
97238b35 690 return -ENOMEM;
9ecb8875
AKG
691 }
692
693 musb->dev.parent = dev;
694 musb->dev.dma_mask = &musb_dmamask;
695 musb->dev.coherent_dma_mask = musb_dmamask;
696
97238b35 697 glue->musb = musb;
9ecb8875 698
97238b35
SAS
699 ret = platform_device_add_resources(musb, resources,
700 ARRAY_SIZE(resources));
9ecb8875
AKG
701 if (ret) {
702 dev_err(dev, "failed to add resources\n");
97238b35 703 goto err;
9ecb8875
AKG
704 }
705
97238b35
SAS
706 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
707 if (!config) {
97238b35
SAS
708 ret = -ENOMEM;
709 goto err;
65145677 710 }
97238b35
SAS
711 pdata.config = config;
712 pdata.platform_ops = &dsps_ops;
65145677 713
c031a7d4
SAS
714 config->num_eps = get_int_prop(dn, "mentor,num-eps");
715 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
869c5978 716 config->host_port_deassert_reset_at_resume = 1;
c031a7d4
SAS
717 pdata.mode = get_musb_port_mode(dev);
718 /* DT keeps this entry in mA, musb expects it as per USB spec */
719 pdata.power = get_int_prop(dn, "mentor,power") / 2;
606bf4d5
TL
720
721 ret = of_property_read_u32(dn, "mentor,multipoint", &val);
722 if (!ret && val)
723 config->multipoint = true;
65145677 724
63863b98 725 config->maximum_speed = usb_get_maximum_speed(&parent->dev);
41932b9b
BL
726 switch (config->maximum_speed) {
727 case USB_SPEED_LOW:
728 case USB_SPEED_FULL:
729 break;
730 case USB_SPEED_SUPER:
731 dev_warn(dev, "ignore incorrect maximum_speed "
732 "(super-speed) setting in dts");
733 /* fall through */
734 default:
735 config->maximum_speed = USB_SPEED_HIGH;
736 }
737
97238b35 738 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
9ecb8875
AKG
739 if (ret) {
740 dev_err(dev, "failed to add platform_data\n");
97238b35 741 goto err;
9ecb8875
AKG
742 }
743
744 ret = platform_device_add(musb);
745 if (ret) {
746 dev_err(dev, "failed to register musb device\n");
97238b35 747 goto err;
9ecb8875 748 }
9ecb8875
AKG
749 return 0;
750
97238b35 751err:
9ecb8875 752 platform_device_put(musb);
9ecb8875
AKG
753 return ret;
754}
755
41ac7b3a 756static int dsps_probe(struct platform_device *pdev)
9ecb8875 757{
65145677
AKG
758 const struct of_device_id *match;
759 const struct dsps_musb_wrapper *wrp;
9ecb8875 760 struct dsps_glue *glue;
97238b35 761 int ret;
9ecb8875 762
4fc4b274
SAS
763 if (!strcmp(pdev->name, "musb-hdrc"))
764 return -ENODEV;
765
cc506036 766 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
65145677
AKG
767 if (!match) {
768 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
97238b35 769 return -EINVAL;
65145677
AKG
770 }
771 wrp = match->data;
9ecb8875 772
3e457371
TL
773 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
774 dsps_ops.read_fifo = dsps_read_fifo32;
775
9ecb8875 776 /* allocate glue */
de9db572 777 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
0816ea2f 778 if (!glue)
97238b35 779 return -ENOMEM;
9ecb8875
AKG
780
781 glue->dev = &pdev->dev;
97238b35 782 glue->wrp = wrp;
9ecb8875 783
9ecb8875 784 platform_set_drvdata(pdev, glue);
9ecb8875 785 pm_runtime_enable(&pdev->dev);
65b3f50e
TL
786 pm_runtime_use_autosuspend(&pdev->dev);
787 pm_runtime_set_autosuspend_delay(&pdev->dev, 200);
9ecb8875
AKG
788
789 ret = pm_runtime_get_sync(&pdev->dev);
790 if (ret < 0) {
791 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
0e38c4ed
AKG
792 goto err2;
793 }
794
97238b35
SAS
795 ret = dsps_create_musb_pdev(glue, pdev);
796 if (ret)
797 goto err3;
9ecb8875 798
65b3f50e
TL
799 pm_runtime_mark_last_busy(&pdev->dev);
800 pm_runtime_put_autosuspend(&pdev->dev);
801
9ecb8875
AKG
802 return 0;
803
804err3:
65b3f50e 805 pm_runtime_put_sync(&pdev->dev);
9ecb8875 806err2:
65b3f50e 807 pm_runtime_dont_use_autosuspend(&pdev->dev);
0e38c4ed 808 pm_runtime_disable(&pdev->dev);
9ecb8875
AKG
809 return ret;
810}
97238b35 811
fb4e98ab 812static int dsps_remove(struct platform_device *pdev)
9ecb8875
AKG
813{
814 struct dsps_glue *glue = platform_get_drvdata(pdev);
815
97238b35 816 platform_device_unregister(glue->musb);
9ecb8875
AKG
817
818 /* disable usbss clocks */
65b3f50e
TL
819 pm_runtime_dont_use_autosuspend(&pdev->dev);
820 pm_runtime_put_sync(&pdev->dev);
9ecb8875 821 pm_runtime_disable(&pdev->dev);
40f099e3 822
9ecb8875
AKG
823 return 0;
824}
825
fa7b4ca5 826static const struct dsps_musb_wrapper am33xx_driver_data = {
9ecb8875
AKG
827 .revision = 0x00,
828 .control = 0x14,
829 .status = 0x18,
9ecb8875
AKG
830 .epintr_set = 0x38,
831 .epintr_clear = 0x40,
832 .epintr_status = 0x30,
833 .coreintr_set = 0x3c,
834 .coreintr_clear = 0x44,
835 .coreintr_status = 0x34,
836 .phy_utmi = 0xe0,
837 .mode = 0xe8,
b991f9b7
DM
838 .tx_mode = 0x70,
839 .rx_mode = 0x74,
9ecb8875
AKG
840 .reset = 0,
841 .otg_disable = 21,
842 .iddig = 8,
943c1397 843 .iddig_mux = 7,
9ecb8875
AKG
844 .usb_shift = 0,
845 .usb_mask = 0x1ff,
846 .usb_bitmap = (0x1ff << 0),
847 .drvvbus = 8,
848 .txep_shift = 0,
849 .txep_mask = 0xffff,
850 .txep_bitmap = (0xffff << 0),
851 .rxep_shift = 16,
852 .rxep_mask = 0xfffe,
853 .rxep_bitmap = (0xfffe << 16),
9e204d88 854 .poll_timeout = 2000, /* ms */
9ecb8875
AKG
855};
856
2f82686e 857static const struct of_device_id musb_dsps_of_match[] = {
65145677 858 { .compatible = "ti,musb-am33xx",
3e457371
TL
859 .data = &am33xx_driver_data, },
860 { .compatible = "ti,musb-dm816",
861 .data = &am33xx_driver_data, },
9ecb8875
AKG
862 { },
863};
864MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
865
5b783983 866#ifdef CONFIG_PM_SLEEP
869c5978
DM
867static int dsps_suspend(struct device *dev)
868{
869 struct dsps_glue *glue = dev_get_drvdata(dev);
870 const struct dsps_musb_wrapper *wrp = glue->wrp;
871 struct musb *musb = platform_get_drvdata(glue->musb);
f042e9cb 872 void __iomem *mbase;
869c5978 873
468bcc2a 874 del_timer_sync(&glue->timer);
f042e9cb
SAS
875
876 if (!musb)
877 /* This can happen if the musb device is in -EPROBE_DEFER */
878 return 0;
879
880 mbase = musb->ctrl_base;
086b2882
BL
881 glue->context.control = musb_readl(mbase, wrp->control);
882 glue->context.epintr = musb_readl(mbase, wrp->epintr_set);
883 glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set);
884 glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi);
885 glue->context.mode = musb_readl(mbase, wrp->mode);
886 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
887 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
869c5978
DM
888
889 return 0;
890}
891
892static int dsps_resume(struct device *dev)
893{
894 struct dsps_glue *glue = dev_get_drvdata(dev);
895 const struct dsps_musb_wrapper *wrp = glue->wrp;
896 struct musb *musb = platform_get_drvdata(glue->musb);
f042e9cb
SAS
897 void __iomem *mbase;
898
899 if (!musb)
900 return 0;
869c5978 901
f042e9cb 902 mbase = musb->ctrl_base;
086b2882
BL
903 musb_writel(mbase, wrp->control, glue->context.control);
904 musb_writel(mbase, wrp->epintr_set, glue->context.epintr);
905 musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
906 musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
907 musb_writel(mbase, wrp->mode, glue->context.mode);
908 musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
909 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
e47d9254 910 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
53185b3a 911 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
9e204d88
FB
912 mod_timer(&glue->timer, jiffies +
913 msecs_to_jiffies(wrp->poll_timeout));
869c5978
DM
914
915 return 0;
916}
917#endif
918
919static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
920
9ecb8875
AKG
921static struct platform_driver dsps_usbss_driver = {
922 .probe = dsps_probe,
7690417d 923 .remove = dsps_remove,
9ecb8875
AKG
924 .driver = {
925 .name = "musb-dsps",
869c5978 926 .pm = &dsps_pm_ops,
b432cb83 927 .of_match_table = musb_dsps_of_match,
9ecb8875 928 },
9ecb8875
AKG
929};
930
931MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
932MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
933MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
934MODULE_LICENSE("GPL v2");
935
97238b35 936module_platform_driver(dsps_usbss_driver);