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CommitLineData
550a7375
FB
1/*
2 * Copyright (C) 2005-2007 by Texas Instruments
3 * Some code has been taken from tusb6010.c
4 * Copyrights for that are attributable to:
5 * Copyright (C) 2006 Nokia Corporation
550a7375
FB
6 * Tony Lindgren <tony@atomide.com>
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/sched.h>
550a7375
FB
30#include <linux/init.h>
31#include <linux/list.h>
550a7375 32#include <linux/io.h>
00a0b1d5 33#include <linux/of.h>
dc09886b
FB
34#include <linux/platform_device.h>
35#include <linux/dma-mapping.h>
207b0e1f
HH
36#include <linux/pm_runtime.h>
37#include <linux/err.h>
12a19b5f 38#include <linux/delay.h>
c9721438 39#include <linux/usb/musb-omap.h>
550a7375 40
550a7375
FB
41#include "musb_core.h"
42#include "omap2430.h"
43
a3cee12a
FB
44struct omap2430_glue {
45 struct device *dev;
46 struct platform_device *musb;
c9721438 47 enum omap_musb_vbus_id_status status;
1e5acb8d 48 struct work_struct omap_musb_mailbox_work;
5ec40590 49 u32 __iomem *control_otghs;
a3cee12a 50};
c20aebb9 51#define glue_to_musb(g) platform_get_drvdata(g->musb)
a3cee12a 52
c9721438
KVA
53struct omap2430_glue *_glue;
54
550a7375
FB
55static struct timer_list musb_idle_timer;
56
5ec40590
KVA
57/**
58 * omap4_usb_phy_mailbox - write to usb otg mailbox
59 * @glue: struct omap2430_glue *
60 * @val: the value to be written to the mailbox
61 *
62 * On detection of a device (ID pin is grounded), this API should be called
63 * to set AVALID, VBUSVALID and ID pin is grounded.
64 *
65 * When OMAP is connected to a host (OMAP in device mode), this API
66 * is called to set AVALID, VBUSVALID and ID pin in high impedance.
67 *
68 * XXX: This function will be removed once we have a seperate driver for
69 * control module
70 */
71static void omap4_usb_phy_mailbox(struct omap2430_glue *glue, u32 val)
72{
73 if (glue->control_otghs)
74 writel(val, glue->control_otghs);
75}
76
550a7375
FB
77static void musb_do_idle(unsigned long _musb)
78{
79 struct musb *musb = (void *)_musb;
80 unsigned long flags;
81 u8 power;
82 u8 devctl;
83
550a7375
FB
84 spin_lock_irqsave(&musb->lock, flags);
85
84e250ff 86 switch (musb->xceiv->state) {
550a7375 87 case OTG_STATE_A_WAIT_BCON:
550a7375
FB
88
89 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
90 if (devctl & MUSB_DEVCTL_BDEVICE) {
84e250ff 91 musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375
FB
92 MUSB_DEV_MODE(musb);
93 } else {
84e250ff 94 musb->xceiv->state = OTG_STATE_A_IDLE;
550a7375
FB
95 MUSB_HST_MODE(musb);
96 }
97 break;
550a7375
FB
98 case OTG_STATE_A_SUSPEND:
99 /* finish RESUME signaling? */
100 if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
101 power = musb_readb(musb->mregs, MUSB_POWER);
102 power &= ~MUSB_POWER_RESUME;
5c8a86e1 103 dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
550a7375
FB
104 musb_writeb(musb->mregs, MUSB_POWER, power);
105 musb->is_active = 1;
106 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
107 | MUSB_PORT_STAT_RESUME);
108 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
109 usb_hcd_poll_rh_status(musb_to_hcd(musb));
110 /* NOTE: it might really be A_WAIT_BCON ... */
84e250ff 111 musb->xceiv->state = OTG_STATE_A_HOST;
550a7375
FB
112 }
113 break;
550a7375
FB
114 case OTG_STATE_A_HOST:
115 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
116 if (devctl & MUSB_DEVCTL_BDEVICE)
84e250ff 117 musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375 118 else
84e250ff 119 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
550a7375
FB
120 default:
121 break;
122 }
123 spin_unlock_irqrestore(&musb->lock, flags);
124}
125
126
743411b3 127static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
550a7375
FB
128{
129 unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
130 static unsigned long last_timer;
131
132 if (timeout == 0)
133 timeout = default_timeout;
134
135 /* Never idle if active, or when VBUS timeout is not set as host */
136 if (musb->is_active || ((musb->a_wait_bcon == 0)
84e250ff 137 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
5c8a86e1 138 dev_dbg(musb->controller, "%s active, deleting timer\n",
3df00453 139 otg_state_string(musb->xceiv->state));
550a7375
FB
140 del_timer(&musb_idle_timer);
141 last_timer = jiffies;
142 return;
143 }
144
145 if (time_after(last_timer, timeout)) {
146 if (!timer_pending(&musb_idle_timer))
147 last_timer = timeout;
148 else {
5c8a86e1 149 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
550a7375
FB
150 return;
151 }
152 }
153 last_timer = timeout;
154
5c8a86e1 155 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
3df00453 156 otg_state_string(musb->xceiv->state),
550a7375
FB
157 (unsigned long)jiffies_to_msecs(timeout - jiffies));
158 mod_timer(&musb_idle_timer, timeout);
159}
160
743411b3 161static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
550a7375 162{
d445b6da 163 struct usb_otg *otg = musb->xceiv->otg;
550a7375 164 u8 devctl;
594632ef 165 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
550a7375
FB
166 /* HDRC controls CPEN, but beware current surges during device
167 * connect. They can trigger transient overcurrent conditions
168 * that must be ignored.
169 */
170
171 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
172
173 if (is_on) {
594632ef 174 if (musb->xceiv->state == OTG_STATE_A_IDLE) {
12a19b5f 175 int loops = 100;
594632ef
HH
176 /* start the session */
177 devctl |= MUSB_DEVCTL_SESSION;
178 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
179 /*
180 * Wait for the musb to set as A device to enable the
181 * VBUS
182 */
183 while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
184
12a19b5f 185 mdelay(5);
594632ef
HH
186 cpu_relax();
187
12a19b5f
N
188 if (time_after(jiffies, timeout)
189 || loops-- <= 0) {
594632ef
HH
190 dev_err(musb->controller,
191 "configured as A device timeout");
594632ef
HH
192 break;
193 }
194 }
195
10770c5a 196 if (otg->set_vbus)
6e13c650 197 otg_set_vbus(otg, 1);
594632ef
HH
198 } else {
199 musb->is_active = 1;
d445b6da 200 otg->default_a = 1;
594632ef
HH
201 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
202 devctl |= MUSB_DEVCTL_SESSION;
203 MUSB_HST_MODE(musb);
204 }
550a7375
FB
205 } else {
206 musb->is_active = 0;
207
208 /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
209 * jumping right to B_IDLE...
210 */
211
d445b6da 212 otg->default_a = 0;
84e250ff 213 musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375
FB
214 devctl &= ~MUSB_DEVCTL_SESSION;
215
216 MUSB_DEV_MODE(musb);
217 }
218 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
219
5c8a86e1 220 dev_dbg(musb->controller, "VBUS %s, devctl %02x "
550a7375 221 /* otg %3x conf %08x prcm %08x */ "\n",
3df00453 222 otg_state_string(musb->xceiv->state),
550a7375
FB
223 musb_readb(musb->mregs, MUSB_DEVCTL));
224}
550a7375 225
743411b3 226static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
550a7375
FB
227{
228 u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
229
230 devctl |= MUSB_DEVCTL_SESSION;
231 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
232
96a274d1 233 return 0;
550a7375
FB
234}
235
c20aebb9
FB
236static inline void omap2430_low_level_exit(struct musb *musb)
237{
238 u32 l;
239
240 /* in any role */
241 l = musb_readl(musb->mregs, OTG_FORCESTDBY);
242 l |= ENABLEFORCE; /* enable MSTANDBY */
243 musb_writel(musb->mregs, OTG_FORCESTDBY, l);
c20aebb9
FB
244}
245
246static inline void omap2430_low_level_init(struct musb *musb)
247{
248 u32 l;
249
c20aebb9
FB
250 l = musb_readl(musb->mregs, OTG_FORCESTDBY);
251 l &= ~ENABLEFORCE; /* disable MSTANDBY */
252 musb_writel(musb->mregs, OTG_FORCESTDBY, l);
253}
254
c9721438 255void omap_musb_mailbox(enum omap_musb_vbus_id_status status)
594632ef 256{
c9721438 257 struct omap2430_glue *glue = _glue;
712d8efa 258
80ab72e1
AK
259 if (glue && glue_to_musb(glue)) {
260 glue->status = status;
261 } else {
262 pr_err("%s: musb core is not yet ready\n", __func__);
c9721438
KVA
263 return;
264 }
712d8efa 265
c9721438 266 schedule_work(&glue->omap_musb_mailbox_work);
712d8efa 267}
c9721438 268EXPORT_SYMBOL_GPL(omap_musb_mailbox);
712d8efa 269
c9721438 270static void omap_musb_set_mailbox(struct omap2430_glue *glue)
712d8efa 271{
5ec40590 272 u32 val;
1e5acb8d 273 struct musb *musb = glue_to_musb(glue);
594632ef
HH
274 struct device *dev = musb->controller;
275 struct musb_hdrc_platform_data *pdata = dev->platform_data;
276 struct omap_musb_board_data *data = pdata->board_data;
c83a8542 277 struct usb_otg *otg = musb->xceiv->otg;
594632ef 278
c9721438
KVA
279 switch (glue->status) {
280 case OMAP_MUSB_ID_GROUND:
281 dev_dbg(dev, "ID GND\n");
594632ef 282
c83a8542
KVA
283 otg->default_a = true;
284 musb->xceiv->state = OTG_STATE_A_IDLE;
c9721438 285 musb->xceiv->last_event = USB_EVENT_ID;
032ec49f 286 if (musb->gadget_driver) {
c9721438 287 pm_runtime_get_sync(dev);
5ec40590
KVA
288 val = AVALID | VBUSVALID;
289 omap4_usb_phy_mailbox(glue, val);
70045c57 290 omap2430_musb_set_vbus(musb, 1);
594632ef
HH
291 }
292 break;
293
c9721438
KVA
294 case OMAP_MUSB_VBUS_VALID:
295 dev_dbg(dev, "VBUS Connect\n");
594632ef 296
c83a8542
KVA
297 otg->default_a = false;
298 musb->xceiv->state = OTG_STATE_B_IDLE;
c9721438 299 musb->xceiv->last_event = USB_EVENT_VBUS;
7acc6197 300 if (musb->gadget_driver)
c9721438 301 pm_runtime_get_sync(dev);
5ec40590
KVA
302 val = IDDIG | AVALID | VBUSVALID;
303 omap4_usb_phy_mailbox(glue, val);
594632ef
HH
304 break;
305
c9721438
KVA
306 case OMAP_MUSB_ID_FLOAT:
307 case OMAP_MUSB_VBUS_OFF:
308 dev_dbg(dev, "VBUS Disconnect\n");
594632ef 309
c9721438 310 musb->xceiv->last_event = USB_EVENT_NONE;
032ec49f
FB
311 if (musb->gadget_driver) {
312 pm_runtime_mark_last_busy(dev);
313 pm_runtime_put_autosuspend(dev);
314 }
7acc6197 315
594632ef 316 if (data->interface_type == MUSB_INTERFACE_UTMI) {
6e13c650
HK
317 if (musb->xceiv->otg->set_vbus)
318 otg_set_vbus(musb->xceiv->otg, 0);
594632ef 319 }
5ec40590
KVA
320 val = SESSEND | IDDIG;
321 omap4_usb_phy_mailbox(glue, val);
594632ef
HH
322 break;
323 default:
c9721438 324 dev_dbg(dev, "ID float\n");
594632ef 325 }
594632ef
HH
326}
327
c9721438
KVA
328
329static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
330{
331 struct omap2430_glue *glue = container_of(mailbox_work,
332 struct omap2430_glue, omap_musb_mailbox_work);
333 omap_musb_set_mailbox(glue);
334}
335
baef653a
PDS
336static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
337{
338 unsigned long flags;
339 irqreturn_t retval = IRQ_NONE;
340 struct musb *musb = __hci;
341
342 spin_lock_irqsave(&musb->lock, flags);
343
344 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
345 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
346 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
347
348 if (musb->int_usb || musb->int_tx || musb->int_rx)
349 retval = musb_interrupt(musb);
350
351 spin_unlock_irqrestore(&musb->lock, flags);
352
353 return retval;
354}
355
743411b3 356static int omap2430_musb_init(struct musb *musb)
550a7375 357{
ad579699
S
358 u32 l;
359 int status = 0;
ea65df57 360 struct device *dev = musb->controller;
c9721438 361 struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
ea65df57
HK
362 struct musb_hdrc_platform_data *plat = dev->platform_data;
363 struct omap_musb_board_data *data = plat->board_data;
550a7375 364
84e250ff
DB
365 /* We require some kind of external transceiver, hooked
366 * up through ULPI. TWL4030-family PMICs include one,
367 * which needs a driver, drivers aren't always needed.
368 */
b1183c24 369 musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
ded017ee 370 if (IS_ERR_OR_NULL(musb->xceiv)) {
84e250ff
DB
371 pr_err("HS USB OTG: no transceiver configured\n");
372 return -ENODEV;
373 }
374
baef653a
PDS
375 musb->isr = omap2430_musb_interrupt;
376
7acc6197
HH
377 status = pm_runtime_get_sync(dev);
378 if (status < 0) {
ad579699 379 dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
7acc6197
HH
380 goto err1;
381 }
550a7375 382
8573e6a6 383 l = musb_readl(musb->mregs, OTG_INTERFSEL);
de2e1b0c
MM
384
385 if (data->interface_type == MUSB_INTERFACE_UTMI) {
386 /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
387 l &= ~ULPI_12PIN; /* Disable ULPI */
388 l |= UTMI_8BIT; /* Enable UTMI */
389 } else {
390 l |= ULPI_12PIN;
391 }
392
8573e6a6 393 musb_writel(musb->mregs, OTG_INTERFSEL, l);
550a7375
FB
394
395 pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
396 "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
8573e6a6
FB
397 musb_readl(musb->mregs, OTG_REVISION),
398 musb_readl(musb->mregs, OTG_SYSCONFIG),
399 musb_readl(musb->mregs, OTG_SYSSTATUS),
400 musb_readl(musb->mregs, OTG_INTERFSEL),
401 musb_readl(musb->mregs, OTG_SIMENABLE));
550a7375 402
550a7375
FB
403 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
404
c9721438
KVA
405 if (glue->status != OMAP_MUSB_UNKNOWN)
406 omap_musb_set_mailbox(glue);
407
c04352a5 408 pm_runtime_put_noidle(musb->controller);
550a7375 409 return 0;
7acc6197
HH
410
411err1:
7acc6197 412 return status;
550a7375
FB
413}
414
002eda13
HH
415static void omap2430_musb_enable(struct musb *musb)
416{
417 u8 devctl;
5ec40590 418 u32 val;
002eda13
HH
419 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
420 struct device *dev = musb->controller;
c9721438 421 struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
002eda13
HH
422 struct musb_hdrc_platform_data *pdata = dev->platform_data;
423 struct omap_musb_board_data *data = pdata->board_data;
424
c9721438 425 switch (glue->status) {
002eda13 426
c9721438 427 case OMAP_MUSB_ID_GROUND:
5ec40590
KVA
428 val = AVALID | VBUSVALID;
429 omap4_usb_phy_mailbox(glue, val);
08dec56e
FC
430 if (data->interface_type != MUSB_INTERFACE_UTMI)
431 break;
432 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
433 /* start the session */
434 devctl |= MUSB_DEVCTL_SESSION;
435 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
436 while (musb_readb(musb->mregs, MUSB_DEVCTL) &
437 MUSB_DEVCTL_BDEVICE) {
438 cpu_relax();
439
440 if (time_after(jiffies, timeout)) {
441 dev_err(dev, "configured as A device timeout");
442 break;
002eda13
HH
443 }
444 }
445 break;
446
c9721438 447 case OMAP_MUSB_VBUS_VALID:
5ec40590
KVA
448 val = IDDIG | AVALID | VBUSVALID;
449 omap4_usb_phy_mailbox(glue, val);
002eda13
HH
450 break;
451
452 default:
453 break;
454 }
455}
456
457static void omap2430_musb_disable(struct musb *musb)
458{
5ec40590 459 u32 val;
c9721438
KVA
460 struct device *dev = musb->controller;
461 struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
462
5ec40590
KVA
463 if (glue->status != OMAP_MUSB_UNKNOWN) {
464 val = SESSEND | IDDIG;
465 omap4_usb_phy_mailbox(glue, val);
466 }
550a7375
FB
467}
468
743411b3 469static int omap2430_musb_exit(struct musb *musb)
550a7375 470{
19b9a83e 471 del_timer_sync(&musb_idle_timer);
550a7375 472
c20aebb9 473 omap2430_low_level_exit(musb);
c20aebb9 474
550a7375
FB
475 return 0;
476}
743411b3 477
f7ec9437 478static const struct musb_platform_ops omap2430_ops = {
743411b3
FB
479 .init = omap2430_musb_init,
480 .exit = omap2430_musb_exit,
481
743411b3
FB
482 .set_mode = omap2430_musb_set_mode,
483 .try_idle = omap2430_musb_try_idle,
484
485 .set_vbus = omap2430_musb_set_vbus,
002eda13
HH
486
487 .enable = omap2430_musb_enable,
488 .disable = omap2430_musb_disable,
743411b3 489};
dc09886b
FB
490
491static u64 omap2430_dmamask = DMA_BIT_MASK(32);
492
41ac7b3a 493static int omap2430_probe(struct platform_device *pdev)
dc09886b
FB
494{
495 struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
00a0b1d5 496 struct omap_musb_board_data *data;
dc09886b 497 struct platform_device *musb;
a3cee12a 498 struct omap2430_glue *glue;
00a0b1d5
KVA
499 struct device_node *np = pdev->dev.of_node;
500 struct musb_hdrc_config *config;
5ec40590 501 struct resource *res;
dc09886b
FB
502 int ret = -ENOMEM;
503
b1183c24 504 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
a3cee12a
FB
505 if (!glue) {
506 dev_err(&pdev->dev, "failed to allocate glue context\n");
507 goto err0;
508 }
509
2f771164 510 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
dc09886b
FB
511 if (!musb) {
512 dev_err(&pdev->dev, "failed to allocate musb device\n");
2f771164 513 goto err0;
dc09886b
FB
514 }
515
516 musb->dev.parent = &pdev->dev;
517 musb->dev.dma_mask = &omap2430_dmamask;
518 musb->dev.coherent_dma_mask = omap2430_dmamask;
519
a3cee12a
FB
520 glue->dev = &pdev->dev;
521 glue->musb = musb;
c9721438 522 glue->status = OMAP_MUSB_UNKNOWN;
a3cee12a 523
5ec40590
KVA
524 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
525
526 glue->control_otghs = devm_request_and_ioremap(&pdev->dev, res);
527 if (glue->control_otghs == NULL)
528 dev_dbg(&pdev->dev, "Failed to obtain control memory\n");
529
00a0b1d5
KVA
530 if (np) {
531 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
532 if (!pdata) {
533 dev_err(&pdev->dev,
534 "failed to allocate musb platfrom data\n");
2f771164 535 goto err2;
00a0b1d5
KVA
536 }
537
538 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
539 if (!data) {
540 dev_err(&pdev->dev,
8df4ce75 541 "failed to allocate musb board data\n");
2f771164 542 goto err2;
00a0b1d5
KVA
543 }
544
545 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
546 if (!data) {
547 dev_err(&pdev->dev,
548 "failed to allocate musb hdrc config\n");
2f771164 549 goto err2;
00a0b1d5
KVA
550 }
551
552 of_property_read_u32(np, "mode", (u32 *)&pdata->mode);
553 of_property_read_u32(np, "interface_type",
554 (u32 *)&data->interface_type);
555 of_property_read_u32(np, "num_eps", (u32 *)&config->num_eps);
556 of_property_read_u32(np, "ram_bits", (u32 *)&config->ram_bits);
557 of_property_read_u32(np, "power", (u32 *)&pdata->power);
558 config->multipoint = of_property_read_bool(np, "multipoint");
559
560 pdata->board_data = data;
561 pdata->config = config;
562 }
563
f7ec9437
FB
564 pdata->platform_ops = &omap2430_ops;
565
a3cee12a 566 platform_set_drvdata(pdev, glue);
dc09886b 567
c9721438
KVA
568 /*
569 * REVISIT if we ever have two instances of the wrapper, we will be
570 * in big trouble
571 */
572 _glue = glue;
573
1e5acb8d
KVA
574 INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
575
dc09886b
FB
576 ret = platform_device_add_resources(musb, pdev->resource,
577 pdev->num_resources);
578 if (ret) {
579 dev_err(&pdev->dev, "failed to add resources\n");
65b3d52d 580 goto err2;
dc09886b
FB
581 }
582
583 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
584 if (ret) {
585 dev_err(&pdev->dev, "failed to add platform_data\n");
65b3d52d 586 goto err2;
dc09886b
FB
587 }
588
3006dc8c
KVA
589 pm_runtime_enable(&pdev->dev);
590
dc09886b
FB
591 ret = platform_device_add(musb);
592 if (ret) {
593 dev_err(&pdev->dev, "failed to register musb device\n");
65b3d52d 594 goto err2;
dc09886b
FB
595 }
596
207b0e1f 597 return 0;
03491761 598
65b3d52d 599err2:
b1183c24 600 platform_device_put(musb);
a3cee12a 601
dc09886b
FB
602err0:
603 return ret;
604}
605
fb4e98ab 606static int omap2430_remove(struct platform_device *pdev)
dc09886b 607{
a3cee12a 608 struct omap2430_glue *glue = platform_get_drvdata(pdev);
dc09886b 609
1e5acb8d 610 cancel_work_sync(&glue->omap_musb_mailbox_work);
f039df58 611 platform_device_unregister(glue->musb);
dc09886b
FB
612
613 return 0;
614}
615
c20aebb9 616#ifdef CONFIG_PM
c20aebb9 617
7acc6197 618static int omap2430_runtime_suspend(struct device *dev)
c20aebb9
FB
619{
620 struct omap2430_glue *glue = dev_get_drvdata(dev);
621 struct musb *musb = glue_to_musb(glue);
622
afb76df1
VZ
623 if (musb) {
624 musb->context.otg_interfsel = musb_readl(musb->mregs,
625 OTG_INTERFSEL);
e25bec16 626
afb76df1
VZ
627 omap2430_low_level_exit(musb);
628 usb_phy_set_suspend(musb->xceiv, 1);
629 }
c20aebb9
FB
630
631 return 0;
632}
633
7acc6197 634static int omap2430_runtime_resume(struct device *dev)
c20aebb9
FB
635{
636 struct omap2430_glue *glue = dev_get_drvdata(dev);
637 struct musb *musb = glue_to_musb(glue);
c20aebb9 638
afb76df1
VZ
639 if (musb) {
640 omap2430_low_level_init(musb);
641 musb_writel(musb->mregs, OTG_INTERFSEL,
642 musb->context.otg_interfsel);
e25bec16 643
afb76df1
VZ
644 usb_phy_set_suspend(musb->xceiv, 0);
645 }
c20aebb9
FB
646
647 return 0;
648}
649
650static struct dev_pm_ops omap2430_pm_ops = {
7acc6197
HH
651 .runtime_suspend = omap2430_runtime_suspend,
652 .runtime_resume = omap2430_runtime_resume,
c20aebb9
FB
653};
654
655#define DEV_PM_OPS (&omap2430_pm_ops)
656#else
657#define DEV_PM_OPS NULL
658#endif
659
00a0b1d5
KVA
660#ifdef CONFIG_OF
661static const struct of_device_id omap2430_id_table[] = {
662 {
663 .compatible = "ti,omap4-musb"
664 },
665 {
666 .compatible = "ti,omap3-musb"
667 },
668 {},
669};
670MODULE_DEVICE_TABLE(of, omap2430_id_table);
671#endif
672
dc09886b 673static struct platform_driver omap2430_driver = {
e9e8c85e 674 .probe = omap2430_probe,
7690417d 675 .remove = omap2430_remove,
dc09886b
FB
676 .driver = {
677 .name = "musb-omap2430",
c20aebb9 678 .pm = DEV_PM_OPS,
00a0b1d5 679 .of_match_table = of_match_ptr(omap2430_id_table),
dc09886b
FB
680 },
681};
682
683MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
684MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
685MODULE_LICENSE("GPL v2");
686
687static int __init omap2430_init(void)
688{
e9e8c85e 689 return platform_driver_register(&omap2430_driver);
dc09886b 690}
c9721438 691subsys_initcall(omap2430_init);
dc09886b
FB
692
693static void __exit omap2430_exit(void)
694{
695 platform_driver_unregister(&omap2430_driver);
696}
697module_exit(omap2430_exit);