]>
Commit | Line | Data |
---|---|---|
550a7375 FB |
1 | /* |
2 | * Copyright (C) 2005-2007 by Texas Instruments | |
3 | * Some code has been taken from tusb6010.c | |
4 | * Copyrights for that are attributable to: | |
5 | * Copyright (C) 2006 Nokia Corporation | |
550a7375 FB |
6 | * Tony Lindgren <tony@atomide.com> |
7 | * | |
8 | * This file is part of the Inventra Controller Driver for Linux. | |
9 | * | |
10 | * The Inventra Controller Driver for Linux is free software; you | |
11 | * can redistribute it and/or modify it under the terms of the GNU | |
12 | * General Public License version 2 as published by the Free Software | |
13 | * Foundation. | |
14 | * | |
15 | * The Inventra Controller Driver for Linux is distributed in | |
16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; | |
17 | * without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
19 | * License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with The Inventra Controller Driver for Linux ; if not, | |
23 | * write to the Free Software Foundation, Inc., 59 Temple Place, | |
24 | * Suite 330, Boston, MA 02111-1307 USA | |
25 | * | |
26 | */ | |
27 | #include <linux/module.h> | |
28 | #include <linux/kernel.h> | |
29 | #include <linux/sched.h> | |
550a7375 FB |
30 | #include <linux/init.h> |
31 | #include <linux/list.h> | |
32 | #include <linux/clk.h> | |
33 | #include <linux/io.h> | |
dc09886b FB |
34 | #include <linux/platform_device.h> |
35 | #include <linux/dma-mapping.h> | |
207b0e1f HH |
36 | #include <linux/pm_runtime.h> |
37 | #include <linux/err.h> | |
550a7375 | 38 | |
550a7375 FB |
39 | #include "musb_core.h" |
40 | #include "omap2430.h" | |
41 | ||
a3cee12a FB |
42 | struct omap2430_glue { |
43 | struct device *dev; | |
44 | struct platform_device *musb; | |
45 | }; | |
c20aebb9 | 46 | #define glue_to_musb(g) platform_get_drvdata(g->musb) |
a3cee12a | 47 | |
550a7375 FB |
48 | static struct timer_list musb_idle_timer; |
49 | ||
50 | static void musb_do_idle(unsigned long _musb) | |
51 | { | |
52 | struct musb *musb = (void *)_musb; | |
53 | unsigned long flags; | |
eef767b7 | 54 | #ifdef CONFIG_USB_MUSB_HDRC_HCD |
550a7375 | 55 | u8 power; |
eef767b7 | 56 | #endif |
550a7375 FB |
57 | u8 devctl; |
58 | ||
550a7375 FB |
59 | spin_lock_irqsave(&musb->lock, flags); |
60 | ||
84e250ff | 61 | switch (musb->xceiv->state) { |
550a7375 | 62 | case OTG_STATE_A_WAIT_BCON: |
550a7375 FB |
63 | |
64 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
65 | if (devctl & MUSB_DEVCTL_BDEVICE) { | |
84e250ff | 66 | musb->xceiv->state = OTG_STATE_B_IDLE; |
550a7375 FB |
67 | MUSB_DEV_MODE(musb); |
68 | } else { | |
84e250ff | 69 | musb->xceiv->state = OTG_STATE_A_IDLE; |
550a7375 FB |
70 | MUSB_HST_MODE(musb); |
71 | } | |
72 | break; | |
73 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | |
74 | case OTG_STATE_A_SUSPEND: | |
75 | /* finish RESUME signaling? */ | |
76 | if (musb->port1_status & MUSB_PORT_STAT_RESUME) { | |
77 | power = musb_readb(musb->mregs, MUSB_POWER); | |
78 | power &= ~MUSB_POWER_RESUME; | |
79 | DBG(1, "root port resume stopped, power %02x\n", power); | |
80 | musb_writeb(musb->mregs, MUSB_POWER, power); | |
81 | musb->is_active = 1; | |
82 | musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | |
83 | | MUSB_PORT_STAT_RESUME); | |
84 | musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; | |
85 | usb_hcd_poll_rh_status(musb_to_hcd(musb)); | |
86 | /* NOTE: it might really be A_WAIT_BCON ... */ | |
84e250ff | 87 | musb->xceiv->state = OTG_STATE_A_HOST; |
550a7375 FB |
88 | } |
89 | break; | |
90 | #endif | |
91 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | |
92 | case OTG_STATE_A_HOST: | |
93 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
94 | if (devctl & MUSB_DEVCTL_BDEVICE) | |
84e250ff | 95 | musb->xceiv->state = OTG_STATE_B_IDLE; |
550a7375 | 96 | else |
84e250ff | 97 | musb->xceiv->state = OTG_STATE_A_WAIT_BCON; |
550a7375 FB |
98 | #endif |
99 | default: | |
100 | break; | |
101 | } | |
102 | spin_unlock_irqrestore(&musb->lock, flags); | |
103 | } | |
104 | ||
105 | ||
743411b3 | 106 | static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout) |
550a7375 FB |
107 | { |
108 | unsigned long default_timeout = jiffies + msecs_to_jiffies(3); | |
109 | static unsigned long last_timer; | |
110 | ||
111 | if (timeout == 0) | |
112 | timeout = default_timeout; | |
113 | ||
114 | /* Never idle if active, or when VBUS timeout is not set as host */ | |
115 | if (musb->is_active || ((musb->a_wait_bcon == 0) | |
84e250ff | 116 | && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { |
550a7375 FB |
117 | DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); |
118 | del_timer(&musb_idle_timer); | |
119 | last_timer = jiffies; | |
120 | return; | |
121 | } | |
122 | ||
123 | if (time_after(last_timer, timeout)) { | |
124 | if (!timer_pending(&musb_idle_timer)) | |
125 | last_timer = timeout; | |
126 | else { | |
127 | DBG(4, "Longer idle timer already pending, ignoring\n"); | |
128 | return; | |
129 | } | |
130 | } | |
131 | last_timer = timeout; | |
132 | ||
133 | DBG(4, "%s inactive, for idle timer for %lu ms\n", | |
134 | otg_state_string(musb), | |
135 | (unsigned long)jiffies_to_msecs(timeout - jiffies)); | |
136 | mod_timer(&musb_idle_timer, timeout); | |
137 | } | |
138 | ||
743411b3 | 139 | static void omap2430_musb_set_vbus(struct musb *musb, int is_on) |
550a7375 FB |
140 | { |
141 | u8 devctl; | |
594632ef HH |
142 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); |
143 | int ret = 1; | |
550a7375 FB |
144 | /* HDRC controls CPEN, but beware current surges during device |
145 | * connect. They can trigger transient overcurrent conditions | |
146 | * that must be ignored. | |
147 | */ | |
148 | ||
149 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
150 | ||
151 | if (is_on) { | |
594632ef HH |
152 | if (musb->xceiv->state == OTG_STATE_A_IDLE) { |
153 | /* start the session */ | |
154 | devctl |= MUSB_DEVCTL_SESSION; | |
155 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
156 | /* | |
157 | * Wait for the musb to set as A device to enable the | |
158 | * VBUS | |
159 | */ | |
160 | while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) { | |
161 | ||
162 | cpu_relax(); | |
163 | ||
164 | if (time_after(jiffies, timeout)) { | |
165 | dev_err(musb->controller, | |
166 | "configured as A device timeout"); | |
167 | ret = -EINVAL; | |
168 | break; | |
169 | } | |
170 | } | |
171 | ||
172 | if (ret && musb->xceiv->set_vbus) | |
173 | otg_set_vbus(musb->xceiv, 1); | |
174 | } else { | |
175 | musb->is_active = 1; | |
176 | musb->xceiv->default_a = 1; | |
177 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; | |
178 | devctl |= MUSB_DEVCTL_SESSION; | |
179 | MUSB_HST_MODE(musb); | |
180 | } | |
550a7375 FB |
181 | } else { |
182 | musb->is_active = 0; | |
183 | ||
184 | /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and | |
185 | * jumping right to B_IDLE... | |
186 | */ | |
187 | ||
84e250ff DB |
188 | musb->xceiv->default_a = 0; |
189 | musb->xceiv->state = OTG_STATE_B_IDLE; | |
550a7375 FB |
190 | devctl &= ~MUSB_DEVCTL_SESSION; |
191 | ||
192 | MUSB_DEV_MODE(musb); | |
193 | } | |
194 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
195 | ||
196 | DBG(1, "VBUS %s, devctl %02x " | |
197 | /* otg %3x conf %08x prcm %08x */ "\n", | |
198 | otg_state_string(musb), | |
199 | musb_readb(musb->mregs, MUSB_DEVCTL)); | |
200 | } | |
550a7375 | 201 | |
743411b3 | 202 | static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode) |
550a7375 FB |
203 | { |
204 | u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
205 | ||
206 | devctl |= MUSB_DEVCTL_SESSION; | |
207 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
208 | ||
96a274d1 | 209 | return 0; |
550a7375 FB |
210 | } |
211 | ||
c20aebb9 FB |
212 | static inline void omap2430_low_level_exit(struct musb *musb) |
213 | { | |
214 | u32 l; | |
215 | ||
216 | /* in any role */ | |
217 | l = musb_readl(musb->mregs, OTG_FORCESTDBY); | |
218 | l |= ENABLEFORCE; /* enable MSTANDBY */ | |
219 | musb_writel(musb->mregs, OTG_FORCESTDBY, l); | |
c20aebb9 FB |
220 | } |
221 | ||
222 | static inline void omap2430_low_level_init(struct musb *musb) | |
223 | { | |
224 | u32 l; | |
225 | ||
c20aebb9 FB |
226 | l = musb_readl(musb->mregs, OTG_FORCESTDBY); |
227 | l &= ~ENABLEFORCE; /* disable MSTANDBY */ | |
228 | musb_writel(musb->mregs, OTG_FORCESTDBY, l); | |
229 | } | |
230 | ||
594632ef HH |
231 | /* blocking notifier support */ |
232 | static int musb_otg_notifications(struct notifier_block *nb, | |
233 | unsigned long event, void *unused) | |
234 | { | |
235 | struct musb *musb = container_of(nb, struct musb, nb); | |
236 | struct device *dev = musb->controller; | |
237 | struct musb_hdrc_platform_data *pdata = dev->platform_data; | |
238 | struct omap_musb_board_data *data = pdata->board_data; | |
239 | ||
240 | switch (event) { | |
241 | case USB_EVENT_ID: | |
242 | DBG(4, "ID GND\n"); | |
243 | ||
244 | if (is_otg_enabled(musb)) { | |
245 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC | |
246 | if (musb->gadget_driver) { | |
7acc6197 | 247 | pm_runtime_get_sync(musb->controller); |
594632ef | 248 | otg_init(musb->xceiv); |
70045c57 | 249 | omap2430_musb_set_vbus(musb, 1); |
594632ef HH |
250 | } |
251 | #endif | |
252 | } else { | |
7acc6197 | 253 | pm_runtime_get_sync(musb->controller); |
594632ef | 254 | otg_init(musb->xceiv); |
70045c57 | 255 | omap2430_musb_set_vbus(musb, 1); |
594632ef HH |
256 | } |
257 | break; | |
258 | ||
259 | case USB_EVENT_VBUS: | |
260 | DBG(4, "VBUS Connect\n"); | |
261 | ||
36a52c00 | 262 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC |
7acc6197 HH |
263 | if (musb->gadget_driver) |
264 | pm_runtime_get_sync(musb->controller); | |
36a52c00 | 265 | #endif |
594632ef HH |
266 | otg_init(musb->xceiv); |
267 | break; | |
268 | ||
269 | case USB_EVENT_NONE: | |
270 | DBG(4, "VBUS Disconnect\n"); | |
271 | ||
7acc6197 HH |
272 | #ifdef CONFIG_USB_GADGET_MUSB_HDRC |
273 | if (is_otg_enabled(musb)) | |
274 | if (musb->gadget_driver) | |
275 | #endif | |
276 | { | |
277 | pm_runtime_mark_last_busy(musb->controller); | |
278 | pm_runtime_put_autosuspend(musb->controller); | |
279 | } | |
280 | ||
594632ef HH |
281 | if (data->interface_type == MUSB_INTERFACE_UTMI) { |
282 | if (musb->xceiv->set_vbus) | |
283 | otg_set_vbus(musb->xceiv, 0); | |
284 | } | |
285 | otg_shutdown(musb->xceiv); | |
286 | break; | |
287 | default: | |
288 | DBG(4, "ID float\n"); | |
289 | return NOTIFY_DONE; | |
290 | } | |
291 | ||
292 | return NOTIFY_OK; | |
293 | } | |
294 | ||
743411b3 | 295 | static int omap2430_musb_init(struct musb *musb) |
550a7375 | 296 | { |
594632ef | 297 | u32 l, status = 0; |
ea65df57 HK |
298 | struct device *dev = musb->controller; |
299 | struct musb_hdrc_platform_data *plat = dev->platform_data; | |
300 | struct omap_musb_board_data *data = plat->board_data; | |
550a7375 | 301 | |
84e250ff DB |
302 | /* We require some kind of external transceiver, hooked |
303 | * up through ULPI. TWL4030-family PMICs include one, | |
304 | * which needs a driver, drivers aren't always needed. | |
305 | */ | |
306 | musb->xceiv = otg_get_transceiver(); | |
307 | if (!musb->xceiv) { | |
308 | pr_err("HS USB OTG: no transceiver configured\n"); | |
309 | return -ENODEV; | |
310 | } | |
311 | ||
7acc6197 HH |
312 | status = pm_runtime_get_sync(dev); |
313 | if (status < 0) { | |
314 | dev_err(dev, "pm_runtime_get_sync FAILED"); | |
315 | goto err1; | |
316 | } | |
550a7375 | 317 | |
8573e6a6 | 318 | l = musb_readl(musb->mregs, OTG_INTERFSEL); |
de2e1b0c MM |
319 | |
320 | if (data->interface_type == MUSB_INTERFACE_UTMI) { | |
321 | /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */ | |
322 | l &= ~ULPI_12PIN; /* Disable ULPI */ | |
323 | l |= UTMI_8BIT; /* Enable UTMI */ | |
324 | } else { | |
325 | l |= ULPI_12PIN; | |
326 | } | |
327 | ||
8573e6a6 | 328 | musb_writel(musb->mregs, OTG_INTERFSEL, l); |
550a7375 FB |
329 | |
330 | pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, " | |
331 | "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n", | |
8573e6a6 FB |
332 | musb_readl(musb->mregs, OTG_REVISION), |
333 | musb_readl(musb->mregs, OTG_SYSCONFIG), | |
334 | musb_readl(musb->mregs, OTG_SYSSTATUS), | |
335 | musb_readl(musb->mregs, OTG_INTERFSEL), | |
336 | musb_readl(musb->mregs, OTG_SIMENABLE)); | |
550a7375 | 337 | |
594632ef HH |
338 | musb->nb.notifier_call = musb_otg_notifications; |
339 | status = otg_register_notifier(musb->xceiv, &musb->nb); | |
340 | ||
341 | if (status) | |
342 | DBG(1, "notification register failed\n"); | |
343 | ||
550a7375 FB |
344 | setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb); |
345 | ||
346 | return 0; | |
7acc6197 HH |
347 | |
348 | err1: | |
349 | pm_runtime_disable(dev); | |
350 | return status; | |
550a7375 FB |
351 | } |
352 | ||
002eda13 HH |
353 | static void omap2430_musb_enable(struct musb *musb) |
354 | { | |
355 | u8 devctl; | |
356 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | |
357 | struct device *dev = musb->controller; | |
358 | struct musb_hdrc_platform_data *pdata = dev->platform_data; | |
359 | struct omap_musb_board_data *data = pdata->board_data; | |
360 | ||
361 | switch (musb->xceiv->last_event) { | |
362 | ||
363 | case USB_EVENT_ID: | |
364 | otg_init(musb->xceiv); | |
365 | if (data->interface_type == MUSB_INTERFACE_UTMI) { | |
366 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
367 | /* start the session */ | |
368 | devctl |= MUSB_DEVCTL_SESSION; | |
369 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
370 | while (musb_readb(musb->mregs, MUSB_DEVCTL) & | |
371 | MUSB_DEVCTL_BDEVICE) { | |
372 | cpu_relax(); | |
373 | ||
374 | if (time_after(jiffies, timeout)) { | |
375 | dev_err(musb->controller, | |
376 | "configured as A device timeout"); | |
377 | break; | |
378 | } | |
379 | } | |
380 | } | |
381 | break; | |
382 | ||
383 | case USB_EVENT_VBUS: | |
384 | otg_init(musb->xceiv); | |
385 | break; | |
386 | ||
387 | default: | |
388 | break; | |
389 | } | |
390 | } | |
391 | ||
392 | static void omap2430_musb_disable(struct musb *musb) | |
393 | { | |
394 | if (musb->xceiv->last_event) | |
395 | otg_shutdown(musb->xceiv); | |
550a7375 FB |
396 | } |
397 | ||
743411b3 | 398 | static int omap2430_musb_exit(struct musb *musb) |
550a7375 | 399 | { |
19b9a83e | 400 | del_timer_sync(&musb_idle_timer); |
550a7375 | 401 | |
c20aebb9 | 402 | omap2430_low_level_exit(musb); |
f4053874 | 403 | otg_put_transceiver(musb->xceiv); |
c20aebb9 | 404 | |
550a7375 FB |
405 | return 0; |
406 | } | |
743411b3 | 407 | |
f7ec9437 | 408 | static const struct musb_platform_ops omap2430_ops = { |
743411b3 FB |
409 | .init = omap2430_musb_init, |
410 | .exit = omap2430_musb_exit, | |
411 | ||
743411b3 FB |
412 | .set_mode = omap2430_musb_set_mode, |
413 | .try_idle = omap2430_musb_try_idle, | |
414 | ||
415 | .set_vbus = omap2430_musb_set_vbus, | |
002eda13 HH |
416 | |
417 | .enable = omap2430_musb_enable, | |
418 | .disable = omap2430_musb_disable, | |
743411b3 | 419 | }; |
dc09886b FB |
420 | |
421 | static u64 omap2430_dmamask = DMA_BIT_MASK(32); | |
422 | ||
423 | static int __init omap2430_probe(struct platform_device *pdev) | |
424 | { | |
425 | struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data; | |
426 | struct platform_device *musb; | |
a3cee12a | 427 | struct omap2430_glue *glue; |
dc09886b FB |
428 | int ret = -ENOMEM; |
429 | ||
a3cee12a FB |
430 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); |
431 | if (!glue) { | |
432 | dev_err(&pdev->dev, "failed to allocate glue context\n"); | |
433 | goto err0; | |
434 | } | |
435 | ||
dc09886b FB |
436 | musb = platform_device_alloc("musb-hdrc", -1); |
437 | if (!musb) { | |
438 | dev_err(&pdev->dev, "failed to allocate musb device\n"); | |
a3cee12a | 439 | goto err1; |
dc09886b FB |
440 | } |
441 | ||
442 | musb->dev.parent = &pdev->dev; | |
443 | musb->dev.dma_mask = &omap2430_dmamask; | |
444 | musb->dev.coherent_dma_mask = omap2430_dmamask; | |
445 | ||
a3cee12a FB |
446 | glue->dev = &pdev->dev; |
447 | glue->musb = musb; | |
448 | ||
f7ec9437 FB |
449 | pdata->platform_ops = &omap2430_ops; |
450 | ||
a3cee12a | 451 | platform_set_drvdata(pdev, glue); |
dc09886b FB |
452 | |
453 | ret = platform_device_add_resources(musb, pdev->resource, | |
454 | pdev->num_resources); | |
455 | if (ret) { | |
456 | dev_err(&pdev->dev, "failed to add resources\n"); | |
207b0e1f | 457 | goto err2; |
dc09886b FB |
458 | } |
459 | ||
460 | ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); | |
461 | if (ret) { | |
462 | dev_err(&pdev->dev, "failed to add platform_data\n"); | |
207b0e1f | 463 | goto err2; |
dc09886b FB |
464 | } |
465 | ||
466 | ret = platform_device_add(musb); | |
467 | if (ret) { | |
468 | dev_err(&pdev->dev, "failed to register musb device\n"); | |
207b0e1f | 469 | goto err2; |
dc09886b FB |
470 | } |
471 | ||
207b0e1f | 472 | pm_runtime_enable(&pdev->dev); |
03491761 | 473 | |
207b0e1f | 474 | return 0; |
03491761 | 475 | |
a3cee12a | 476 | err2: |
dc09886b FB |
477 | platform_device_put(musb); |
478 | ||
a3cee12a FB |
479 | err1: |
480 | kfree(glue); | |
481 | ||
dc09886b FB |
482 | err0: |
483 | return ret; | |
484 | } | |
485 | ||
486 | static int __exit omap2430_remove(struct platform_device *pdev) | |
487 | { | |
a3cee12a | 488 | struct omap2430_glue *glue = platform_get_drvdata(pdev); |
dc09886b | 489 | |
a3cee12a FB |
490 | platform_device_del(glue->musb); |
491 | platform_device_put(glue->musb); | |
207b0e1f HH |
492 | pm_runtime_put(&pdev->dev); |
493 | pm_runtime_disable(&pdev->dev); | |
a3cee12a | 494 | kfree(glue); |
dc09886b FB |
495 | |
496 | return 0; | |
497 | } | |
498 | ||
c20aebb9 | 499 | #ifdef CONFIG_PM |
c20aebb9 | 500 | |
7acc6197 | 501 | static int omap2430_runtime_suspend(struct device *dev) |
c20aebb9 FB |
502 | { |
503 | struct omap2430_glue *glue = dev_get_drvdata(dev); | |
504 | struct musb *musb = glue_to_musb(glue); | |
505 | ||
506 | omap2430_low_level_exit(musb); | |
507 | otg_set_suspend(musb->xceiv, 1); | |
c20aebb9 FB |
508 | |
509 | return 0; | |
510 | } | |
511 | ||
7acc6197 | 512 | static int omap2430_runtime_resume(struct device *dev) |
c20aebb9 FB |
513 | { |
514 | struct omap2430_glue *glue = dev_get_drvdata(dev); | |
515 | struct musb *musb = glue_to_musb(glue); | |
c20aebb9 FB |
516 | |
517 | omap2430_low_level_init(musb); | |
c20aebb9 FB |
518 | otg_set_suspend(musb->xceiv, 0); |
519 | ||
520 | return 0; | |
521 | } | |
522 | ||
523 | static struct dev_pm_ops omap2430_pm_ops = { | |
7acc6197 HH |
524 | .runtime_suspend = omap2430_runtime_suspend, |
525 | .runtime_resume = omap2430_runtime_resume, | |
c20aebb9 FB |
526 | }; |
527 | ||
528 | #define DEV_PM_OPS (&omap2430_pm_ops) | |
529 | #else | |
530 | #define DEV_PM_OPS NULL | |
531 | #endif | |
532 | ||
dc09886b FB |
533 | static struct platform_driver omap2430_driver = { |
534 | .remove = __exit_p(omap2430_remove), | |
535 | .driver = { | |
536 | .name = "musb-omap2430", | |
c20aebb9 | 537 | .pm = DEV_PM_OPS, |
dc09886b FB |
538 | }, |
539 | }; | |
540 | ||
541 | MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer"); | |
542 | MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); | |
543 | MODULE_LICENSE("GPL v2"); | |
544 | ||
545 | static int __init omap2430_init(void) | |
546 | { | |
547 | return platform_driver_probe(&omap2430_driver, omap2430_probe); | |
548 | } | |
549 | subsys_initcall(omap2430_init); | |
550 | ||
551 | static void __exit omap2430_exit(void) | |
552 | { | |
553 | platform_driver_unregister(&omap2430_driver); | |
554 | } | |
555 | module_exit(omap2430_exit); |